I recently aquired a dual xeon system. HT is enabled which shows up as 4
cpus. I noticed that all interrupts are on CPU0. Can anyone tell me why
this is?
--
Lab tests show that use of micro$oft causes cancer in lab animals
On Sat, 2004-01-24 at 20:36 -0500, Wakko Warner wrote:
> I recently aquired a dual xeon system. HT is enabled which shows up as 4
> cpus. I noticed that all interrupts are on CPU0. Can anyone tell me why
> this is?
The APIC needs to be programmed to deliver interrupts to certain
processors.
In 2.6, this is done in user-space via a program called irqbalance:
http://people.redhat.com/arjanv/irqbalance/
If you run Red Hat, it is in the "kernel-utils" package.
Robert Love
> > I recently aquired a dual xeon system. HT is enabled which shows up as 4
> > cpus. I noticed that all interrupts are on CPU0. Can anyone tell me why
> > this is?
>
> The APIC needs to be programmed to deliver interrupts to certain
> processors.
>
> In 2.6, this is done in user-space via a program called irqbalance:
Thanks, working great. (Debian by the way)
--
Lab tests show that use of micro$oft causes cancer in lab animals
Wakko Warner wrote (ao):
> > > I recently aquired a dual xeon system. HT is enabled which shows
> > > up as 4 cpus. I noticed that all interrupts are on CPU0. Can
> > > anyone tell me why this is?
> >
> > The APIC needs to be programmed to deliver interrupts to certain
> > processors.
> >
> > In 2.6, this is done in user-space via a program called irqbalance:
>
> Thanks, working great. (Debian by the way)
Ehm, IIRC the "all interrupts are on CPU0" is how it is supposed to work
with a 2.6 kernel? The interrupts should spread if you have _a_lot_ of
them. This gives better performance than spreading the interrupts. Did I
read this on the list, or am I completely wrong here?
--
Humilis IT Services and Solutions
http://www.humilis.net
On Tue, 2004-01-27 at 08:38, Sander wrote:
> Wakko Warner wrote (ao):
> > > > I recently aquired a dual xeon system. HT is enabled which shows
> > > > up as 4 cpus. I noticed that all interrupts are on CPU0. Can
> > > > anyone tell me why this is?
> > >
> > > The APIC needs to be programmed to deliver interrupts to certain
> > > processors.
> > >
> > > In 2.6, this is done in user-space via a program called irqbalance:
> >
> > Thanks, working great. (Debian by the way)
>
> Ehm, IIRC the "all interrupts are on CPU0" is how it is supposed to work
> with a 2.6 kernel? The interrupts should spread if you have _a_lot_ of
> them. This gives better performance than spreading the interrupts. Did I
> read this on the list, or am I completely wrong here?
Apparently it was way especially better performance wise to have
interrupts that hit often (ethernet cards ie.) on the same cpu.
But I can't see a reason for not dividing the different interrupt on
different cpu's and letting them stay put. Maybe if you keep all
interrupts on the same cpu the cache on the other ones will not have to
be flushed often, which would be a good thing.
How would it be to maybe remove all interrupts from a cpu (except
between cpu's) and have a few cpu's merely working with data and one "in
control". Bad idea I guess as I haven't seen any such work.
Alex
You can run irqbalance in one shot mode not continously. Check the
options.
On Tue, 2004-01-27 at 17:13, Alexander Nyberg wrote:
> On Tue, 2004-01-27 at 08:38, Sander wrote:
> > Wakko Warner wrote (ao):
> > > > > I recently aquired a dual xeon system. HT is enabled which shows
> > > > > up as 4 cpus. I noticed that all interrupts are on CPU0. Can
> > > > > anyone tell me why this is?
> > > >
> > > > The APIC needs to be programmed to deliver interrupts to certain
> > > > processors.
> > > >
> > > > In 2.6, this is done in user-space via a program called irqbalance:
> > >
> > > Thanks, working great. (Debian by the way)
> >
> > Ehm, IIRC the "all interrupts are on CPU0" is how it is supposed to work
> > with a 2.6 kernel? The interrupts should spread if you have _a_lot_ of
> > them. This gives better performance than spreading the interrupts. Did I
> > read this on the list, or am I completely wrong here?
>
> Apparently it was way especially better performance wise to have
> interrupts that hit often (ethernet cards ie.) on the same cpu.
>
> But I can't see a reason for not dividing the different interrupt on
> different cpu's and letting them stay put. Maybe if you keep all
> interrupts on the same cpu the cache on the other ones will not have to
> be flushed often, which would be a good thing.
>
> How would it be to maybe remove all interrupts from a cpu (except
> between cpu's) and have a few cpu's merely working with data and one "in
> control". Bad idea I guess as I haven't seen any such work.
>
> Alex
>
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Alexander Nyberg wrote:
> But I can't see a reason for not dividing the different interrupt on
> different cpu's and letting them stay put.
You want to spread the load, but that is hard to do without knowing
which interrupt sources are heavy and which are light.
Dividing them once might end up with keyboard & mouse interrupts
on one cpu and network+disk on another. This is clearly imbalanced.
An irq balancing utility will fix this, by balancing based
on interrupt count.
> Maybe if you keep all
> interrupts on the same cpu the cache on the other ones will not have to
> be flushed often, which would be a good thing.
>
> How would it be to maybe remove all interrupts from a cpu (except
> between cpu's) and have a few cpu's merely working with data and one "in
> control". Bad idea I guess as I haven't seen any such work.
Makes sense only if the amounts of interrupt work and other work matches
the division you make.
Helge Hafting