Hi,
Here is another set of PATA support improvements (on top of atang tree).
libata:
- fix handling of PIO timings for Compact Flash devices
- fix various issues for CMD64x chipsets
- fix secondary port support for Efar chipsets
- enable parallel scanning for ATi and Efar chipsets
- improve PIO performance for Cypress and VIA chipsets
- misc fixes/cleanups
IDE:
- fix timings calculations for ALi, CMD64x and Cypress chipsets
- add SATA cable detection support
- fix various issues for VIA chipsets
- add support for VIA VT6415, VT8261 and future chipsets
- fix pair device speed checking for chipsets that need it
- misc fixes/cleanups
The following changes since commit c527cc925f95a839583cd331f24445c6269446c0:
Bartlomiej Zolnierkiewicz (1):
add PATA host controller support for Cirrus Logic's EP93xx CPUs (v2)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/bart/misc.git atang-v3.0
Bartlomiej Zolnierkiewicz (64):
libata: fix CFA handling in ide_timing_compute()
pata_ali: documentation fixes
pata_ali: cleanup ali_set_piomode()
pata_amd: remove bogus code from timing_setup()
pata_atiixp: remove superfluous wrapper function
pata_atiixp: add locking for parallel scanning
pata_atiixp: enable parallel scan
pata_cmd64x: fix PIO setup
pata_cmd64x: fix handling of address setup timings
pata_cmd64x: cmd648_bmdma_stop() fix
pata_cmd64x: remove unused definitions
pata_cs5520: convert to use ->init_host method
pata_cs5535: use correct values for PIO1 and PIO2 data timings
pata_cypress: fix PIO timings underclocking
pata_efar: always program master_data before slave_data
pata_efar: fix secondary port support
pata_efar: add locking for parallel scanning
pata_efar: enable parallel scan
pata_serverworks: fix PIO setup for the second channel
pata_serverworks: fix error message
pata_serverworks: cleanup cable detection
pata_via: fix address setup timings underlocking
pata_via: store UDMA masks in via_isa_bridges table
ide: fix for ide_timing quantisation errors
ide: use standard timing for XFER_PIO_SLOW mode in ide_timing_compute()
alim15x3: fix PIO timings calculations
alim15x3: add ali_fifo_control() helper
alim15x3: remove superfluous locking from ali_set_pio_mode()
alim15x3: cleanup ali_cable_detect()
amd74xx: don't change UDMA settings when programming PIO timings
cmd64x: fix PIO and MWDMA timings calculations
cmd64x: remove superfluous checks from cmd64x_set_dma_mode()
cy82c693: fix PIO timings calculations
cy82c693: remove stale driver history
opti621: remove stale driver history
pdc202xx_old: add ->init_hwif method
serverworks: cleanup svwks_udma_filter()
serverworks: add missing pci_dev_put() call
via82cxxx: vx855 is a single channel controller
ide: add SATA cable detection support
via82cxxx: fix SATA cable detection
via82cxxx: workaround h/w bugs
via82cxxx: add support for vt8261 and future chips
via82cxxx: add support for VT6415 PCIE PATA IDE Host Controller
via82cxxx: fix UDMA settings programming
ide: add drive->pio_mode field
ide: add drive->dma_mode field
ide: change ->set_pio_mode method parameters
ide: change ->set_dma_mode method parameters
ide-timings: use ->pio_mode value to determine fastest PIO speed
alim15x3: fix handling of address setup timings
alim15x3: fix handling of command timings
alim15x3: fix handling of DMA timings
alim15x3: fix handling of UDMA enable bit
amd74xx: use ->pio_mode value to determine pair device speed
cmd64x: fix handling of address setup timings
cs5535: use ->pio_mode value to determine pair device speed
cs5536: use ->pio_mode value to determine pair device speed
it821x: use ->pio_mode value to determine pair device speed
palm_bk3710: use ->pio_mode value to determine pair device speed
siimage: use ->pio_mode value to determine pair device speed
tx493xide: use ->pio_mode value to determine pair device speed
via82cxxx: use ->pio_mode value to determine pair device speed
ide: make ide_get_best_pio_mode() static
drivers/ata/libata-core.c | 17 ++-
drivers/ata/pata_ali.c | 15 +--
drivers/ata/pata_amd.c | 5 -
drivers/ata/pata_atiixp.c | 58 +++++++-----
drivers/ata/pata_cmd64x.c | 26 +++---
drivers/ata/pata_cs5520.c | 55 +++++-------
drivers/ata/pata_cs5535.c | 2 +-
drivers/ata/pata_cypress.c | 10 +-
drivers/ata/pata_efar.c | 58 +++++++++---
drivers/ata/pata_serverworks.c | 42 ++-------
drivers/ata/pata_via.c | 202 +++++++++++++++++++---------------------
drivers/ide/aec62xx.c | 13 ++-
drivers/ide/ali14xx.c | 3 +-
drivers/ide/alim15x3.c | 171 ++++++++++++++++++----------------
drivers/ide/amd74xx.c | 18 ++--
drivers/ide/at91_ide.c | 5 +-
drivers/ide/atiixp.c | 14 ++-
drivers/ide/au1xxx-ide.c | 9 +-
drivers/ide/cmd640.c | 3 +-
drivers/ide/cmd64x.c | 114 +++++++++--------------
drivers/ide/cs5520.c | 9 +-
drivers/ide/cs5530.c | 13 ++-
drivers/ide/cs5535.c | 14 ++--
drivers/ide/cs5536.c | 16 ++--
drivers/ide/cy82c693.c | 146 +++++------------------------
drivers/ide/dtc2278.c | 4 +-
drivers/ide/hpt366.c | 9 +-
drivers/ide/ht6560b.c | 3 +-
drivers/ide/icside.c | 3 +-
drivers/ide/ide-devsets.c | 6 +-
drivers/ide/ide-iops.c | 2 +-
drivers/ide/ide-probe.c | 2 +
drivers/ide/ide-timings.c | 22 +++--
drivers/ide/ide-xfer-mode.c | 18 ++--
drivers/ide/it8172.c | 14 ++--
drivers/ide/it8213.c | 20 ++--
drivers/ide/it821x.c | 14 ++-
drivers/ide/jmicron.c | 6 +-
drivers/ide/opti621.c | 77 +---------------
drivers/ide/palm_bk3710.c | 12 ++-
drivers/ide/pdc202xx_new.c | 8 +-
drivers/ide/pdc202xx_old.c | 27 +++---
drivers/ide/piix.c | 20 ++--
drivers/ide/pmac.c | 9 +-
drivers/ide/qd65xx.c | 10 +-
drivers/ide/sc1200.c | 8 +-
drivers/ide/scc_pata.c | 12 +-
drivers/ide/serverworks.c | 50 ++++-------
drivers/ide/sgiioc4.c | 2 +-
drivers/ide/siimage.c | 14 ++--
drivers/ide/sis5513.c | 8 +-
drivers/ide/sl82c105.c | 8 +-
drivers/ide/slc90e66.c | 17 ++--
drivers/ide/tc86c001.c | 9 +-
drivers/ide/triflex.c | 10 +-
drivers/ide/tx4938ide.c | 7 +-
drivers/ide/tx4939ide.c | 10 +-
drivers/ide/umc8672.c | 5 +-
drivers/ide/via82cxxx.c | 132 +++++++++++++++++++++-----
include/linux/ide.h | 7 +-
60 files changed, 768 insertions(+), 855 deletions(-)
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] pata_amd: remove bogus code from timing_setup()
DMA modes don't have 8-bit timings.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ata/pata_amd.c | 5 -----
1 file changed, 5 deletions(-)
Index: b/drivers/ata/pata_amd.c
===================================================================
--- a/drivers/ata/pata_amd.c
+++ b/drivers/ata/pata_amd.c
@@ -65,11 +65,6 @@ static void timing_setup(struct ata_port
}
if (peer) {
- /* This may be over conservative */
- if (peer->dma_mode) {
- ata_timing_compute(peer, peer->dma_mode, &apeer, T, UT);
- ata_timing_merge(&apeer, &at, &at, ATA_TIMING_8BIT);
- }
ata_timing_compute(peer, peer->pio_mode, &apeer, T, UT);
ata_timing_merge(&apeer, &at, &at, ATA_TIMING_8BIT);
}
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] libata: fix CFA handling in ide_timing_compute()
Use standard cycle timing for CFA PIO5 and PIO6 modes.
Based on commit 74638c8 for IDE subsystem.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ata/libata-core.c | 17 +++++++++++------
1 file changed, 11 insertions(+), 6 deletions(-)
Index: b/drivers/ata/libata-core.c
===================================================================
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -3211,6 +3211,7 @@ const struct ata_timing *ata_timing_find
int ata_timing_compute(struct ata_device *adev, unsigned short speed,
struct ata_timing *t, int T, int UT)
{
+ const u16 *id = adev->id;
const struct ata_timing *s;
struct ata_timing p;
@@ -3228,14 +3229,18 @@ int ata_timing_compute(struct ata_device
* PIO/MW_DMA cycle timing.
*/
- if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
+ if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
memset(&p, 0, sizeof(p));
+
if (speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
- if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
- else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
- } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
- p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
- }
+ if (speed <= XFER_PIO_2)
+ p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO];
+ else if ((speed <= XFER_PIO_4) ||
+ (speed == XFER_PIO_5 && !ata_id_is_cfa(id)))
+ p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY];
+ } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
+ p.cycle = id[ATA_ID_EIDE_DMA_MIN];
+
ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
}
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] pata_ali: cleanup ali_set_piomode()
Merge ali_fifo_control() calls.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ata/pata_ali.c | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
Index: b/drivers/ata/pata_ali.c
===================================================================
--- a/drivers/ata/pata_ali.c
+++ b/drivers/ata/pata_ali.c
@@ -222,12 +222,9 @@ static void ali_set_piomode(struct ata_p
}
/* PIO FIFO is only permitted on ATA disk */
- if (adev->class != ATA_DEV_ATA)
- ali_fifo_control(ap, adev, 0x00);
- ali_program_modes(ap, adev, &t, 0);
- if (adev->class == ATA_DEV_ATA)
- ali_fifo_control(ap, adev, 0x05);
+ ali_fifo_control(ap, adev, (adev->class == ATA_DEV_ATA) ? 0x05 : 0x00);
+ ali_program_modes(ap, adev, &t, 0);
}
/**
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] pata_atiixp: remove superfluous wrapper function
Fix documentation for ->set_[pio,dma]mode methods while at it.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ata/pata_atiixp.c | 29 +++++++----------------------
1 file changed, 7 insertions(+), 22 deletions(-)
Index: b/drivers/ata/pata_atiixp.c
===================================================================
--- a/drivers/ata/pata_atiixp.c
+++ b/drivers/ata/pata_atiixp.c
@@ -72,22 +72,22 @@ static int atiixp_prereset(struct ata_li
}
/**
- * atiixp_set_pio_timing - set initial PIO mode data
+ * atiixp_set_piomode - set PIO mode data
* @ap: ATA interface
* @adev: ATA device
*
- * Called by both the pio and dma setup functions to set the controller
- * timings for PIO transfers. We must load both the mode number and
- * timing values into the controller.
+ * Called to set the controller timings for PIO transfers. We must
+ * load both the mode number and timing values into the controller.
*/
-static void atiixp_set_pio_timing(struct ata_port *ap, struct ata_device *adev, int pio)
+static void atiixp_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
static u8 pio_timings[5] = { 0x5D, 0x47, 0x34, 0x22, 0x20 };
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
int dn = 2 * ap->port_no + adev->devno;
int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
+ int pio = adev->pio_mode - XFER_PIO_0;
u32 pio_timing_data;
u16 pio_mode_data;
@@ -103,26 +103,11 @@ static void atiixp_set_pio_timing(struct
}
/**
- * atiixp_set_piomode - set initial PIO mode data
- * @ap: ATA interface
- * @adev: ATA device
- *
- * Called to do the PIO mode setup. We use a shared helper for this
- * as the DMA setup must also adjust the PIO timing information.
- */
-
-static void atiixp_set_piomode(struct ata_port *ap, struct ata_device *adev)
-{
- atiixp_set_pio_timing(ap, adev, adev->pio_mode - XFER_PIO_0);
-}
-
-/**
- * atiixp_set_dmamode - set initial DMA mode data
+ * atiixp_set_dmamode - set DMA mode data
* @ap: ATA interface
* @adev: ATA device
*
- * Called to do the DMA mode setup. We use timing tables for most
- * modes but must tune an appropriate PIO mode to match.
+ * Called to do the DMA mode setup.
*/
static void atiixp_set_dmamode(struct ata_port *ap, struct ata_device *adev)
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] pata_atiixp: add locking for parallel scanning
This is similar change as commit 60c3be3 for ata_piix host driver
and while pata_atiixp doesn't enable parallel scan yet the race
could probably also be triggered by requesting re-scanning of both
ports at the same time using SCSI sysfs interface.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ata/pata_atiixp.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
Index: b/drivers/ata/pata_atiixp.c
===================================================================
--- a/drivers/ata/pata_atiixp.c
+++ b/drivers/ata/pata_atiixp.c
@@ -1,7 +1,7 @@
/*
* pata_atiixp.c - ATI PATA for new ATA layer
* (C) 2005 Red Hat Inc
- * (C) 2009 Bartlomiej Zolnierkiewicz
+ * (C) 2009-2010 Bartlomiej Zolnierkiewicz
*
* Based on
*
@@ -71,6 +71,8 @@ static int atiixp_prereset(struct ata_li
return ata_sff_prereset(link, deadline);
}
+static DEFINE_SPINLOCK(atiixp_lock);
+
/**
* atiixp_set_piomode - set PIO mode data
* @ap: ATA interface
@@ -85,12 +87,15 @@ static void atiixp_set_piomode(struct at
static u8 pio_timings[5] = { 0x5D, 0x47, 0x34, 0x22, 0x20 };
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ unsigned long flags;
int dn = 2 * ap->port_no + adev->devno;
int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
int pio = adev->pio_mode - XFER_PIO_0;
u32 pio_timing_data;
u16 pio_mode_data;
+ spin_lock_irqsave(&atiixp_lock, flags);
+
pci_read_config_word(pdev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
pio_mode_data &= ~(0x7 << (4 * dn));
pio_mode_data |= pio << (4 * dn);
@@ -100,6 +105,8 @@ static void atiixp_set_piomode(struct at
pio_timing_data &= ~(0xFF << timing_shift);
pio_timing_data |= (pio_timings[pio] << timing_shift);
pci_write_config_dword(pdev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
+
+ spin_unlock_irqrestore(&atiixp_lock, flags);
}
/**
@@ -115,10 +122,13 @@ static void atiixp_set_dmamode(struct at
static u8 mwdma_timings[5] = { 0x77, 0x21, 0x20 };
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ unsigned long flags;
int dma = adev->dma_mode;
int dn = 2 * ap->port_no + adev->devno;
u16 tmp16;
+ spin_lock_irqsave(&atiixp_lock, flags);
+
pci_read_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
if (adev->dma_mode >= XFER_UDMA_0) {
@@ -149,6 +159,8 @@ static void atiixp_set_dmamode(struct at
}
pci_write_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
+
+ spin_unlock_irqrestore(&atiixp_lock, flags);
}
static struct scsi_host_template atiixp_sht = {
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] pata_cs5535: use correct values for PIO1 and PIO2 data timings
There shouldn't be any problems with it as IDE cs5535 host driver
has been using those values for years and they match values given
in the (publicly available) datasheet.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ata/pata_cs5535.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Index: b/drivers/ata/pata_cs5535.c
===================================================================
--- a/drivers/ata/pata_cs5535.c
+++ b/drivers/ata/pata_cs5535.c
@@ -98,7 +98,7 @@ static int cs5535_cable_detect(struct at
static void cs5535_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
static const u16 pio_timings[5] = {
- 0xF7F4, 0x53F3, 0x13F1, 0x5131, 0x1131
+ 0xF7F4, 0xF173, 0x8141, 0x5131, 0x1131
};
static const u16 pio_cmd_timings[5] = {
0xF7F4, 0x53F3, 0x13F1, 0x5131, 0x1131
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] pata_cmd64x: cmd648_bmdma_stop() fix
Clear the primary channel pending interrupt bit
instead of the reserved one.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ata/pata_cmd64x.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Index: b/drivers/ata/pata_cmd64x.c
===================================================================
--- a/drivers/ata/pata_cmd64x.c
+++ b/drivers/ata/pata_cmd64x.c
@@ -40,7 +40,7 @@
enum {
CFR = 0x50,
- CFR_INTR_CH0 = 0x02,
+ CFR_INTR_CH0 = 0x04,
CNTRL = 0x51,
CNTRL_DIS_RA0 = 0x40,
CNTRL_DIS_RA1 = 0x80,
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] pata_cs5520: convert to use ->init_host method
Remove bogus kernel warning while at it.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ata/pata_cs5520.c | 55 +++++++++++++++++++---------------------------
1 file changed, 23 insertions(+), 32 deletions(-)
Index: b/drivers/ata/pata_cs5520.c
===================================================================
--- a/drivers/ata/pata_cs5520.c
+++ b/drivers/ata/pata_cs5520.c
@@ -115,6 +115,25 @@ static struct ata_port_operations cs5520
.set_piomode = cs5520_set_piomode,
};
+/**
+ * cs5520_fixup - device fixup
+ * @dev: device
+ *
+ * We need to restore DMA mode support on BIOSen which disabled it.
+ */
+
+static int cs5520_fixup(struct device *dev)
+{
+ struct pci_dev *pdev = to_pci_dev(dev);
+ u8 pcicfg;
+
+ pci_read_config_byte(pdev, 0x60, &pcicfg);
+ if ((pcicfg & 0x40) == 0)
+ pci_write_config_byte(pdev, 0x60, pcicfg | 0x40);
+
+ return 0;
+}
+
static int __devinit cs5520_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
{
static const unsigned int cmd_port[] = { 0x1F0, 0x170 };
@@ -148,11 +167,7 @@ static int __devinit cs5520_init_one(str
if (pcicfg & 2)
ppi[1] = π
- if ((pcicfg & 0x40) == 0) {
- dev_printk(KERN_WARNING, &pdev->dev,
- "DMA mode disabled. Enabling.\n");
- pci_write_config_byte(pdev, 0x60, pcicfg | 0x40);
- }
+ cs5520_fixup(&pdev->dev);
pi.mwdma_mask = id->driver_data;
@@ -160,6 +175,8 @@ static int __devinit cs5520_init_one(str
if (!host)
return -ENOMEM;
+ host->init_host = cs5520_fixup;
+
/* Perform set up for DMA */
if (pci_enable_device_io(pdev)) {
printk(KERN_ERR DRV_NAME ": unable to configure BAR2.\n");
@@ -233,32 +250,6 @@ static int __devinit cs5520_init_one(str
#ifdef CONFIG_PM
/**
- * cs5520_reinit_one - device resume
- * @pdev: PCI device
- *
- * Do any reconfiguration work needed by a resume from RAM. We need
- * to restore DMA mode support on BIOSen which disabled it
- */
-
-static int cs5520_reinit_one(struct pci_dev *pdev)
-{
- struct ata_host *host = dev_get_drvdata(&pdev->dev);
- u8 pcicfg;
- int rc;
-
- rc = ata_pci_device_do_resume(pdev);
- if (rc)
- return rc;
-
- pci_read_config_byte(pdev, 0x60, &pcicfg);
- if ((pcicfg & 0x40) == 0)
- pci_write_config_byte(pdev, 0x60, pcicfg | 0x40);
-
- ata_host_resume(host);
- return 0;
-}
-
-/**
* cs5520_pci_device_suspend - device suspend
* @pdev: PCI device
*
@@ -299,7 +290,7 @@ static struct pci_driver cs5520_pci_driv
.remove = ata_pci_remove_one,
#ifdef CONFIG_PM
.suspend = cs5520_pci_device_suspend,
- .resume = cs5520_reinit_one,
+ .resume = ata_pci_device_resume,
#endif
};
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] pata_cmd64x: fix handling of address setup timings
Account for the requirements of the DMA mode currently used
by the pair device.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ata/pata_cmd64x.c | 6 ++++++
1 file changed, 6 insertions(+)
Index: b/drivers/ata/pata_cmd64x.c
===================================================================
--- a/drivers/ata/pata_cmd64x.c
+++ b/drivers/ata/pata_cmd64x.c
@@ -165,8 +165,14 @@ static void cmd64x_set_timing(struct ata
if (pair) {
struct ata_timing tp;
+
ata_timing_compute(pair, pair->pio_mode, &tp, T, 0);
ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP);
+ if (pair->dma_mode) {
+ ata_timing_compute(pair, pair->dma_mode,
+ &tp, T, 0);
+ ata_timing_merge(&tp, &t, &t, ATA_TIMING_SETUP);
+ }
}
}
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] pata_cypress: fix PIO timings underclocking
Timing registers should be programmed with the desired number of clocks
minus one clock.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ata/pata_cypress.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
Index: b/drivers/ata/pata_cypress.c
===================================================================
--- a/drivers/ata/pata_cypress.c
+++ b/drivers/ata/pata_cypress.c
@@ -62,14 +62,16 @@ static void cy82c693_set_piomode(struct
return;
}
- time_16 = clamp_val(t.recover, 0, 15) | (clamp_val(t.active, 0, 15) << 4);
- time_8 = clamp_val(t.act8b, 0, 15) | (clamp_val(t.rec8b, 0, 15) << 4);
+ time_16 = clamp_val(t.recover - 1, 0, 15) |
+ (clamp_val(t.active - 1, 0, 15) << 4);
+ time_8 = clamp_val(t.act8b - 1, 0, 15) |
+ (clamp_val(t.rec8b - 1, 0, 15) << 4);
if (adev->devno == 0) {
pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
addr &= ~0x0F; /* Mask bits */
- addr |= clamp_val(t.setup, 0, 15);
+ addr |= clamp_val(t.setup - 1, 0, 15);
pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr);
pci_write_config_byte(pdev, CY82_IDE_MASTER_IOR, time_16);
@@ -79,7 +81,7 @@ static void cy82c693_set_piomode(struct
pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
addr &= ~0xF0; /* Mask bits */
- addr |= (clamp_val(t.setup, 0, 15) << 4);
+ addr |= (clamp_val(t.setup - 1, 0, 15) << 4);
pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr);
pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOR, time_16);
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] pata_efar: fix secondary port support
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ata/pata_efar.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Index: b/drivers/ata/pata_efar.c
===================================================================
--- a/drivers/ata/pata_efar.c
+++ b/drivers/ata/pata_efar.c
@@ -2,7 +2,7 @@
* pata_efar.c - EFAR PIIX clone controller driver
*
* (C) 2005 Red Hat
- * (C) 2009 Bartlomiej Zolnierkiewicz
+ * (C) 2009-2010 Bartlomiej Zolnierkiewicz
*
* Some parts based on ata_piix.c by Jeff Garzik and others.
*
@@ -222,7 +222,7 @@ static int efar_init_one (struct pci_dev
.udma_mask = ATA_UDMA4,
.port_ops = &efar_ops,
};
- const struct ata_port_info *ppi[] = { &info, NULL };
+ const struct ata_port_info *ppi[] = { &info, &info };
if (!printed_version++)
dev_printk(KERN_DEBUG, &pdev->dev,
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] pata_cmd64x: fix PIO setup
Fix incorrect handling of recovery clocks value == 16 resulting
in overclocked recovery timings & potentially underclocked active
timings.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ata/pata_cmd64x.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
Index: b/drivers/ata/pata_cmd64x.c
===================================================================
--- a/drivers/ata/pata_cmd64x.c
+++ b/drivers/ata/pata_cmd64x.c
@@ -2,7 +2,7 @@
* pata_cmd64x.c - CMD64x PATA for new ATA layer
* (C) 2005 Red Hat Inc
* Alan Cox <[email protected]>
- * (C) 2009 Bartlomiej Zolnierkiewicz
+ * (C) 2009-2010 Bartlomiej Zolnierkiewicz
*
* Based upon
* linux/drivers/ide/pci/cmd64x.c Version 1.30 Sept 10, 2002
@@ -182,7 +182,9 @@ static void cmd64x_set_timing(struct ata
/* Now convert the clocks into values we can actually stuff into
the chip */
- if (t.recover > 1)
+ if (t.recover == 16)
+ t.recover = 0;
+ else if (t.recover > 1)
t.recover--;
else
t.recover = 15;
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] pata_efar: add locking for parallel scanning
Add clearing of UDMA enable bit also for PIO modes and then add
an extra locking for parallel scanning.
This is similar change as commit 60c3be3 for ata_piix host driver
and while pata_efar doesn't enable parallel scan yet the race could
probably also be triggered by requesting re-scanning of both ports
at the same time using SCSI sysfs interface.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ata/pata_efar.c | 29 ++++++++++++++++++++++-------
1 file changed, 22 insertions(+), 7 deletions(-)
Index: b/drivers/ata/pata_efar.c
===================================================================
--- a/drivers/ata/pata_efar.c
+++ b/drivers/ata/pata_efar.c
@@ -68,14 +68,18 @@ static int efar_cable_detect(struct ata_
return ATA_CBL_PATA80;
}
+static DEFINE_SPINLOCK(efar_lock);
+
static void efar_set_timings(struct ata_port *ap, struct ata_device *adev,
u8 pio, bool use_mwdma)
{
struct pci_dev *dev = to_pci_dev(ap->host->dev);
+ unsigned long flags;
unsigned int is_slave = (adev->devno != 0);
u8 master_port = ap->port_no ? 0x42 : 0x40;
u16 master_data;
u8 slave_data;
+ u8 udma_enable;
int control = 0;
/*
@@ -103,6 +107,8 @@ static void efar_set_timings(struct ata_
/* Enable DMA timing only */
control |= 8; /* PIO cycles in PIO0 */
+ spin_lock_irqsave(&efar_lock, flags);
+
pci_read_config_word(dev, master_port, &master_data);
/* Set PPE, IE, and TIME as appropriate */
@@ -127,6 +133,12 @@ static void efar_set_timings(struct ata_
pci_write_config_word(dev, master_port, master_data);
if (is_slave)
pci_write_config_byte(dev, 0x44, slave_data);
+
+ pci_read_config_byte(dev, 0x48, &udma_enable);
+ udma_enable &= ~(1 << (2 * ap->port_no + adev->devno));
+ pci_write_config_byte(dev, 0x48, udma_enable);
+
+ spin_unlock_irqrestore(&efar_lock, flags);
}
/**
@@ -159,16 +171,19 @@ static void efar_set_piomode(struct ata_
static void efar_set_dmamode (struct ata_port *ap, struct ata_device *adev)
{
struct pci_dev *dev = to_pci_dev(ap->host->dev);
+ unsigned long flags;
u8 speed = adev->dma_mode;
int devid = adev->devno + 2 * ap->port_no;
u8 udma_enable;
- pci_read_config_byte(dev, 0x48, &udma_enable);
-
if (speed >= XFER_UDMA_0) {
unsigned int udma = speed - XFER_UDMA_0;
u16 udma_timing;
+ spin_lock_irqsave(&efar_lock, flags);
+
+ pci_read_config_byte(dev, 0x48, &udma_enable);
+
udma_enable |= (1 << devid);
/* Load the UDMA mode number */
@@ -176,13 +191,13 @@ static void efar_set_dmamode (struct ata
udma_timing &= ~(7 << (4 * devid));
udma_timing |= udma << (4 * devid);
pci_write_config_word(dev, 0x4A, udma_timing);
- } else {
+
+ pci_write_config_byte(dev, 0x48, udma_enable);
+
+ spin_unlock_irqrestore(&efar_lock, flags);
+ } else
/* MWDMA is driven by the PIO timings. */
efar_set_timings(ap, adev, ata_mwdma_to_pio(speed), 1);
-
- udma_enable &= ~(1 << devid);
- }
- pci_write_config_byte(dev, 0x48, udma_enable);
}
static struct scsi_host_template efar_sht = {
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] ide: fix for ide_timing quantisation errors
Based on commit 4f701d1 for libata.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/ide-timings.c | 6 ++++++
1 file changed, 6 insertions(+)
Index: b/drivers/ide/ide-timings.c
===================================================================
--- a/drivers/ide/ide-timings.c
+++ b/drivers/ide/ide-timings.c
@@ -206,6 +206,12 @@ int ide_timing_compute(ide_drive_t *driv
t->recover = t->cycle - t->active;
}
+ /* In a few cases quantisation may produce enough errors to
+ leave t->cycle too low for the sum of active and recovery
+ if so we must correct this */
+ if (t->active + t->recover > t->cycle)
+ t->cycle = t->active + t->recover;
+
return 0;
}
EXPORT_SYMBOL_GPL(ide_timing_compute);
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] pata_serverworks: fix error message
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ata/pata_serverworks.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Index: b/drivers/ata/pata_serverworks.c
===================================================================
--- a/drivers/ata/pata_serverworks.c
+++ b/drivers/ata/pata_serverworks.c
@@ -306,7 +306,7 @@ static int serverworks_fixup_osb4(struct
pci_dev_put(isa_dev);
return 0;
}
- printk(KERN_WARNING "ata_serverworks: Unable to find bridge.\n");
+ printk(KERN_WARNING DRV_NAME ": Unable to find bridge.\n");
return -ENODEV;
}
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] pata_via: store UDMA masks in via_isa_bridges table
* store UDMA masks in via_isa_bridges[] and while at it make "flags"
field to be u8 instead of u16
* convert the driver to use UDMA masks from via_isa_bridges[]
* remove no longer needed VIA_UDMA* defines
Make some minor documentation and CodingStyle fixes while at it.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ata/pata_via.c | 198 +++++++++++++++++++++++--------------------------
1 file changed, 93 insertions(+), 105 deletions(-)
Index: b/drivers/ata/pata_via.c
===================================================================
--- a/drivers/ata/pata_via.c
+++ b/drivers/ata/pata_via.c
@@ -22,6 +22,7 @@
* VIA VT8233c - UDMA100
* VIA VT8235 - UDMA133
* VIA VT8237 - UDMA133
+ * VIA VT8237A - UDMA133
* VIA VT8237S - UDMA133
* VIA VT8251 - UDMA133
*
@@ -64,26 +65,15 @@
#define DRV_NAME "pata_via"
#define DRV_VERSION "0.3.4"
-/*
- * The following comes directly from Vojtech Pavlik's ide/pci/via82cxxx
- * driver.
- */
-
enum {
- VIA_UDMA = 0x007,
- VIA_UDMA_NONE = 0x000,
- VIA_UDMA_33 = 0x001,
- VIA_UDMA_66 = 0x002,
- VIA_UDMA_100 = 0x003,
- VIA_UDMA_133 = 0x004,
- VIA_BAD_PREQ = 0x010, /* Crashes if PREQ# till DDACK# set */
- VIA_BAD_CLK66 = 0x020, /* 66 MHz clock doesn't work correctly */
- VIA_SET_FIFO = 0x040, /* Needs to have FIFO split set */
- VIA_NO_UNMASK = 0x080, /* Doesn't work with IRQ unmasking on */
- VIA_BAD_ID = 0x100, /* Has wrong vendor ID (0x1107) */
- VIA_BAD_AST = 0x200, /* Don't touch Address Setup Timing */
- VIA_NO_ENABLES = 0x400, /* Has no enablebits */
- VIA_SATA_PATA = 0x800, /* SATA/PATA combined configuration */
+ VIA_BAD_PREQ = 0x01, /* Crashes if PREQ# till DDACK# set */
+ VIA_BAD_CLK66 = 0x02, /* 66 MHz clock doesn't work correctly */
+ VIA_SET_FIFO = 0x04, /* Needs to have FIFO split set */
+ VIA_NO_UNMASK = 0x08, /* Doesn't work with IRQ unmasking on */
+ VIA_BAD_ID = 0x10, /* Has wrong vendor ID (0x1107) */
+ VIA_BAD_AST = 0x20, /* Don't touch Address Setup Timing */
+ VIA_NO_ENABLES = 0x40, /* Has no enablebits */
+ VIA_SATA_PATA = 0x80, /* SATA/PATA combined configuration */
};
enum {
@@ -99,40 +89,37 @@ static const struct via_isa_bridge {
u16 id;
u8 rev_min;
u8 rev_max;
- u16 flags;
+ u8 udma_mask;
+ u8 flags;
} via_isa_bridges[] = {
- { "vx855", PCI_DEVICE_ID_VIA_VX855, 0x00, 0x2f,
- VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA },
- { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, VIA_UDMA_133 |
- VIA_BAD_AST | VIA_SATA_PATA },
- { "vt8261", PCI_DEVICE_ID_VIA_8261, 0x00, 0x2f,
- VIA_UDMA_133 | VIA_BAD_AST },
- { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
- { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
- { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA },
- { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES },
- { "vt6415", PCI_DEVICE_ID_VIA_6415, 0x00, 0xff, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES },
- { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
- { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
- { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
- { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
- { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 },
- { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, VIA_UDMA_100 },
- { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, VIA_UDMA_100 },
- { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, VIA_UDMA_100 },
- { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, VIA_UDMA_66 },
- { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
- { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, VIA_UDMA_66 },
- { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
- { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO },
- { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ },
- { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO },
- { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO },
- { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO },
- { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK },
- { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
- { "vtxxxx", PCI_DEVICE_ID_VIA_ANON, 0x00, 0x2f,
- VIA_UDMA_133 | VIA_BAD_AST },
+ { "vx855", PCI_DEVICE_ID_VIA_VX855, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
+ { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
+ { "vt8261", PCI_DEVICE_ID_VIA_8261, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
+ { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
+ { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
+ { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
+ { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_NO_ENABLES },
+ { "vt6415", PCI_DEVICE_ID_VIA_6415, 0x00, 0xff, ATA_UDMA6, VIA_BAD_AST | VIA_NO_ENABLES },
+ { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
+ { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
+ { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
+ { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
+ { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, ATA_UDMA5, },
+ { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, ATA_UDMA5, },
+ { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, ATA_UDMA5, },
+ { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, ATA_UDMA5, },
+ { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, ATA_UDMA4, },
+ { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
+ { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, ATA_UDMA4, },
+ { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
+ { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, ATA_UDMA2, VIA_SET_FIFO },
+ { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, ATA_UDMA2, VIA_SET_FIFO | VIA_BAD_PREQ },
+ { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, ATA_UDMA2, VIA_SET_FIFO },
+ { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, ATA_UDMA2, VIA_SET_FIFO },
+ { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, 0x00, VIA_SET_FIFO },
+ { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK },
+ { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
+ { "vtxxxx", PCI_DEVICE_ID_VIA_ANON, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
{ NULL }
};
@@ -191,10 +178,10 @@ static int via_cable_detect(struct ata_p
return ATA_CBL_SATA;
/* Early chips are 40 wire */
- if ((config->flags & VIA_UDMA) < VIA_UDMA_66)
+ if (config->udma_mask < ATA_UDMA4)
return ATA_CBL_PATA40;
/* UDMA 66 chips have only drive side logic */
- else if ((config->flags & VIA_UDMA) < VIA_UDMA_100)
+ else if (config->udma_mask < ATA_UDMA5)
return ATA_CBL_PATA_UNK;
/* UDMA 100 or later */
pci_read_config_dword(pdev, 0x50, &ata66);
@@ -233,7 +220,6 @@ static int via_pre_reset(struct ata_link
* @ap: ATA interface
* @adev: ATA device
* @mode: ATA mode being programmed
- * @tdiv: Clocks per PCI clock
* @set_ast: Set to program address setup
* @udma_type: UDMA mode/format of registers
*
@@ -244,17 +230,27 @@ static int via_pre_reset(struct ata_link
* on the two channels.
*/
-static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mode, int tdiv, int set_ast, int udma_type)
+static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev,
+ int mode, int set_ast, int udma_type)
{
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
struct ata_device *peer = ata_dev_pair(adev);
struct ata_timing t, p;
- static int via_clock = 33333; /* Bus clock in kHZ - ought to be tunable one day */
+ static int via_clock = 33333; /* Bus clock in kHZ */
unsigned long T = 1000000000 / via_clock;
- unsigned long UT = T/tdiv;
+ unsigned long UT = T;
int ut;
int offset = 3 - (2*ap->port_no) - adev->devno;
+ switch (udma_type) {
+ case ATA_UDMA4:
+ UT = T / 2; break;
+ case ATA_UDMA5:
+ UT = T / 3; break;
+ case ATA_UDMA6:
+ UT = T / 4; break;
+ }
+
/* Calculate the timing values we require */
ata_timing_compute(adev, mode, &t, T, UT);
@@ -284,22 +280,20 @@ static void via_do_set_mode(struct ata_p
((clamp_val(t.active, 1, 16) - 1) << 4) | (clamp_val(t.recover, 1, 16) - 1));
/* Load the UDMA bits according to type */
- switch(udma_type) {
- default:
- /* BUG() ? */
- /* fall through */
- case 33:
- ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 5) - 2)) : 0x03;
- break;
- case 66:
- ut = t.udma ? (0xe8 | (clamp_val(t.udma, 2, 9) - 2)) : 0x0f;
- break;
- case 100:
- ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
- break;
- case 133:
- ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
- break;
+ switch (udma_type) {
+ case ATA_UDMA2:
+ default:
+ ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 5) - 2)) : 0x03;
+ break;
+ case ATA_UDMA4:
+ ut = t.udma ? (0xe8 | (clamp_val(t.udma, 2, 9) - 2)) : 0x0f;
+ break;
+ case ATA_UDMA5:
+ ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
+ break;
+ case ATA_UDMA6:
+ ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
+ break;
}
/* Set UDMA unless device is not UDMA capable */
@@ -325,22 +319,16 @@ static void via_set_piomode(struct ata_p
{
const struct via_isa_bridge *config = ap->host->private_data;
int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
- int mode = config->flags & VIA_UDMA;
- static u8 tclock[5] = { 1, 1, 2, 3, 4 };
- static u8 udma[5] = { 0, 33, 66, 100, 133 };
- via_do_set_mode(ap, adev, adev->pio_mode, tclock[mode], set_ast, udma[mode]);
+ via_do_set_mode(ap, adev, adev->pio_mode, set_ast, config->udma_mask);
}
static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev)
{
const struct via_isa_bridge *config = ap->host->private_data;
int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
- int mode = config->flags & VIA_UDMA;
- static u8 tclock[5] = { 1, 1, 2, 3, 4 };
- static u8 udma[5] = { 0, 33, 66, 100, 133 };
- via_do_set_mode(ap, adev, adev->dma_mode, tclock[mode], set_ast, udma[mode]);
+ via_do_set_mode(ap, adev, adev->dma_mode, set_ast, config->udma_mask);
}
/**
@@ -509,7 +497,7 @@ static void via_fixup(struct pci_dev *pd
/* Initialise the FIFO for the enabled channels. */
via_config_fifo(pdev, config->flags);
- if ((config->flags & VIA_UDMA) == VIA_UDMA_66) {
+ if (config->udma_mask == ATA_UDMA4) {
/* The 66 MHz devices require we enable the clock */
pci_read_config_dword(pdev, 0x50, &timing);
timing |= 0x80008;
@@ -621,28 +609,28 @@ static int via_init_one(struct pci_dev *
}
/* Clock set up */
- switch(config->flags & VIA_UDMA) {
- case VIA_UDMA_NONE:
- if (config->flags & VIA_NO_UNMASK)
- ppi[0] = &via_mwdma_info_borked;
- else
- ppi[0] = &via_mwdma_info;
- break;
- case VIA_UDMA_33:
- ppi[0] = &via_udma33_info;
- break;
- case VIA_UDMA_66:
- ppi[0] = &via_udma66_info;
- break;
- case VIA_UDMA_100:
- ppi[0] = &via_udma100_info;
- break;
- case VIA_UDMA_133:
- ppi[0] = &via_udma133_info;
- break;
- default:
- WARN_ON(1);
- return -ENODEV;
+ switch (config->udma_mask) {
+ case 0x00:
+ if (config->flags & VIA_NO_UNMASK)
+ ppi[0] = &via_mwdma_info_borked;
+ else
+ ppi[0] = &via_mwdma_info;
+ break;
+ case ATA_UDMA2:
+ ppi[0] = &via_udma33_info;
+ break;
+ case ATA_UDMA4:
+ ppi[0] = &via_udma66_info;
+ break;
+ case ATA_UDMA5:
+ ppi[0] = &via_udma100_info;
+ break;
+ case ATA_UDMA6:
+ ppi[0] = &via_udma133_info;
+ break;
+ default:
+ WARN_ON(1);
+ return -ENODEV;
}
via_fixup(pdev, config);
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] pata_via: fix address setup timings underlocking
Correct via_do_set_mode() documentation while at it.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ata/pata_via.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Index: b/drivers/ata/pata_via.c
===================================================================
--- a/drivers/ata/pata_via.c
+++ b/drivers/ata/pata_via.c
@@ -229,7 +229,7 @@ static int via_pre_reset(struct ata_link
/**
- * via_do_set_mode - set initial PIO mode data
+ * via_do_set_mode - set transfer mode data
* @ap: ATA interface
* @adev: ATA device
* @mode: ATA mode being programmed
@@ -273,7 +273,7 @@ static void via_do_set_mode(struct ata_p
pci_read_config_byte(pdev, 0x4C, &setup);
setup &= ~(3 << shift);
- setup |= clamp_val(t.setup, 1, 4) << shift; /* 1,4 or 1,4 - 1 FIXME */
+ setup |= (clamp_val(t.setup, 1, 4) - 1) << shift;
pci_write_config_byte(pdev, 0x4C, setup);
}
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] ide: use standard timing for XFER_PIO_SLOW mode in ide_timing_compute()
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/ide-timings.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
Index: b/drivers/ide/ide-timings.c
===================================================================
--- a/drivers/ide/ide-timings.c
+++ b/drivers/ide/ide-timings.c
@@ -166,12 +166,13 @@ int ide_timing_compute(ide_drive_t *driv
if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
memset(&p, 0, sizeof(p));
- if (speed <= XFER_PIO_2)
- p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO];
- else if ((speed <= XFER_PIO_4) ||
- (speed == XFER_PIO_5 && !ata_id_is_cfa(id)))
- p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY];
- else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
+ if (speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
+ if (speed <= XFER_PIO_2)
+ p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO];
+ else if ((speed <= XFER_PIO_4) ||
+ (speed == XFER_PIO_5 && !ata_id_is_cfa(id)))
+ p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY];
+ } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
p.cycle = id[ATA_ID_EIDE_DMA_MIN];
ide_timing_merge(&p, t, t, IDE_TIMING_CYCLE | IDE_TIMING_CYC8B);
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] pata_efar: enable parallel scan
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ata/pata_efar.c | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
Index: b/drivers/ata/pata_efar.c
===================================================================
--- a/drivers/ata/pata_efar.c
+++ b/drivers/ata/pata_efar.c
@@ -238,12 +238,27 @@ static int efar_init_one (struct pci_dev
.port_ops = &efar_ops,
};
const struct ata_port_info *ppi[] = { &info, &info };
+ struct ata_host *host;
+ int rc;
if (!printed_version++)
dev_printk(KERN_DEBUG, &pdev->dev,
"version " DRV_VERSION "\n");
- return ata_pci_sff_init_one(pdev, ppi, &efar_sht, NULL);
+ /* enable device and prepare host */
+ rc = pcim_enable_device(pdev);
+ if (rc)
+ return rc;
+
+ rc = ata_pci_sff_prepare_host(pdev, ppi, &host);
+ if (rc)
+ return rc;
+
+ host->flags |= ATA_HOST_PARALLEL_SCAN;
+
+ pci_set_master(pdev);
+
+ return ata_pci_sff_activate_host(host, ata_sff_interrupt, &efar_sht);
}
static const struct pci_device_id efar_pci_tbl[] = {
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] alim15x3: cleanup ali_cable_detect()
Remove leftover local_irq_[save,restore]() and FIXME note.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/alim15x3.c | 8 --------
1 file changed, 8 deletions(-)
Index: b/drivers/ide/alim15x3.c
===================================================================
--- a/drivers/ide/alim15x3.c
+++ b/drivers/ide/alim15x3.c
@@ -345,19 +345,13 @@ static int ali_cable_override(struct pci
*
* This checks if the controller and the cable are capable
* of UDMA66 transfers. It doesn't check the drives.
- * But see note 2 below!
- *
- * FIXME: frobs bits that are not defined on newer ALi devicea
*/
static u8 ali_cable_detect(ide_hwif_t *hwif)
{
struct pci_dev *dev = to_pci_dev(hwif->dev);
- unsigned long flags;
u8 cbl = ATA_CBL_PATA40, tmpbyte;
- local_irq_save(flags);
-
if (m5229_revision >= 0xC2) {
/*
* m5229 80-pin cable detection (from Host View)
@@ -377,8 +371,6 @@ static u8 ali_cable_detect(ide_hwif_t *h
}
}
- local_irq_restore(flags);
-
return cbl;
}
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] serverworks: cleanup svwks_udma_filter()
* remove dead OSB4 UDMA support
* remove unreachable code
* make isa_dev local to ->init_chipset
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/serverworks.c | 40 +++++++++++-----------------------------
1 file changed, 11 insertions(+), 29 deletions(-)
Index: b/drivers/ide/serverworks.c
===================================================================
--- a/drivers/ide/serverworks.c
+++ b/drivers/ide/serverworks.c
@@ -2,7 +2,7 @@
* Copyright (C) 1998-2000 Michel Aubry
* Copyright (C) 1998-2000 Andrzej Krzysztofowicz
* Copyright (C) 1998-2000 Andre Hedrick <[email protected]>
- * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
+ * Copyright (C) 2007-2010 Bartlomiej Zolnierkiewicz
* Portions copyright (c) 2001 Sun Microsystems
*
*
@@ -52,8 +52,6 @@ static const char *svwks_bad_ata100[] =
NULL
};
-static struct pci_dev *isa_dev;
-
static int check_in_drive_lists (ide_drive_t *drive, const char **list)
{
char *m = (char *)&drive->id[ATA_ID_PROD];
@@ -67,26 +65,14 @@ static int check_in_drive_lists (ide_dri
static u8 svwks_udma_filter(ide_drive_t *drive)
{
struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
- u8 mask = 0;
- if (dev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE)
+ if (dev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE) {
return 0x1f;
- if (dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) {
- u32 reg = 0;
- if (isa_dev)
- pci_read_config_dword(isa_dev, 0x64, ®);
-
- /*
- * Don't enable UDMA on disk devices for the moment
- */
- if(drive->media == ide_disk)
- return 0;
- /* Check the OSB4 DMA33 enable bit */
- return ((reg & 0x00004000) == 0x00004000) ? 0x07 : 0;
} else if (dev->revision < SVWKS_CSB5_REVISION_NEW) {
return 0x07;
- } else if (dev->revision >= SVWKS_CSB5_REVISION_NEW) {
- u8 btr = 0, mode;
+ } else {
+ u8 btr = 0, mode, mask;
+
pci_read_config_byte(dev, 0x5A, &btr);
mode = btr & 0x3;
@@ -101,13 +87,9 @@ static u8 svwks_udma_filter(ide_drive_t
case 1: mask = 0x07; break;
default: mask = 0x00; break;
}
- }
- if (((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) ||
- (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2)) &&
- (!(PCI_FUNC(dev->devfn) & 1)))
- mask = 0x1f;
- return mask;
+ return mask;
+ }
}
static u8 svwks_csb_check (struct pci_dev *dev)
@@ -185,8 +167,9 @@ static int init_chipset_svwks(struct pci
/* OSB4 : South Bridge and IDE */
if (dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) {
- isa_dev = pci_get_device(PCI_VENDOR_ID_SERVERWORKS,
- PCI_DEVICE_ID_SERVERWORKS_OSB4, NULL);
+ struct pci_dev *isa_dev =
+ pci_get_device(PCI_VENDOR_ID_SERVERWORKS,
+ PCI_DEVICE_ID_SERVERWORKS_OSB4, NULL);
if (isa_dev) {
pci_read_config_dword(isa_dev, 0x64, ®);
reg &= ~0x00002000; /* disable 600ns interrupt mask */
@@ -343,7 +326,6 @@ static u8 svwks_cable_detect(ide_hwif_t
static const struct ide_port_ops osb4_port_ops = {
.set_pio_mode = svwks_set_pio_mode,
.set_dma_mode = svwks_set_dma_mode,
- .udma_filter = svwks_udma_filter,
};
static const struct ide_port_ops svwks_port_ops = {
@@ -460,6 +442,6 @@ static void __exit svwks_ide_exit(void)
module_init(svwks_ide_init);
module_exit(svwks_ide_exit);
-MODULE_AUTHOR("Michael Aubry. Andrzej Krzysztofowicz, Andre Hedrick");
+MODULE_AUTHOR("Michael Aubry. Andrzej Krzysztofowicz, Andre Hedrick, Bartlomiej Zolnierkiewicz");
MODULE_DESCRIPTION("PCI driver module for Serverworks OSB4/CSB5/CSB6 IDE");
MODULE_LICENSE("GPL");
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] alim15x3: remove superfluous locking from ali_set_pio_mode()
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/alim15x3.c | 5 -----
1 file changed, 5 deletions(-)
Index: b/drivers/ide/alim15x3.c
===================================================================
--- a/drivers/ide/alim15x3.c
+++ b/drivers/ide/alim15x3.c
@@ -73,7 +73,6 @@ static void ali_set_pio_mode(ide_drive_t
{
ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
- unsigned long flags;
int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
unsigned long T = 1000000 / bus_speed; /* PCI clock based */
int port = hwif->channel ? 0x5c : 0x58;
@@ -86,8 +85,6 @@ static void ali_set_pio_mode(ide_drive_t
t.active = clamp_val(t.active, 1, 8) & 7;
t.recover = clamp_val(t.recover, 1, 16) & 15;
- local_irq_save(flags);
-
/*
* PIO mode => ATA FIFO on, ATAPI FIFO off
*/
@@ -96,8 +93,6 @@ static void ali_set_pio_mode(ide_drive_t
pci_write_config_byte(dev, port, t.setup);
pci_write_config_byte(dev, port + unit + 2,
(t.active << 4) | t.recover);
-
- local_irq_restore(flags);
}
/**
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] via82cxxx: fix SATA cable detection
Add VIA_SATA_PATA flag for cx700, vx800 and vx855 chipsets
(the first port is SATA).
Based on commits 7585eb1, bfce5e0 and e4d866c for pata_via
host driver.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/via82cxxx.c | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
Index: b/drivers/ide/via82cxxx.c
===================================================================
--- a/drivers/ide/via82cxxx.c
+++ b/drivers/ide/via82cxxx.c
@@ -54,6 +54,7 @@
#define VIA_NO_UNMASK 0x08 /* Doesn't work with IRQ unmasking on */
#define VIA_BAD_ID 0x10 /* Has wrong vendor ID (0x1107) */
#define VIA_BAD_AST 0x20 /* Don't touch Address Setup Timing */
+#define VIA_SATA_PATA 0x80 /* SATA/PATA combined configuration */
enum {
VIA_IDFLAG_SINGLE = (1 << 1), /* single channel controller */
@@ -71,9 +72,9 @@ static struct via_isa_bridge {
u8 udma_mask;
u8 flags;
} via_isa_bridges[] = {
- { "vx855", PCI_DEVICE_ID_VIA_VX855, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
- { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
- { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
+ { "vx855", PCI_DEVICE_ID_VIA_VX855, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
+ { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
+ { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
{ "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
{ "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
{ "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
@@ -366,6 +367,9 @@ static u8 via82cxxx_cable_detect(ide_hwi
if (via_cable_override(pdev))
return ATA_CBL_PATA40_SHORT;
+ if ((vdev->via_config->flags & VIA_SATA_PATA) && hwif->channel == 0)
+ return ATA_CBL_SATA;
+
if ((vdev->via_80w >> hwif->channel) & 1)
return ATA_CBL_PATA80;
else
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] ide: add drive->pio_mode field
Add pio_mode field to ide_drive_t matching pio_mode field used in
struct ata_device.
The validity of the field is restricted to ->set_pio_mode method
only currently in IDE subsystem.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/ide-devsets.c | 2 ++
drivers/ide/ide-probe.c | 2 ++
drivers/ide/ide-xfer-mode.c | 3 +++
include/linux/ide.h | 1 +
4 files changed, 8 insertions(+)
Index: b/drivers/ide/ide-devsets.c
===================================================================
--- a/drivers/ide/ide-devsets.c
+++ b/drivers/ide/ide-devsets.c
@@ -105,6 +105,8 @@ static int set_pio_mode(ide_drive_t *dri
return -ENOSYS;
if (set_pio_mode_abuse(drive->hwif, arg)) {
+ drive->pio_mode = arg + XFER_PIO_0;
+
if (arg == 8 || arg == 9) {
unsigned long flags;
Index: b/drivers/ide/ide-probe.c
===================================================================
--- a/drivers/ide/ide-probe.c
+++ b/drivers/ide/ide-probe.c
@@ -1043,6 +1043,8 @@ static void ide_port_init_devices(ide_hw
if (hwif->host_flags & IDE_HFLAG_NO_UNMASK_IRQS)
drive->dev_flags |= IDE_DFLAG_NO_UNMASK;
+ drive->pio_mode = XFER_PIO_0;
+
if (port_ops && port_ops->init_dev)
port_ops->init_dev(drive);
}
Index: b/drivers/ide/ide-xfer-mode.c
===================================================================
--- a/drivers/ide/ide-xfer-mode.c
+++ b/drivers/ide/ide-xfer-mode.c
@@ -135,6 +135,7 @@ int ide_set_pio_mode(ide_drive_t *drive,
* set transfer mode on the device in ->set_pio_mode method...
*/
if (port_ops->set_dma_mode == NULL) {
+ drive->pio_mode = mode;
port_ops->set_pio_mode(drive, mode - XFER_PIO_0);
return 0;
}
@@ -142,9 +143,11 @@ int ide_set_pio_mode(ide_drive_t *drive,
if (hwif->host_flags & IDE_HFLAG_POST_SET_MODE) {
if (ide_config_drive_speed(drive, mode))
return -1;
+ drive->pio_mode = mode;
port_ops->set_pio_mode(drive, mode - XFER_PIO_0);
return 0;
} else {
+ drive->pio_mode = mode;
port_ops->set_pio_mode(drive, mode - XFER_PIO_0);
return ide_config_drive_speed(drive, mode);
}
Index: b/include/linux/ide.h
===================================================================
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -515,6 +515,7 @@ struct ide_drive_s {
u8 init_speed; /* transfer rate set at boot */
u8 current_speed; /* current transfer rate set */
u8 desired_speed; /* desired transfer rate set */
+ u8 pio_mode; /* for ->set_pio_mode _only_ */
u8 dn; /* now wide spread use */
u8 acoustic; /* acoustic management */
u8 media; /* disk, cdrom, tape, floppy, ... */
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] amd74xx: don't change UDMA settings when programming PIO timings
Based on libata pata_amd host driver.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/amd74xx.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
Index: b/drivers/ide/amd74xx.c
===================================================================
--- a/drivers/ide/amd74xx.c
+++ b/drivers/ide/amd74xx.c
@@ -3,7 +3,7 @@
* IDE driver for Linux.
*
* Copyright (c) 2000-2002 Vojtech Pavlik
- * Copyright (c) 2007-2008 Bartlomiej Zolnierkiewicz
+ * Copyright (c) 2007-2010 Bartlomiej Zolnierkiewicz
*
* Based on the work of:
* Andre Hedrick
@@ -70,7 +70,8 @@ static void amd_set_speed(struct pci_dev
default: return;
}
- pci_write_config_byte(dev, AMD_UDMA_TIMING + offset + (3 - dn), t);
+ if (timing->udma)
+ pci_write_config_byte(dev, AMD_UDMA_TIMING + offset + 3 - dn, t);
}
/*
@@ -340,6 +341,6 @@ static void __exit amd74xx_ide_exit(void
module_init(amd74xx_ide_init);
module_exit(amd74xx_ide_exit);
-MODULE_AUTHOR("Vojtech Pavlik");
+MODULE_AUTHOR("Vojtech Pavlik, Bartlomiej Zolnierkiewicz");
MODULE_DESCRIPTION("AMD PCI IDE driver");
MODULE_LICENSE("GPL");
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] via82cxxx: vx855 is a single channel controller
Based on commit e4d866c for pata_via host driver
(PCI ID was later changed by commit 5993856).
Update my credits while at it.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/via82cxxx.c | 19 +++++++++++++------
1 file changed, 13 insertions(+), 6 deletions(-)
Index: b/drivers/ide/via82cxxx.c
===================================================================
--- a/drivers/ide/via82cxxx.c
+++ b/drivers/ide/via82cxxx.c
@@ -6,7 +6,7 @@
* vt8235, vt8237, vt8237a
*
* Copyright (c) 2000-2002 Vojtech Pavlik
- * Copyright (c) 2007 Bartlomiej Zolnierkiewicz
+ * Copyright (c) 2007-2010 Bartlomiej Zolnierkiewicz
*
* Based on the work of:
* Michel Aubry
@@ -55,6 +55,10 @@
#define VIA_BAD_ID 0x10 /* Has wrong vendor ID (0x1107) */
#define VIA_BAD_AST 0x20 /* Don't touch Address Setup Timing */
+enum {
+ VIA_IDFLAG_SINGLE = (1 << 1), /* single channel controller */
+};
+
/*
* VIA SouthBridge chips.
*/
@@ -436,10 +440,13 @@ static int __devinit via_init_one(struct
via_clock = 33333;
}
- if (idx == 0)
- d.host_flags |= IDE_HFLAG_NO_AUTODMA;
- else
+ if (idx == 1)
d.enablebits[1].reg = d.enablebits[0].reg = 0;
+ else
+ d.host_flags |= IDE_HFLAG_NO_AUTODMA;
+
+ if (idx == VIA_IDFLAG_SINGLE)
+ d.host_flags |= IDE_HFLAG_SINGLE;
if ((via_config->flags & VIA_NO_UNMASK) == 0)
d.host_flags |= IDE_HFLAG_UNMASK_IRQS;
@@ -475,7 +482,7 @@ static const struct pci_device_id via_pc
{ PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C576_1), 0 },
{ PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C586_1), 0 },
{ PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_CX700_IDE), 0 },
- { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_VX855_IDE), 0 },
+ { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_VX855_IDE), VIA_IDFLAG_SINGLE },
{ PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_6410), 1 },
{ PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_SATA_EIDE), 1 },
{ 0, },
@@ -504,6 +511,6 @@ static void __exit via_ide_exit(void)
module_init(via_ide_init);
module_exit(via_ide_exit);
-MODULE_AUTHOR("Vojtech Pavlik, Michel Aubry, Jeff Garzik, Andre Hedrick");
+MODULE_AUTHOR("Vojtech Pavlik, Bartlomiej Zolnierkiewicz, Michel Aubry, Jeff Garzik, Andre Hedrick");
MODULE_DESCRIPTION("PCI driver module for VIA IDE");
MODULE_LICENSE("GPL");
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] cy82c693: remove stale driver history
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/cy82c693.c | 33 ---------------------------------
1 file changed, 33 deletions(-)
Index: b/drivers/ide/cy82c693.c
===================================================================
--- a/drivers/ide/cy82c693.c
+++ b/drivers/ide/cy82c693.c
@@ -5,39 +5,6 @@
* CYPRESS CY82C693 chipset IDE controller
*
* The CY82C693 chipset is used on Digital's PC-Alpha 164SX boards.
- * Writing the driver was quite simple, since most of the job is
- * done by the generic pci-ide support.
- * The hard part was finding the CY82C693's datasheet on Cypress's
- * web page :-(. But Altavista solved this problem :-).
- *
- *
- * Notes:
- * - I recently got a 16.8G IBM DTTA, so I was able to test it with
- * a large and fast disk - the results look great, so I'd say the
- * driver is working fine :-)
- * hdparm -t reports 8.17 MB/sec at about 6% CPU usage for the DTTA
- * - this is my first linux driver, so there's probably a lot of room
- * for optimizations and bug fixing, so feel free to do it.
- * - if using PIO mode it's a good idea to set the PIO mode and
- * 32-bit I/O support (if possible), e.g. hdparm -p2 -c1 /dev/hda
- * - I had some problems with my IBM DHEA with PIO modes < 2
- * (lost interrupts) ?????
- * - first tests with DMA look okay, they seem to work, but there is a
- * problem with sound - the BusMaster IDE TimeOut should fixed this
- *
- * Ancient History:
- * AMH@1999-08-24: v0.34 init_cy82c693_chip moved to pci_init_cy82c693
- * ASK@1999-01-23: v0.33 made a few minor code clean ups
- * removed DMA clock speed setting by default
- * added boot message
- * ASK@1998-11-01: v0.32 added support to set BusMaster IDE TimeOut
- * added support to set DMA Controller Clock Speed
- * ASK@1998-10-31: v0.31 fixed problem with setting to high DMA modes
- * on some drives.
- * ASK@1998-10-29: v0.3 added support to set DMA modes
- * ASK@1998-10-28: v0.2 added support to set PIO modes
- * ASK@1998-10-27: v0.1 first version - chipset detection
- *
*/
#include <linux/module.h>
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] via82cxxx: add support for vt8261 and future chips
Based on commit e4d866c for pata_via host driver.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/via82cxxx.c | 10 ++++------
1 file changed, 4 insertions(+), 6 deletions(-)
Index: b/drivers/ide/via82cxxx.c
===================================================================
--- a/drivers/ide/via82cxxx.c
+++ b/drivers/ide/via82cxxx.c
@@ -75,6 +75,7 @@ static struct via_isa_bridge {
{ "vx855", PCI_DEVICE_ID_VIA_VX855, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
{ "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
{ "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
+ { "vt8261", PCI_DEVICE_ID_VIA_8261, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
{ "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
{ "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
{ "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
@@ -97,6 +98,7 @@ static struct via_isa_bridge {
{ "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, 0x00, VIA_SET_FIFO },
{ "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK },
{ "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
+ { "vtxxxx", PCI_DEVICE_ID_VIA_ANON, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
{ NULL }
};
@@ -205,7 +207,8 @@ static struct via_isa_bridge *via_config
{
struct via_isa_bridge *via_config;
- for (via_config = via_isa_bridges; via_config->id; via_config++)
+ for (via_config = via_isa_bridges;
+ via_config->id != PCI_DEVICE_ID_VIA_ANON; via_config++)
if ((*isa = pci_get_device(PCI_VENDOR_ID_VIA +
!!(via_config->flags & VIA_BAD_ID),
via_config->id, NULL))) {
@@ -467,11 +470,6 @@ static int __devinit via_init_one(struct
* Find the ISA bridge and check we know what it is.
*/
via_config = via_config_find(&isa);
- if (!via_config->id) {
- printk(KERN_WARNING DRV_NAME " %s: unknown chipset, skipping\n",
- pci_name(dev));
- return -ENODEV;
- }
/*
* Print the boot message.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] ide: add SATA cable detection support
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/ide-iops.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Index: b/drivers/ide/ide-iops.c
===================================================================
--- a/drivers/ide/ide-iops.c
+++ b/drivers/ide/ide-iops.c
@@ -231,7 +231,7 @@ u8 eighty_ninty_three(ide_drive_t *drive
u16 *id = drive->id;
int ivb = ide_in_drive_list(id, ivb_list);
- if (hwif->cbl == ATA_CBL_PATA40_SHORT)
+ if (hwif->cbl == ATA_CBL_SATA || hwif->cbl == ATA_CBL_PATA40_SHORT)
return 1;
if (ivb)
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] via82cxxx: fix UDMA settings programming
* preserve 80-wire cable detection bit
* don't clear UDMA settings when programming PIO/MWDMA modes
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/via82cxxx.c | 19 +++++++++++++++++--
1 file changed, 17 insertions(+), 2 deletions(-)
Index: b/drivers/ide/via82cxxx.c
===================================================================
--- a/drivers/ide/via82cxxx.c
+++ b/drivers/ide/via82cxxx.c
@@ -146,10 +146,25 @@ static void via_set_speed(ide_hwif_t *hw
case ATA_UDMA4: t = timing->udma ? (0xe8 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x0f; break;
case ATA_UDMA5: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break;
case ATA_UDMA6: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break;
- default: return;
}
- pci_write_config_byte(dev, VIA_UDMA_TIMING + (3 - dn), t);
+ /* Set UDMA unless device is not UDMA capable */
+ if (vdev->via_config->udma_mask) {
+ u8 udma_etc;
+
+ pci_read_config_byte(dev, VIA_UDMA_TIMING + 3 - dn, &udma_etc);
+
+ /* clear transfer mode bit */
+ udma_etc &= ~0x20;
+
+ if (timing->udma) {
+ /* preserve 80-wire cable detection bit */
+ udma_etc &= 0x10;
+ udma_etc |= t;
+ }
+
+ pci_write_config_byte(dev, VIA_UDMA_TIMING + 3 - dn, udma_etc);
+ }
}
/**
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] via82cxxx: add support for VT6415 PCIE PATA IDE Host Controller
Based on commits 5955c7a and 7d948b1 for pata_via host driver.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/via82cxxx.c | 2 ++
1 file changed, 2 insertions(+)
Index: b/drivers/ide/via82cxxx.c
===================================================================
--- a/drivers/ide/via82cxxx.c
+++ b/drivers/ide/via82cxxx.c
@@ -78,6 +78,7 @@ static struct via_isa_bridge {
{ "vt8261", PCI_DEVICE_ID_VIA_8261, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
{ "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
{ "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
+ { "vt6415", PCI_DEVICE_ID_VIA_6410, 0x00, 0xff, ATA_UDMA6, VIA_BAD_AST },
{ "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
{ "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
{ "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
@@ -543,6 +544,7 @@ static const struct pci_device_id via_pc
{ PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_CX700_IDE), 0 },
{ PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_VX855_IDE), VIA_IDFLAG_SINGLE },
{ PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_6410), 1 },
+ { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_6415), 1 },
{ PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_SATA_EIDE), 1 },
{ 0, },
};
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] cmd64x: fix PIO and MWDMA timings calculations
Just use the standard ide_timing_compute() helper to calculate
PIO and MWDMA timings. This fixes some issues with the open-coded
version like allowing faster MWDMA timings than the ones required
by the current PIO mode or not accounting for the enhanced MWDMA
cycle time specified by the device.
Based on libata pata_cmd64x host driver.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/cmd64x.c | 88 ++++++++++++++++-----------------------------------
1 file changed, 29 insertions(+), 59 deletions(-)
Index: b/drivers/ide/cmd64x.c
===================================================================
--- a/drivers/ide/cmd64x.c
+++ b/drivers/ide/cmd64x.c
@@ -7,6 +7,7 @@
* Copyright (C) 1998 David S. Miller ([email protected])
*
* Copyright (C) 1999-2002 Andre Hedrick <[email protected]>
+ * Copyright (C) 2007-2010 Bartlomiej Zolnierkiewicz
* Copyright (C) 2007,2009 MontaVista Software, Inc. <[email protected]>
*/
@@ -50,72 +51,45 @@
#define UDIDETCR1 0x7B
#define DTPR1 0x7C
-static u8 quantize_timing(int timing, int quant)
-{
- return (timing + quant - 1) / quant;
-}
-
-/*
- * This routine calculates active/recovery counts and then writes them into
- * the chipset registers.
- */
-static void program_cycle_times (ide_drive_t *drive, int cycle_time, int active_time)
+static void cmd64x_program_timings(ide_drive_t *drive, u8 mode)
{
+ ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
- int clock_time = 1000 / (ide_pci_clk ? ide_pci_clk : 33);
- u8 cycle_count, active_count, recovery_count, drwtim;
+ int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
+ const unsigned long T = 1000000 / bus_speed;
static const u8 recovery_values[] =
{15, 15, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 0};
+ static const u8 setup_values[] = {0x40, 0x40, 0x40, 0x80, 0, 0xc0};
+ static const u8 arttim_regs[4] = {ARTTIM0, ARTTIM1, ARTTIM23, ARTTIM23};
static const u8 drwtim_regs[4] = {DRWTIM0, DRWTIM1, DRWTIM2, DRWTIM3};
+ struct ide_timing t;
+ u8 arttim = 0;
- cycle_count = quantize_timing( cycle_time, clock_time);
- active_count = quantize_timing(active_time, clock_time);
- recovery_count = cycle_count - active_count;
+ ide_timing_compute(drive, mode, &t, T, 0);
/*
* In case we've got too long recovery phase, try to lengthen
* the active phase
*/
- if (recovery_count > 16) {
- active_count += recovery_count - 16;
- recovery_count = 16;
+ if (t.recover > 16) {
+ t.active += t.recover - 16;
+ t.recover = 16;
}
- if (active_count > 16) /* shouldn't actually happen... */
- active_count = 16;
+ if (t.active > 16) /* shouldn't actually happen... */
+ t.active = 16;
/*
* Convert values to internal chipset representation
*/
- recovery_count = recovery_values[recovery_count];
- active_count &= 0x0f;
+ t.recover = recovery_values[t.recover];
+ t.active &= 0x0f;
/* Program the active/recovery counts into the DRWTIM register */
- drwtim = (active_count << 4) | recovery_count;
- (void) pci_write_config_byte(dev, drwtim_regs[drive->dn], drwtim);
-}
+ pci_write_config_byte(dev, drwtim_regs[drive->dn],
+ (t.active << 4) | t.recover);
-/*
- * This routine writes into the chipset registers
- * PIO setup/active/recovery timings.
- */
-static void cmd64x_tune_pio(ide_drive_t *drive, const u8 pio)
-{
- ide_hwif_t *hwif = drive->hwif;
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
- unsigned long setup_count;
- unsigned int cycle_time;
- u8 arttim = 0;
-
- static const u8 setup_values[] = {0x40, 0x40, 0x40, 0x80, 0, 0xc0};
- static const u8 arttim_regs[4] = {ARTTIM0, ARTTIM1, ARTTIM23, ARTTIM23};
-
- cycle_time = ide_pio_cycle_time(drive, pio);
-
- program_cycle_times(drive, cycle_time, t->active);
-
- setup_count = quantize_timing(t->setup,
- 1000 / (ide_pci_clk ? ide_pci_clk : 33));
+ if (mode >= XFER_SW_DMA_0)
+ return;
/*
* The primary channel has individual address setup timing registers
@@ -126,15 +100,15 @@ static void cmd64x_tune_pio(ide_drive_t
if (hwif->channel) {
ide_drive_t *pair = ide_get_pair_dev(drive);
- ide_set_drivedata(drive, (void *)setup_count);
+ ide_set_drivedata(drive, (void *)(unsigned long)t.setup);
if (pair)
- setup_count = max_t(u8, setup_count,
+ t.setup = max_t(u8, t.setup,
(unsigned long)ide_get_drivedata(pair));
}
- if (setup_count > 5) /* shouldn't actually happen... */
- setup_count = 5;
+ if (t.setup > 5) /* shouldn't actually happen... */
+ t.setup = 5;
/*
* Program the address setup clocks into the ARTTIM registers.
@@ -144,7 +118,7 @@ static void cmd64x_tune_pio(ide_drive_t
if (hwif->channel)
arttim &= ~ARTTIM23_INTR_CH1;
arttim &= ~0xc0;
- arttim |= setup_values[setup_count];
+ arttim |= setup_values[t.setup];
(void) pci_write_config_byte(dev, arttim_regs[drive->dn], arttim);
}
@@ -162,7 +136,7 @@ static void cmd64x_set_pio_mode(ide_driv
if (pio == 8 || pio == 9)
return;
- cmd64x_tune_pio(drive, pio);
+ cmd64x_program_timings(drive, XFER_PIO_0 + pio);
}
static void cmd64x_set_dma_mode(ide_drive_t *drive, const u8 speed)
@@ -197,13 +171,9 @@ static void cmd64x_set_dma_mode(ide_driv
regU |= unit ? 0xC2 : 0x31;
break;
case XFER_MW_DMA_2:
- program_cycle_times(drive, 120, 70);
- break;
case XFER_MW_DMA_1:
- program_cycle_times(drive, 150, 80);
- break;
case XFER_MW_DMA_0:
- program_cycle_times(drive, 480, 215);
+ cmd64x_program_timings(drive, speed);
break;
}
@@ -471,6 +441,6 @@ static void __exit cmd64x_ide_exit(void)
module_init(cmd64x_ide_init);
module_exit(cmd64x_ide_exit);
-MODULE_AUTHOR("Eddie Dost, David Miller, Andre Hedrick");
+MODULE_AUTHOR("Eddie Dost, David Miller, Andre Hedrick, Bartlomiej Zolnierkiewicz");
MODULE_DESCRIPTION("PCI driver module for CMD64x IDE");
MODULE_LICENSE("GPL");
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] serverworks: add missing pci_dev_put() call
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/serverworks.c | 1 +
1 file changed, 1 insertion(+)
Index: b/drivers/ide/serverworks.c
===================================================================
--- a/drivers/ide/serverworks.c
+++ b/drivers/ide/serverworks.c
@@ -178,6 +178,7 @@ static int init_chipset_svwks(struct pci
"enabled.\n", pci_name(dev));
reg |= 0x00004000; /* enable UDMA/33 support */
pci_write_config_dword(isa_dev, 0x64, reg);
+ pci_dev_put(isa_dev);
}
}
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] ide: change ->set_pio_mode method parameters
Change ->set_pio_mode method parameters to match ->set_piomode method
used in struct ata_port_operations.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/aec62xx.c | 6 +++---
drivers/ide/ali14xx.c | 3 ++-
drivers/ide/alim15x3.c | 7 +++----
drivers/ide/amd74xx.c | 4 ++--
drivers/ide/at91_ide.c | 5 +++--
drivers/ide/atiixp.c | 7 ++++---
drivers/ide/au1xxx-ide.c | 5 ++---
drivers/ide/cmd640.c | 3 ++-
drivers/ide/cmd64x.c | 4 +++-
drivers/ide/cs5520.c | 7 ++++---
drivers/ide/cs5530.c | 7 ++++---
drivers/ide/cs5535.c | 6 +++---
drivers/ide/cs5536.c | 7 ++++---
drivers/ide/cy82c693.c | 5 ++---
drivers/ide/dtc2278.c | 4 ++--
drivers/ide/hpt366.c | 4 ++--
drivers/ide/ht6560b.c | 3 ++-
drivers/ide/ide-devsets.c | 4 ++--
drivers/ide/ide-xfer-mode.c | 6 +++---
drivers/ide/it8172.c | 10 +++++-----
drivers/ide/it8213.c | 14 +++++++-------
drivers/ide/it821x.c | 6 +++---
drivers/ide/jmicron.c | 2 +-
drivers/ide/opti621.c | 6 +++---
drivers/ide/palm_bk3710.c | 5 +++--
drivers/ide/pdc202xx_new.c | 4 ++--
drivers/ide/pdc202xx_old.c | 4 ++--
drivers/ide/piix.c | 14 +++++++-------
drivers/ide/pmac.c | 5 ++---
drivers/ide/qd65xx.c | 10 ++++------
drivers/ide/sc1200.c | 4 ++--
drivers/ide/scc_pata.c | 6 +++---
drivers/ide/serverworks.c | 5 +++--
drivers/ide/siimage.c | 6 +++---
drivers/ide/sis5513.c | 4 ++--
drivers/ide/sl82c105.c | 5 +++--
drivers/ide/slc90e66.c | 13 +++++++------
drivers/ide/tc86c001.c | 4 ++--
drivers/ide/triflex.c | 4 ++--
drivers/ide/tx4938ide.c | 5 ++---
drivers/ide/tx4939ide.c | 4 ++--
drivers/ide/umc8672.c | 5 +++--
drivers/ide/via82cxxx.c | 6 +++---
include/linux/ide.h | 2 +-
44 files changed, 129 insertions(+), 121 deletions(-)
Index: b/drivers/ide/aec62xx.c
===================================================================
--- a/drivers/ide/aec62xx.c
+++ b/drivers/ide/aec62xx.c
@@ -134,10 +134,10 @@ static void aec6260_set_mode(ide_drive_t
local_irq_restore(flags);
}
-static void aec_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void aec_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- drive->dma_mode = pio + XFER_PIO_0;
- drive->hwif->port_ops->set_dma_mode(drive, pio + XFER_PIO_0);
+ drive->dma_mode = drive->pio_mode;
+ hwif->port_ops->set_dma_mode(drive, drive->dma_mode);
}
static int init_chipset_aec62xx(struct pci_dev *dev)
Index: b/drivers/ide/ali14xx.c
===================================================================
--- a/drivers/ide/ali14xx.c
+++ b/drivers/ide/ali14xx.c
@@ -109,13 +109,14 @@ static DEFINE_SPINLOCK(ali14xx_lock);
* This function computes timing parameters
* and sets controller registers accordingly.
*/
-static void ali14xx_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void ali14xx_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
int driveNum;
int time1, time2;
u8 param1, param2, param3, param4;
unsigned long flags;
int bus_speed = ide_vlb_clk ? ide_vlb_clk : 50;
+ const u8 pio = drive->pio_mode - XFER_PIO_0;
struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
/* calculate timing, according to PIO mode */
Index: b/drivers/ide/alim15x3.c
===================================================================
--- a/drivers/ide/alim15x3.c
+++ b/drivers/ide/alim15x3.c
@@ -63,15 +63,14 @@ static void ali_fifo_control(ide_hwif_t
/**
* ali_set_pio_mode - set host controller for PIO mode
+ * @hwif: port
* @drive: drive
- * @pio: PIO mode number
*
* Program the controller for the given PIO mode.
*/
-static void ali_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void ali_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
unsigned long T = 1000000 / bus_speed; /* PCI clock based */
@@ -79,7 +78,7 @@ static void ali_set_pio_mode(ide_drive_t
u8 unit = drive->dn & 1;
struct ide_timing t;
- ide_timing_compute(drive, XFER_PIO_0 + pio, &t, T, 1);
+ ide_timing_compute(drive, drive->pio_mode, &t, T, 1);
t.setup = clamp_val(t.setup, 1, 8) & 7;
t.active = clamp_val(t.active, 1, 8) & 7;
Index: b/drivers/ide/amd74xx.c
===================================================================
--- a/drivers/ide/amd74xx.c
+++ b/drivers/ide/amd74xx.c
@@ -108,9 +108,9 @@ static void amd_set_drive(ide_drive_t *d
* amd_set_pio_mode() is a callback from upper layers for PIO-only tuning.
*/
-static void amd_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void amd_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- amd_set_drive(drive, XFER_PIO_0 + pio);
+ amd_set_drive(drive, drive->pio_mode);
}
static void amd7409_cable_detect(struct pci_dev *dev)
Index: b/drivers/ide/at91_ide.c
===================================================================
--- a/drivers/ide/at91_ide.c
+++ b/drivers/ide/at91_ide.c
@@ -172,11 +172,12 @@ static void at91_ide_output_data(ide_dri
leave_16bit(chipselect, mode);
}
-static void at91_ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void at91_ide_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
struct ide_timing *timing;
- u8 chipselect = drive->hwif->select_data;
+ u8 chipselect = hwif->select_data;
int use_iordy = 0;
+ const u8 pio = drive->pio_mode - XFER_PIO_0;
pdbg("chipselect %u pio %u\n", chipselect, pio);
Index: b/drivers/ide/atiixp.c
===================================================================
--- a/drivers/ide/atiixp.c
+++ b/drivers/ide/atiixp.c
@@ -42,19 +42,20 @@ static DEFINE_SPINLOCK(atiixp_lock);
/**
* atiixp_set_pio_mode - set host controller for PIO mode
+ * @hwif: port
* @drive: drive
- * @pio: PIO mode number
*
* Set the interface PIO mode.
*/
-static void atiixp_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void atiixp_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
+ struct pci_dev *dev = to_pci_dev(hwif->dev);
unsigned long flags;
int timing_shift = (drive->dn ^ 1) * 8;
u32 pio_timing_data;
u16 pio_mode_data;
+ const u8 pio = drive->pio_mode - XFER_PIO_0;
spin_lock_irqsave(&atiixp_lock, flags);
Index: b/drivers/ide/au1xxx-ide.c
===================================================================
--- a/drivers/ide/au1xxx-ide.c
+++ b/drivers/ide/au1xxx-ide.c
@@ -99,12 +99,11 @@ static void au1xxx_output_data(ide_drive
}
#endif
-static void au1xxx_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void au1xxx_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
int mem_sttime = 0, mem_stcfg = au_readl(MEM_STCFG2);
- /* set pio mode! */
- switch(pio) {
+ switch (drive->pio_mode - XFER_PIO_0) {
case 0:
mem_sttime = SBC_IDE_TIMING(PIO0);
Index: b/drivers/ide/cmd640.c
===================================================================
--- a/drivers/ide/cmd640.c
+++ b/drivers/ide/cmd640.c
@@ -572,9 +572,10 @@ static void cmd640_set_mode(ide_drive_t
program_drive_counts(drive, index);
}
-static void cmd640_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void cmd640_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
unsigned int index = 0, cycle_time;
+ const u8 pio = drive->pio_mode - XFER_PIO_0;
u8 b;
switch (pio) {
Index: b/drivers/ide/cmd64x.c
===================================================================
--- a/drivers/ide/cmd64x.c
+++ b/drivers/ide/cmd64x.c
@@ -153,8 +153,10 @@ static void cmd64x_tune_pio(ide_drive_t
* Special cases are 8: prefetch off, 9: prefetch on (both never worked)
*/
-static void cmd64x_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void cmd64x_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
+ const u8 pio = drive->pio_mode - XFER_PIO_0;
+
/*
* Filter out the prefetch control values
* to prevent PIO5 from being programmed
Index: b/drivers/ide/cs5520.c
===================================================================
--- a/drivers/ide/cs5520.c
+++ b/drivers/ide/cs5520.c
@@ -57,11 +57,11 @@ static struct pio_clocks cs5520_pio_cloc
{1, 2, 1}
};
-static void cs5520_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void cs5520_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
struct pci_dev *pdev = to_pci_dev(hwif->dev);
int controller = drive->dn > 1 ? 1 : 0;
+ const u8 pio = drive->pio_mode - XFER_PIO_0;
/* 8bit CAT/CRT - 8bit command timing for channel */
pci_write_config_byte(pdev, 0x62 + controller,
@@ -85,7 +85,8 @@ static void cs5520_set_dma_mode(ide_driv
{
printk(KERN_ERR "cs55x0: bad ide timing.\n");
- cs5520_set_pio_mode(drive, 0);
+ drive->pio_mode = XFER_PIO_0 + 0;
+ cs5520_set_pio_mode(drive->hwif, drive);
}
static const struct ide_port_ops cs5520_port_ops = {
Index: b/drivers/ide/cs5530.c
===================================================================
--- a/drivers/ide/cs5530.c
+++ b/drivers/ide/cs5530.c
@@ -41,8 +41,8 @@ static unsigned int cs5530_pio_timings[2
/**
* cs5530_set_pio_mode - set host controller for PIO mode
+ * @hwif: port
* @drive: drive
- * @pio: PIO mode number
*
* Handles setting of PIO mode for the chipset.
*
@@ -50,10 +50,11 @@ static unsigned int cs5530_pio_timings[2
* will have valid default PIO timings set up before we get here.
*/
-static void cs5530_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void cs5530_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- unsigned long basereg = CS5530_BASEREG(drive->hwif);
+ unsigned long basereg = CS5530_BASEREG(hwif);
unsigned int format = (inl(basereg + 4) >> 31) & 1;
+ const u8 pio = drive->pio_mode - XFER_PIO_0;
outl(cs5530_pio_timings[format][pio], basereg + ((drive->dn & 1)<<3));
}
Index: b/drivers/ide/cs5535.c
===================================================================
--- a/drivers/ide/cs5535.c
+++ b/drivers/ide/cs5535.c
@@ -142,15 +142,15 @@ static void cs5535_set_dma_mode(ide_driv
/**
* cs5535_set_pio_mode - set host controller for PIO mode
+ * @hwif: port
* @drive: drive
- * @pio: PIO mode number
*
* A callback from the upper layers for PIO-only tuning.
*/
-static void cs5535_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void cs5535_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- cs5535_set_speed(drive, XFER_PIO_0 + pio);
+ cs5535_set_speed(drive, drive->pio_mode);
}
static u8 cs5535_cable_detect(ide_hwif_t *hwif)
Index: b/drivers/ide/cs5536.c
===================================================================
--- a/drivers/ide/cs5536.c
+++ b/drivers/ide/cs5536.c
@@ -125,11 +125,11 @@ static u8 cs5536_cable_detect(ide_hwif_t
/**
* cs5536_set_pio_mode - PIO timing setup
+ * @hwif: ATA port
* @drive: ATA device
- * @pio: PIO mode number
*/
-static void cs5536_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void cs5536_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
static const u8 drv_timings[5] = {
0x98, 0x55, 0x32, 0x21, 0x20,
@@ -143,11 +143,12 @@ static void cs5536_set_pio_mode(ide_driv
0x99, 0x92, 0x90, 0x22, 0x20,
};
- struct pci_dev *pdev = to_pci_dev(drive->hwif->dev);
+ struct pci_dev *pdev = to_pci_dev(hwif->dev);
ide_drive_t *pair = ide_get_pair_dev(drive);
int cshift = (drive->dn & 1) ? IDE_CAST_D1_SHIFT : IDE_CAST_D0_SHIFT;
unsigned long timings = (unsigned long)ide_get_drivedata(drive);
u32 cast;
+ const u8 pio = drive->pio_mode - XFER_PIO_0;
u8 cmd_pio = pio;
if (pair)
Index: b/drivers/ide/cy82c693.c
===================================================================
--- a/drivers/ide/cy82c693.c
+++ b/drivers/ide/cy82c693.c
@@ -79,9 +79,8 @@ static void cy82c693_set_dma_mode(ide_dr
outb(data, CY82_DATA_PORT);
}
-static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void cy82c693_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
const unsigned long T = 1000000 / bus_speed;
@@ -89,7 +88,7 @@ static void cy82c693_set_pio_mode(ide_dr
struct ide_timing t;
u8 time_16, time_8;
- ide_timing_compute(drive, XFER_PIO_0 + pio, &t, T, 1);
+ ide_timing_compute(drive, drive->pio_mode, &t, T, 1);
time_16 = clamp_val(t.recover - 1, 0, 15) |
(clamp_val(t.active - 1, 0, 15) << 4);
Index: b/drivers/ide/dtc2278.c
===================================================================
--- a/drivers/ide/dtc2278.c
+++ b/drivers/ide/dtc2278.c
@@ -68,11 +68,11 @@ static void sub22 (char b, char c)
static DEFINE_SPINLOCK(dtc2278_lock);
-static void dtc2278_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void dtc2278_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
unsigned long flags;
- if (pio >= 3) {
+ if (drive->pio_mode >= XFER_PIO_3) {
spin_lock_irqsave(&dtc2278_lock, flags);
/*
* This enables PIO mode4 (3?) on the first interface
Index: b/drivers/ide/hpt366.c
===================================================================
--- a/drivers/ide/hpt366.c
+++ b/drivers/ide/hpt366.c
@@ -716,9 +716,9 @@ static void hpt3xx_set_mode(ide_drive_t
pci_write_config_dword(dev, itr_addr, new_itr);
}
-static void hpt3xx_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void hpt3xx_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- hpt3xx_set_mode(drive, XFER_PIO_0 + pio);
+ hpt3xx_set_mode(drive, drive->pio_mode);
}
static void hpt3xx_maskproc(ide_drive_t *drive, int mask)
Index: b/drivers/ide/ht6560b.c
===================================================================
--- a/drivers/ide/ht6560b.c
+++ b/drivers/ide/ht6560b.c
@@ -279,9 +279,10 @@ static void ht_set_prefetch(ide_drive_t
#endif
}
-static void ht6560b_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void ht6560b_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
unsigned long flags, config;
+ const u8 pio = drive->pio_mode - XFER_PIO_0;
u8 timing;
switch (pio) {
Index: b/drivers/ide/ide-devsets.c
===================================================================
--- a/drivers/ide/ide-devsets.c
+++ b/drivers/ide/ide-devsets.c
@@ -112,10 +112,10 @@ static int set_pio_mode(ide_drive_t *dri
/* take lock for IDE_DFLAG_[NO_]UNMASK/[NO_]IO_32BIT */
spin_lock_irqsave(&hwif->lock, flags);
- port_ops->set_pio_mode(drive, arg);
+ port_ops->set_pio_mode(hwif, drive);
spin_unlock_irqrestore(&hwif->lock, flags);
} else
- port_ops->set_pio_mode(drive, arg);
+ port_ops->set_pio_mode(hwif, drive);
} else {
int keep_dma = !!(drive->dev_flags & IDE_DFLAG_USING_DMA);
Index: b/drivers/ide/ide-xfer-mode.c
===================================================================
--- a/drivers/ide/ide-xfer-mode.c
+++ b/drivers/ide/ide-xfer-mode.c
@@ -136,7 +136,7 @@ int ide_set_pio_mode(ide_drive_t *drive,
*/
if (port_ops->set_dma_mode == NULL) {
drive->pio_mode = mode;
- port_ops->set_pio_mode(drive, mode - XFER_PIO_0);
+ port_ops->set_pio_mode(hwif, drive);
return 0;
}
@@ -144,11 +144,11 @@ int ide_set_pio_mode(ide_drive_t *drive,
if (ide_config_drive_speed(drive, mode))
return -1;
drive->pio_mode = mode;
- port_ops->set_pio_mode(drive, mode - XFER_PIO_0);
+ port_ops->set_pio_mode(hwif, drive);
return 0;
} else {
drive->pio_mode = mode;
- port_ops->set_pio_mode(drive, mode - XFER_PIO_0);
+ port_ops->set_pio_mode(hwif, drive);
return ide_config_drive_speed(drive, mode);
}
}
Index: b/drivers/ide/it8172.c
===================================================================
--- a/drivers/ide/it8172.c
+++ b/drivers/ide/it8172.c
@@ -37,12 +37,12 @@
#define DRV_NAME "IT8172"
-static void it8172_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void it8172_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
u16 drive_enables;
u32 drive_timing;
+ const u8 pio = drive->pio_mode - XFER_PIO_0;
/*
* The highest value of DIOR/DIOW pulse width and recovery time
@@ -98,14 +98,14 @@ static void it8172_set_dma_mode(ide_driv
pci_write_config_byte(dev, 0x4a, reg4a | u_speed);
} else {
const u8 mwdma_to_pio[] = { 0, 3, 4 };
- u8 pio;
pci_write_config_byte(dev, 0x48, reg48 & ~u_flag);
pci_write_config_byte(dev, 0x4a, reg4a & ~a_speed);
- pio = mwdma_to_pio[speed - XFER_MW_DMA_0];
+ drive->pio_mode =
+ mwdma_to_pio[speed - XFER_MW_DMA_0] + XFER_PIO_0;
- it8172_set_pio_mode(drive, pio);
+ it8172_set_pio_mode(hwif, drive);
}
}
Index: b/drivers/ide/it8213.c
===================================================================
--- a/drivers/ide/it8213.c
+++ b/drivers/ide/it8213.c
@@ -17,15 +17,14 @@
/**
* it8213_set_pio_mode - set host controller for PIO mode
+ * @hwif: port
* @drive: drive
- * @pio: PIO mode number
*
* Set the interface PIO mode.
*/
-static void it8213_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void it8213_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
int is_slave = drive->dn & 1;
int master_port = 0x40;
@@ -35,6 +34,7 @@ static void it8213_set_pio_mode(ide_driv
u8 slave_data;
static DEFINE_SPINLOCK(tune_lock);
int control = 0;
+ const u8 pio = drive->pio_mode - XFER_PIO_0;
static const u8 timings[][2] = {
{ 0, 0 },
@@ -120,7 +120,6 @@ static void it8213_set_dma_mode(ide_driv
pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
} else {
const u8 mwdma_to_pio[] = { 0, 3, 4 };
- u8 pio;
if (reg48 & u_flag)
pci_write_config_byte(dev, 0x48, reg48 & ~u_flag);
@@ -132,11 +131,12 @@ static void it8213_set_dma_mode(ide_driv
pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
if (speed >= XFER_MW_DMA_0)
- pio = mwdma_to_pio[speed - XFER_MW_DMA_0];
+ drive->pio_mode =
+ mwdma_to_pio[speed - XFER_MW_DMA_0] + XFER_PIO_0;
else
- pio = 2; /* only SWDMA2 is allowed */
+ drive->pio_mode = XFER_PIO_2; /* for SWDMA2 */
- it8213_set_pio_mode(drive, pio);
+ it8213_set_pio_mode(hwif, drive);
}
}
Index: b/drivers/ide/it821x.c
===================================================================
--- a/drivers/ide/it821x.c
+++ b/drivers/ide/it821x.c
@@ -228,18 +228,18 @@ static void it821x_clock_strategy(ide_dr
/**
* it821x_set_pio_mode - set host controller for PIO mode
+ * @hwif: port
* @drive: drive
- * @pio: PIO mode number
*
* Tune the host to the desired PIO mode taking into the consideration
* the maximum PIO mode supported by the other device on the cable.
*/
-static void it821x_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void it821x_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
struct it821x_dev *itdev = ide_get_hwifdata(hwif);
ide_drive_t *pair = ide_get_pair_dev(drive);
+ const u8 pio = drive->pio_mode - XFER_PIO_0;
u8 unit = drive->dn & 1, set_pio = pio;
/* Spec says 89 ref driver uses 88 */
Index: b/drivers/ide/jmicron.c
===================================================================
--- a/drivers/ide/jmicron.c
+++ b/drivers/ide/jmicron.c
@@ -80,7 +80,7 @@ static u8 jmicron_cable_detect(ide_hwif_
return ATA_CBL_PATA80;
}
-static void jmicron_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void jmicron_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
}
Index: b/drivers/ide/opti621.c
===================================================================
--- a/drivers/ide/opti621.c
+++ b/drivers/ide/opti621.c
@@ -62,12 +62,12 @@ static u8 read_reg(int reg)
return ret;
}
-static void opti621_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void opti621_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
ide_drive_t *pair = ide_get_pair_dev(drive);
unsigned long flags;
- unsigned long mode = XFER_PIO_0 + pio, pair_mode;
+ unsigned long mode = drive->pio_mode, pair_mode;
+ const u8 pio = mode - XFER_PIO_0;
u8 tim, misc, addr_pio = pio, clk;
/* DRDY is default 2 (by OPTi Databook) */
Index: b/drivers/ide/palm_bk3710.c
===================================================================
--- a/drivers/ide/palm_bk3710.c
+++ b/drivers/ide/palm_bk3710.c
@@ -203,12 +203,13 @@ static void palm_bk3710_set_dma_mode(ide
}
}
-static void palm_bk3710_set_pio_mode(ide_drive_t *drive, u8 pio)
+static void palm_bk3710_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
unsigned int cycle_time;
int is_slave = drive->dn & 1;
ide_drive_t *mate;
- void __iomem *base = (void *)drive->hwif->dma_base;
+ void __iomem *base = (void *)hwif->dma_base;
+ const u8 pio = drive->pio_mode - XFER_PIO_0;
/*
* Obtain the drive PIO data for tuning the Palm Chip registers
Index: b/drivers/ide/pdc202xx_new.c
===================================================================
--- a/drivers/ide/pdc202xx_new.c
+++ b/drivers/ide/pdc202xx_new.c
@@ -167,11 +167,11 @@ static void pdcnew_set_dma_mode(ide_driv
}
}
-static void pdcnew_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void pdcnew_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
u8 adj = (drive->dn & 1) ? 0x08 : 0x00;
+ const u8 pio = drive->pio_mode - XFER_PIO_0;
if (max_dma_rate(dev) == 4) {
set_indexed_reg(hwif, 0x0c + adj, pio_timings[pio].reg0c);
Index: b/drivers/ide/pdc202xx_old.c
===================================================================
--- a/drivers/ide/pdc202xx_old.c
+++ b/drivers/ide/pdc202xx_old.c
@@ -76,9 +76,9 @@ static void pdc202xx_set_mode(ide_drive_
}
}
-static void pdc202xx_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void pdc202xx_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- pdc202xx_set_mode(drive, XFER_PIO_0 + pio);
+ pdc202xx_set_mode(drive, drive->pio_mode);
}
static int pdc202xx_test_irq(ide_hwif_t *hwif)
Index: b/drivers/ide/piix.c
===================================================================
--- a/drivers/ide/piix.c
+++ b/drivers/ide/piix.c
@@ -59,15 +59,14 @@ static int no_piix_dma;
/**
* piix_set_pio_mode - set host controller for PIO mode
+ * @port: port
* @drive: drive
- * @pio: PIO mode number
*
* Set the interface PIO mode based upon the settings done by AMI BIOS.
*/
-static void piix_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void piix_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
int is_slave = drive->dn & 1;
int master_port = hwif->channel ? 0x42 : 0x40;
@@ -77,6 +76,7 @@ static void piix_set_pio_mode(ide_drive_
u8 slave_data;
static DEFINE_SPINLOCK(tune_lock);
int control = 0;
+ const u8 pio = drive->pio_mode - XFER_PIO_0;
/* ISP RTC */
static const u8 timings[][2]= {
@@ -176,7 +176,6 @@ static void piix_set_dma_mode(ide_drive_
pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
} else {
const u8 mwdma_to_pio[] = { 0, 3, 4 };
- u8 pio;
if (reg48 & u_flag)
pci_write_config_byte(dev, 0x48, reg48 & ~u_flag);
@@ -188,11 +187,12 @@ static void piix_set_dma_mode(ide_drive_
pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
if (speed >= XFER_MW_DMA_0)
- pio = mwdma_to_pio[speed - XFER_MW_DMA_0];
+ drive->pio_mode =
+ mwdma_to_pio[speed - XFER_MW_DMA_0] + XFER_PIO_0;
else
- pio = 2; /* only SWDMA2 is allowed */
+ drive->pio_mode = XFER_PIO_2; /* for SWDMA2 */
- piix_set_pio_mode(drive, pio);
+ piix_set_pio_mode(hwif, drive);
}
}
Index: b/drivers/ide/pmac.c
===================================================================
--- a/drivers/ide/pmac.c
+++ b/drivers/ide/pmac.c
@@ -498,12 +498,11 @@ static void pmac_write_devctl(ide_hwif_t
/*
* Old tuning functions (called on hdparm -p), sets up drive PIO timings
*/
-static void
-pmac_ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void pmac_ide_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
pmac_ide_hwif_t *pmif =
(pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
+ const u8 pio = drive->pio_mode - XFER_PIO_0;
struct ide_timing *tim = ide_timing_find_mode(XFER_PIO_0 + pio);
u32 *timings, t;
unsigned accessTicks, recTicks;
Index: b/drivers/ide/qd65xx.c
===================================================================
--- a/drivers/ide/qd65xx.c
+++ b/drivers/ide/qd65xx.c
@@ -189,15 +189,13 @@ static void qd_set_timing (ide_drive_t *
printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
}
-static void qd6500_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void qd6500_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
u16 *id = drive->id;
int active_time = 175;
int recovery_time = 415; /* worst case values from the dos driver */
- /*
- * FIXME: use "pio" value
- */
+ /* FIXME: use drive->pio_mode value */
if (!qd_find_disk_type(drive, &active_time, &recovery_time) &&
(id[ATA_ID_OLD_PIO_MODES] & 0xff) && (id[ATA_ID_FIELD_VALID] & 2) &&
id[ATA_ID_EIDE_PIO] >= 240) {
@@ -211,9 +209,9 @@ static void qd6500_set_pio_mode(ide_driv
active_time, recovery_time));
}
-static void qd6580_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void qd6580_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
+ const u8 pio = drive->pio_mode - XFER_PIO_0;
struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
unsigned int cycle_time;
int active_time = 175;
Index: b/drivers/ide/sc1200.c
===================================================================
--- a/drivers/ide/sc1200.c
+++ b/drivers/ide/sc1200.c
@@ -193,10 +193,10 @@ static int sc1200_dma_end(ide_drive_t *d
* will have valid default PIO timings set up before we get here.
*/
-static void sc1200_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void sc1200_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
int mode = -1;
+ const u8 pio = drive->pio_mode - XFER_PIO_0;
/*
* bad abuse of ->set_pio_mode interface
Index: b/drivers/ide/scc_pata.c
===================================================================
--- a/drivers/ide/scc_pata.c
+++ b/drivers/ide/scc_pata.c
@@ -199,16 +199,15 @@ scc_ide_outsl(unsigned long port, void *
/**
* scc_set_pio_mode - set host controller for PIO mode
+ * @hwif: port
* @drive: drive
- * @pio: PIO mode number
*
* Load the timing settings for this device mode into the
* controller.
*/
-static void scc_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void scc_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
struct scc_ports *ports = ide_get_hwifdata(hwif);
unsigned long ctl_base = ports->ctl;
unsigned long cckctrl_port = ctl_base + 0xff0;
@@ -216,6 +215,7 @@ static void scc_set_pio_mode(ide_drive_t
unsigned long pioct_port = ctl_base + 0x004;
unsigned long reg;
int offset;
+ const u8 pio = drive->pio_mode - XFER_PIO_0;
reg = in_be32((void __iomem *)cckctrl_port);
if (reg & CCKCTRL_ATACLKOEN) {
Index: b/drivers/ide/serverworks.c
===================================================================
--- a/drivers/ide/serverworks.c
+++ b/drivers/ide/serverworks.c
@@ -106,12 +106,13 @@ static u8 svwks_csb_check (struct pci_de
return 0;
}
-static void svwks_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void svwks_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
static const u8 pio_modes[] = { 0x5d, 0x47, 0x34, 0x22, 0x20 };
static const u8 drive_pci[] = { 0x41, 0x40, 0x43, 0x42 };
- struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
+ struct pci_dev *dev = to_pci_dev(hwif->dev);
+ const u8 pio = drive->pio_mode - XFER_PIO_0;
pci_write_config_byte(dev, drive_pci[drive->dn], pio_modes[pio]);
Index: b/drivers/ide/siimage.c
===================================================================
--- a/drivers/ide/siimage.c
+++ b/drivers/ide/siimage.c
@@ -229,19 +229,18 @@ static u8 sil_sata_udma_filter(ide_drive
/**
* sil_set_pio_mode - set host controller for PIO mode
+ * @hwif: port
* @drive: drive
- * @pio: PIO mode number
*
* Load the timing settings for this device mode into the
* controller.
*/
-static void sil_set_pio_mode(ide_drive_t *drive, u8 pio)
+static void sil_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
static const u16 tf_speed[] = { 0x328a, 0x2283, 0x1281, 0x10c3, 0x10c1 };
static const u16 data_speed[] = { 0x328a, 0x2283, 0x1104, 0x10c3, 0x10c1 };
- ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
ide_drive_t *pair = ide_get_pair_dev(drive);
u32 speedt = 0;
@@ -249,6 +248,7 @@ static void sil_set_pio_mode(ide_drive_t
unsigned long addr = siimage_seldev(drive, 0x04);
unsigned long tfaddr = siimage_selreg(hwif, 0x02);
unsigned long base = (unsigned long)hwif->hwif_data;
+ const u8 pio = drive->pio_mode - XFER_PIO_0;
u8 tf_pio = pio;
u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
u8 addr_mask = hwif->channel ? (mmio ? 0xF4 : 0x84)
Index: b/drivers/ide/sis5513.c
===================================================================
--- a/drivers/ide/sis5513.c
+++ b/drivers/ide/sis5513.c
@@ -290,10 +290,10 @@ static void config_drive_art_rwp(ide_dri
pci_write_config_byte(dev, 0x4b, rw_prefetch);
}
-static void sis_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void sis_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
config_drive_art_rwp(drive);
- sis_program_timings(drive, XFER_PIO_0 + pio);
+ sis_program_timings(drive, drive->pio_mode);
}
static void sis_ata133_program_udma_timings(ide_drive_t *drive, const u8 mode)
Index: b/drivers/ide/sl82c105.c
===================================================================
--- a/drivers/ide/sl82c105.c
+++ b/drivers/ide/sl82c105.c
@@ -63,12 +63,13 @@ static unsigned int get_pio_timings(ide_
/*
* Configure the chipset for PIO mode.
*/
-static void sl82c105_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void sl82c105_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
+ struct pci_dev *dev = to_pci_dev(hwif->dev);
unsigned long timings = (unsigned long)ide_get_drivedata(drive);
int reg = 0x44 + drive->dn * 4;
u16 drv_ctrl;
+ const u8 pio = drive->pio_mode - XFER_PIO_0;
drv_ctrl = get_pio_timings(drive, pio);
Index: b/drivers/ide/slc90e66.c
===================================================================
--- a/drivers/ide/slc90e66.c
+++ b/drivers/ide/slc90e66.c
@@ -18,9 +18,8 @@
static DEFINE_SPINLOCK(slc90e66_lock);
-static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void slc90e66_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
int is_slave = drive->dn & 1;
int master_port = hwif->channel ? 0x42 : 0x40;
@@ -29,6 +28,8 @@ static void slc90e66_set_pio_mode(ide_dr
u16 master_data;
u8 slave_data;
int control = 0;
+ const u8 pio = drive->pio_mode - XFER_PIO_0;
+
/* ISP RTC */
static const u8 timings[][2] = {
{ 0, 0 },
@@ -98,7 +99,6 @@ static void slc90e66_set_dma_mode(ide_dr
}
} else {
const u8 mwdma_to_pio[] = { 0, 3, 4 };
- u8 pio;
if (reg48 & u_flag)
pci_write_config_word(dev, 0x48, reg48 & ~u_flag);
@@ -106,11 +106,12 @@ static void slc90e66_set_dma_mode(ide_dr
pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
if (speed >= XFER_MW_DMA_0)
- pio = mwdma_to_pio[speed - XFER_MW_DMA_0];
+ drive->pio_mode =
+ mwdma_to_pio[speed - XFER_MW_DMA_0] + XFER_PIO_0;
else
- pio = 2; /* only SWDMA2 is allowed */
+ drive->pio_mode = XFER_PIO_2; /* for SWDMA2 */
- slc90e66_set_pio_mode(drive, pio);
+ slc90e66_set_pio_mode(hwif, drive);
}
}
Index: b/drivers/ide/tc86c001.c
===================================================================
--- a/drivers/ide/tc86c001.c
+++ b/drivers/ide/tc86c001.c
@@ -41,9 +41,9 @@ static void tc86c001_set_mode(ide_drive_
outw(scr, scr_port);
}
-static void tc86c001_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void tc86c001_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- tc86c001_set_mode(drive, XFER_PIO_0 + pio);
+ tc86c001_set_mode(drive, drive->pio_mode);
}
/*
Index: b/drivers/ide/triflex.c
===================================================================
--- a/drivers/ide/triflex.c
+++ b/drivers/ide/triflex.c
@@ -82,9 +82,9 @@ static void triflex_set_mode(ide_drive_t
pci_write_config_dword(dev, channel_offset, triflex_timings);
}
-static void triflex_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void triflex_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- triflex_set_mode(drive, XFER_PIO_0 + pio);
+ triflex_set_mode(drive, drive->pio_mode);
}
static const struct ide_port_ops triflex_port_ops = {
Index: b/drivers/ide/tx4938ide.c
===================================================================
--- a/drivers/ide/tx4938ide.c
+++ b/drivers/ide/tx4938ide.c
@@ -56,11 +56,10 @@ static void tx4938ide_tune_ebusc(unsigne
&tx4938_ebuscptr->cr[ebus_ch]);
}
-static void tx4938ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void tx4938ide_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
struct tx4938ide_platform_info *pdata = hwif->dev->platform_data;
- u8 safe = pio;
+ u8 safe = drive->pio_mode - XFER_PIO_0;
ide_drive_t *pair;
pair = ide_get_pair_dev(drive);
Index: b/drivers/ide/tx4939ide.c
===================================================================
--- a/drivers/ide/tx4939ide.c
+++ b/drivers/ide/tx4939ide.c
@@ -104,11 +104,11 @@ static void tx4939ide_writeb(u8 val, voi
#define TX4939IDE_BASE(hwif) ((void __iomem *)(hwif)->extra_base)
-static void tx4939ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void tx4939ide_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
int is_slave = drive->dn;
u32 mask, val;
+ const u8 pio = drive->pio_mode - XFER_PIO_0;
u8 safe = pio;
ide_drive_t *pair;
Index: b/drivers/ide/umc8672.c
===================================================================
--- a/drivers/ide/umc8672.c
+++ b/drivers/ide/umc8672.c
@@ -104,10 +104,11 @@ static void umc_set_speeds(u8 speeds[])
speeds[0], speeds[1], speeds[2], speeds[3]);
}
-static void umc_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void umc_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif, *mate = hwif->mate;
+ ide_hwif_t *mate = hwif->mate;
unsigned long uninitialized_var(flags);
+ const u8 pio = drive->pio_mode - XFER_PIO_0;
printk("%s: setting umc8672 to PIO mode%d (speed %d)\n",
drive->name, pio, pio_to_umc[pio]);
Index: b/drivers/ide/via82cxxx.c
===================================================================
--- a/drivers/ide/via82cxxx.c
+++ b/drivers/ide/via82cxxx.c
@@ -208,15 +208,15 @@ static void via_set_drive(ide_drive_t *d
/**
* via_set_pio_mode - set host controller for PIO mode
+ * @hwif: port
* @drive: drive
- * @pio: PIO mode number
*
* A callback from the upper layers for PIO-only tuning.
*/
-static void via_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void via_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- via_set_drive(drive, XFER_PIO_0 + pio);
+ via_set_drive(drive, drive->pio_mode);
}
static struct via_isa_bridge *via_config_find(struct pci_dev **isa)
Index: b/include/linux/ide.h
===================================================================
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -624,7 +624,7 @@ extern const struct ide_tp_ops default_t
*/
struct ide_port_ops {
void (*init_dev)(ide_drive_t *);
- void (*set_pio_mode)(ide_drive_t *, const u8);
+ void (*set_pio_mode)(struct hwif_s *, ide_drive_t *);
void (*set_dma_mode)(ide_drive_t *, const u8);
int (*reset_poll)(ide_drive_t *);
void (*pre_reset)(ide_drive_t *);
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] it821x: use ->pio_mode value to determine pair device speed
Use the current PIO mode value instead of the physical maximum one
of the pair device on the port to determine PIO commmand timings used
for both devices on the port.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/it821x.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Index: b/drivers/ide/it821x.c
===================================================================
--- a/drivers/ide/it821x.c
+++ b/drivers/ide/it821x.c
@@ -252,7 +252,7 @@ static void it821x_set_pio_mode(ide_hwif
* on the cable.
*/
if (pair) {
- u8 pair_pio = ide_get_best_pio_mode(pair, 255, 4);
+ u8 pair_pio = pair->pio_mode - XFER_PIO_0;
/* trim PIO to the slowest of the master/slave */
if (pair_pio < set_pio)
set_pio = pair_pio;
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] cs5536: use ->pio_mode value to determine pair device speed
Use the current PIO mode value instead of the physical maximum one
of the pair device on the port to determine PIO commmand timings used
for both devices on the port.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/cs5536.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Index: b/drivers/ide/cs5536.c
===================================================================
--- a/drivers/ide/cs5536.c
+++ b/drivers/ide/cs5536.c
@@ -152,7 +152,7 @@ static void cs5536_set_pio_mode(ide_hwif
u8 cmd_pio = pio;
if (pair)
- cmd_pio = min(pio, ide_get_best_pio_mode(pair, 255, 4));
+ cmd_pio = min_t(u8, pio, pair->pio_mode - XFER_PIO_0);
timings &= (IDE_DRV_MASK << 8);
timings |= drv_timings[pio];
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] ide: make ide_get_best_pio_mode() static
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/ide-xfer-mode.c | 3 +--
include/linux/ide.h | 1 -
2 files changed, 1 insertion(+), 3 deletions(-)
Index: b/drivers/ide/ide-xfer-mode.c
===================================================================
--- a/drivers/ide/ide-xfer-mode.c
+++ b/drivers/ide/ide-xfer-mode.c
@@ -58,7 +58,7 @@ EXPORT_SYMBOL(ide_xfer_verbose);
* This is used by most chipset support modules when "auto-tuning".
*/
-u8 ide_get_best_pio_mode(ide_drive_t *drive, u8 mode_wanted, u8 max_mode)
+static u8 ide_get_best_pio_mode(ide_drive_t *drive, u8 mode_wanted, u8 max_mode)
{
u16 *id = drive->id;
int pio_mode = -1, overridden = 0;
@@ -105,7 +105,6 @@ u8 ide_get_best_pio_mode(ide_drive_t *dr
return pio_mode;
}
-EXPORT_SYMBOL_GPL(ide_get_best_pio_mode);
int ide_pio_need_iordy(ide_drive_t *drive, const u8 pio)
{
Index: b/include/linux/ide.h
===================================================================
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -1496,7 +1496,6 @@ int ide_timing_compute(ide_drive_t *, u8
#ifdef CONFIG_IDE_XFER_MODE
int ide_scan_pio_blacklist(char *);
const char *ide_xfer_verbose(u8);
-u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
int ide_pio_need_iordy(ide_drive_t *, const u8);
int ide_set_pio_mode(ide_drive_t *, u8);
int ide_set_dma_mode(ide_drive_t *, u8);
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] cs5535: use ->pio_mode value to determine pair device speed
Use the current PIO mode value instead of the physical maximum one
of the pair device on the port to determine PIO commmand timings used
for both devices on the port.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/cs5535.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Index: b/drivers/ide/cs5535.c
===================================================================
--- a/drivers/ide/cs5535.c
+++ b/drivers/ide/cs5535.c
@@ -86,7 +86,7 @@ static void cs5535_set_speed(ide_drive_t
cmd = pioa = speed - XFER_PIO_0;
if (pair) {
- u8 piob = ide_get_best_pio_mode(pair, 255, 4);
+ u8 piob = pair->pio_mode - XFER_PIO_0;
if (piob < cmd)
cmd = piob;
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] alim15x3: fix handling of address setup timings
Account for the requirements of the other device on the port.
Based on libata pata_ali host driver.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/alim15x3.c | 11 +++++++++++
1 file changed, 11 insertions(+)
Index: b/drivers/ide/alim15x3.c
===================================================================
--- a/drivers/ide/alim15x3.c
+++ b/drivers/ide/alim15x3.c
@@ -72,6 +72,7 @@ static void ali_fifo_control(ide_hwif_t
static void ali_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
struct pci_dev *dev = to_pci_dev(hwif->dev);
+ ide_drive_t *pair = ide_get_pair_dev(drive);
int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
unsigned long T = 1000000 / bus_speed; /* PCI clock based */
int port = hwif->channel ? 0x5c : 0x58;
@@ -79,6 +80,16 @@ static void ali_set_pio_mode(ide_hwif_t
struct ide_timing t;
ide_timing_compute(drive, drive->pio_mode, &t, T, 1);
+ if (pair) {
+ struct ide_timing p;
+
+ ide_timing_compute(pair, pair->pio_mode, &p, T, 1);
+ ide_timing_merge(&p, &t, &t, IDE_TIMING_SETUP);
+ if (pair->dma_mode) {
+ ide_timing_compute(pair, pair->dma_mode, &p, T, 1);
+ ide_timing_merge(&p, &t, &t, IDE_TIMING_SETUP);
+ }
+ }
t.setup = clamp_val(t.setup, 1, 8) & 7;
t.active = clamp_val(t.active, 1, 8) & 7;
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] tx493xide: use ->pio_mode value to determine pair device speed
Use the current PIO mode value instead of the physical maximum one
of the pair device on the port to determine PIO commmand timings used
for both devices on the port.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/tx4938ide.c | 2 +-
drivers/ide/tx4939ide.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
Index: b/drivers/ide/tx4938ide.c
===================================================================
--- a/drivers/ide/tx4938ide.c
+++ b/drivers/ide/tx4938ide.c
@@ -64,7 +64,7 @@ static void tx4938ide_set_pio_mode(ide_h
pair = ide_get_pair_dev(drive);
if (pair)
- safe = min(safe, ide_get_best_pio_mode(pair, 255, 5));
+ safe = min(safe, pair->pio_mode - XFER_PIO_0);
tx4938ide_tune_ebusc(pdata->ebus_ch, pdata->gbus_clock, safe);
}
Index: b/drivers/ide/tx4939ide.c
===================================================================
--- a/drivers/ide/tx4939ide.c
+++ b/drivers/ide/tx4939ide.c
@@ -114,7 +114,7 @@ static void tx4939ide_set_pio_mode(ide_h
pair = ide_get_pair_dev(drive);
if (pair)
- safe = min(safe, ide_get_best_pio_mode(pair, 255, 4));
+ safe = min(safe, pair->pio_mode - XFER_PIO_0);
/*
* Update Command Transfer Mode for master/slave and Data
* Transfer Mode for this drive.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] siimage: use ->pio_mode value to determine pair device speed
Use the current PIO mode value instead of the physical maximum one
of the pair device on the port to determine PIO commmand timings used
for both devices on the port.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/siimage.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Index: b/drivers/ide/siimage.c
===================================================================
--- a/drivers/ide/siimage.c
+++ b/drivers/ide/siimage.c
@@ -258,7 +258,7 @@ static void sil_set_pio_mode(ide_hwif_t
/* trim *taskfile* PIO to the slowest of the master/slave */
if (pair) {
- u8 pair_pio = ide_get_best_pio_mode(pair, 255, 4);
+ u8 pair_pio = pair->pio_mode - XFER_PIO_0;
if (pair_pio < tf_pio)
tf_pio = pair_pio;
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] cmd64x: fix handling of address setup timings
Account for the requirements of the DMA mode currently used.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/cmd64x.c | 17 ++++++++++-------
1 file changed, 10 insertions(+), 7 deletions(-)
Index: b/drivers/ide/cmd64x.c
===================================================================
--- a/drivers/ide/cmd64x.c
+++ b/drivers/ide/cmd64x.c
@@ -87,9 +87,6 @@ static void cmd64x_program_timings(ide_d
pci_write_config_byte(dev, drwtim_regs[drive->dn],
(t.active << 4) | t.recover);
- if (mode >= XFER_SW_DMA_0)
- return;
-
/*
* The primary channel has individual address setup timing registers
* for each drive and the hardware selects the slowest timing itself.
@@ -99,11 +96,17 @@ static void cmd64x_program_timings(ide_d
if (hwif->channel) {
ide_drive_t *pair = ide_get_pair_dev(drive);
- ide_set_drivedata(drive, (void *)(unsigned long)t.setup);
+ if (pair) {
+ struct ide_timing tp;
- if (pair)
- t.setup = max_t(u8, t.setup,
- (unsigned long)ide_get_drivedata(pair));
+ ide_timing_compute(pair, pair->pio_mode, &tp, T, 0);
+ ide_timing_merge(&t, &tp, &t, IDE_TIMING_SETUP);
+ if (pair->dma_mode) {
+ ide_timing_compute(pair, pair->dma_mode,
+ &tp, T, 0);
+ ide_timing_merge(&tp, &t, &t, IDE_TIMING_SETUP);
+ }
+ }
}
if (t.setup > 5) /* shouldn't actually happen... */
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] ide-timings: use ->pio_mode value to determine fastest PIO speed
Use the current PIO mode value instead of the physical maximum one
to determine the fastest allowed PIO for shared PIO/DMA timings.
Affected host drivers: amd74xx and via82cxxx.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/ide-timings.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
Index: b/drivers/ide/ide-timings.c
===================================================================
--- a/drivers/ide/ide-timings.c
+++ b/drivers/ide/ide-timings.c
@@ -189,8 +189,7 @@ int ide_timing_compute(ide_drive_t *driv
* DMA cycle timing is slower/equal than the fastest PIO timing.
*/
if (speed >= XFER_SW_DMA_0) {
- u8 pio = ide_get_best_pio_mode(drive, 255, 5);
- ide_timing_compute(drive, XFER_PIO_0 + pio, &p, T, UT);
+ ide_timing_compute(drive, drive->pio_mode, &p, T, UT);
ide_timing_merge(&p, t, t, IDE_TIMING_ALL);
}
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] via82cxxx: use ->pio_mode value to determine pair device speed
Use the current PIO mode value instead of the current transfer speed
of the pair device on the port to determine PIO commmand timings used
for both devices on the port.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/via82cxxx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Index: b/drivers/ide/via82cxxx.c
===================================================================
--- a/drivers/ide/via82cxxx.c
+++ b/drivers/ide/via82cxxx.c
@@ -199,7 +199,7 @@ static void via_set_drive(ide_hwif_t *hw
ide_timing_compute(drive, speed, &t, T, UT);
if (peer) {
- ide_timing_compute(peer, peer->current_speed, &p, T, UT);
+ ide_timing_compute(peer, peer->pio_mode, &p, T, UT);
ide_timing_merge(&p, &t, &t, IDE_TIMING_8BIT);
}
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] palm_bk3710: use ->pio_mode value to determine pair device speed
Use the current PIO mode value instead of the physical maximum one
of the pair device on the port to determine PIO commmand timings used
for both devices on the port.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/palm_bk3710.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Index: b/drivers/ide/palm_bk3710.c
===================================================================
--- a/drivers/ide/palm_bk3710.c
+++ b/drivers/ide/palm_bk3710.c
@@ -166,7 +166,7 @@ static void palm_bk3710_setpiomode(void
writel(val32, base + BK3710_DATRCVR);
if (mate) {
- u8 mode2 = ide_get_best_pio_mode(mate, 255, 4);
+ u8 mode2 = mate->pio_mode - XFER_PIO_0;
if (mode2 < mode)
mode = mode2;
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] alim15x3: fix handling of command timings
Stop depending on the BIOS setup.
Based on libata pata_ali host driver.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/alim15x3.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
Index: b/drivers/ide/alim15x3.c
===================================================================
--- a/drivers/ide/alim15x3.c
+++ b/drivers/ide/alim15x3.c
@@ -84,14 +84,18 @@ static void ali_set_pio_mode(ide_hwif_t
struct ide_timing p;
ide_timing_compute(pair, pair->pio_mode, &p, T, 1);
- ide_timing_merge(&p, &t, &t, IDE_TIMING_SETUP);
+ ide_timing_merge(&p, &t, &t,
+ IDE_TIMING_SETUP | IDE_TIMING_8BIT);
if (pair->dma_mode) {
ide_timing_compute(pair, pair->dma_mode, &p, T, 1);
- ide_timing_merge(&p, &t, &t, IDE_TIMING_SETUP);
+ ide_timing_merge(&p, &t, &t,
+ IDE_TIMING_SETUP | IDE_TIMING_8BIT);
}
}
t.setup = clamp_val(t.setup, 1, 8) & 7;
+ t.act8b = clamp_val(t.act8b, 1, 8) & 7;
+ t.rec8b = clamp_val(t.rec8b, 1, 16) & 15;
t.active = clamp_val(t.active, 1, 8) & 7;
t.recover = clamp_val(t.recover, 1, 16) & 15;
@@ -101,6 +105,7 @@ static void ali_set_pio_mode(ide_hwif_t
ali_fifo_control(hwif, drive, (drive->media == ide_disk) ? 0x05 : 0x00);
pci_write_config_byte(dev, port, t.setup);
+ pci_write_config_byte(dev, port + 1, (t.act8b << 4) | t.rec8b);
pci_write_config_byte(dev, port + unit + 2,
(t.active << 4) | t.recover);
}
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] amd74xx: use ->pio_mode value to determine pair device speed
Use the current PIO mode value instead of the current transfer speed
of the pair device on the port to determine PIO commmand timings used
for both devices on the port.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/amd74xx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Index: b/drivers/ide/amd74xx.c
===================================================================
--- a/drivers/ide/amd74xx.c
+++ b/drivers/ide/amd74xx.c
@@ -94,7 +94,7 @@ static void amd_set_drive(ide_hwif_t *hw
ide_timing_compute(drive, speed, &t, T, UT);
if (peer) {
- ide_timing_compute(peer, peer->current_speed, &p, T, UT);
+ ide_timing_compute(peer, peer->pio_mode, &p, T, UT);
ide_timing_merge(&p, &t, &t, IDE_TIMING_8BIT);
}
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] alim15x3: fix handling of UDMA enable bit
Clear UDMA enable bit also for PIO modes.
Based on libata pata_ali host driver.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/alim15x3.c | 43 ++++++++++++++++++-------------------------
1 file changed, 18 insertions(+), 25 deletions(-)
Index: b/drivers/ide/alim15x3.c
===================================================================
--- a/drivers/ide/alim15x3.c
+++ b/drivers/ide/alim15x3.c
@@ -62,11 +62,22 @@ static void ali_fifo_control(ide_hwif_t
}
static void ali_program_timings(ide_hwif_t *hwif, ide_drive_t *drive,
- struct ide_timing *t)
+ struct ide_timing *t, u8 ultra)
{
struct pci_dev *dev = to_pci_dev(hwif->dev);
int port = hwif->channel ? 0x5c : 0x58;
- u8 unit = drive->dn & 1;
+ int udmat = 0x56 + hwif->channel;
+ u8 unit = drive->dn & 1, udma;
+ int shift = 4 * unit;
+
+ /* Set up the UDMA */
+ pci_read_config_byte(dev, udmat, &udma);
+ udma &= ~(0x0F << shift);
+ udma |= ultra << shift;
+ pci_write_config_byte(dev, udmat, udma);
+
+ if (t == NULL)
+ return;
t->setup = clamp_val(t->setup, 1, 8) & 7;
t->act8b = clamp_val(t->act8b, 1, 8) & 7;
@@ -114,7 +125,7 @@ static void ali_set_pio_mode(ide_hwif_t
*/
ali_fifo_control(hwif, drive, (drive->media == ide_disk) ? 0x05 : 0x00);
- ali_program_timings(hwif, drive, &t);
+ ali_program_timings(hwif, drive, &t, 0);
}
/**
@@ -152,29 +163,16 @@ static u8 ali_udma_filter(ide_drive_t *d
static void ali_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
+ static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD };
struct pci_dev *dev = to_pci_dev(hwif->dev);
ide_drive_t *pair = ide_get_pair_dev(drive);
int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
unsigned long T = 1000000 / bus_speed; /* PCI clock based */
const u8 speed = drive->dma_mode;
- u8 speed1 = speed;
- u8 unit = drive->dn & 1;
u8 tmpbyte = 0x00;
- int m5229_udma = (hwif->channel) ? 0x57 : 0x56;
struct ide_timing t;
- if (speed == XFER_UDMA_6)
- speed1 = 0x47;
-
if (speed < XFER_UDMA_0) {
- u8 ultra_enable = (unit) ? 0x7f : 0xf7;
- /*
- * clear "ultra enable" bit
- */
- pci_read_config_byte(dev, m5229_udma, &tmpbyte);
- tmpbyte &= ultra_enable;
- pci_write_config_byte(dev, m5229_udma, tmpbyte);
-
ide_timing_compute(drive, drive->dma_mode, &t, T, 1);
if (pair) {
struct ide_timing p;
@@ -189,15 +187,10 @@ static void ali_set_dma_mode(ide_hwif_t
IDE_TIMING_SETUP | IDE_TIMING_8BIT);
}
}
- ali_program_timings(hwif, drive, &t);
+ ali_program_timings(hwif, drive, &t, 0);
} else {
- pci_read_config_byte(dev, m5229_udma, &tmpbyte);
- tmpbyte &= (0x0f << ((1-unit) << 2));
- /*
- * enable ultra dma and set timing
- */
- tmpbyte |= ((0x08 | ((4-speed1)&0x07)) << (unit << 2));
- pci_write_config_byte(dev, m5229_udma, tmpbyte);
+ ali_program_timings(hwif, drive, NULL,
+ udma_timing[speed - XFER_UDMA_0]);
if (speed >= XFER_UDMA_3) {
pci_read_config_byte(dev, 0x4b, &tmpbyte);
tmpbyte |= 1;
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] alim15x3: fix handling of DMA timings
Stop depending on the BIOS setup.
Based on libata pata_ali host driver.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/alim15x3.c | 55 ++++++++++++++++++++++++++++++++++---------------
1 file changed, 39 insertions(+), 16 deletions(-)
Index: b/drivers/ide/alim15x3.c
===================================================================
--- a/drivers/ide/alim15x3.c
+++ b/drivers/ide/alim15x3.c
@@ -61,6 +61,25 @@ static void ali_fifo_control(ide_hwif_t
pci_write_config_byte(pdev, pio_fifo, fifo);
}
+static void ali_program_timings(ide_hwif_t *hwif, ide_drive_t *drive,
+ struct ide_timing *t)
+{
+ struct pci_dev *dev = to_pci_dev(hwif->dev);
+ int port = hwif->channel ? 0x5c : 0x58;
+ u8 unit = drive->dn & 1;
+
+ t->setup = clamp_val(t->setup, 1, 8) & 7;
+ t->act8b = clamp_val(t->act8b, 1, 8) & 7;
+ t->rec8b = clamp_val(t->rec8b, 1, 16) & 15;
+ t->active = clamp_val(t->active, 1, 8) & 7;
+ t->recover = clamp_val(t->recover, 1, 16) & 15;
+
+ pci_write_config_byte(dev, port, t->setup);
+ pci_write_config_byte(dev, port + 1, (t->act8b << 4) | t->rec8b);
+ pci_write_config_byte(dev, port + unit + 2,
+ (t->active << 4) | t->recover);
+}
+
/**
* ali_set_pio_mode - set host controller for PIO mode
* @hwif: port
@@ -71,12 +90,9 @@ static void ali_fifo_control(ide_hwif_t
static void ali_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
ide_drive_t *pair = ide_get_pair_dev(drive);
int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
unsigned long T = 1000000 / bus_speed; /* PCI clock based */
- int port = hwif->channel ? 0x5c : 0x58;
- u8 unit = drive->dn & 1;
struct ide_timing t;
ide_timing_compute(drive, drive->pio_mode, &t, T, 1);
@@ -93,21 +109,12 @@ static void ali_set_pio_mode(ide_hwif_t
}
}
- t.setup = clamp_val(t.setup, 1, 8) & 7;
- t.act8b = clamp_val(t.act8b, 1, 8) & 7;
- t.rec8b = clamp_val(t.rec8b, 1, 16) & 15;
- t.active = clamp_val(t.active, 1, 8) & 7;
- t.recover = clamp_val(t.recover, 1, 16) & 15;
-
/*
* PIO mode => ATA FIFO on, ATAPI FIFO off
*/
ali_fifo_control(hwif, drive, (drive->media == ide_disk) ? 0x05 : 0x00);
- pci_write_config_byte(dev, port, t.setup);
- pci_write_config_byte(dev, port + 1, (t.act8b << 4) | t.rec8b);
- pci_write_config_byte(dev, port + unit + 2,
- (t.active << 4) | t.recover);
+ ali_program_timings(hwif, drive, &t);
}
/**
@@ -146,11 +153,15 @@ static u8 ali_udma_filter(ide_drive_t *d
static void ali_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
struct pci_dev *dev = to_pci_dev(hwif->dev);
+ ide_drive_t *pair = ide_get_pair_dev(drive);
+ int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
+ unsigned long T = 1000000 / bus_speed; /* PCI clock based */
const u8 speed = drive->dma_mode;
u8 speed1 = speed;
u8 unit = drive->dn & 1;
u8 tmpbyte = 0x00;
int m5229_udma = (hwif->channel) ? 0x57 : 0x56;
+ struct ide_timing t;
if (speed == XFER_UDMA_6)
speed1 = 0x47;
@@ -164,9 +175,21 @@ static void ali_set_dma_mode(ide_hwif_t
tmpbyte &= ultra_enable;
pci_write_config_byte(dev, m5229_udma, tmpbyte);
- /*
- * FIXME: Oh, my... DMA timings are never set.
- */
+ ide_timing_compute(drive, drive->dma_mode, &t, T, 1);
+ if (pair) {
+ struct ide_timing p;
+
+ ide_timing_compute(pair, pair->pio_mode, &p, T, 1);
+ ide_timing_merge(&p, &t, &t,
+ IDE_TIMING_SETUP | IDE_TIMING_8BIT);
+ if (pair->dma_mode) {
+ ide_timing_compute(pair, pair->dma_mode,
+ &p, T, 1);
+ ide_timing_merge(&p, &t, &t,
+ IDE_TIMING_SETUP | IDE_TIMING_8BIT);
+ }
+ }
+ ali_program_timings(hwif, drive, &t);
} else {
pci_read_config_byte(dev, m5229_udma, &tmpbyte);
tmpbyte &= (0x0f << ((1-unit) << 2));
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] ide: change ->set_dma_mode method parameters
Change ->set_dma_mode method parameters to match ->set_dmamode method
used in struct ata_port_operations.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/aec62xx.c | 10 +++++-----
drivers/ide/alim15x3.c | 6 +++---
drivers/ide/amd74xx.c | 7 ++++---
drivers/ide/atiixp.c | 7 ++++---
drivers/ide/au1xxx-ide.c | 4 ++--
drivers/ide/cmd64x.c | 4 ++--
drivers/ide/cs5520.c | 4 ++--
drivers/ide/cs5530.c | 6 +++---
drivers/ide/cs5535.c | 6 +++---
drivers/ide/cs5536.c | 7 ++++---
drivers/ide/cy82c693.c | 4 ++--
drivers/ide/hpt366.c | 7 ++++---
drivers/ide/icside.c | 3 ++-
drivers/ide/ide-xfer-mode.c | 4 ++--
drivers/ide/it8172.c | 4 ++--
drivers/ide/it8213.c | 6 +++---
drivers/ide/it821x.c | 6 ++++--
drivers/ide/jmicron.c | 4 ++--
drivers/ide/palm_bk3710.c | 5 +++--
drivers/ide/pdc202xx_new.c | 4 ++--
drivers/ide/pdc202xx_old.c | 7 ++++---
drivers/ide/piix.c | 6 +++---
drivers/ide/pmac.c | 4 ++--
drivers/ide/sc1200.c | 4 ++--
drivers/ide/scc_pata.c | 6 +++---
drivers/ide/serverworks.c | 4 ++--
drivers/ide/sgiioc4.c | 2 +-
drivers/ide/siimage.c | 6 +++---
drivers/ide/sis5513.c | 4 +++-
drivers/ide/sl82c105.c | 3 ++-
drivers/ide/slc90e66.c | 4 ++--
drivers/ide/tc86c001.c | 7 ++++---
drivers/ide/triflex.c | 8 ++++----
drivers/ide/tx4939ide.c | 4 ++--
drivers/ide/via82cxxx.c | 9 +++++----
include/linux/ide.h | 2 +-
36 files changed, 101 insertions(+), 87 deletions(-)
Index: b/drivers/ide/aec62xx.c
===================================================================
--- a/drivers/ide/aec62xx.c
+++ b/drivers/ide/aec62xx.c
@@ -81,15 +81,15 @@ static u8 pci_bus_clock_list_ultra (u8 s
return chipset_table->ultra_settings;
}
-static void aec6210_set_mode(ide_drive_t *drive, const u8 speed)
+static void aec6210_set_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
struct ide_host *host = pci_get_drvdata(dev);
struct chipset_bus_clock_list_entry *bus_clock = host->host_priv;
u16 d_conf = 0;
u8 ultra = 0, ultra_conf = 0;
u8 tmp0 = 0, tmp1 = 0, tmp2 = 0;
+ const u8 speed = drive->dma_mode;
unsigned long flags;
local_irq_save(flags);
@@ -109,15 +109,15 @@ static void aec6210_set_mode(ide_drive_t
local_irq_restore(flags);
}
-static void aec6260_set_mode(ide_drive_t *drive, const u8 speed)
+static void aec6260_set_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
struct ide_host *host = pci_get_drvdata(dev);
struct chipset_bus_clock_list_entry *bus_clock = host->host_priv;
u8 unit = drive->dn & 1;
u8 tmp1 = 0, tmp2 = 0;
u8 ultra = 0, drive_conf = 0, ultra_conf = 0;
+ const u8 speed = drive->dma_mode;
unsigned long flags;
local_irq_save(flags);
@@ -137,7 +137,7 @@ static void aec6260_set_mode(ide_drive_t
static void aec_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
drive->dma_mode = drive->pio_mode;
- hwif->port_ops->set_dma_mode(drive, drive->dma_mode);
+ hwif->port_ops->set_dma_mode(hwif, drive);
}
static int init_chipset_aec62xx(struct pci_dev *dev)
Index: b/drivers/ide/alim15x3.c
===================================================================
--- a/drivers/ide/alim15x3.c
+++ b/drivers/ide/alim15x3.c
@@ -132,16 +132,16 @@ static u8 ali_udma_filter(ide_drive_t *d
/**
* ali_set_dma_mode - set host controller for DMA mode
+ * @hwif: port
* @drive: drive
- * @speed: DMA mode
*
* Configure the hardware for the desired IDE transfer mode.
*/
-static void ali_set_dma_mode(ide_drive_t *drive, const u8 speed)
+static void ali_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
+ const u8 speed = drive->dma_mode;
u8 speed1 = speed;
u8 unit = drive->dn & 1;
u8 tmpbyte = 0x00;
Index: b/drivers/ide/amd74xx.c
===================================================================
--- a/drivers/ide/amd74xx.c
+++ b/drivers/ide/amd74xx.c
@@ -79,14 +79,14 @@ static void amd_set_speed(struct pci_dev
* to a desired transfer mode. It also can be called by upper layers.
*/
-static void amd_set_drive(ide_drive_t *drive, const u8 speed)
+static void amd_set_drive(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
ide_drive_t *peer = ide_get_pair_dev(drive);
struct ide_timing t, p;
int T, UT;
u8 udma_mask = hwif->ultra_mask;
+ const u8 speed = drive->dma_mode;
T = 1000000000 / amd_clock;
UT = (udma_mask == ATA_UDMA2) ? T : (T / 2);
@@ -110,7 +110,8 @@ static void amd_set_drive(ide_drive_t *d
static void amd_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- amd_set_drive(drive, drive->pio_mode);
+ drive->dma_mode = drive->pio_mode;
+ amd_set_drive(hwif, drive);
}
static void amd7409_cable_detect(struct pci_dev *dev)
Index: b/drivers/ide/atiixp.c
===================================================================
--- a/drivers/ide/atiixp.c
+++ b/drivers/ide/atiixp.c
@@ -75,21 +75,22 @@ static void atiixp_set_pio_mode(ide_hwif
/**
* atiixp_set_dma_mode - set host controller for DMA mode
+ * @hwif: port
* @drive: drive
- * @speed: DMA mode
*
* Set a ATIIXP host controller to the desired DMA mode. This involves
* programming the right timing data into the PCI configuration space.
*/
-static void atiixp_set_dma_mode(ide_drive_t *drive, const u8 speed)
+static void atiixp_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
+ struct pci_dev *dev = to_pci_dev(hwif->dev);
unsigned long flags;
int timing_shift = (drive->dn ^ 1) * 8;
u32 tmp32;
u16 tmp16;
u16 udma_ctl = 0;
+ const u8 speed = drive->dma_mode;
spin_lock_irqsave(&atiixp_lock, flags);
Index: b/drivers/ide/au1xxx-ide.c
===================================================================
--- a/drivers/ide/au1xxx-ide.c
+++ b/drivers/ide/au1xxx-ide.c
@@ -160,11 +160,11 @@ static void au1xxx_set_pio_mode(ide_hwif
au_writel(mem_stcfg,MEM_STCFG2);
}
-static void auide_set_dma_mode(ide_drive_t *drive, const u8 speed)
+static void auide_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
int mem_sttime = 0, mem_stcfg = au_readl(MEM_STCFG2);
- switch(speed) {
+ switch (drive->dma_mode) {
#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
case XFER_MW_DMA_2:
mem_sttime = SBC_IDE_TIMING(MDMA2);
Index: b/drivers/ide/cmd64x.c
===================================================================
--- a/drivers/ide/cmd64x.c
+++ b/drivers/ide/cmd64x.c
@@ -167,12 +167,12 @@ static void cmd64x_set_pio_mode(ide_hwif
cmd64x_tune_pio(drive, pio);
}
-static void cmd64x_set_dma_mode(ide_drive_t *drive, const u8 speed)
+static void cmd64x_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
u8 unit = drive->dn & 0x01;
u8 regU = 0, pciU = hwif->channel ? UDIDETCR1 : UDIDETCR0;
+ const u8 speed = drive->dma_mode;
pci_read_config_byte(dev, pciU, ®U);
regU &= ~(unit ? 0xCA : 0x35);
Index: b/drivers/ide/cs5520.c
===================================================================
--- a/drivers/ide/cs5520.c
+++ b/drivers/ide/cs5520.c
@@ -81,12 +81,12 @@ static void cs5520_set_pio_mode(ide_hwif
(cs5520_pio_clocks[pio].assert));
}
-static void cs5520_set_dma_mode(ide_drive_t *drive, const u8 speed)
+static void cs5520_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
printk(KERN_ERR "cs55x0: bad ide timing.\n");
drive->pio_mode = XFER_PIO_0 + 0;
- cs5520_set_pio_mode(drive->hwif, drive);
+ cs5520_set_pio_mode(hwif, drive);
}
static const struct ide_port_ops cs5520_port_ops = {
Index: b/drivers/ide/cs5530.c
===================================================================
--- a/drivers/ide/cs5530.c
+++ b/drivers/ide/cs5530.c
@@ -100,12 +100,12 @@ out:
return mask;
}
-static void cs5530_set_dma_mode(ide_drive_t *drive, const u8 mode)
+static void cs5530_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
unsigned long basereg;
unsigned int reg, timings = 0;
- switch (mode) {
+ switch (drive->dma_mode) {
case XFER_UDMA_0: timings = 0x00921250; break;
case XFER_UDMA_1: timings = 0x00911140; break;
case XFER_UDMA_2: timings = 0x00911030; break;
@@ -113,7 +113,7 @@ static void cs5530_set_dma_mode(ide_driv
case XFER_MW_DMA_1: timings = 0x00012121; break;
case XFER_MW_DMA_2: timings = 0x00002020; break;
}
- basereg = CS5530_BASEREG(drive->hwif);
+ basereg = CS5530_BASEREG(hwif);
reg = inl(basereg + 4); /* get drive0 config register */
timings |= reg & 0x80000000; /* preserve PIO format bit */
if ((drive-> dn & 1) == 0) { /* are we configuring drive0? */
Index: b/drivers/ide/cs5535.c
===================================================================
--- a/drivers/ide/cs5535.c
+++ b/drivers/ide/cs5535.c
@@ -129,15 +129,15 @@ static void cs5535_set_speed(ide_drive_t
/**
* cs5535_set_dma_mode - set host controller for DMA mode
+ * @hwif: port
* @drive: drive
- * @speed: DMA mode
*
* Programs the chipset for DMA mode.
*/
-static void cs5535_set_dma_mode(ide_drive_t *drive, const u8 speed)
+static void cs5535_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- cs5535_set_speed(drive, speed);
+ cs5535_set_speed(drive, drive->dma_mode);
}
/**
Index: b/drivers/ide/cs5536.c
===================================================================
--- a/drivers/ide/cs5536.c
+++ b/drivers/ide/cs5536.c
@@ -173,11 +173,11 @@ static void cs5536_set_pio_mode(ide_hwif
/**
* cs5536_set_dma_mode - DMA timing setup
+ * @hwif: ATA port
* @drive: ATA device
- * @mode: DMA mode
*/
-static void cs5536_set_dma_mode(ide_drive_t *drive, const u8 mode)
+static void cs5536_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
static const u8 udma_timings[6] = {
0xc2, 0xc1, 0xc0, 0xc4, 0xc5, 0xc6,
@@ -187,10 +187,11 @@ static void cs5536_set_dma_mode(ide_driv
0x67, 0x21, 0x20,
};
- struct pci_dev *pdev = to_pci_dev(drive->hwif->dev);
+ struct pci_dev *pdev = to_pci_dev(hwif->dev);
int dshift = (drive->dn & 1) ? IDE_D1_SHIFT : IDE_D0_SHIFT;
unsigned long timings = (unsigned long)ide_get_drivedata(drive);
u32 etc;
+ const u8 mode = drive->dma_mode;
cs5536_read(pdev, ETC, &etc);
Index: b/drivers/ide/cy82c693.c
===================================================================
--- a/drivers/ide/cy82c693.c
+++ b/drivers/ide/cy82c693.c
@@ -52,9 +52,9 @@
* set DMA mode a specific channel for CY82C693
*/
-static void cy82c693_set_dma_mode(ide_drive_t *drive, const u8 mode)
+static void cy82c693_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
+ const u8 mode = drive->dma_mode;
u8 single = (mode & 0x10) >> 4, index = 0, data = 0;
index = hwif->channel ? CY82_INDEX_CHANNEL1 : CY82_INDEX_CHANNEL0;
Index: b/drivers/ide/hpt366.c
===================================================================
--- a/drivers/ide/hpt366.c
+++ b/drivers/ide/hpt366.c
@@ -692,14 +692,14 @@ static u32 get_speed_setting(u8 speed, s
return info->timings->clock_table[info->clock][i];
}
-static void hpt3xx_set_mode(ide_drive_t *drive, const u8 speed)
+static void hpt3xx_set_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
struct hpt_info *info = hpt3xx_get_info(hwif->dev);
struct hpt_timings *t = info->timings;
u8 itr_addr = 0x40 + (drive->dn * 4);
u32 old_itr = 0;
+ const u8 speed = drive->dma_mode;
u32 new_itr = get_speed_setting(speed, info);
u32 itr_mask = speed < XFER_MW_DMA_0 ? t->pio_mask :
(speed < XFER_UDMA_0 ? t->dma_mask :
@@ -718,7 +718,8 @@ static void hpt3xx_set_mode(ide_drive_t
static void hpt3xx_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- hpt3xx_set_mode(drive, drive->pio_mode);
+ drive->dma_mode = drive->pio_mode;
+ hpt3xx_set_mode(hwif, drive);
}
static void hpt3xx_maskproc(ide_drive_t *drive, int mask)
Index: b/drivers/ide/icside.c
===================================================================
--- a/drivers/ide/icside.c
+++ b/drivers/ide/icside.c
@@ -185,10 +185,11 @@ static const expansioncard_ops_t icside_
* MW1 80 50 50 150 C
* MW2 70 25 25 120 C
*/
-static void icside_set_dma_mode(ide_drive_t *drive, const u8 xfer_mode)
+static void icside_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
unsigned long cycle_time;
int use_dma_info = 0;
+ const u8 xfer_mode = drive->dma_mode;
switch (xfer_mode) {
case XFER_MW_DMA_2:
Index: b/drivers/ide/ide-xfer-mode.c
===================================================================
--- a/drivers/ide/ide-xfer-mode.c
+++ b/drivers/ide/ide-xfer-mode.c
@@ -168,11 +168,11 @@ int ide_set_dma_mode(ide_drive_t *drive,
if (ide_config_drive_speed(drive, mode))
return -1;
drive->dma_mode = mode;
- port_ops->set_dma_mode(drive, mode);
+ port_ops->set_dma_mode(hwif, drive);
return 0;
} else {
drive->dma_mode = mode;
- port_ops->set_dma_mode(drive, mode);
+ port_ops->set_dma_mode(hwif, drive);
return ide_config_drive_speed(drive, mode);
}
}
Index: b/drivers/ide/it8172.c
===================================================================
--- a/drivers/ide/it8172.c
+++ b/drivers/ide/it8172.c
@@ -77,14 +77,14 @@ static void it8172_set_pio_mode(ide_hwif
pci_write_config_dword(dev, 0x44, drive_timing);
}
-static void it8172_set_dma_mode(ide_drive_t *drive, const u8 speed)
+static void it8172_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
int a_speed = 3 << (drive->dn * 4);
int u_flag = 1 << drive->dn;
int u_speed = 0;
u8 reg48, reg4a;
+ const u8 speed = drive->dma_mode;
pci_read_config_byte(dev, 0x48, ®48);
pci_read_config_byte(dev, 0x4a, ®4a);
Index: b/drivers/ide/it8213.c
===================================================================
--- a/drivers/ide/it8213.c
+++ b/drivers/ide/it8213.c
@@ -74,15 +74,14 @@ static void it8213_set_pio_mode(ide_hwif
/**
* it8213_set_dma_mode - set host controller for DMA mode
+ * @hwif: port
* @drive: drive
- * @speed: DMA mode
*
* Tune the ITE chipset for the DMA mode.
*/
-static void it8213_set_dma_mode(ide_drive_t *drive, const u8 speed)
+static void it8213_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
u8 maslave = 0x40;
int a_speed = 3 << (drive->dn * 4);
@@ -92,6 +91,7 @@ static void it8213_set_dma_mode(ide_driv
int u_speed = 0;
u16 reg4042, reg4a;
u8 reg48, reg54, reg55;
+ const u8 speed = drive->dma_mode;
pci_read_config_word(dev, maslave, ®4042);
pci_read_config_byte(dev, 0x48, ®48);
Index: b/drivers/ide/it821x.c
===================================================================
--- a/drivers/ide/it821x.c
+++ b/drivers/ide/it821x.c
@@ -393,14 +393,16 @@ static int it821x_dma_end(ide_drive_t *d
/**
* it821x_set_dma_mode - set host controller for DMA mode
+ * @hwif: port
* @drive: drive
- * @speed: DMA mode
*
* Tune the ITE chipset for the desired DMA mode.
*/
-static void it821x_set_dma_mode(ide_drive_t *drive, const u8 speed)
+static void it821x_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
+ const u8 speed = drive->dma_mode;
+
/*
* MWDMA tuning is really hard because our MWDMA and PIO
* timings are kept in the same place. We can switch in the
Index: b/drivers/ide/jmicron.c
===================================================================
--- a/drivers/ide/jmicron.c
+++ b/drivers/ide/jmicron.c
@@ -86,13 +86,13 @@ static void jmicron_set_pio_mode(ide_hwi
/**
* jmicron_set_dma_mode - set host controller for DMA mode
+ * @hwif: port
* @drive: drive
- * @mode: DMA mode
*
* As the JMicron snoops for timings we don't need to do anything here.
*/
-static void jmicron_set_dma_mode(ide_drive_t *drive, const u8 mode)
+static void jmicron_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
}
Index: b/drivers/ide/palm_bk3710.c
===================================================================
--- a/drivers/ide/palm_bk3710.c
+++ b/drivers/ide/palm_bk3710.c
@@ -188,10 +188,11 @@ static void palm_bk3710_setpiomode(void
writel(val32, base + BK3710_REGRCVR);
}
-static void palm_bk3710_set_dma_mode(ide_drive_t *drive, u8 xferspeed)
+static void palm_bk3710_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
int is_slave = drive->dn & 1;
- void __iomem *base = (void *)drive->hwif->dma_base;
+ void __iomem *base = (void *)hwif->dma_base;
+ const u8 xferspeed = drive->dma_mode;
if (xferspeed >= XFER_UDMA_0) {
palm_bk3710_setudmamode(base, is_slave,
Index: b/drivers/ide/pdc202xx_new.c
===================================================================
--- a/drivers/ide/pdc202xx_new.c
+++ b/drivers/ide/pdc202xx_new.c
@@ -129,11 +129,11 @@ static struct udma_timing {
{ 0x1a, 0x01, 0xcb }, /* UDMA mode 6 */
};
-static void pdcnew_set_dma_mode(ide_drive_t *drive, const u8 speed)
+static void pdcnew_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
u8 adj = (drive->dn & 1) ? 0x08 : 0x00;
+ const u8 speed = drive->dma_mode;
/*
* IDE core issues SETFEATURES_XFER to the drive first (thanks to
Index: b/drivers/ide/pdc202xx_old.c
===================================================================
--- a/drivers/ide/pdc202xx_old.c
+++ b/drivers/ide/pdc202xx_old.c
@@ -21,11 +21,11 @@
#define DRV_NAME "pdc202xx_old"
-static void pdc202xx_set_mode(ide_drive_t *drive, const u8 speed)
+static void pdc202xx_set_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
u8 drive_pci = 0x60 + (drive->dn << 2);
+ const u8 speed = drive->dma_mode;
u8 AP = 0, BP = 0, CP = 0;
u8 TA = 0, TB = 0, TC = 0;
@@ -78,7 +78,8 @@ static void pdc202xx_set_mode(ide_drive_
static void pdc202xx_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- pdc202xx_set_mode(drive, drive->pio_mode);
+ drive->dma_mode = drive->pio_mode;
+ pdc202xx_set_mode(hwif, drive);
}
static int pdc202xx_test_irq(ide_hwif_t *hwif)
Index: b/drivers/ide/piix.c
===================================================================
--- a/drivers/ide/piix.c
+++ b/drivers/ide/piix.c
@@ -127,16 +127,15 @@ static void piix_set_pio_mode(ide_hwif_t
/**
* piix_set_dma_mode - set host controller for DMA mode
+ * @hwif: port
* @drive: drive
- * @speed: DMA mode
*
* Set a PIIX host controller to the desired DMA mode. This involves
* programming the right timing data into the PCI configuration space.
*/
-static void piix_set_dma_mode(ide_drive_t *drive, const u8 speed)
+static void piix_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
u8 maslave = hwif->channel ? 0x42 : 0x40;
int a_speed = 3 << (drive->dn * 4);
@@ -147,6 +146,7 @@ static void piix_set_dma_mode(ide_drive_
int sitre;
u16 reg4042, reg4a;
u8 reg48, reg54, reg55;
+ const u8 speed = drive->dma_mode;
pci_read_config_word(dev, maslave, ®4042);
sitre = (reg4042 & 0x4000) ? 1 : 0;
Index: b/drivers/ide/pmac.c
===================================================================
--- a/drivers/ide/pmac.c
+++ b/drivers/ide/pmac.c
@@ -779,14 +779,14 @@ set_timings_mdma(ide_drive_t *drive, int
#endif
}
-static void pmac_ide_set_dma_mode(ide_drive_t *drive, const u8 speed)
+static void pmac_ide_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
pmac_ide_hwif_t *pmif =
(pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
int ret = 0;
u32 *timings, *timings2, tl[2];
u8 unit = drive->dn & 1;
+ const u8 speed = drive->dma_mode;
timings = &pmif->timings[unit];
timings2 = &pmif->timings[unit+2];
Index: b/drivers/ide/sc1200.c
===================================================================
--- a/drivers/ide/sc1200.c
+++ b/drivers/ide/sc1200.c
@@ -122,13 +122,13 @@ out:
return mask;
}
-static void sc1200_set_dma_mode(ide_drive_t *drive, const u8 mode)
+static void sc1200_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
unsigned int reg, timings;
unsigned short pci_clock;
unsigned int basereg = hwif->channel ? 0x50 : 0x40;
+ const u8 mode = drive->dma_mode;
static const u32 udma_timing[3][3] = {
{ 0x00921250, 0x00911140, 0x00911030 },
Index: b/drivers/ide/scc_pata.c
===================================================================
--- a/drivers/ide/scc_pata.c
+++ b/drivers/ide/scc_pata.c
@@ -231,16 +231,15 @@ static void scc_set_pio_mode(ide_hwif_t
/**
* scc_set_dma_mode - set host controller for DMA mode
+ * @hwif: port
* @drive: drive
- * @speed: DMA mode
*
* Load the timing settings for this device mode into the
* controller.
*/
-static void scc_set_dma_mode(ide_drive_t *drive, const u8 speed)
+static void scc_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
struct scc_ports *ports = ide_get_hwifdata(hwif);
unsigned long ctl_base = ports->ctl;
unsigned long cckctrl_port = ctl_base + 0xff0;
@@ -254,6 +253,7 @@ static void scc_set_dma_mode(ide_drive_t
int offset, idx;
unsigned long reg;
unsigned long jcactsel;
+ const u8 speed = drive->dma_mode;
reg = in_be32((void __iomem *)cckctrl_port);
if (reg & CCKCTRL_ATACLKOEN) {
Index: b/drivers/ide/serverworks.c
===================================================================
--- a/drivers/ide/serverworks.c
+++ b/drivers/ide/serverworks.c
@@ -128,14 +128,14 @@ static void svwks_set_pio_mode(ide_hwif_
}
}
-static void svwks_set_dma_mode(ide_drive_t *drive, const u8 speed)
+static void svwks_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
static const u8 udma_modes[] = { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05 };
static const u8 dma_modes[] = { 0x77, 0x21, 0x20 };
static const u8 drive_pci2[] = { 0x45, 0x44, 0x47, 0x46 };
- ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
+ const u8 speed = drive->dma_mode;
u8 unit = drive->dn & 1;
u8 ultra_enable = 0, ultra_timing = 0, dma_timing = 0;
Index: b/drivers/ide/sgiioc4.c
===================================================================
--- a/drivers/ide/sgiioc4.c
+++ b/drivers/ide/sgiioc4.c
@@ -255,7 +255,7 @@ static int sgiioc4_dma_end(ide_drive_t *
return dma_stat;
}
-static void sgiioc4_set_dma_mode(ide_drive_t *drive, const u8 speed)
+static void sgiioc4_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
}
Index: b/drivers/ide/siimage.c
===================================================================
--- a/drivers/ide/siimage.c
+++ b/drivers/ide/siimage.c
@@ -289,19 +289,18 @@ static void sil_set_pio_mode(ide_hwif_t
/**
* sil_set_dma_mode - set host controller for DMA mode
+ * @hwif: port
* @drive: drive
- * @speed: DMA mode
*
* Tune the SiI chipset for the desired DMA mode.
*/
-static void sil_set_dma_mode(ide_drive_t *drive, const u8 speed)
+static void sil_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
static const u8 ultra6[] = { 0x0F, 0x0B, 0x07, 0x05, 0x03, 0x02, 0x01 };
static const u8 ultra5[] = { 0x0C, 0x07, 0x05, 0x04, 0x02, 0x01 };
static const u16 dma[] = { 0x2208, 0x10C2, 0x10C1 };
- ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
unsigned long base = (unsigned long)hwif->hwif_data;
u16 ultra = 0, multi = 0;
@@ -311,6 +310,7 @@ static void sil_set_dma_mode(ide_drive_t
: (mmio ? 0xB4 : 0x80);
unsigned long ma = siimage_seldev(drive, 0x08);
unsigned long ua = siimage_seldev(drive, 0x0C);
+ const u8 speed = drive->dma_mode;
scsc = sil_ioread8 (dev, base + (mmio ? 0x4A : 0x8A));
mode = sil_ioread8 (dev, base + addr_mask);
Index: b/drivers/ide/sis5513.c
===================================================================
--- a/drivers/ide/sis5513.c
+++ b/drivers/ide/sis5513.c
@@ -340,8 +340,10 @@ static void sis_program_udma_timings(ide
sis_ata33_program_udma_timings(drive, mode);
}
-static void sis_set_dma_mode(ide_drive_t *drive, const u8 speed)
+static void sis_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
+ const u8 speed = drive->dma_mode;
+
if (speed >= XFER_UDMA_0)
sis_program_udma_timings(drive, speed);
else
Index: b/drivers/ide/sl82c105.c
===================================================================
--- a/drivers/ide/sl82c105.c
+++ b/drivers/ide/sl82c105.c
@@ -92,11 +92,12 @@ static void sl82c105_set_pio_mode(ide_hw
/*
* Configure the chipset for DMA mode.
*/
-static void sl82c105_set_dma_mode(ide_drive_t *drive, const u8 speed)
+static void sl82c105_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
static u16 mwdma_timings[] = {0x0707, 0x0201, 0x0200};
unsigned long timings = (unsigned long)ide_get_drivedata(drive);
u16 drv_ctrl;
+ const u8 speed = drive->dma_mode;
drv_ctrl = mwdma_timings[speed - XFER_MW_DMA_0];
Index: b/drivers/ide/slc90e66.c
===================================================================
--- a/drivers/ide/slc90e66.c
+++ b/drivers/ide/slc90e66.c
@@ -72,14 +72,14 @@ static void slc90e66_set_pio_mode(ide_hw
spin_unlock_irqrestore(&slc90e66_lock, flags);
}
-static void slc90e66_set_dma_mode(ide_drive_t *drive, const u8 speed)
+static void slc90e66_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
u8 maslave = hwif->channel ? 0x42 : 0x40;
int sitre = 0, a_speed = 7 << (drive->dn * 4);
int u_speed = 0, u_flag = 1 << drive->dn;
u16 reg4042, reg44, reg48, reg4a;
+ const u8 speed = drive->dma_mode;
pci_read_config_word(dev, maslave, ®4042);
sitre = (reg4042 & 0x4000) ? 1 : 0;
Index: b/drivers/ide/tc86c001.c
===================================================================
--- a/drivers/ide/tc86c001.c
+++ b/drivers/ide/tc86c001.c
@@ -13,11 +13,11 @@
#define DRV_NAME "tc86c001"
-static void tc86c001_set_mode(ide_drive_t *drive, const u8 speed)
+static void tc86c001_set_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
unsigned long scr_port = hwif->config_data + (drive->dn ? 0x02 : 0x00);
u16 mode, scr = inw(scr_port);
+ const u8 speed = drive->dma_mode;
switch (speed) {
case XFER_UDMA_4: mode = 0x00c0; break;
@@ -43,7 +43,8 @@ static void tc86c001_set_mode(ide_drive_
static void tc86c001_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- tc86c001_set_mode(drive, drive->pio_mode);
+ drive->dma_mode = drive->pio_mode;
+ tc86c001_set_mode(hwif, drive);
}
/*
Index: b/drivers/ide/triflex.c
===================================================================
--- a/drivers/ide/triflex.c
+++ b/drivers/ide/triflex.c
@@ -34,9 +34,8 @@
#define DRV_NAME "triflex"
-static void triflex_set_mode(ide_drive_t *drive, const u8 speed)
+static void triflex_set_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
u32 triflex_timings = 0;
u16 timing = 0;
@@ -44,7 +43,7 @@ static void triflex_set_mode(ide_drive_t
pci_read_config_dword(dev, channel_offset, &triflex_timings);
- switch(speed) {
+ switch (drive->dma_mode) {
case XFER_MW_DMA_2:
timing = 0x0103;
break;
@@ -84,7 +83,8 @@ static void triflex_set_mode(ide_drive_t
static void triflex_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- triflex_set_mode(drive, drive->pio_mode);
+ drive->dma_mode = drive->pio_mode;
+ triflex_set_mode(hwif, drive);
}
static const struct ide_port_ops triflex_port_ops = {
Index: b/drivers/ide/tx4939ide.c
===================================================================
--- a/drivers/ide/tx4939ide.c
+++ b/drivers/ide/tx4939ide.c
@@ -125,10 +125,10 @@ static void tx4939ide_set_pio_mode(ide_h
/* tx4939ide_tf_load_fixup() will set the Sys_Ctl register */
}
-static void tx4939ide_set_dma_mode(ide_drive_t *drive, const u8 mode)
+static void tx4939ide_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
u32 mask, val;
+ const u8 mode = drive->dma_mode;
/* Update Data Transfer Mode for this drive. */
if (mode >= XFER_UDMA_0)
Index: b/drivers/ide/via82cxxx.c
===================================================================
--- a/drivers/ide/via82cxxx.c
+++ b/drivers/ide/via82cxxx.c
@@ -169,22 +169,22 @@ static void via_set_speed(ide_hwif_t *hw
/**
* via_set_drive - configure transfer mode
+ * @hwif: port
* @drive: Drive to set up
- * @speed: desired speed
*
* via_set_drive() computes timing values configures the chipset to
* a desired transfer mode. It also can be called by upper layers.
*/
-static void via_set_drive(ide_drive_t *drive, const u8 speed)
+static void via_set_drive(ide_hwif_t *hwif, ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
ide_drive_t *peer = ide_get_pair_dev(drive);
struct pci_dev *dev = to_pci_dev(hwif->dev);
struct ide_host *host = pci_get_drvdata(dev);
struct via82cxxx_dev *vdev = host->host_priv;
struct ide_timing t, p;
unsigned int T, UT;
+ const u8 speed = drive->dma_mode;
T = 1000000000 / via_clock;
@@ -216,7 +216,8 @@ static void via_set_drive(ide_drive_t *d
static void via_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- via_set_drive(drive, drive->pio_mode);
+ drive->dma_mode = drive->pio_mode;
+ via_set_drive(hwif, drive);
}
static struct via_isa_bridge *via_config_find(struct pci_dev **isa)
Index: b/include/linux/ide.h
===================================================================
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -625,7 +625,7 @@ extern const struct ide_tp_ops default_t
struct ide_port_ops {
void (*init_dev)(ide_drive_t *);
void (*set_pio_mode)(struct hwif_s *, ide_drive_t *);
- void (*set_dma_mode)(ide_drive_t *, const u8);
+ void (*set_dma_mode)(struct hwif_s *, ide_drive_t *);
int (*reset_poll)(ide_drive_t *);
void (*pre_reset)(ide_drive_t *);
void (*resetproc)(ide_drive_t *);
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] ide: add drive->dma_mode field
Add dma_mode field to ide_drive_t matching dma_mode field used in
struct ata_device.
The validity of the field is restricted to ->dma_pio_mode method
only currently in IDE subsystem.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/aec62xx.c | 1 +
drivers/ide/ide-xfer-mode.c | 2 ++
include/linux/ide.h | 1 +
3 files changed, 4 insertions(+)
Index: b/drivers/ide/aec62xx.c
===================================================================
--- a/drivers/ide/aec62xx.c
+++ b/drivers/ide/aec62xx.c
@@ -136,6 +136,7 @@ static void aec6260_set_mode(ide_drive_t
static void aec_set_pio_mode(ide_drive_t *drive, const u8 pio)
{
+ drive->dma_mode = pio + XFER_PIO_0;
drive->hwif->port_ops->set_dma_mode(drive, pio + XFER_PIO_0);
}
Index: b/drivers/ide/ide-xfer-mode.c
===================================================================
--- a/drivers/ide/ide-xfer-mode.c
+++ b/drivers/ide/ide-xfer-mode.c
@@ -167,9 +167,11 @@ int ide_set_dma_mode(ide_drive_t *drive,
if (hwif->host_flags & IDE_HFLAG_POST_SET_MODE) {
if (ide_config_drive_speed(drive, mode))
return -1;
+ drive->dma_mode = mode;
port_ops->set_dma_mode(drive, mode);
return 0;
} else {
+ drive->dma_mode = mode;
port_ops->set_dma_mode(drive, mode);
return ide_config_drive_speed(drive, mode);
}
Index: b/include/linux/ide.h
===================================================================
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -516,6 +516,7 @@ struct ide_drive_s {
u8 current_speed; /* current transfer rate set */
u8 desired_speed; /* desired transfer rate set */
u8 pio_mode; /* for ->set_pio_mode _only_ */
+ u8 dma_mode; /* for ->dma_pio_mode _only_ */
u8 dn; /* now wide spread use */
u8 acoustic; /* acoustic management */
u8 media; /* disk, cdrom, tape, floppy, ... */
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] via82cxxx: workaround h/w bugs
Add custom struct ide_tp_ops instance to fix the internal bug of some VIA
chipsets which will reset the device register after changing the nIEN bit
in the device control register.
Based on commit bfce5e0 for pata_via host driver.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/via82cxxx.c | 57 ++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 57 insertions(+)
Index: b/drivers/ide/via82cxxx.c
===================================================================
--- a/drivers/ide/via82cxxx.c
+++ b/drivers/ide/via82cxxx.c
@@ -107,6 +107,7 @@ struct via82cxxx_dev
{
struct via_isa_bridge *via_config;
unsigned int via_80w;
+ u8 cached_device[2];
};
/**
@@ -382,10 +383,66 @@ static const struct ide_port_ops via_por
.cable_detect = via82cxxx_cable_detect,
};
+static void via_write_devctl(ide_hwif_t *hwif, u8 ctl)
+{
+ struct via82cxxx_dev *vdev = hwif->host->host_priv;
+
+ outb(ctl, hwif->io_ports.ctl_addr);
+ outb(vdev->cached_device[hwif->channel], hwif->io_ports.device_addr);
+}
+
+static void __via_dev_select(ide_drive_t *drive, u8 select)
+{
+ ide_hwif_t *hwif = drive->hwif;
+ struct via82cxxx_dev *vdev = hwif->host->host_priv;
+
+ outb(select, hwif->io_ports.device_addr);
+ vdev->cached_device[hwif->channel] = select;
+}
+
+static void via_dev_select(ide_drive_t *drive)
+{
+ __via_dev_select(drive, drive->select | ATA_DEVICE_OBS);
+}
+
+static void via_tf_load(ide_drive_t *drive, struct ide_taskfile *tf, u8 valid)
+{
+ ide_hwif_t *hwif = drive->hwif;
+ struct ide_io_ports *io_ports = &hwif->io_ports;
+
+ if (valid & IDE_VALID_FEATURE)
+ outb(tf->feature, io_ports->feature_addr);
+ if (valid & IDE_VALID_NSECT)
+ outb(tf->nsect, io_ports->nsect_addr);
+ if (valid & IDE_VALID_LBAL)
+ outb(tf->lbal, io_ports->lbal_addr);
+ if (valid & IDE_VALID_LBAM)
+ outb(tf->lbam, io_ports->lbam_addr);
+ if (valid & IDE_VALID_LBAH)
+ outb(tf->lbah, io_ports->lbah_addr);
+ if (valid & IDE_VALID_DEVICE)
+ __via_dev_select(drive, tf->device);
+}
+
+const struct ide_tp_ops via_tp_ops = {
+ .exec_command = ide_exec_command,
+ .read_status = ide_read_status,
+ .read_altstatus = ide_read_altstatus,
+ .write_devctl = via_write_devctl,
+
+ .dev_select = via_dev_select,
+ .tf_load = via_tf_load,
+ .tf_read = ide_tf_read,
+
+ .input_data = ide_input_data,
+ .output_data = ide_output_data,
+};
+
static const struct ide_port_info via82cxxx_chipset __devinitdata = {
.name = DRV_NAME,
.init_chipset = init_chipset_via82cxxx,
.enablebits = { { 0x40, 0x02, 0x02 }, { 0x40, 0x01, 0x01 } },
+ .tp_ops = &via_tp_ops,
.port_ops = &via_port_ops,
.host_flags = IDE_HFLAG_PIO_NO_BLACKLIST |
IDE_HFLAG_POST_SET_MODE |
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] cmd64x: remove superfluous checks from cmd64x_set_dma_mode()
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/cmd64x.c | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
Index: b/drivers/ide/cmd64x.c
===================================================================
--- a/drivers/ide/cmd64x.c
+++ b/drivers/ide/cmd64x.c
@@ -172,10 +172,8 @@ static void cmd64x_set_dma_mode(ide_driv
u8 unit = drive->dn & 0x01;
u8 regU = 0, pciU = hwif->channel ? UDIDETCR1 : UDIDETCR0;
- if (speed >= XFER_SW_DMA_0) {
- (void) pci_read_config_byte(dev, pciU, ®U);
- regU &= ~(unit ? 0xCA : 0x35);
- }
+ pci_read_config_byte(dev, pciU, ®U);
+ regU &= ~(unit ? 0xCA : 0x35);
switch(speed) {
case XFER_UDMA_5:
@@ -207,8 +205,7 @@ static void cmd64x_set_dma_mode(ide_driv
break;
}
- if (speed >= XFER_SW_DMA_0)
- (void) pci_write_config_byte(dev, pciU, regU);
+ pci_write_config_byte(dev, pciU, regU);
}
static void cmd648_clear_irq(ide_drive_t *drive)
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] opti621: remove stale driver history
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/opti621.c | 71 --------------------------------------------------
1 file changed, 71 deletions(-)
Index: b/drivers/ide/opti621.c
===================================================================
--- a/drivers/ide/opti621.c
+++ b/drivers/ide/opti621.c
@@ -8,77 +8,6 @@
* Jan Harkes <[email protected]>,
* Mark Lord <[email protected]>
* Some parts of code are from ali14xx.c and from rz1000.c.
- *
- * OPTi is trademark of OPTi, Octek is trademark of Octek.
- *
- * I used docs from OPTi databook, from ftp.opti.com, file 9123-0002.ps
- * and disassembled/traced setupvic.exe (DOS program).
- * It increases kernel code about 2 kB.
- * I don't have this card no more, but I hope I can get some in case
- * of needed development.
- * My card is Octek PIDE 1.01 (on card) or OPTiViC (program).
- * It has a place for a secondary connector in circuit, but nothing
- * is there. Also BIOS says no address for
- * secondary controller (see bellow in ide_init_opti621).
- * I've only tested this on my system, which only has one disk.
- * It's Western Digital WDAC2850, with PIO mode 3. The PCI bus
- * is at 20 MHz (I have DX2/80, I tried PCI at 40, but I got random
- * lockups). I tried the OCTEK double speed CD-ROM and
- * it does not work! But I can't boot DOS also, so it's probably
- * hardware fault. I have connected Conner 80MB, the Seagate 850MB (no
- * problems) and Seagate 1GB (as slave, WD as master). My experiences
- * with the third, 1GB drive: I got 3MB/s (hdparm), but sometimes
- * it slows to about 100kB/s! I don't know why and I have
- * not this drive now, so I can't try it again.
- * I write this driver because I lost the paper ("manual") with
- * settings of jumpers on the card and I have to boot Linux with
- * Loadlin except LILO, cause I have to run the setupvic.exe program
- * already or I get disk errors (my test: rpm -Vf
- * /usr/X11R6/bin/XF86_SVGA - or any big file).
- * Some numbers from hdparm -t /dev/hda:
- * Timing buffer-cache reads: 32 MB in 3.02 seconds =10.60 MB/sec
- * Timing buffered disk reads: 16 MB in 5.52 seconds = 2.90 MB/sec
- * I have 4 Megs/s before, but I don't know why (maybe changes
- * in hdparm test).
- * After release of 0.1, I got some successful reports, so it might work.
- *
- * The main problem with OPTi is that some timings for master
- * and slave must be the same. For example, if you have master
- * PIO 3 and slave PIO 0, driver have to set some timings of
- * master for PIO 0. Second problem is that opti621_set_pio_mode
- * got only one drive to set, but have to set both drives.
- * This is solved in compute_pios. If you don't set
- * the second drive, compute_pios use ide_get_best_pio_mode
- * for autoselect mode (you can change it to PIO 0, if you want).
- * If you then set the second drive to another PIO, the old value
- * (automatically selected) will be overrided by yours.
- * There is a 25/33MHz switch in configuration
- * register, but driver is written for use at any frequency.
- *
- * Version 0.1, Nov 8, 1996
- * by Jaromir Koutek, for 2.1.8.
- * Initial version of driver.
- *
- * Version 0.2
- * Number 0.2 skipped.
- *
- * Version 0.3, Nov 29, 1997
- * by Mark Lord (probably), for 2.1.68
- * Updates for use with new IDE block driver.
- *
- * Version 0.4, Dec 14, 1997
- * by Jan Harkes
- * Fixed some errors and cleaned the code.
- *
- * Version 0.5, Jan 2, 1998
- * by Jaromir Koutek
- * Updates for use with (again) new IDE block driver.
- * Update of documentation.
- *
- * Version 0.6, Jan 2, 1999
- * by Jaromir Koutek
- * Reversed to version 0.3 of the driver, because
- * 0.5 doesn't work.
*/
#include <linux/types.h>
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] cy82c693: fix PIO timings calculations
Just use the standard ide_timing_compute() helper to calculate
PIO timings. This fixes many issues with the open-coded version
like using 16-bit timings when 8-bit ones should be used or not
accounting for the enhanced cycle time specified by the device.
Based on libata pata_cypress host driver.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/cy82c693.c | 106 +++++++++----------------------------------------
1 file changed, 20 insertions(+), 86 deletions(-)
Index: b/drivers/ide/cy82c693.c
===================================================================
--- a/drivers/ide/cy82c693.c
+++ b/drivers/ide/cy82c693.c
@@ -1,6 +1,7 @@
/*
* Copyright (C) 1998-2000 Andreas S. Krebs ([email protected]), Maintainer
* Copyright (C) 1998-2002 Andre Hedrick <[email protected]>, Integrator
+ * Copyright (C) 2007-2010 Bartlomiej Zolnierkiewicz
*
* CYPRESS CY82C693 chipset IDE controller
*
@@ -81,80 +82,6 @@
#define CY82_INDEX_CHANNEL1 0x31
#define CY82_INDEX_TIMEOUT 0x32
-/* the min and max PCI bus speed in MHz - from datasheet */
-#define CY82C963_MIN_BUS_SPEED 25
-#define CY82C963_MAX_BUS_SPEED 33
-
-/* the struct for the PIO mode timings */
-typedef struct pio_clocks_s {
- u8 address_time; /* Address setup (clocks) */
- u8 time_16r; /* clocks for 16bit IOR (0xF0=Active/data, 0x0F=Recovery) */
- u8 time_16w; /* clocks for 16bit IOW (0xF0=Active/data, 0x0F=Recovery) */
- u8 time_8; /* clocks for 8bit (0xF0=Active/data, 0x0F=Recovery) */
-} pio_clocks_t;
-
-/*
- * calc clocks using bus_speed
- * returns (rounded up) time in bus clocks for time in ns
- */
-static int calc_clk(int time, int bus_speed)
-{
- int clocks;
-
- clocks = (time*bus_speed+999)/1000 - 1;
-
- if (clocks < 0)
- clocks = 0;
-
- if (clocks > 0x0F)
- clocks = 0x0F;
-
- return clocks;
-}
-
-/*
- * compute the values for the clock registers for PIO
- * mode and pci_clk [MHz] speed
- *
- * NOTE: for mode 0,1 and 2 drives 8-bit IDE command control registers are used
- * for mode 3 and 4 drives 8 and 16-bit timings are the same
- *
- */
-static void compute_clocks(u8 pio, pio_clocks_t *p_pclk)
-{
- struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
- int clk1, clk2;
- int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
-
- /* we don't check against CY82C693's min and max speed,
- * so you can play with the idebus=xx parameter
- */
-
- /* let's calc the address setup time clocks */
- p_pclk->address_time = (u8)calc_clk(t->setup, bus_speed);
-
- /* let's calc the active and recovery time clocks */
- clk1 = calc_clk(t->active, bus_speed);
-
- /* calc recovery timing */
- clk2 = t->cycle - t->active - t->setup;
-
- clk2 = calc_clk(clk2, bus_speed);
-
- clk1 = (clk1<<4)|clk2; /* combine active and recovery clocks */
-
- /* note: we use the same values for 16bit IOR and IOW
- * those are all the same, since I don't have other
- * timings than those from ide-lib.c
- */
-
- p_pclk->time_16r = (u8)clk1;
- p_pclk->time_16w = (u8)clk1;
-
- /* what are good values for 8bit ?? */
- p_pclk->time_8 = (u8)clk1;
-}
-
/*
* set DMA mode a specific channel for CY82C693
*/
@@ -190,8 +117,11 @@ static void cy82c693_set_pio_mode(ide_dr
{
ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
- pio_clocks_t pclk;
+ int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
+ const unsigned long T = 1000000 / bus_speed;
unsigned int addrCtrl;
+ struct ide_timing t;
+ u8 time_16, time_8;
/* select primary or secondary channel */
if (hwif->index > 0) { /* drive is on the secondary channel */
@@ -204,8 +134,12 @@ static void cy82c693_set_pio_mode(ide_dr
}
}
- /* let's calc the values for this PIO mode */
- compute_clocks(pio, &pclk);
+ ide_timing_compute(drive, XFER_PIO_0 + pio, &t, T, 1);
+
+ time_16 = clamp_val(t.recover - 1, 0, 15) |
+ (clamp_val(t.active - 1, 0, 15) << 4);
+ time_8 = clamp_val(t.act8b - 1, 0, 15) |
+ (clamp_val(t.rec8b - 1, 0, 15) << 4);
/* now let's write the clocks registers */
if ((drive->dn & 1) == 0) {
@@ -217,13 +151,13 @@ static void cy82c693_set_pio_mode(ide_dr
pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
addrCtrl &= (~0xF);
- addrCtrl |= (unsigned int)pclk.address_time;
+ addrCtrl |= clamp_val(t.setup - 1, 0, 15);
pci_write_config_dword(dev, CY82_IDE_ADDRSETUP, addrCtrl);
/* now let's set the remaining registers */
- pci_write_config_byte(dev, CY82_IDE_MASTER_IOR, pclk.time_16r);
- pci_write_config_byte(dev, CY82_IDE_MASTER_IOW, pclk.time_16w);
- pci_write_config_byte(dev, CY82_IDE_MASTER_8BIT, pclk.time_8);
+ pci_write_config_byte(dev, CY82_IDE_MASTER_IOR, time_16);
+ pci_write_config_byte(dev, CY82_IDE_MASTER_IOW, time_16);
+ pci_write_config_byte(dev, CY82_IDE_MASTER_8BIT, time_8);
} else {
/*
* set slave drive
@@ -233,13 +167,13 @@ static void cy82c693_set_pio_mode(ide_dr
pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
addrCtrl &= (~0xF0);
- addrCtrl |= ((unsigned int)pclk.address_time<<4);
+ addrCtrl |= (clamp_val(t.setup - 1, 0, 15) << 4);
pci_write_config_dword(dev, CY82_IDE_ADDRSETUP, addrCtrl);
/* now let's set the remaining registers */
- pci_write_config_byte(dev, CY82_IDE_SLAVE_IOR, pclk.time_16r);
- pci_write_config_byte(dev, CY82_IDE_SLAVE_IOW, pclk.time_16w);
- pci_write_config_byte(dev, CY82_IDE_SLAVE_8BIT, pclk.time_8);
+ pci_write_config_byte(dev, CY82_IDE_SLAVE_IOR, time_16);
+ pci_write_config_byte(dev, CY82_IDE_SLAVE_IOW, time_16);
+ pci_write_config_byte(dev, CY82_IDE_SLAVE_8BIT, time_8);
}
}
@@ -325,6 +259,6 @@ static void __exit cy82c693_ide_exit(voi
module_init(cy82c693_ide_init);
module_exit(cy82c693_ide_exit);
-MODULE_AUTHOR("Andreas Krebs, Andre Hedrick");
+MODULE_AUTHOR("Andreas Krebs, Andre Hedrick, Bartlomiej Zolnierkiewicz");
MODULE_DESCRIPTION("PCI driver module for the Cypress CY82C693 IDE");
MODULE_LICENSE("GPL");
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] pdc202xx_old: add ->init_hwif method
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/pdc202xx_old.c | 18 ++++++++----------
1 file changed, 8 insertions(+), 10 deletions(-)
Index: b/drivers/ide/pdc202xx_old.c
===================================================================
--- a/drivers/ide/pdc202xx_old.c
+++ b/drivers/ide/pdc202xx_old.c
@@ -1,7 +1,7 @@
/*
* Copyright (C) 1998-2002 Andre Hedrick <[email protected]>
* Copyright (C) 2006-2007, 2009 MontaVista Software, Inc.
- * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
+ * Copyright (C) 2007-2010 Bartlomiej Zolnierkiewicz
*
* Portions Copyright (C) 1999 Promise Technology, Inc.
* Author: Frank Tiernan ([email protected])
@@ -21,8 +21,6 @@
#define DRV_NAME "pdc202xx_old"
-static void pdc_old_disable_66MHz_clock(ide_hwif_t *);
-
static void pdc202xx_set_mode(ide_drive_t *drive, const u8 speed)
{
ide_hwif_t *hwif = drive->hwif;
@@ -32,12 +30,6 @@ static void pdc202xx_set_mode(ide_drive_
u8 AP = 0, BP = 0, CP = 0;
u8 TA = 0, TB = 0, TC = 0;
- /*
- * TODO: do this once per channel
- */
- if (dev->device != PCI_DEVICE_ID_PROMISE_20246)
- pdc_old_disable_66MHz_clock(hwif);
-
pci_read_config_byte(dev, drive_pci, &AP);
pci_read_config_byte(dev, drive_pci + 1, &BP);
pci_read_config_byte(dev, drive_pci + 2, &CP);
@@ -145,6 +137,11 @@ static void pdc_old_disable_66MHz_clock(
outb(clock & ~(hwif->channel ? 0x08 : 0x02), clock_reg);
}
+static void pdc2026x_init_hwif(ide_hwif_t *hwif)
+{
+ pdc_old_disable_66MHz_clock(hwif);
+}
+
static void pdc202xx_dma_start(ide_drive_t *drive)
{
if (drive->current_speed > XFER_UDMA_2)
@@ -261,6 +258,7 @@ static const struct ide_dma_ops pdc2026x
{ \
.name = DRV_NAME, \
.init_chipset = init_chipset_pdc202xx, \
+ .init_hwif = pdc2026x_init_hwif, \
.port_ops = &pdc2026x_port_ops, \
.dma_ops = &pdc2026x_dma_ops, \
.host_flags = IDE_HFLAGS_PDC202XX, \
@@ -356,6 +354,6 @@ static void __exit pdc202xx_ide_exit(voi
module_init(pdc202xx_ide_init);
module_exit(pdc202xx_ide_exit);
-MODULE_AUTHOR("Andre Hedrick, Frank Tiernan");
+MODULE_AUTHOR("Andre Hedrick, Frank Tiernan, Bartlomiej Zolnierkiewicz");
MODULE_DESCRIPTION("PCI driver module for older Promise IDE");
MODULE_LICENSE("GPL");
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] alim15x3: add ali_fifo_control() helper
Based on libata pata_ali host driver.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/alim15x3.c | 31 +++++++++++++++----------------
1 file changed, 15 insertions(+), 16 deletions(-)
Index: b/drivers/ide/alim15x3.c
===================================================================
--- a/drivers/ide/alim15x3.c
+++ b/drivers/ide/alim15x3.c
@@ -48,6 +48,19 @@ static u8 m5229_revision;
static u8 chip_is_1543c_e;
static struct pci_dev *isa_dev;
+static void ali_fifo_control(ide_hwif_t *hwif, ide_drive_t *drive, int on)
+{
+ struct pci_dev *pdev = to_pci_dev(hwif->dev);
+ int pio_fifo = 0x54 + hwif->channel;
+ u8 fifo;
+ int shift = 4 * (drive->dn & 1);
+
+ pci_read_config_byte(pdev, pio_fifo, &fifo);
+ fifo &= ~(0x0F << shift);
+ fifo |= (on << shift);
+ pci_write_config_byte(pdev, pio_fifo, fifo);
+}
+
/**
* ali_set_pio_mode - set host controller for PIO mode
* @drive: drive
@@ -64,8 +77,7 @@ static void ali_set_pio_mode(ide_drive_t
int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
unsigned long T = 1000000 / bus_speed; /* PCI clock based */
int port = hwif->channel ? 0x5c : 0x58;
- int portFIFO = hwif->channel ? 0x55 : 0x54;
- u8 cd_dma_fifo = 0, unit = drive->dn & 1;
+ u8 unit = drive->dn & 1;
struct ide_timing t;
ide_timing_compute(drive, XFER_PIO_0 + pio, &t, T, 1);
@@ -79,20 +91,7 @@ static void ali_set_pio_mode(ide_drive_t
/*
* PIO mode => ATA FIFO on, ATAPI FIFO off
*/
- pci_read_config_byte(dev, portFIFO, &cd_dma_fifo);
- if (drive->media==ide_disk) {
- if (unit) {
- pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0x0F) | 0x50);
- } else {
- pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0xF0) | 0x05);
- }
- } else {
- if (unit) {
- pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0x0F);
- } else {
- pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0xF0);
- }
- }
+ ali_fifo_control(hwif, drive, (drive->media == ide_disk) ? 0x05 : 0x00);
pci_write_config_byte(dev, port, t.setup);
pci_write_config_byte(dev, port + unit + 2,
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] alim15x3: fix PIO timings calculations
Just use the standard ide_timing_compute() helper to calculate
PIO timings. This fixes many issues with the open-coded version
like potential recovery timings underclocking or not accounting
for the enhanced cycle time specified by the device.
Based on libata pata_ali host driver.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/alim15x3.c | 34 +++++++++++++++-------------------
1 file changed, 15 insertions(+), 19 deletions(-)
Index: b/drivers/ide/alim15x3.c
===================================================================
--- a/drivers/ide/alim15x3.c
+++ b/drivers/ide/alim15x3.c
@@ -8,7 +8,7 @@
* Copyright (C) 2002 Alan Cox
* ALi (now ULi M5228) support by Clear Zhang <[email protected]>
* Copyright (C) 2007 MontaVista Software, Inc. <[email protected]>
- * Copyright (C) 2007 Bartlomiej Zolnierkiewicz <[email protected]>
+ * Copyright (C) 2007-2010 Bartlomiej Zolnierkiewicz
*
* (U)DMA capable version of ali 1533/1543(C), 1535(D)
*
@@ -60,28 +60,22 @@ static void ali_set_pio_mode(ide_drive_t
{
ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev);
- struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
- int s_time = t->setup, a_time = t->active, c_time = t->cycle;
- u8 s_clc, a_clc, r_clc;
unsigned long flags;
int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
+ unsigned long T = 1000000 / bus_speed; /* PCI clock based */
int port = hwif->channel ? 0x5c : 0x58;
int portFIFO = hwif->channel ? 0x55 : 0x54;
u8 cd_dma_fifo = 0, unit = drive->dn & 1;
+ struct ide_timing t;
- if ((s_clc = (s_time * bus_speed + 999) / 1000) >= 8)
- s_clc = 0;
- if ((a_clc = (a_time * bus_speed + 999) / 1000) >= 8)
- a_clc = 0;
+ ide_timing_compute(drive, XFER_PIO_0 + pio, &t, T, 1);
+
+ t.setup = clamp_val(t.setup, 1, 8) & 7;
+ t.active = clamp_val(t.active, 1, 8) & 7;
+ t.recover = clamp_val(t.recover, 1, 16) & 15;
- if (!(r_clc = (c_time * bus_speed + 999) / 1000 - a_clc - s_clc)) {
- r_clc = 1;
- } else {
- if (r_clc >= 16)
- r_clc = 0;
- }
local_irq_save(flags);
-
+
/*
* PIO mode => ATA FIFO on, ATAPI FIFO off
*/
@@ -99,9 +93,11 @@ static void ali_set_pio_mode(ide_drive_t
pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0xF0);
}
}
-
- pci_write_config_byte(dev, port, s_clc);
- pci_write_config_byte(dev, port + unit + 2, (a_clc << 4) | r_clc);
+
+ pci_write_config_byte(dev, port, t.setup);
+ pci_write_config_byte(dev, port + unit + 2,
+ (t.active << 4) | t.recover);
+
local_irq_restore(flags);
}
@@ -584,6 +580,6 @@ static void __exit ali15x3_ide_exit(void
module_init(ali15x3_ide_init);
module_exit(ali15x3_ide_exit);
-MODULE_AUTHOR("Michael Aubry, Andrzej Krzysztofowicz, CJ, Andre Hedrick, Alan Cox");
+MODULE_AUTHOR("Michael Aubry, Andrzej Krzysztofowicz, CJ, Andre Hedrick, Alan Cox, Bartlomiej Zolnierkiewicz");
MODULE_DESCRIPTION("PCI driver module for ALi 15x3 IDE");
MODULE_LICENSE("GPL");
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] pata_serverworks: cleanup cable detection
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ata/pata_serverworks.c | 37 +++++++------------------------------
1 file changed, 7 insertions(+), 30 deletions(-)
Index: b/drivers/ata/pata_serverworks.c
===================================================================
--- a/drivers/ata/pata_serverworks.c
+++ b/drivers/ata/pata_serverworks.c
@@ -57,32 +57,14 @@ static const char *csb_bad_ata100[] = {
};
/**
- * dell_cable - Dell serverworks cable detection
+ * oem_cable - Dell/Sun serverworks cable detection
* @ap: ATA port to do cable detect
*
- * Dell hide the 40/80 pin select for their interfaces in the top two
- * bits of the subsystem ID.
+ * Dell PowerEdge and Sun Cobalt 'Alpine' hide the 40/80 pin select
+ * for their interfaces in the top two bits of the subsystem ID.
*/
-static int dell_cable(struct ata_port *ap)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
-
- if (pdev->subsystem_device & (1 << (ap->port_no + 14)))
- return ATA_CBL_PATA80;
- return ATA_CBL_PATA40;
-}
-
-/**
- * sun_cable - Sun Cobalt 'Alpine' cable detection
- * @ap: ATA port to do cable select
- *
- * Cobalt CSB5 IDE hides the 40/80pin in the top two bits of the
- * subsystem ID the same as dell. We could use one function but we may
- * need to extend the Dell one in future
- */
-
-static int sun_cable(struct ata_port *ap)
+static int oem_cable(struct ata_port *ap)
{
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
@@ -97,15 +79,10 @@ struct sv_cable_table {
int (*cable_detect)(struct ata_port *ap);
};
-/*
- * Note that we don't copy the old serverworks code because the old
- * code contains obvious mistakes
- */
-
static struct sv_cable_table cable_detect[] = {
- { PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_VENDOR_ID_DELL, dell_cable },
- { PCI_DEVICE_ID_SERVERWORKS_CSB6IDE, PCI_VENDOR_ID_DELL, dell_cable },
- { PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_VENDOR_ID_SUN, sun_cable },
+ { PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_VENDOR_ID_DELL, oem_cable },
+ { PCI_DEVICE_ID_SERVERWORKS_CSB6IDE, PCI_VENDOR_ID_DELL, oem_cable },
+ { PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_VENDOR_ID_SUN, oem_cable },
{ PCI_DEVICE_ID_SERVERWORKS_OSB4IDE, PCI_ANY_ID, ata_cable_40wire },
{ PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_ANY_ID, ata_cable_unknown },
{ PCI_DEVICE_ID_SERVERWORKS_CSB6IDE, PCI_ANY_ID, ata_cable_unknown },
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] pata_serverworks: fix PIO setup for the second channel
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ata/pata_serverworks.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
Index: b/drivers/ata/pata_serverworks.c
===================================================================
--- a/drivers/ata/pata_serverworks.c
+++ b/drivers/ata/pata_serverworks.c
@@ -1,6 +1,7 @@
/*
* pata_serverworks.c - Serverworks PATA for new ATA layer
* (C) 2005 Red Hat Inc
+ * (C) 2010 Bartlomiej Zolnierkiewicz
*
* based upon
*
@@ -232,7 +233,7 @@ static void serverworks_set_piomode(stru
if (serverworks_is_csb(pdev)) {
pci_read_config_word(pdev, 0x4A, &csb5_pio);
csb5_pio &= ~(0x0F << devbits);
- pci_write_config_byte(pdev, 0x4A, csb5_pio | (pio << devbits));
+ pci_write_config_word(pdev, 0x4A, csb5_pio | (pio << devbits));
}
}
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] pata_atiixp: enable parallel scan
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ata/pata_atiixp.c | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
Index: b/drivers/ata/pata_atiixp.c
===================================================================
--- a/drivers/ata/pata_atiixp.c
+++ b/drivers/ata/pata_atiixp.c
@@ -189,8 +189,23 @@ static int atiixp_init_one(struct pci_de
.port_ops = &atiixp_port_ops
};
const struct ata_port_info *ppi[] = { &info, &info };
+ struct ata_host *host;
+ int rc;
- return ata_pci_sff_init_one(pdev, ppi, &atiixp_sht, NULL);
+ /* enable device and prepare host */
+ rc = pcim_enable_device(pdev);
+ if (rc)
+ return rc;
+
+ rc = ata_pci_sff_prepare_host(pdev, ppi, &host);
+ if (rc)
+ return rc;
+
+ host->flags |= ATA_HOST_PARALLEL_SCAN;
+
+ pci_set_master(pdev);
+
+ return ata_pci_sff_activate_host(host, ata_sff_interrupt, &atiixp_sht);
}
static const struct pci_device_id atiixp[] = {
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] pata_ali: documentation fixes
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ata/pata_ali.c | 8 +++-----
1 file changed, 3 insertions(+), 5 deletions(-)
Index: b/drivers/ata/pata_ali.c
===================================================================
--- a/drivers/ata/pata_ali.c
+++ b/drivers/ata/pata_ali.c
@@ -159,8 +159,7 @@ static void ali_fifo_control(struct ata_
* ali_program_modes - load mode registers
* @ap: ALi channel to load
* @adev: Device the timing is for
- * @cmd: Command timing
- * @data: Data timing
+ * @t: timing data
* @ultra: UDMA timing or zero for off
*
* Loads the timing registers for cmd/data and disable UDMA if
@@ -202,8 +201,7 @@ static void ali_program_modes(struct ata
* @ap: ATA interface
* @adev: ATA device
*
- * Program the ALi registers for PIO mode. FIXME: add timings for
- * PIO5.
+ * Program the ALi registers for PIO mode.
*/
static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev)
@@ -237,7 +235,7 @@ static void ali_set_piomode(struct ata_p
* @ap: ATA interface
* @adev: ATA device
*
- * FIXME: MWDMA timings
+ * Program the ALi registers for DMA mode.
*/
static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev)
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] pata_cmd64x: remove unused definitions
s/ARTIM2/ARTTIM23/ in cmd648_bmdma_stop() while at it
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ata/pata_cmd64x.c | 12 +-----------
1 file changed, 1 insertion(+), 11 deletions(-)
Index: b/drivers/ata/pata_cmd64x.c
===================================================================
--- a/drivers/ata/pata_cmd64x.c
+++ b/drivers/ata/pata_cmd64x.c
@@ -41,10 +41,6 @@
enum {
CFR = 0x50,
CFR_INTR_CH0 = 0x04,
- CNTRL = 0x51,
- CNTRL_DIS_RA0 = 0x40,
- CNTRL_DIS_RA1 = 0x80,
- CNTRL_ENA_2ND = 0x08,
CMDTIM = 0x52,
ARTTIM0 = 0x53,
DRWTIM0 = 0x54,
@@ -54,9 +50,6 @@ enum {
ARTTIM23_DIS_RA2 = 0x04,
ARTTIM23_DIS_RA3 = 0x08,
ARTTIM23_INTR_CH1 = 0x10,
- ARTTIM2 = 0x57,
- ARTTIM3 = 0x57,
- DRWTIM23 = 0x58,
DRWTIM2 = 0x58,
BRST = 0x59,
DRWTIM3 = 0x5b,
@@ -64,14 +57,11 @@ enum {
MRDMODE = 0x71,
MRDMODE_INTR_CH0 = 0x04,
MRDMODE_INTR_CH1 = 0x08,
- MRDMODE_BLK_CH0 = 0x10,
- MRDMODE_BLK_CH1 = 0x20,
BMIDESR0 = 0x72,
UDIDETCR0 = 0x73,
DTPR0 = 0x74,
BMIDECR1 = 0x78,
BMIDECSR = 0x79,
- BMIDESR1 = 0x7A,
UDIDETCR1 = 0x7B,
DTPR1 = 0x7C
};
@@ -282,7 +272,7 @@ static void cmd648_bmdma_stop(struct ata
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
u8 dma_intr;
int dma_mask = ap->port_no ? ARTTIM23_INTR_CH1 : CFR_INTR_CH0;
- int dma_reg = ap->port_no ? ARTTIM2 : CFR;
+ int dma_reg = ap->port_no ? ARTTIM23 : CFR;
ata_bmdma_stop(qc);
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] pata_efar: always program master_data before slave_data
We may need to set SITRE before programming slave_data.
This makes pata_efar match the behavior of IDE slc90e66 host driver
and also libata ata_piix one.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ata/pata_efar.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
Index: b/drivers/ata/pata_efar.c
===================================================================
--- a/drivers/ata/pata_efar.c
+++ b/drivers/ata/pata_efar.c
@@ -72,8 +72,10 @@ static void efar_set_timings(struct ata_
u8 pio, bool use_mwdma)
{
struct pci_dev *dev = to_pci_dev(ap->host->dev);
+ unsigned int is_slave = (adev->devno != 0);
u8 master_port = ap->port_no ? 0x42 : 0x40;
u16 master_data;
+ u8 slave_data;
int control = 0;
/*
@@ -104,14 +106,13 @@ static void efar_set_timings(struct ata_
pci_read_config_word(dev, master_port, &master_data);
/* Set PPE, IE, and TIME as appropriate */
- if (adev->devno == 0) {
+ if (is_slave == 0) {
master_data &= 0xCCF0;
master_data |= control;
master_data |= (timings[pio][0] << 12) |
(timings[pio][1] << 8);
} else {
int shift = 4 * ap->port_no;
- u8 slave_data;
master_data &= 0xFF0F;
master_data |= (control << 4);
@@ -120,11 +121,12 @@ static void efar_set_timings(struct ata_
pci_read_config_byte(dev, 0x44, &slave_data);
slave_data &= ap->port_no ? 0x0F : 0xF0;
slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << shift;
- pci_write_config_byte(dev, 0x44, slave_data);
}
master_data |= 0x4000; /* Ensure SITRE is set */
pci_write_config_word(dev, master_port, master_data);
+ if (is_slave)
+ pci_write_config_byte(dev, 0x44, slave_data);
}
/**
On Mon, 18 Jan 2010 18:14:12 +0100
Bartlomiej Zolnierkiewicz <[email protected]> wrote:
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] pata_ali: cleanup ali_set_piomode()
>
> Merge ali_fifo_control() calls.
This also changes the behaviour. The old driver, reference code and old
IDE driver (at least at the time I did pata_ali) all did the fifo off
case, then the mode change, then the FIFO on case.
I don't see why it should matter but it ought to be noted in the changelog
On Mon, 18 Jan 2010 18:14:20 +0100
Bartlomiej Zolnierkiewicz <[email protected]> wrote:
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] pata_amd: remove bogus code from timing_setup()
>
> DMA modes don't have 8-bit timings.
If you are in a DMA based mode then you have 8bit timings for writes to
the non data registers. You can get an 8bit timed access to the other
drive even in DMA mode.
> const struct ata_port_info *ppi[] = { &info, &info };
> + struct ata_host *host;
> + int rc;
>
> - return ata_pci_sff_init_one(pdev, ppi, &atiixp_sht, NULL);
> + /* enable device and prepare host */
> + rc = pcim_enable_device(pdev);
> + if (rc)
> + return rc;
> +
> + rc = ata_pci_sff_prepare_host(pdev, ppi, &host);
> + if (rc)
> + return rc;
> +
> + host->flags |= ATA_HOST_PARALLEL_SCAN;
> +
> + pci_set_master(pdev);
> +
> + return ata_pci_sff_activate_host(host, ata_sff_interrupt, &atiixp_sht);
> }
Adding a small essay to each host that activates parallel scan doesn't
make sense. This should be a helper (ignore that if you make it a helper
later in the patch set...)
On Mon, 18 Jan 2010 18:15:55 +0100
Bartlomiej Zolnierkiewicz <[email protected]> wrote:
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] pata_efar: always program master_data before slave_data
>
> We may need to set SITRE before programming slave_data.
You don't - but making them all the same is worth doing anyway for
readability and future possibly merging into helpers
On Mon, 18 Jan 2010 18:17:03 +0100
Bartlomiej Zolnierkiewicz <[email protected]> wrote:
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] pata_via: fix address setup timings underlocking
>
> Correct via_do_set_mode() documentation while at it.
> setup &= ~(3 << shift);
> - setup |= clamp_val(t.setup, 1, 4) << shift; /* 1,4 or 1,4 - 1 FIXME */
> + setup |= (clamp_val(t.setup, 1, 4) - 1) << shift;
> pci_write_config_byte(pdev, 0x4C, setup);
Change looks correct to me and matches the VT8235 data sheet (p.97)
Alan
> + switch (udma_type) {
> + case ATA_UDMA4:
> + UT = T / 2; break;
> + case ATA_UDMA5:
> + UT = T / 3; break;
> + case ATA_UDMA6:
> + UT = T / 4; break;
> + }
UT = T (udma_type - ATA_UDMA3) ?
Looks good
On Monday 18 January 2010 06:46:02 pm Alan Cox wrote:
> On Mon, 18 Jan 2010 18:14:12 +0100
> Bartlomiej Zolnierkiewicz <[email protected]> wrote:
>
> > From: Bartlomiej Zolnierkiewicz <[email protected]>
> > Subject: [PATCH] pata_ali: cleanup ali_set_piomode()
> >
> > Merge ali_fifo_control() calls.
>
> This also changes the behaviour. The old driver, reference code and old
> IDE driver (at least at the time I did pata_ali) all did the fifo off
> case, then the mode change, then the FIFO on case.
Well, the old IDE driver (both at the time you did pata_ali and currently)
did it the way this patch does and unfortunately I'm not familiar with
the reference code (I worry that it may be available under NDA only)..
> I don't see why it should matter but it ought to be noted in the changelog
Indeed, though this should be quite obvious from looking at the patch
(below for reference) and the lack of my usual "no functionality changes"
note..
---
drivers/ata/pata_ali.c | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
Index: b/drivers/ata/pata_ali.c
===================================================================
--- a/drivers/ata/pata_ali.c
+++ b/drivers/ata/pata_ali.c
@@ -222,12 +222,9 @@ static void ali_set_piomode(struct ata_p
}
/* PIO FIFO is only permitted on ATA disk */
- if (adev->class != ATA_DEV_ATA)
- ali_fifo_control(ap, adev, 0x00);
- ali_program_modes(ap, adev, &t, 0);
- if (adev->class == ATA_DEV_ATA)
- ali_fifo_control(ap, adev, 0x05);
+ ali_fifo_control(ap, adev, (adev->class == ATA_DEV_ATA) ? 0x05 : 0x00);
+ ali_program_modes(ap, adev, &t, 0);
}
/**
On Monday 18 January 2010 06:52:56 pm Alan Cox wrote:
> > const struct ata_port_info *ppi[] = { &info, &info };
> > + struct ata_host *host;
> > + int rc;
> >
> > - return ata_pci_sff_init_one(pdev, ppi, &atiixp_sht, NULL);
> > + /* enable device and prepare host */
> > + rc = pcim_enable_device(pdev);
> > + if (rc)
> > + return rc;
> > +
> > + rc = ata_pci_sff_prepare_host(pdev, ppi, &host);
> > + if (rc)
> > + return rc;
> > +
> > + host->flags |= ATA_HOST_PARALLEL_SCAN;
> > +
> > + pci_set_master(pdev);
> > +
> > + return ata_pci_sff_activate_host(host, ata_sff_interrupt, &atiixp_sht);
> > }
>
> Adding a small essay to each host that activates parallel scan doesn't
> make sense. This should be a helper (ignore that if you make it a helper
> later in the patch set...)
Patch adding such helper would be probably a nice incremental improvement,
though 'a small essay' works just fine for the current needs as parallel
scanning functionality is added only to pata_atiixp and pata_efar hosts..
--
Bartlomiej Zolnierkiewicz
On Monday 18 January 2010 06:50:37 pm Alan Cox wrote:
> On Mon, 18 Jan 2010 18:14:20 +0100
> Bartlomiej Zolnierkiewicz <[email protected]> wrote:
>
> > From: Bartlomiej Zolnierkiewicz <[email protected]>
> > Subject: [PATCH] pata_amd: remove bogus code from timing_setup()
> >
> > DMA modes don't have 8-bit timings.
s/timings/data timings/ [ though it should be obvious from the context ]
> If you are in a DMA based mode then you have 8bit timings for writes to
> the non data registers. You can get an 8bit timed access to the other
> drive even in DMA mode.
Sorry but this confuses taskfile timings (which are always PIO mode based
timings) with data timings (the removed code deals with the latter only)..
also please refer to ata_timings[] in drivers/ata/libata-core.c
(columns 3, 4 and 5 are the ones to look at):
static const struct ata_timing ata_timing[] = {
/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 0, 960, 0 }, */
{ XFER_PIO_0, 70, 290, 240, 600, 165, 150, 0, 600, 0 },
{ XFER_PIO_1, 50, 290, 93, 383, 125, 100, 0, 383, 0 },
{ XFER_PIO_2, 30, 290, 40, 330, 100, 90, 0, 240, 0 },
{ XFER_PIO_3, 30, 80, 70, 180, 80, 70, 0, 180, 0 },
{ XFER_PIO_4, 25, 70, 25, 120, 70, 25, 0, 120, 0 },
{ XFER_PIO_5, 15, 65, 25, 100, 65, 25, 0, 100, 0 },
{ XFER_PIO_6, 10, 55, 20, 80, 55, 20, 0, 80, 0 },
{ XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 50, 960, 0 },
{ XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 30, 480, 0 },
{ XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 20, 240, 0 },
{ XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 20, 480, 0 },
{ XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 5, 150, 0 },
{ XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 5, 120, 0 },
{ XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 5, 100, 0 },
{ XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 5, 80, 0 },
/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 0, 150 }, */
{ XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 0, 120 },
{ XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 0, 80 },
{ XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 0, 60 },
{ XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 0, 45 },
{ XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 0, 30 },
{ XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 0, 20 },
{ XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 0, 15 },
{ 0xFF }
};
--
Bartlomiej Zolnierkiewicz
Hello.
Bartlomiej Zolnierkiewicz wrote:
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] libata: fix CFA handling in ide_timing_compute()
>
> Use standard cycle timing for CFA PIO5 and PIO6 modes.
>
> Based on commit 74638c8 for IDE subsystem.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
> ---
> drivers/ata/libata-core.c | 17 +++++++++++------
> 1 file changed, 11 insertions(+), 6 deletions(-)
>
> Index: b/drivers/ata/libata-core.c
> ===================================================================
> --- a/drivers/ata/libata-core.c
> +++ b/drivers/ata/libata-core.c
> @@ -3211,6 +3211,7 @@ const struct ata_timing *ata_timing_find
> int ata_timing_compute(struct ata_device *adev, unsigned short speed,
> struct ata_timing *t, int T, int UT)
> {
> + const u16 *id = adev->id;
> const struct ata_timing *s;
> struct ata_timing p;
>
> @@ -3228,14 +3229,18 @@ int ata_timing_compute(struct ata_device
> * PIO/MW_DMA cycle timing.
> */
>
> - if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
> + if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
> memset(&p, 0, sizeof(p));
> +
> if (speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
>
BTW, shouldn't this actually be 'speed < XFER_SW_DMA_0'?
MBR, Sergei
On Monday 18 January 2010 07:23:32 pm Sergei Shtylyov wrote:
> Hello.
Hi!
> Bartlomiej Zolnierkiewicz wrote:
>
> > From: Bartlomiej Zolnierkiewicz <[email protected]>
> > Subject: [PATCH] libata: fix CFA handling in ide_timing_compute()
> >
> > Use standard cycle timing for CFA PIO5 and PIO6 modes.
> >
> > Based on commit 74638c8 for IDE subsystem.
> >
> > Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
> > ---
> > drivers/ata/libata-core.c | 17 +++++++++++------
> > 1 file changed, 11 insertions(+), 6 deletions(-)
> >
> > Index: b/drivers/ata/libata-core.c
> > ===================================================================
> > --- a/drivers/ata/libata-core.c
> > +++ b/drivers/ata/libata-core.c
> > @@ -3211,6 +3211,7 @@ const struct ata_timing *ata_timing_find
> > int ata_timing_compute(struct ata_device *adev, unsigned short speed,
> > struct ata_timing *t, int T, int UT)
> > {
> > + const u16 *id = adev->id;
> > const struct ata_timing *s;
> > struct ata_timing p;
> >
> > @@ -3228,14 +3229,18 @@ int ata_timing_compute(struct ata_device
> > * PIO/MW_DMA cycle timing.
> > */
> >
> > - if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
> > + if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
> > memset(&p, 0, sizeof(p));
> > +
> > if (speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
> >
>
> BTW, shouldn't this actually be 'speed < XFER_SW_DMA_0'?
Good catch, I'll fix the patch later (would you be willing to fix
ide-timings.c side of things?).
--
Bartlomiej Zolnierkiewicz
Hello.
Bartlomiej Zolnierkiewicz wrote:
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] pata_cmd64x: fix handling of address setup timings
>
> Account for the requirements of the DMA mode currently used
> by the pair device.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
> ---
> drivers/ata/pata_cmd64x.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> Index: b/drivers/ata/pata_cmd64x.c
> ===================================================================
> --- a/drivers/ata/pata_cmd64x.c
> +++ b/drivers/ata/pata_cmd64x.c
> @@ -165,8 +165,14 @@ static void cmd64x_set_timing(struct ata
>
> if (pair) {
> struct ata_timing tp;
> +
> ata_timing_compute(pair, pair->pio_mode, &tp, T, 0);
> ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP);
> + if (pair->dma_mode) {
> + ata_timing_compute(pair, pair->dma_mode,
> + &tp, T, 0);
> + ata_timing_merge(&tp, &t, &t, ATA_TIMING_SETUP);
>
I wonder where Jeff has got the address setup timings for the DMA
modes...
MBR, Sergei
Bartlomiej Zolnierkiewicz wrote:
>>> From: Bartlomiej Zolnierkiewicz <[email protected]>
>>> Subject: [PATCH] libata: fix CFA handling in ide_timing_compute()
>>>
>>> Use standard cycle timing for CFA PIO5 and PIO6 modes.
>>>
>>> Based on commit 74638c8 for IDE subsystem.
>>>
>>> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
>>> ---
>>> drivers/ata/libata-core.c | 17 +++++++++++------
>>> 1 file changed, 11 insertions(+), 6 deletions(-)
>>>
>>> Index: b/drivers/ata/libata-core.c
>>> ===================================================================
>>> --- a/drivers/ata/libata-core.c
>>> +++ b/drivers/ata/libata-core.c
>>> @@ -3211,6 +3211,7 @@ const struct ata_timing *ata_timing_find
>>> int ata_timing_compute(struct ata_device *adev, unsigned short speed,
>>> struct ata_timing *t, int T, int UT)
>>> {
>>> + const u16 *id = adev->id;
>>> const struct ata_timing *s;
>>> struct ata_timing p;
>>>
>>> @@ -3228,14 +3229,18 @@ int ata_timing_compute(struct ata_device
>>> * PIO/MW_DMA cycle timing.
>>> */
>>>
>>> - if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
>>> + if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
>>> memset(&p, 0, sizeof(p));
>>> +
>>> if (speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
>>>
>>>
>> BTW, shouldn't this actually be 'speed < XFER_SW_DMA_0'?
>>
>
> Good catch, I'll fix the patch later (would you be willing to fix
> ide-timings.c side of things?).
>
I don't see what to fix there?..
MBR, Sergei
On Monday 18 January 2010 07:57:10 pm Sergei Shtylyov wrote:
> Bartlomiej Zolnierkiewicz wrote:
>
> >>> From: Bartlomiej Zolnierkiewicz <[email protected]>
> >>> Subject: [PATCH] libata: fix CFA handling in ide_timing_compute()
> >>>
> >>> Use standard cycle timing for CFA PIO5 and PIO6 modes.
> >>>
> >>> Based on commit 74638c8 for IDE subsystem.
> >>>
> >>> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
> >>> ---
> >>> drivers/ata/libata-core.c | 17 +++++++++++------
> >>> 1 file changed, 11 insertions(+), 6 deletions(-)
> >>>
> >>> Index: b/drivers/ata/libata-core.c
> >>> ===================================================================
> >>> --- a/drivers/ata/libata-core.c
> >>> +++ b/drivers/ata/libata-core.c
> >>> @@ -3211,6 +3211,7 @@ const struct ata_timing *ata_timing_find
> >>> int ata_timing_compute(struct ata_device *adev, unsigned short speed,
> >>> struct ata_timing *t, int T, int UT)
> >>> {
> >>> + const u16 *id = adev->id;
> >>> const struct ata_timing *s;
> >>> struct ata_timing p;
> >>>
> >>> @@ -3228,14 +3229,18 @@ int ata_timing_compute(struct ata_device
> >>> * PIO/MW_DMA cycle timing.
> >>> */
> >>>
> >>> - if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
> >>> + if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
> >>> memset(&p, 0, sizeof(p));
> >>> +
> >>> if (speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
> >>>
> >>>
> >> BTW, shouldn't this actually be 'speed < XFER_SW_DMA_0'?
> >>
> >
> > Good catch, I'll fix the patch later (would you be willing to fix
> > ide-timings.c side of things?).
> >
>
> I don't see what to fix there?..
Ah, sorry, ide-timings.c change is also not upstream yet..
--
Bartlomiej Zolnierkiewicz
Hello.
Bartlomiej Zolnierkiewicz wrote:
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] pata_cypress: fix PIO timings underclocking
>
> Timing registers should be programmed with the desired number of clocks
> minus one clock.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
> ---
> drivers/ata/pata_cypress.c | 10 ++++++----
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> Index: b/drivers/ata/pata_cypress.c
> ===================================================================
> --- a/drivers/ata/pata_cypress.c
> +++ b/drivers/ata/pata_cypress.c
>
[...]
> @@ -79,7 +81,7 @@ static void cy82c693_set_piomode(struct
> pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
>
> addr &= ~0xF0; /* Mask bits */
> - addr |= (clamp_val(t.setup, 0, 15) << 4);
> + addr |= (clamp_val(t.setup - 1, 0, 15) << 4);
>
You could drop the unneeded parens while at it...
MBR, Sergei
Bartlomiej Zolnierkiewicz wrote:
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] ide: fix for ide_timing quantisation errors
>
> Based on commit 4f701d1 for libata.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
> ---
> drivers/ide/ide-timings.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> Index: b/drivers/ide/ide-timings.c
> ===================================================================
> --- a/drivers/ide/ide-timings.c
> +++ b/drivers/ide/ide-timings.c
> @@ -206,6 +206,12 @@ int ide_timing_compute(ide_drive_t *driv
> t->recover = t->cycle - t->active;
> }
>
> + /* In a few cases quantisation may produce enough errors to
> + leave t->cycle too low for the sum of active and recovery
> + if so we must correct this */
>
Comment style should preferrably be:
/*
* blah
* blah
* blah
*/
MBR, Sergei
Bartlomiej Zolnierkiewicz wrote:
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] ide: use standard timing for XFER_PIO_SLOW mode in ide_timing_compute()
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
> ---
> drivers/ide/ide-timings.c | 13 +++++++------
> 1 file changed, 7 insertions(+), 6 deletions(-)
>
> Index: b/drivers/ide/ide-timings.c
> ===================================================================
> --- a/drivers/ide/ide-timings.c
> +++ b/drivers/ide/ide-timings.c
> @@ -166,12 +166,13 @@ int ide_timing_compute(ide_drive_t *driv
> if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
> memset(&p, 0, sizeof(p));
>
> - if (speed <= XFER_PIO_2)
> - p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO];
> - else if ((speed <= XFER_PIO_4) ||
> - (speed == XFER_PIO_5 && !ata_id_is_cfa(id)))
> - p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY];
> - else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
> + if (speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
>
Ah, I see what to fix now but I guess it's rather your call. :-)
MBR, Sergei
Bartlomiej Zolnierkiewicz wrote:
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] ide: add drive->pio_mode field
>
> Add pio_mode field to ide_drive_t matching pio_mode field used in
> struct ata_device.
>
> The validity of the field is restricted to ->set_pio_mode method
> only currently in IDE subsystem.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
> ---
> drivers/ide/ide-devsets.c | 2 ++
> drivers/ide/ide-probe.c | 2 ++
> drivers/ide/ide-xfer-mode.c | 3 +++
> include/linux/ide.h | 1 +
> 4 files changed, 8 insertions(+)
>
> Index: b/drivers/ide/ide-devsets.c
> ===================================================================
> --- a/drivers/ide/ide-devsets.c
> +++ b/drivers/ide/ide-devsets.c
> @@ -105,6 +105,8 @@ static int set_pio_mode(ide_drive_t *dri
> return -ENOSYS;
>
> if (set_pio_mode_abuse(drive->hwif, arg)) {
> + drive->pio_mode = arg + XFER_PIO_0;
> +
>
Er, didn't understand this... these 'arg' values are not really PIO
modes, no?
> if (arg == 8 || arg == 9) {
> unsigned long flags;
>
MBR, Sergei
From: Sergei Shtylyov <[email protected]>
Date: Mon, 18 Jan 2010 22:09:02 +0300
> Comment style should preferrably be:
>
> /*
> * blah
> * blah
> * blah
> */
Agreed.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:17:29 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] ide: use standard timing for XFER_PIO_SLOW mode in ide_timing_compute()
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:17:37 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] alim15x3: fix PIO timings calculations
>
> Just use the standard ide_timing_compute() helper to calculate
> PIO timings. This fixes many issues with the open-coded version
> like potential recovery timings underclocking or not accounting
> for the enhanced cycle time specified by the device.
>
> Based on libata pata_ali host driver.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:18:07 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] alim15x3: cleanup ali_cable_detect()
>
> Remove leftover local_irq_[save,restore]() and FIXME note.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:18:26 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] cmd64x: fix PIO and MWDMA timings calculations
>
> Just use the standard ide_timing_compute() helper to calculate
> PIO and MWDMA timings. This fixes some issues with the open-coded
> version like allowing faster MWDMA timings than the ones required
> by the current PIO mode or not accounting for the enhanced MWDMA
> cycle time specified by the device.
>
> Based on libata pata_cmd64x host driver.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:18:38 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] cmd64x: remove superfluous checks from cmd64x_set_dma_mode()
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:18:47 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] cy82c693: fix PIO timings calculations
>
> Just use the standard ide_timing_compute() helper to calculate
> PIO timings. This fixes many issues with the open-coded version
> like using 16-bit timings when 8-bit ones should be used or not
> accounting for the enhanced cycle time specified by the device.
>
> Based on libata pata_cypress host driver.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:19:14 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] pdc202xx_old: add ->init_hwif method
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:19:37 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] via82cxxx: vx855 is a single channel controller
>
> Based on commit e4d866c for pata_via host driver
> (PCI ID was later changed by commit 5993856).
>
> Update my credits while at it.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:19:22 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] serverworks: cleanup svwks_udma_filter()
>
> * remove dead OSB4 UDMA support
> * remove unreachable code
> * make isa_dev local to ->init_chipset
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:19:30 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] serverworks: add missing pci_dev_put() call
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:18:58 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] cy82c693: remove stale driver history
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:19:06 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] opti621: remove stale driver history
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:18:17 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] amd74xx: don't change UDMA settings when programming PIO timings
>
> Based on libata pata_amd host driver.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:17:59 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] alim15x3: remove superfluous locking from ali_set_pio_mode()
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:17:50 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] alim15x3: add ali_fifo_control() helper
>
> Based on libata pata_ali host driver.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:19:44 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] ide: add SATA cable detection support
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:19:53 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] via82cxxx: fix SATA cable detection
>
> Add VIA_SATA_PATA flag for cx700, vx800 and vx855 chipsets
> (the first port is SATA).
>
> Based on commits 7585eb1, bfce5e0 and e4d866c for pata_via
> host driver.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:20:00 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] via82cxxx: workaround h/w bugs
>
> Add custom struct ide_tp_ops instance to fix the internal bug of some VIA
> chipsets which will reset the device register after changing the nIEN bit
> in the device control register.
>
> Based on commit bfce5e0 for pata_via host driver.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:20:07 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] via82cxxx: add support for vt8261 and future chips
>
> Based on commit e4d866c for pata_via host driver.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:20:14 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] via82cxxx: add support for VT6415 PCIE PATA IDE Host Controller
>
> Based on commits 5955c7a and 7d948b1 for pata_via host driver.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:20:21 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] via82cxxx: fix UDMA settings programming
>
> * preserve 80-wire cable detection bit
> * don't clear UDMA settings when programming PIO/MWDMA modes
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:20:35 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] ide: add drive->dma_mode field
>
> Add dma_mode field to ide_drive_t matching dma_mode field used in
> struct ata_device.
>
> The validity of the field is restricted to ->dma_pio_mode method
> only currently in IDE subsystem.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:20:28 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] ide: add drive->pio_mode field
>
> Add pio_mode field to ide_drive_t matching pio_mode field used in
> struct ata_device.
>
> The validity of the field is restricted to ->set_pio_mode method
> only currently in IDE subsystem.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:20:42 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] ide: change ->set_pio_mode method parameters
>
> Change ->set_pio_mode method parameters to match ->set_piomode method
> used in struct ata_port_operations.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:20:50 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] ide: change ->set_dma_mode method parameters
>
> Change ->set_dma_mode method parameters to match ->set_dmamode method
> used in struct ata_port_operations.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:20:58 +0100
> @@ -189,8 +189,7 @@ int ide_timing_compute(ide_drive_t *driv
> * DMA cycle timing is slower/equal than the fastest PIO timing.
> */
> if (speed >= XFER_SW_DMA_0) {
> - u8 pio = ide_get_best_pio_mode(drive, 255, 5);
> - ide_timing_compute(drive, XFER_PIO_0 + pio, &p, T, UT);
> + ide_timing_compute(drive, drive->pio_mode, &p, T, UT);
> ide_timing_merge(&p, t, t, IDE_TIMING_ALL);
> }
>
The comment above this code should be changed to match
the new behavior.
I've done that for you when checking this in, as follows:
ide-timings: use ->pio_mode value to determine fastest PIO speed
Use the current PIO mode value instead of the physical maximum one
to determine the fastest allowed PIO for shared PIO/DMA timings.
Affected host drivers: amd74xx and via82cxxx.
[ Update comment to match -DaveM ]
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Signed-off-by: David S. Miller <[email protected]>
---
drivers/ide/ide-timings.c | 5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/ide/ide-timings.c b/drivers/ide/ide-timings.c
index c6053ab..c7a65ee 100644
--- a/drivers/ide/ide-timings.c
+++ b/drivers/ide/ide-timings.c
@@ -186,11 +186,10 @@ int ide_timing_compute(ide_drive_t *drive, u8 speed,
/*
* Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
* S.M.A.R.T and some other commands. We have to ensure that the
- * DMA cycle timing is slower/equal than the fastest PIO timing.
+ * DMA cycle timing is slower/equal than the current PIO timing.
*/
if (speed >= XFER_SW_DMA_0) {
- u8 pio = ide_get_best_pio_mode(drive, 255, 5);
- ide_timing_compute(drive, XFER_PIO_0 + pio, &p, T, UT);
+ ide_timing_compute(drive, drive->pio_mode, &p, T, UT);
ide_timing_merge(&p, t, t, IDE_TIMING_ALL);
}
--
1.6.5
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:21:05 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] alim15x3: fix handling of address setup timings
>
> Account for the requirements of the other device on the port.
>
> Based on libata pata_ali host driver.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:21:19 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] alim15x3: fix handling of DMA timings
>
> Stop depending on the BIOS setup.
>
> Based on libata pata_ali host driver.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:21:26 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] alim15x3: fix handling of UDMA enable bit
>
> Clear UDMA enable bit also for PIO modes.
>
> Based on libata pata_ali host driver.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:21:33 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] amd74xx: use ->pio_mode value to determine pair device speed
>
> Use the current PIO mode value instead of the current transfer speed
> of the pair device on the port to determine PIO commmand timings used
> for both devices on the port.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:21:41 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] cmd64x: fix handling of address setup timings
>
> Account for the requirements of the DMA mode currently used.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:21:48 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] cs5535: use ->pio_mode value to determine pair device speed
>
> Use the current PIO mode value instead of the physical maximum one
> of the pair device on the port to determine PIO commmand timings used
> for both devices on the port.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:21:55 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] cs5536: use ->pio_mode value to determine pair device speed
>
> Use the current PIO mode value instead of the physical maximum one
> of the pair device on the port to determine PIO commmand timings used
> for both devices on the port.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:22:23 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] tx493xide: use ->pio_mode value to determine pair device speed
>
> Use the current PIO mode value instead of the physical maximum one
> of the pair device on the port to determine PIO commmand timings used
> for both devices on the port.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:22:16 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] siimage: use ->pio_mode value to determine pair device speed
>
> Use the current PIO mode value instead of the physical maximum one
> of the pair device on the port to determine PIO commmand timings used
> for both devices on the port.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:22:38 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] ide: make ide_get_best_pio_mode() static
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:22:30 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] via82cxxx: use ->pio_mode value to determine pair device speed
>
> Use the current PIO mode value instead of the current transfer speed
> of the pair device on the port to determine PIO commmand timings used
> for both devices on the port.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:22:09 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] palm_bk3710: use ->pio_mode value to determine pair device speed
>
> Use the current PIO mode value instead of the physical maximum one
> of the pair device on the port to determine PIO commmand timings used
> for both devices on the port.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:22:02 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] it821x: use ->pio_mode value to determine pair device speed
>
> Use the current PIO mode value instead of the physical maximum one
> of the pair device on the port to determine PIO commmand timings used
> for both devices on the port.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Mon, 18 Jan 2010 18:21:12 +0100
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] alim15x3: fix handling of command timings
>
> Stop depending on the BIOS setup.
>
> Based on libata pata_ali host driver.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied.
On Tuesday 19 January 2010 10:25:26 am David Miller wrote:
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Date: Mon, 18 Jan 2010 18:17:29 +0100
>
> > From: Bartlomiej Zolnierkiewicz <[email protected]>
> > Subject: [PATCH] ide: use standard timing for XFER_PIO_SLOW mode in ide_timing_compute()
> >
> > Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
>
> Applied.
Thanks.
Here is a bonus fixup for a small issue noticed by Sergei yesterday.
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH] ide: ide_timing_compute() fixup
XFER_SW_DMA_0 mode should be excluded from the extended cycle
timing computations.
[ This is just a documentation fix -- code inside the affected
'if' block already makes sure to accept only PIO modes. ]
Noticed-by: Sergei Shtylyov <[email protected]>
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/ide/ide-timings.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Index: b/drivers/ide/ide-timings.c
===================================================================
--- a/drivers/ide/ide-timings.c
+++ b/drivers/ide/ide-timings.c
@@ -166,7 +166,7 @@ int ide_timing_compute(ide_drive_t *driv
if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
memset(&p, 0, sizeof(p));
- if (speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
+ if (speed >= XFER_PIO_0 && speed < XFER_SW_DMA_0) {
if (speed <= XFER_PIO_2)
p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO];
else if ((speed <= XFER_PIO_4) ||
On Monday 18 January 2010 08:28:22 pm Sergei Shtylyov wrote:
> Bartlomiej Zolnierkiewicz wrote:
>
> > From: Bartlomiej Zolnierkiewicz <[email protected]>
> > Subject: [PATCH] ide: add drive->pio_mode field
> >
> > Add pio_mode field to ide_drive_t matching pio_mode field used in
> > struct ata_device.
> >
> > The validity of the field is restricted to ->set_pio_mode method
> > only currently in IDE subsystem.
> >
> > Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
> > ---
> > drivers/ide/ide-devsets.c | 2 ++
> > drivers/ide/ide-probe.c | 2 ++
> > drivers/ide/ide-xfer-mode.c | 3 +++
> > include/linux/ide.h | 1 +
> > 4 files changed, 8 insertions(+)
> >
> > Index: b/drivers/ide/ide-devsets.c
> > ===================================================================
> > --- a/drivers/ide/ide-devsets.c
> > +++ b/drivers/ide/ide-devsets.c
> > @@ -105,6 +105,8 @@ static int set_pio_mode(ide_drive_t *dri
> > return -ENOSYS;
> >
> > if (set_pio_mode_abuse(drive->hwif, arg)) {
> > + drive->pio_mode = arg + XFER_PIO_0;
> > +
> >
>
> Er, didn't understand this... these 'arg' values are not really PIO
> modes, no?
In the usual case they are and a few 'special' ->set_pio_mode implementations
will extract the desired 'arg' value just fine by doing '- XFER_PIO_0'..
--
Bartlomiej Zolnierkiewicz
From: Bartlomiej Zolnierkiewicz <[email protected]>
Date: Tue, 19 Jan 2010 16:09:42 +0100
> Here is a bonus fixup for a small issue noticed by Sergei yesterday.
>
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] ide: ide_timing_compute() fixup
>
> XFER_SW_DMA_0 mode should be excluded from the extended cycle
> timing computations.
>
> [ This is just a documentation fix -- code inside the affected
> 'if' block already makes sure to accept only PIO modes. ]
>
> Noticed-by: Sergei Shtylyov <[email protected]>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Applied, thanks Bart.
Hello.
Bartlomiej Zolnierkiewicz wrote:
>>> From: Bartlomiej Zolnierkiewicz <[email protected]>
>>> Subject: [PATCH] ide: use standard timing for XFER_PIO_SLOW mode in ide_timing_compute()
>>>
>>> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
>>>
>> Applied.
>>
>
> Thanks.
>
> Here is a bonus fixup for a small issue noticed by Sergei yesterday.
>
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] ide: ide_timing_compute() fixup
>
> XFER_SW_DMA_0 mode should be excluded from the extended cycle
> timing computations.
>
> [ This is just a documentation fix -- code inside the affected
> 'if' block already makes sure to accept only PIO modes. ]
>
> Noticed-by: Sergei Shtylyov <[email protected]>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
> ---
> drivers/ide/ide-timings.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> Index: b/drivers/ide/ide-timings.c
> ===================================================================
> --- a/drivers/ide/ide-timings.c
> +++ b/drivers/ide/ide-timings.c
> @@ -166,7 +166,7 @@ int ide_timing_compute(ide_drive_t *driv
> if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
> memset(&p, 0, sizeof(p));
>
> - if (speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
> + if (speed >= XFER_PIO_0 && speed < XFER_SW_DMA_0) {
> if (speed <= XFER_PIO_2)
> p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO];
> else if ((speed <= XFER_PIO_4) ||
>
But shouldn't this just be merged to "ide: use standard timing for
XFER_PIO_SLOW mode in ide_timing_compute()" since it's the patch that
introduced that check?
MBR, Sergei
From: Sergei Shtylyov <[email protected]>
Date: Tue, 19 Jan 2010 22:42:57 +0300
> But shouldn't this just be merged to "ide: use standard timing for
> XFER_PIO_SLOW mode in ide_timing_compute()" since it's the patch that
> introduced that check?
It's fine either way.
I can break the ide-next-2.6 tree for everyone by rebasing it to
unwind the 50 or so patches I applied from Bart yesterday to do this,
but really is that pain worth it since right thing is there in the
end?
On Tuesday 19 January 2010 08:48:16 pm David Miller wrote:
> From: Sergei Shtylyov <[email protected]>
> Date: Tue, 19 Jan 2010 22:42:57 +0300
>
> > But shouldn't this just be merged to "ide: use standard timing for
> > XFER_PIO_SLOW mode in ide_timing_compute()" since it's the patch that
> > introduced that check?
>
> It's fine either way.
>
> I can break the ide-next-2.6 tree for everyone by rebasing it to
> unwind the 50 or so patches I applied from Bart yesterday to do this,
> but really is that pain worth it since right thing is there in the
> end?
Especially since the new patch is a pure documentation fix
in the practice (the old code happens to work fine anyway)..
--
Bartlomiej Zolnierkiewicz
On 01/18/2010 12:13 PM, Bartlomiej Zolnierkiewicz wrote:
> From: Bartlomiej Zolnierkiewicz<[email protected]>
> Subject: [PATCH] libata: fix CFA handling in ide_timing_compute()
>
> Use standard cycle timing for CFA PIO5 and PIO6 modes.
>
> Based on commit 74638c8 for IDE subsystem.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz<[email protected]>
> ---
> drivers/ata/libata-core.c | 17 +++++++++++------
> 1 file changed, 11 insertions(+), 6 deletions(-)
applied
On 01/18/2010 12:14 PM, Bartlomiej Zolnierkiewicz wrote:
> From: Bartlomiej Zolnierkiewicz<[email protected]>
> Subject: [PATCH] pata_ali: documentation fixes
>
> Signed-off-by: Bartlomiej Zolnierkiewicz<[email protected]>
> ---
> drivers/ata/pata_ali.c | 8 +++-----
> 1 file changed, 3 insertions(+), 5 deletions(-)
applied
On 01/18/2010 12:14 PM, Bartlomiej Zolnierkiewicz wrote:
> From: Bartlomiej Zolnierkiewicz<[email protected]>
> Subject: [PATCH] pata_atiixp: remove superfluous wrapper function
>
> Fix documentation for ->set_[pio,dma]mode methods while at it.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz<[email protected]>
> ---
> drivers/ata/pata_atiixp.c | 29 +++++++----------------------
> 1 file changed, 7 insertions(+), 22 deletions(-)
applied
On 01/18/2010 12:14 PM, Bartlomiej Zolnierkiewicz wrote:
> From: Bartlomiej Zolnierkiewicz<[email protected]>
> Subject: [PATCH] pata_atiixp: add locking for parallel scanning
>
> This is similar change as commit 60c3be3 for ata_piix host driver
> and while pata_atiixp doesn't enable parallel scan yet the race
> could probably also be triggered by requesting re-scanning of both
> ports at the same time using SCSI sysfs interface.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz<[email protected]>
> ---
> drivers/ata/pata_atiixp.c | 14 +++++++++++++-
> 1 file changed, 13 insertions(+), 1 deletion(-)
did not apply to libata-dev.git#upstream, so skipped this and patch #7
On 01/20/2010 11:07 PM, Jeff Garzik wrote:
> On 01/18/2010 12:14 PM, Bartlomiej Zolnierkiewicz wrote:
>> From: Bartlomiej Zolnierkiewicz<[email protected]>
>> Subject: [PATCH] pata_atiixp: remove superfluous wrapper function
>>
>> Fix documentation for ->set_[pio,dma]mode methods while at it.
>>
>> Signed-off-by: Bartlomiej Zolnierkiewicz<[email protected]>
>> ---
>> drivers/ata/pata_atiixp.c | 29 +++++++----------------------
>> 1 file changed, 7 insertions(+), 22 deletions(-)
>
> applied
undone... it broke the build, presumably because it requires something
in your tree that's not in libata-dev.git
On 01/18/2010 12:14 PM, Bartlomiej Zolnierkiewicz wrote:
> From: Bartlomiej Zolnierkiewicz<[email protected]>
> Subject: [PATCH] pata_cmd64x: fix PIO setup
>
> Fix incorrect handling of recovery clocks value == 16 resulting
> in overclocked recovery timings& potentially underclocked active
> timings.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz<[email protected]>
> ---
> drivers/ata/pata_cmd64x.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
applied 8-11
On 01/18/2010 12:15 PM, Bartlomiej Zolnierkiewicz wrote:
> From: Bartlomiej Zolnierkiewicz<[email protected]>
> Subject: [PATCH] pata_cs5535: use correct values for PIO1 and PIO2 data timings
>
> There shouldn't be any problems with it as IDE cs5535 host driver
> has been using those values for years and they match values given
> in the (publicly available) datasheet.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz<[email protected]>
> ---
> drivers/ata/pata_cs5535.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
applied 13-14
On 01/18/2010 12:15 PM, Bartlomiej Zolnierkiewicz wrote:
> From: Bartlomiej Zolnierkiewicz<[email protected]>
> Subject: [PATCH] pata_efar: always program master_data before slave_data
>
> We may need to set SITRE before programming slave_data.
>
> This makes pata_efar match the behavior of IDE slc90e66 host driver
> and also libata ata_piix one.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz<[email protected]>
> ---
> drivers/ata/pata_efar.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
OK but did not apply to libata-dev.git
On 01/18/2010 12:16 PM, Bartlomiej Zolnierkiewicz wrote:
> From: Bartlomiej Zolnierkiewicz<[email protected]>
> Subject: [PATCH] pata_efar: fix secondary port support
>
> Signed-off-by: Bartlomiej Zolnierkiewicz<[email protected]>
> ---
> drivers/ata/pata_efar.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
patches 16-17 OK, but did not apply due to missing patch 15
On 01/18/2010 12:16 PM, Bartlomiej Zolnierkiewicz wrote:
> From: Bartlomiej Zolnierkiewicz<[email protected]>
> Subject: [PATCH] pata_serverworks: fix PIO setup for the second channel
>
> Signed-off-by: Bartlomiej Zolnierkiewicz<[email protected]>
> ---
> drivers/ata/pata_serverworks.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
applied 19-20
On 01/18/2010 12:16 PM, Bartlomiej Zolnierkiewicz wrote:
> From: Bartlomiej Zolnierkiewicz<[email protected]>
> Subject: [PATCH] pata_serverworks: cleanup cable detection
>
> Signed-off-by: Bartlomiej Zolnierkiewicz<[email protected]>
> ---
> drivers/ata/pata_serverworks.c | 37 +++++++------------------------------
> 1 file changed, 7 insertions(+), 30 deletions(-)
OK but did not apply
On 01/18/2010 12:17 PM, Bartlomiej Zolnierkiewicz wrote:
> From: Bartlomiej Zolnierkiewicz<[email protected]>
> Subject: [PATCH] pata_via: fix address setup timings underlocking
>
> Correct via_do_set_mode() documentation while at it.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz<[email protected]>
> ---
> drivers/ata/pata_via.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
applied
On 01/18/2010 12:17 PM, Bartlomiej Zolnierkiewicz wrote:
> From: Bartlomiej Zolnierkiewicz<[email protected]>
> Subject: [PATCH] pata_via: store UDMA masks in via_isa_bridges table
>
> * store UDMA masks in via_isa_bridges[] and while at it make "flags"
> field to be u8 instead of u16
>
> * convert the driver to use UDMA masks from via_isa_bridges[]
>
> * remove no longer needed VIA_UDMA* defines
>
> Make some minor documentation and CodingStyle fixes while at it.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz<[email protected]>
> ---
> drivers/ata/pata_via.c | 198 +++++++++++++++++++++++--------------------------
> 1 file changed, 93 insertions(+), 105 deletions(-)
applied
On Thursday 21 January 2010 05:09:09 am Jeff Garzik wrote:
> On 01/20/2010 11:07 PM, Jeff Garzik wrote:
> > On 01/18/2010 12:14 PM, Bartlomiej Zolnierkiewicz wrote:
> >> From: Bartlomiej Zolnierkiewicz<[email protected]>
> >> Subject: [PATCH] pata_atiixp: remove superfluous wrapper function
> >>
> >> Fix documentation for ->set_[pio,dma]mode methods while at it.
> >>
> >> Signed-off-by: Bartlomiej Zolnierkiewicz<[email protected]>
> >> ---
> >> drivers/ata/pata_atiixp.c | 29 +++++++----------------------
> >> 1 file changed, 7 insertions(+), 22 deletions(-)
> >
> > applied
>
> undone... it broke the build, presumably because it requires something
> in your tree that's not in libata-dev.git
Jeff, as noted in the first mail those patches are against atang tree
(which has many changes which are missing from your libata-dev tree)..
--
Bartlomiej Zolnierkiewicz
On 01/21/2010 06:23 AM, Bartlomiej Zolnierkiewicz wrote:
> On Thursday 21 January 2010 05:09:09 am Jeff Garzik wrote:
>> On 01/20/2010 11:07 PM, Jeff Garzik wrote:
>>> On 01/18/2010 12:14 PM, Bartlomiej Zolnierkiewicz wrote:
>>>> From: Bartlomiej Zolnierkiewicz<[email protected]>
>>>> Subject: [PATCH] pata_atiixp: remove superfluous wrapper function
>>>>
>>>> Fix documentation for ->set_[pio,dma]mode methods while at it.
>>>>
>>>> Signed-off-by: Bartlomiej Zolnierkiewicz<[email protected]>
>>>> ---
>>>> drivers/ata/pata_atiixp.c | 29 +++++++----------------------
>>>> 1 file changed, 7 insertions(+), 22 deletions(-)
>>>
>>> applied
>>
>> undone... it broke the build, presumably because it requires something
>> in your tree that's not in libata-dev.git
>
> Jeff, as noted in the first mail those patches are against atang tree
> (which has many changes which are missing from your libata-dev tree)..
Yes, hence "presumably because it requires something in your tree"
Would you be willing to submit a push against the latest
libata-dev.git#upstream?
Jeff
Hello.
Bartlomiej Zolnierkiewicz wrote:
> On Monday 18 January 2010 08:28:22 pm Sergei Shtylyov wrote:
>
>> Bartlomiej Zolnierkiewicz wrote:
>>
>>
>>> From: Bartlomiej Zolnierkiewicz <[email protected]>
>>> Subject: [PATCH] ide: add drive->pio_mode field
>>>
>>> Add pio_mode field to ide_drive_t matching pio_mode field used in
>>> struct ata_device.
>>>
>>> The validity of the field is restricted to ->set_pio_mode method
>>> only currently in IDE subsystem.
>>>
>>> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
>>> ---
>>> drivers/ide/ide-devsets.c | 2 ++
>>> drivers/ide/ide-probe.c | 2 ++
>>> drivers/ide/ide-xfer-mode.c | 3 +++
>>> include/linux/ide.h | 1 +
>>> 4 files changed, 8 insertions(+)
>>>
>>> Index: b/drivers/ide/ide-devsets.c
>>> ===================================================================
>>> --- a/drivers/ide/ide-devsets.c
>>> +++ b/drivers/ide/ide-devsets.c
>>> @@ -105,6 +105,8 @@ static int set_pio_mode(ide_drive_t *dri
>>> return -ENOSYS;
>>>
>>> if (set_pio_mode_abuse(drive->hwif, arg)) {
>>> + drive->pio_mode = arg + XFER_PIO_0;
>>> +
>>>
>>>
>> Er, didn't understand this... these 'arg' values are not really PIO
>> modes, no?
>>
>
> In the usual case they are
But after set_pio_mode_abuse() returned non-zero we know it's not
usual case, no?
> and a few 'special' ->set_pio_mode implementations
> will extract the desired 'arg' value just fine by doing '- XFER_PIO_0'..
>
I don't understand why we should change drive->pio_mode if we know
it's not a PIO mode but "abuse value". Perhaps you're dropping the mode
argument from set_pio_mode() in some of the next patches? Doesn't seem a
good idea, given that this "abuse case" still exist...
> --
> Bartlomiej Zolnierkiewicz
>
WBR, Sergei
Bartlomiej Zolnierkiewicz wrote:
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] alim15x3: fix handling of UDMA enable bit
>
> Clear UDMA enable bit also for PIO modes.
>
Sorry for late mail but I fail to understand why this was done and
what this patch fixes.
> Based on libata pata_ali host driver.
>
libata has different mode programming code where first always the PIO
mode and then DMA mode is set. With IDE core, the order can be
different, PIO mode programming shouldn't affect DMA mode bits -- and
does not affect it in the other drivers...
MBR, Sergei
Bartlomiej Zolnierkiewicz wrote:
> From: Bartlomiej Zolnierkiewicz <[email protected]>
> Subject: [PATCH] ide: add drive->dma_mode field
>
> Add dma_mode field to ide_drive_t matching dma_mode field used in
> struct ata_device.
>
> The validity of the field is restricted to ->dma_pio_mode method
> only currently in IDE subsystem.
>
I don't see such method even in your tree -- perhaps you meant
set_dma_mode()?
MBR, Sergei
Hi Sergei,
On Monday 12 April 2010 03:53:28 pm Sergei Shtylyov wrote:
> Bartlomiej Zolnierkiewicz wrote:
> > From: Bartlomiej Zolnierkiewicz <[email protected]>
> > Subject: [PATCH] alim15x3: fix handling of UDMA enable bit
> >
> > Clear UDMA enable bit also for PIO modes.
> >
>
> Sorry for late mail but I fail to understand why this was done and
> what this patch fixes.
>
> > Based on libata pata_ali host driver.
>
> libata has different mode programming code where first always the PIO
> mode and then DMA mode is set. With IDE core, the order can be
> different, PIO mode programming shouldn't affect DMA mode bits -- and
> does not affect it in the other drivers...
This was just a tiny part of larger patchset preparing alim15x3 for
conversion to ide2libata framework and it seems the problem is only
affecting user-initiated transfer mode changes (which are strongly
discouraged anyway) as both libata and IDE core use quite similar
transfer mode programming sequence by default.
However thanks for noticing the issue, I will fix it for both drivers
during the next update of atang tree (unless somebody sends me a patch
sooner).
--
Bartlomiej Zolnierkiewicz