Thanks all for reviewing v1 patches.
Hi Kumar,
Now that the rpm redesign dependency is resolved, If its not too late could you
queue these dt patches for v4.1-rc1 or v4.1-rc2.
I tested these patches on APQ8064 based IFC6410 and CMQS600 board with SATA/USB/HDMI.
I also rebased these patches on top of your qcom/dt branch.
Thanks,
srini
Changes since v1
* Made regulators board specific, as suggested by Bjorn.
* Used correct IRQF flags for rpm, spotted by Bjorn.
* Fixed serial lable to be more appropriate, spotted by Bjorn.
Nicolas Dechesne (2):
ARM: dts: apq8064: Add usb host support to CM QS-600
ARM: dts: apq8064: Add USB OTG support for CM QS-600
Pramod Gurav (1):
ARM: dts: apq8064-ifc6410: Add DT alias for serial port
Rob Clark (1):
ARM: dts: apq8064: Add MDP support
Srinivas Kandagatla (8):
ARM: dts: apq8064: add RPM regulators support
ARM: dts: apq8064-ifc6410: Add basic regulators
ARM: dts: apq8064: Add usb host support.
ARM: dts: apq8064: Add USB OTG support
ARM: dts: apq8064: Add SATA controller support.
ARM: dts: apq8064-cm-qs600: Add basic regulators.
ARM: dts: apq8064: Move i2c1 pinctrl to apq8064.dtsi
ARM: dts: apq8064: add i2c3 node for panel.
arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 100 ++++++++++
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 136 +++++++++++++-
arch/arm/boot/dts/qcom-apq8064.dtsi | 280 +++++++++++++++++++++++++++-
3 files changed, 507 insertions(+), 9 deletions(-)
--
1.9.1
This patch adds rpm node to apq8064 dt as rpm would be used by other
devices for regulator support.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 6c15112..19629c9 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -276,6 +276,30 @@
#reset-cells = <1>;
};
+ l2cc: clock-controller@2011000 {
+ compatible = "syscon";
+ reg = <0x2011000 0x1000>;
+ };
+
+ rpm@108000 {
+ compatible = "qcom,rpm-apq8064";
+ reg = <0x108000 0x1000>;
+ qcom,ipc = <&l2cc 0x8 2>;
+
+ interrupts = <GIC_SPI 19 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "ack", "err", "wakeup";
+
+ regulators {
+ compatible = "qcom,rpm-pm8921-regulators";
+
+ pm8921_hdmi_switch: hdmi-switch {
+ bias-pull-down;
+ };
+ };
+ };
+
/* Temporary fixed regulator */
vsdcc_fixed: vsdcc-regulator {
compatible = "regulator-fixed";
--
1.9.1
This patch adds support to basic regulators wiredup on IFC6410 board.
All these regulators are tested as part of USB, SATA and HDMI.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 67 ++++++++++++++++++++++++++++++
1 file changed, 67 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index e641001..ca2d7ba 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -23,6 +23,73 @@
};
};
+ rpm@108000 {
+ regulators {
+ vin_lvs1_3_6-supply = <&pm8921_s4>;
+ vin_lvs2-supply = <&pm8921_s1>;
+ vin_lvs4_5_7-supply = <&pm8921_s4>;
+
+ vdd_l1_l2_l12_l18-supply = <&pm8921_s4>;
+ vdd_l24-supply = <&pm8921_s1>;
+ vdd_l25-supply = <&pm8921_s1>;
+ vdd_l26-supply = <&pm8921_s7>;
+ vdd_l27-supply = <&pm8921_s7>;
+ vdd_l28-supply = <&pm8921_s7>;
+
+
+ /* Buck SMPS */
+ pm8921_s1: s1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1225000>;
+ regulator-max-microvolt = <1225000>;
+ qcom,switch-mode-frequency = <3200000>;
+ bias-pull-down;
+ };
+
+ pm8921_s3: s3 {
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1400000>;
+ qcom,switch-mode-frequency = <4800000>;
+ };
+
+ pm8921_s4: s4 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ qcom,switch-mode-frequency = <3200000>;
+ };
+
+ pm8921_s7: s7 {
+ regulator-min-microvolt = <1300000>;
+ regulator-max-microvolt = <1300000>;
+ qcom,switch-mode-frequency = <3200000>;
+ };
+
+ pm8921_l3: l3 {
+ regulator-min-microvolt = <3050000>;
+ regulator-max-microvolt = <3300000>;
+ bias-pull-down;
+ };
+
+ pm8921_l4: l4 {
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1800000>;
+ bias-pull-down;
+ };
+
+ pm8921_l6: l6 {
+ regulator-min-microvolt = <2950000>;
+ regulator-max-microvolt = <2950000>;
+ bias-pull-down;
+ };
+
+ pm8921_l23: l23 {
+ regulator-min-microvolt = <1700000>;
+ regulator-max-microvolt = <1900000>;
+ bias-pull-down;
+ };
+ };
+ };
+
gsbi@12440000 {
status = "okay";
qcom,mode = <GSBI_PROT_I2C>;
--
1.9.1
This patch adds device tree nodes to support two usb hosts on APQ8064
SOC.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 22 ++++++++++++++
arch/arm/boot/dts/qcom-apq8064.dtsi | 47 ++++++++++++++++++++++++++++++
2 files changed, 69 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index ca2d7ba..8fe60fc 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -116,6 +116,28 @@
};
};
+ usb3_phy: phy@12520000 {
+ status = "okay";
+ vddcx-supply = <&pm8921_s3>;
+ v3p3-supply = <&pm8921_l3>;
+ v1p8-supply = <&pm8921_l23>;
+ };
+
+ usb4_phy: phy@12530000 {
+ status = "okay";
+ vddcx-supply = <&pm8921_s3>;
+ v3p3-supply = <&pm8921_l3>;
+ v1p8-supply = <&pm8921_l23>;
+ };
+
+ usb3: usb@12520000 {
+ status = "okay";
+ };
+
+ usb4: usb@12530000 {
+ status = "okay";
+ };
+
amba {
/* eMMC */
sdcc1: sdcc@12400000 {
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 19629c9..99d8e07 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -2,6 +2,7 @@
#include "skeleton.dtsi"
#include <dt-bindings/clock/qcom,gcc-msm8960.h>
+#include <dt-bindings/reset/qcom,gcc-msm8960.h>
#include <dt-bindings/clock/qcom,mmcc-msm8960.h>
#include <dt-bindings/soc/qcom,gsbi.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -300,6 +301,52 @@
};
};
+ usb3_phy: phy@12520000 {
+ compatible = "qcom,usb-otg-ci";
+ reg = <0x12520000 0x400>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_NONE>;
+ status = "disabled";
+ dr_mode = "host";
+
+ clocks = <&gcc USB_HS3_XCVR_CLK>,
+ <&gcc USB_HS3_H_CLK>;
+ clock-names = "core", "iface";
+
+ resets = <&gcc USB_HS3_RESET>;
+ reset-names = "link";
+ };
+
+ usb4_phy: phy@12530000 {
+ compatible = "qcom,usb-otg-ci";
+ reg = <0x12530000 0x400>;
+ interrupts = <GIC_SPI 215 IRQ_TYPE_NONE>;
+ status = "disabled";
+ dr_mode = "host";
+
+ clocks = <&gcc USB_HS4_XCVR_CLK>,
+ <&gcc USB_HS4_H_CLK>;
+ clock-names = "core", "iface";
+
+ resets = <&gcc USB_HS4_RESET>;
+ reset-names = "link";
+ };
+
+ usb3: usb@12520000 {
+ compatible = "qcom,ehci-host";
+ reg = <0x12520000 0x400>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_NONE>;
+ status = "disabled";
+ usb-phy = <&usb3_phy>;
+ };
+
+ usb4: usb@12530000 {
+ compatible = "qcom,ehci-host";
+ reg = <0x12530000 0x400>;
+ interrupts = <GIC_SPI 215 IRQ_TYPE_NONE>;
+ status = "disabled";
+ usb-phy = <&usb4_phy>;
+ };
+
/* Temporary fixed regulator */
vsdcc_fixed: vsdcc-regulator {
compatible = "regulator-fixed";
--
1.9.1
This patch adds USB OTG support on USB1 of APQ8064 SOC.
Tested on IFC6410 with ethernet gadget.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 17 ++++++++++++++++
arch/arm/boot/dts/qcom-apq8064.dtsi | 32 ++++++++++++++++++++++++++++++
2 files changed, 49 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 8fe60fc..122bf34 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -116,6 +116,14 @@
};
};
+ /* OTG */
+ usb1_phy: phy@12500000 {
+ status = "okay";
+ vddcx-supply = <&pm8921_s3>;
+ v3p3-supply = <&pm8921_l3>;
+ v1p8-supply = <&pm8921_l4>;
+ };
+
usb3_phy: phy@12520000 {
status = "okay";
vddcx-supply = <&pm8921_s3>;
@@ -130,6 +138,15 @@
v1p8-supply = <&pm8921_l23>;
};
+ gadget1: gadget@12500000 {
+ status = "okay";
+ };
+
+ /* OTG */
+ usb1: usb@12500000 {
+ status = "okay";
+ };
+
usb3: usb@12520000 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 99d8e07..5aac9a5 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -301,6 +301,21 @@
};
};
+ usb1_phy: phy@12500000 {
+ compatible = "qcom,usb-otg-ci";
+ reg = <0x12500000 0x400>;
+ interrupts = <GIC_SPI 100 IRQ_TYPE_NONE>;
+ status = "disabled";
+ dr_mode = "host";
+
+ clocks = <&gcc USB_HS1_XCVR_CLK>,
+ <&gcc USB_HS1_H_CLK>;
+ clock-names = "core", "iface";
+
+ resets = <&gcc USB_HS1_RESET>;
+ reset-names = "link";
+ };
+
usb3_phy: phy@12520000 {
compatible = "qcom,usb-otg-ci";
reg = <0x12520000 0x400>;
@@ -331,6 +346,23 @@
reset-names = "link";
};
+ gadget1: gadget@12500000 {
+ compatible = "qcom,ci-hdrc";
+ reg = <0x12500000 0x400>;
+ status = "disabled";
+ dr_mode = "peripheral";
+ interrupts = <GIC_SPI 100 IRQ_TYPE_NONE>;
+ usb-phy = <&usb1_phy>;
+ };
+
+ usb1: usb@12500000 {
+ compatible = "qcom,ehci-host";
+ reg = <0x12500000 0x400>;
+ interrupts = <GIC_SPI 100 IRQ_TYPE_NONE>;
+ status = "disabled";
+ usb-phy = <&usb1_phy>;
+ };
+
usb3: usb@12520000 {
compatible = "qcom,ehci-host";
reg = <0x12520000 0x400>;
--
1.9.1
This patch adds AHCI based SATA controller support to APQ8064.
Tested on IFC6410 board.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 9 ++++++++
arch/arm/boot/dts/qcom-apq8064.dtsi | 35 ++++++++++++++++++++++++++++++
2 files changed, 44 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 122bf34..c9c9c5e 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -116,6 +116,15 @@
};
};
+ sata_phy0: sata-phy@1b400000{
+ status = "okay";
+ };
+
+ sata0: sata@29000000 {
+ status = "okay";
+ target-supply = <&pm8921_s4>;
+ };
+
/* OTG */
usb1_phy: phy@12500000 {
status = "okay";
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 5aac9a5..56cc65e 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -379,6 +379,41 @@
usb-phy = <&usb4_phy>;
};
+ sata_phy0: sata-phy@1b400000{
+ compatible = "qcom,apq8064-sata-phy";
+ status = "disabled";
+ reg = <0x1b400000 0x200>;
+ reg-names = "phy_mem";
+ clocks = <&gcc SATA_PHY_CFG_CLK>;
+ clock-names = "cfg";
+ #phy-cells = <0>;
+ };
+
+ sata0: sata@29000000 {
+ compatible = "generic-ahci";
+ status = "disabled";
+ reg = <0x29000000 0x180>;
+ interrupts = <GIC_SPI 209 IRQ_TYPE_NONE>;
+
+ clocks = <&gcc SFAB_SATA_S_H_CLK>,
+ <&gcc SATA_H_CLK>,
+ <&gcc SATA_A_CLK>,
+ <&gcc SATA_RXOOB_CLK>,
+ <&gcc SATA_PMALIVE_CLK>;
+ clock-names = "slave_iface",
+ "iface",
+ "bus",
+ "rxoob",
+ "core_pmalive";
+
+ assigned-clocks = <&gcc SATA_RXOOB_CLK>,
+ <&gcc SATA_PMALIVE_CLK>;
+ assigned-clock-rates = <100000000>, <100000000>;
+
+ phys = <&sata_phy0>;
+ phy-names = "sata-phy";
+ };
+
/* Temporary fixed regulator */
vsdcc_fixed: vsdcc-regulator {
compatible = "regulator-fixed";
--
1.9.1
From: Rob Clark <[email protected]>
This patch adds MDP node to APQ8064 dt.
Signed-off-by: Srinivas Kandagatla <[email protected]>
[Srinivas Kandagatla: Fixed the hdmi switch regulator name]
Signed-off-by: Rob Clark <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 104 ++++++++++++++++++++++++++++++++++++
1 file changed, 104 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 56cc65e..c88470c 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -1,6 +1,7 @@
/dts-v1/;
#include "skeleton.dtsi"
+#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/qcom,gcc-msm8960.h>
#include <dt-bindings/reset/qcom,gcc-msm8960.h>
#include <dt-bindings/clock/qcom,mmcc-msm8960.h>
@@ -107,6 +108,20 @@
};
};
+ hdmi_pinctrl: hdmi-pinctrl {
+ mux1 {
+ pins = "gpio69", "gpio70", "gpio71";
+ function = "hdmi";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+ mux2 {
+ pins = "gpio72";
+ function = "hdmi";
+ bias-pull-down;
+ drive-strength = <16>;
+ };
+ };
ps_hold: ps_hold {
mux {
pins = "gpio78";
@@ -250,6 +265,18 @@
};
};
+ ext_3p3v: regulator-fixed@1 {
+ compatible = "regulator-fixed";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "ext_3p3v";
+ regulator-type = "voltage";
+ startup-delay-us = <0>;
+ gpio = <&tlmm_pinmux 77 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-boot-on;
+ };
+
qcom,ssbi@500000 {
compatible = "qcom,ssbi";
reg = <0x00500000 0x1000>;
@@ -522,5 +549,82 @@
compatible = "qcom,tcsr-apq8064", "syscon";
reg = <0x1a400000 0x100>;
};
+
+ hdmi: qcom,hdmi-tx@4a00000 {
+ compatible = "qcom,hdmi-tx-8960";
+ reg-names = "core_physical";
+ reg = <0x04a00000 0x1000>;
+ interrupts = <GIC_SPI 79 IRQ_TYPE_NONE>;
+ clock-names =
+ "core_clk",
+ "master_iface_clk",
+ "slave_iface_clk";
+ clocks =
+ <&mmcc HDMI_APP_CLK>,
+ <&mmcc HDMI_M_AHB_CLK>,
+ <&mmcc HDMI_S_AHB_CLK>;
+ qcom,hdmi-tx-ddc-clk = <&tlmm_pinmux 70
+ GPIO_ACTIVE_HIGH>;
+ qcom,hdmi-tx-ddc-data = <&tlmm_pinmux 71
+ GPIO_ACTIVE_HIGH>;
+ qcom,hdmi-tx-hpd = <&tlmm_pinmux 72
+ GPIO_ACTIVE_HIGH>;
+ core-vdda-supply = <&pm8921_hdmi_switch>;
+ hdmi-mux-supply = <&ext_3p3v>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_pinctrl>;
+ };
+
+ gpu: qcom,adreno-3xx@4300000 {
+ compatible = "qcom,adreno-3xx";
+ reg = <0x04300000 0x20000>;
+ reg-names = "kgsl_3d0_reg_memory";
+ interrupts = <GIC_SPI 80 IRQ_TYPE_NONE>;
+ interrupt-names = "kgsl_3d0_irq";
+ clock-names =
+ "core_clk",
+ "iface_clk",
+ "mem_clk",
+ "mem_iface_clk";
+ clocks =
+ <&mmcc GFX3D_CLK>,
+ <&mmcc GFX3D_AHB_CLK>,
+ <&mmcc GFX3D_AXI_CLK>,
+ <&mmcc MMSS_IMEM_AHB_CLK>;
+ qcom,chipid = <0x03020002>;
+ qcom,gpu-pwrlevels {
+ compatible = "qcom,gpu-pwrlevels";
+ qcom,gpu-pwrlevel@0 {
+ qcom,gpu-freq = <450000000>;
+ };
+ qcom,gpu-pwrlevel@1 {
+ qcom,gpu-freq = <27000000>;
+ };
+ };
+ };
+
+ mdp: qcom,mdp@5100000 {
+ compatible = "qcom,mdp";
+ reg = <0x05100000 0xf0000>;
+ interrupts = <GIC_SPI 75 IRQ_TYPE_NONE>;
+ connectors = <&hdmi>;
+ gpus = <&gpu>;
+ clock-names =
+ "core_clk",
+ "iface_clk",
+ "lut_clk",
+ "src_clk",
+ "hdmi_clk",
+ "mdp_clk",
+ "mdp_axi_clk";
+ clocks =
+ <&mmcc MDP_CLK>,
+ <&mmcc MDP_AHB_CLK>,
+ <&mmcc MDP_LUT_CLK>,
+ <&mmcc TV_SRC>,
+ <&mmcc HDMI_TV_CLK>,
+ <&mmcc MDP_TV_CLK>,
+ <&mmcc MDP_AXI_CLK>;
+ };
};
};
--
1.9.1
This patch adds basic regulator support for USB and HDMI.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 61 +++++++++++++++++++++++++++++
1 file changed, 61 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
index 5d75666..142885d 100644
--- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
@@ -14,6 +14,67 @@
};
};
+ rpm@108000 {
+ regulators {
+ vin_lvs1_3_6-supply = <&pm8921_s4>;
+ vin_lvs2-supply = <&pm8921_s1>;
+ vin_lvs4_5_7-supply = <&pm8921_s4>;
+
+ vdd_l1_l2_l12_l18-supply = <&pm8921_s4>;
+ vdd_l24-supply = <&pm8921_s1>;
+ vdd_l25-supply = <&pm8921_s1>;
+ vdd_l26-supply = <&pm8921_s7>;
+ vdd_l27-supply = <&pm8921_s7>;
+ vdd_l28-supply = <&pm8921_s7>;
+
+
+ /* Buck SMPS */
+ pm8921_s1: s1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1225000>;
+ regulator-max-microvolt = <1225000>;
+ qcom,switch-mode-frequency = <3200000>;
+ bias-pull-down;
+ };
+
+ pm8921_s3: s3 {
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1400000>;
+ qcom,switch-mode-frequency = <4800000>;
+ };
+
+ pm8921_s4: s4 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ qcom,switch-mode-frequency = <3200000>;
+ };
+
+ pm8921_s7: s7 {
+ regulator-min-microvolt = <1300000>;
+ regulator-max-microvolt = <1300000>;
+ qcom,switch-mode-frequency = <3200000>;
+ };
+
+ pm8921_l3: l3 {
+ regulator-min-microvolt = <3050000>;
+ regulator-max-microvolt = <3300000>;
+ bias-pull-down;
+ };
+
+ pm8921_l4: l4 {
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1800000>;
+ bias-pull-down;
+ };
+
+ pm8921_l23: l23 {
+ regulator-min-microvolt = <1700000>;
+ regulator-max-microvolt = <1900000>;
+ bias-pull-down;
+ };
+ };
+ };
+
gsbi@12440000 {
status = "okay";
qcom,mode = <GSBI_PROT_I2C>;
--
1.9.1
From: Nicolas Dechesne <[email protected]>
This patch adds device tree nodes to support two usb hosts on Compulab QS600 board.
Signed-off-by: Srinivas Kandagatla <[email protected]>
[Srinivas Kandagatla: fixed up regulators and status properties]
Signed-off-by: Nicolas Dechesne <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
index 142885d..fc69931 100644
--- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
@@ -101,6 +101,28 @@
};
};
+ usb3_phy:phy@12520000 {
+ status = "okay";
+ vddcx-supply = <&pm8921_s3>;
+ v3p3-supply = <&pm8921_l3>;
+ v1p8-supply = <&pm8921_l23>;
+ };
+
+ usb4_phy:phy@12530000 {
+ status = "okay";
+ vddcx-supply = <&pm8921_s3>;
+ v3p3-supply = <&pm8921_l3>;
+ v1p8-supply = <&pm8921_l23>;
+ };
+
+ usb3: usb@12520000 {
+ status = "okay";
+ };
+
+ usb4: usb@12530000 {
+ status = "okay";
+ };
+
amba {
/* eMMC */
sdcc1: sdcc@12400000 {
--
1.9.1
From: Nicolas Dechesne <[email protected]>
This patch adds USB OTG support on USB1 for Compulab QS-600 Board.
Signed-off-by: Srinivas Kandagatla <[email protected]>
[Srinivas Kandagatla: fixed up regulators and status properties]
Signed-off-by: Nicolas Dechesne <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
index fc69931..d353694 100644
--- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
@@ -101,6 +101,14 @@
};
};
+ /* OTG */
+ usb1_phy:phy@12500000 {
+ status = "okay";
+ vddcx-supply = <&pm8921_s3>;
+ v3p3-supply = <&pm8921_l3>;
+ v1p8-supply = <&pm8921_l4>;
+ };
+
usb3_phy:phy@12520000 {
status = "okay";
vddcx-supply = <&pm8921_s3>;
@@ -115,6 +123,15 @@
v1p8-supply = <&pm8921_l23>;
};
+ gadget1:gadget@12500000 {
+ status = "ok";
+ };
+
+ /* OTG */
+ usb1: usb@12500000 {
+ status = "ok";
+ };
+
usb3: usb@12520000 {
status = "okay";
};
--
1.9.1
From: Pramod Gurav <[email protected]>
Define an alias for serial port present on ifc6410 which is used as
console.
Signed-off-by: Srinivas Kandagatla <[email protected]>
[Srinivas Kandagatla: renamed the serial0 label appropriately]
Signed-off-by: Pramod Gurav <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 4 ++++
arch/arm/boot/dts/qcom-apq8064.dtsi | 3 +--
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index c9c9c5e..f319721 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -5,6 +5,10 @@
model = "Qualcomm APQ8064/IFC6410";
compatible = "qcom,apq8064-ifc6410", "qcom,apq8064";
+ aliases {
+ serial0 = &gsbi7_serial;
+ };
+
soc {
pinctrl@800000 {
i2c1_pins: i2c1 {
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index c88470c..d7f70d7 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -251,10 +251,9 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
-
syscon-tcsr = <&tcsr>;
- serial@16640000 {
+ gsbi7_serial: serial@16640000 {
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x16640000 0x1000>,
<0x16600000 0x1000>;
--
1.9.1
I2C1 pinctrl is not really specific to a board, moving to SOC dtsi would
avoid redefining this in every board.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 7 -------
arch/arm/boot/dts/qcom-apq8064.dtsi | 7 +++++++
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index f319721..8f955d8 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -11,13 +11,6 @@
soc {
pinctrl@800000 {
- i2c1_pins: i2c1 {
- mux {
- pins = "gpio20", "gpio21";
- function = "gsbi1";
- };
- };
-
card_detect: card_detect {
mux {
pins = "gpio26";
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index d7f70d7..c87f92a 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -128,6 +128,13 @@
function = "ps_hold";
};
};
+
+ i2c1_pins: i2c1 {
+ mux {
+ pins = "gpio20", "gpio21";
+ function = "gsbi1";
+ };
+ };
};
intc: interrupt-controller@2000000 {
--
1.9.1
This patch adds i2c3 node which is used for panel control on IFC6410.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 10 ++++++++++
arch/arm/boot/dts/qcom-apq8064.dtsi | 27 +++++++++++++++++++++++++++
2 files changed, 37 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 8f955d8..45855c5 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -87,6 +87,16 @@
};
};
+ gsbi3: gsbi@16200000 {
+ status = "okay";
+ qcom,mode = <GSBI_PROT_I2C>;
+ i2c3: i2c@16280000 {
+ status = "okay";
+ pinctrl-0 = <&i2c3_pins>;
+ pinctrl-names = "default";
+ };
+ };
+
gsbi@12440000 {
status = "okay";
qcom,mode = <GSBI_PROT_I2C>;
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index c87f92a..00f725e 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -135,6 +135,13 @@
function = "gsbi1";
};
};
+
+ i2c3_pins: i2c3 {
+ mux {
+ pins = "gpio8", "gpio9";
+ function = "gsbi3";
+ };
+ };
};
intc: interrupt-controller@2000000 {
@@ -248,6 +255,26 @@
};
};
+ gsbi3: gsbi@16200000 {
+ status = "disabled";
+ compatible = "qcom,gsbi-v1.0.0";
+ reg = <0x16200000 0x100>;
+ clocks = <&gcc GSBI3_H_CLK>;
+ clock-names = "iface";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ i2c3: i2c@16280000 {
+ compatible = "qcom,i2c-qup-v1.1.1";
+ reg = <0x16280000 0x1000>;
+ interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>;
+ clocks = <&gcc GSBI3_QUP_CLK>,
+ <&gcc GSBI3_H_CLK>;
+ clock-names = "core", "iface";
+ };
+ };
+
gsbi7: gsbi@16600000 {
status = "disabled";
compatible = "qcom,gsbi-v1.0.0";
--
1.9.1
On 04/10/15 05:34, Srinivas Kandagatla wrote:
> @@ -250,6 +265,18 @@
> };
> };
>
> + ext_3p3v: regulator-fixed@1 {
> + compatible = "regulator-fixed";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-name = "ext_3p3v";
> + regulator-type = "voltage";
> + startup-delay-us = <0>;
> + gpio = <&tlmm_pinmux 77 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> + regulator-boot-on;
> + };
This shouldn't be inside the SoC node because it doesn't have a reg
property. It should be in a 'regulators' node that's in the root of the
tree:
regulators {
compatible = "simple-bus";
ext_3p3v: fixedregulator@0 {
compatible = "regulator-fixed";
...
};
};
> +
> qcom,ssbi@500000 {
> compatible = "qcom,ssbi";
> reg = <0x00500000 0x1000>;
> @@ -522,5 +549,82 @@
> compatible = "qcom,tcsr-apq8064", "syscon";
> reg = <0x1a400000 0x100>;
> };
> +
> + hdmi: qcom,hdmi-tx@4a00000 {
> + compatible = "qcom,hdmi-tx-8960";
> + reg-names = "core_physical";
> + reg = <0x04a00000 0x1000>;
> + interrupts = <GIC_SPI 79 IRQ_TYPE_NONE>;
> + clock-names =
> + "core_clk",
> + "master_iface_clk",
> + "slave_iface_clk";
> + clocks =
> + <&mmcc HDMI_APP_CLK>,
> + <&mmcc HDMI_M_AHB_CLK>,
> + <&mmcc HDMI_S_AHB_CLK>;
> + qcom,hdmi-tx-ddc-clk = <&tlmm_pinmux 70
> + GPIO_ACTIVE_HIGH>;
> + qcom,hdmi-tx-ddc-data = <&tlmm_pinmux 71
> + GPIO_ACTIVE_HIGH>;
> + qcom,hdmi-tx-hpd = <&tlmm_pinmux 72
> + GPIO_ACTIVE_HIGH>;
This should be done via the *-gpios method. i.e. hdmi-tx-ddc-clk-gpios,
hdmi-tx-ddc-data-gpios, etc.
> + core-vdda-supply = <&pm8921_hdmi_switch>;
> + hdmi-mux-supply = <&ext_3p3v>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&hdmi_pinctrl>;
> + };
> +
> + gpu: qcom,adreno-3xx@4300000 {
> + compatible = "qcom,adreno-3xx";
> + reg = <0x04300000 0x20000>;
> + reg-names = "kgsl_3d0_reg_memory";
> + interrupts = <GIC_SPI 80 IRQ_TYPE_NONE>;
> + interrupt-names = "kgsl_3d0_irq";
> + clock-names =
> + "core_clk",
> + "iface_clk",
> + "mem_clk",
> + "mem_iface_clk";
> + clocks =
> + <&mmcc GFX3D_CLK>,
> + <&mmcc GFX3D_AHB_CLK>,
> + <&mmcc GFX3D_AXI_CLK>,
> + <&mmcc MMSS_IMEM_AHB_CLK>;
> + qcom,chipid = <0x03020002>;
> + qcom,gpu-pwrlevels {
> + compatible = "qcom,gpu-pwrlevels";
> + qcom,gpu-pwrlevel@0 {
> + qcom,gpu-freq = <450000000>;
> + };
> + qcom,gpu-pwrlevel@1 {
> + qcom,gpu-freq = <27000000>;
> + };
> + };
This should be an OPP.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
On 04/10/15 05:34, Srinivas Kandagatla wrote:
> This patch adds AHCI based SATA controller support to APQ8064.
> Tested on IFC6410 board.
>
> Signed-off-by: Srinivas Kandagatla <[email protected]>
> ---
> arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 9 ++++++++
> arch/arm/boot/dts/qcom-apq8064.dtsi | 35 ++++++++++++++++++++++++++++++
> 2 files changed, 44 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
> index 122bf34..c9c9c5e 100644
> --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
> +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
> @@ -116,6 +116,15 @@
> };
> };
>
> + sata_phy0: sata-phy@1b400000{
Space before '{' please.
> + status = "okay";
> + };
> +
> + sata0: sata@29000000 {
> + status = "okay";
> + target-supply = <&pm8921_s4>;
> + };
> +
> /* OTG */
> usb1_phy: phy@12500000 {
> status = "okay";
> diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
> index 5aac9a5..56cc65e 100644
> --- a/arch/arm/boot/dts/qcom-apq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
> @@ -379,6 +379,41 @@
> usb-phy = <&usb4_phy>;
> };
>
> + sata_phy0: sata-phy@1b400000{
Space before '{' please. Also I wonder if it should just be called
phy@1b400000 because phy is more standard than sata-phy.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
On 04/10/15 05:34, Srinivas Kandagatla wrote:
> From: Nicolas Dechesne <[email protected]>
>
> This patch adds USB OTG support on USB1 for Compulab QS-600 Board.
>
> Signed-off-by: Srinivas Kandagatla <[email protected]>
> [Srinivas Kandagatla: fixed up regulators and status properties]
> Signed-off-by: Nicolas Dechesne <[email protected]>
> ---
> arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> index fc69931..d353694 100644
> --- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> +++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> @@ -101,6 +101,14 @@
> };
> };
>
> + /* OTG */
> + usb1_phy:phy@12500000 {
Space after that ':' please.
> + status = "okay";
> + vddcx-supply = <&pm8921_s3>;
> + v3p3-supply = <&pm8921_l3>;
> + v1p8-supply = <&pm8921_l4>;
> + };
> +
> usb3_phy:phy@12520000 {
> status = "okay";
> vddcx-supply = <&pm8921_s3>;
> @@ -115,6 +123,15 @@
> v1p8-supply = <&pm8921_l23>;
> };
>
> + gadget1:gadget@12500000 {
> + status = "ok";
> + };
> +
> + /* OTG */
> + usb1: usb@12500000 {
This one is good.
> + status = "ok";
> + };
> +
> usb3: usb@12520000 {
> status = "okay";
> };
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
On 10/04/15 18:26, Stephen Boyd wrote:
> On 04/10/15 05:34, Srinivas Kandagatla wrote:
>> From: Nicolas Dechesne <[email protected]>
>>
>> This patch adds USB OTG support on USB1 for Compulab QS-600 Board.
>>
>> Signed-off-by: Srinivas Kandagatla <[email protected]>
>> [Srinivas Kandagatla: fixed up regulators and status properties]
>> Signed-off-by: Nicolas Dechesne <[email protected]>
>> ---
>> arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 17 +++++++++++++++++
>> 1 file changed, 17 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
>> index fc69931..d353694 100644
>> --- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
>> +++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
>> @@ -101,6 +101,14 @@
>> };
>> };
>>
>> + /* OTG */
>> + usb1_phy:phy@12500000 {
>
> Space after that ':' please.
>
Yep, I will fix it in next version.
>> + status = "okay";
>> + vddcx-supply = <&pm8921_s3>;
>> + v3p3-supply = <&pm8921_l3>;
>> + v1p8-supply = <&pm8921_l4>;
>> + };
>> +
>> usb3_phy:phy@12520000 {
>> status = "okay";
>> vddcx-supply = <&pm8921_s3>;
>> @@ -115,6 +123,15 @@
>> v1p8-supply = <&pm8921_l23>;
>> };
>>
>> + gadget1:gadget@12500000 {
>> + status = "ok";
>> + };
>> +
>> + /* OTG */
>> + usb1: usb@12500000 {
>
> This one is good.
>
>> + status = "ok";
>> + };
>> +
>> usb3: usb@12520000 {
>> status = "okay";
>> };
>
>
On 10/04/15 18:24, Stephen Boyd wrote:
> On 04/10/15 05:34, Srinivas Kandagatla wrote:
>> This patch adds AHCI based SATA controller support to APQ8064.
>> Tested on IFC6410 board.
>>
>> Signed-off-by: Srinivas Kandagatla <[email protected]>
>> ---
>> arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 9 ++++++++
>> arch/arm/boot/dts/qcom-apq8064.dtsi | 35 ++++++++++++++++++++++++++++++
>> 2 files changed, 44 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
>> index 122bf34..c9c9c5e 100644
>> --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
>> +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
>> @@ -116,6 +116,15 @@
>> };
>> };
>>
>> + sata_phy0: sata-phy@1b400000{
>
> Space before '{' please.
Yeo, Will fix it in next version.
>
>> + status = "okay";
>> + };
>> +
>> + sata0: sata@29000000 {
>> + status = "okay";
>> + target-supply = <&pm8921_s4>;
>> + };
>> +
>> /* OTG */
>> usb1_phy: phy@12500000 {
>> status = "okay";
>> diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
>> index 5aac9a5..56cc65e 100644
>> --- a/arch/arm/boot/dts/qcom-apq8064.dtsi
>> +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
>> @@ -379,6 +379,41 @@
>> usb-phy = <&usb4_phy>;
>> };
>>
>> + sata_phy0: sata-phy@1b400000{
>
> Space before '{' please. Also I wonder if it should just be called
> phy@1b400000 because phy is more standard than sata-phy.
Make sense, I will fix it in next version.
>
On 10/04/15 18:04, Stephen Boyd wrote:
> On 04/10/15 05:34, Srinivas Kandagatla wrote:
>> @@ -250,6 +265,18 @@
>> };
>> };
>>
>> + ext_3p3v: regulator-fixed@1 {
>> + compatible = "regulator-fixed";
>> + regulator-min-microvolt = <3300000>;
>> + regulator-max-microvolt = <3300000>;
>> + regulator-name = "ext_3p3v";
>> + regulator-type = "voltage";
>> + startup-delay-us = <0>;
>> + gpio = <&tlmm_pinmux 77 GPIO_ACTIVE_HIGH>;
>> + enable-active-high;
>> + regulator-boot-on;
>> + };
>
> This shouldn't be inside the SoC node because it doesn't have a reg
> property. It should be in a 'regulators' node that's in the root of the
> tree:
Is this new DT requirement/style? I have not noticed such a dt style in
the past. I might have missed it. Any advantage of doing this way?
>
> regulators {
> compatible = "simple-bus";
>
> ext_3p3v: fixedregulator@0 {
> compatible = "regulator-fixed";
> ...
> };
> };
>
I will move this to the suggested style in next version.
>
>> +
>> qcom,ssbi@500000 {
>> compatible = "qcom,ssbi";
>> reg = <0x00500000 0x1000>;
>> @@ -522,5 +549,82 @@
>> compatible = "qcom,tcsr-apq8064", "syscon";
>> reg = <0x1a400000 0x100>;
>> };
>> +
>> + hdmi: qcom,hdmi-tx@4a00000 {
>> + compatible = "qcom,hdmi-tx-8960";
>> + reg-names = "core_physical";
>> + reg = <0x04a00000 0x1000>;
>> + interrupts = <GIC_SPI 79 IRQ_TYPE_NONE>;
>> + clock-names =
>> + "core_clk",
>> + "master_iface_clk",
>> + "slave_iface_clk";
>> + clocks =
>> + <&mmcc HDMI_APP_CLK>,
>> + <&mmcc HDMI_M_AHB_CLK>,
>> + <&mmcc HDMI_S_AHB_CLK>;
>> + qcom,hdmi-tx-ddc-clk = <&tlmm_pinmux 70
>> + GPIO_ACTIVE_HIGH>;
>> + qcom,hdmi-tx-ddc-data = <&tlmm_pinmux 71
>> + GPIO_ACTIVE_HIGH>;
>> + qcom,hdmi-tx-hpd = <&tlmm_pinmux 72
>> + GPIO_ACTIVE_HIGH>;
>
> This should be done via the *-gpios method. i.e. hdmi-tx-ddc-clk-gpios,
> hdmi-tx-ddc-data-gpios, etc.
>
Thanks for the inputs,
That's true, These are existing bindings, so I can't change it as part
of this patch, However I will make another patch to fix this in both
drivers and DT for good reasons. Just noticed that bindings are not
consistent with the examples and the driver, which I guess is another issue.
>> + core-vdda-supply = <&pm8921_hdmi_switch>;
>> + hdmi-mux-supply = <&ext_3p3v>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&hdmi_pinctrl>;
>> + };
>> +
>> + gpu: qcom,adreno-3xx@4300000 {
>> + compatible = "qcom,adreno-3xx";
>> + reg = <0x04300000 0x20000>;
>> + reg-names = "kgsl_3d0_reg_memory";
>> + interrupts = <GIC_SPI 80 IRQ_TYPE_NONE>;
>> + interrupt-names = "kgsl_3d0_irq";
>> + clock-names =
>> + "core_clk",
>> + "iface_clk",
>> + "mem_clk",
>> + "mem_iface_clk";
>> + clocks =
>> + <&mmcc GFX3D_CLK>,
>> + <&mmcc GFX3D_AHB_CLK>,
>> + <&mmcc GFX3D_AXI_CLK>,
>> + <&mmcc MMSS_IMEM_AHB_CLK>;
>> + qcom,chipid = <0x03020002>;
>> + qcom,gpu-pwrlevels {
>> + compatible = "qcom,gpu-pwrlevels";
>> + qcom,gpu-pwrlevel@0 {
>> + qcom,gpu-freq = <450000000>;
>> + };
>> + qcom,gpu-pwrlevel@1 {
>> + qcom,gpu-freq = <27000000>;
>> + };
>> + };
>
> This should be an OPP.
Yes, that looks reasonable approch, But as I said before the driver and
the bindings are still using this style, so I cant change this as part
of this patch. I will create another patch to for better bindings with
driver fixes too.
>
On 04/10/15 12:39, Srinivas Kandagatla wrote:
>
>
> On 10/04/15 18:04, Stephen Boyd wrote:
>> On 04/10/15 05:34, Srinivas Kandagatla wrote:
>>> @@ -250,6 +265,18 @@
>>> };
>>> };
>>>
>>> + ext_3p3v: regulator-fixed@1 {
>>> + compatible = "regulator-fixed";
>>> + regulator-min-microvolt = <3300000>;
>>> + regulator-max-microvolt = <3300000>;
>>> + regulator-name = "ext_3p3v";
>>> + regulator-type = "voltage";
>>> + startup-delay-us = <0>;
>>> + gpio = <&tlmm_pinmux 77 GPIO_ACTIVE_HIGH>;
>>> + enable-active-high;
>>> + regulator-boot-on;
>>> + };
>>
>> This shouldn't be inside the SoC node because it doesn't have a reg
>> property. It should be in a 'regulators' node that's in the root of the
>> tree:
>
> Is this new DT requirement/style? I have not noticed such a dt style
> in the past. I might have missed it. Any advantage of doing this way?
It's a style. I'm not sure if it's new, but I feel like I've seen
mention of it before more than a year ago (see
arch/arm/boot/dts/tegra30-beaver.dts for an example). The advantage of
doing it this way is we can see all the gpio/fixed regulators in one
place and they're physically placed on a separate bus from the SoC bus.
Typically nodes have reg properties too, so making up fake reg
properties for the regulator nodes when they're on the SoC bus would be
wrong and confusing. If they're under some regulators container node we
can number them from 0 to N and use that for the reg property.
>>
>> regulators {
>> compatible = "simple-bus";
>>
>> ext_3p3v: fixedregulator@0 {
>> compatible = "regulator-fixed";
>> ...
>> };
>> };
>>
> I will move this to the suggested style in next version.
Thanks.
>>
>>> +
>>> qcom,ssbi@500000 {
>>> compatible = "qcom,ssbi";
>>> reg = <0x00500000 0x1000>;
>>> @@ -522,5 +549,82 @@
>>> compatible = "qcom,tcsr-apq8064", "syscon";
>>> reg = <0x1a400000 0x100>;
>>> };
>>> +
>>> + hdmi: qcom,hdmi-tx@4a00000 {
>>> + compatible = "qcom,hdmi-tx-8960";
>>> + reg-names = "core_physical";
>>> + reg = <0x04a00000 0x1000>;
>>> + interrupts = <GIC_SPI 79 IRQ_TYPE_NONE>;
>>> + clock-names =
>>> + "core_clk",
>>> + "master_iface_clk",
>>> + "slave_iface_clk";
>>> + clocks =
>>> + <&mmcc HDMI_APP_CLK>,
>>> + <&mmcc HDMI_M_AHB_CLK>,
>>> + <&mmcc HDMI_S_AHB_CLK>;
>>> + qcom,hdmi-tx-ddc-clk = <&tlmm_pinmux 70
>>> + GPIO_ACTIVE_HIGH>;
>>> + qcom,hdmi-tx-ddc-data = <&tlmm_pinmux 71
>>> + GPIO_ACTIVE_HIGH>;
>>> + qcom,hdmi-tx-hpd = <&tlmm_pinmux 72
>>> + GPIO_ACTIVE_HIGH>;
>>
>> This should be done via the *-gpios method. i.e. hdmi-tx-ddc-clk-gpios,
>> hdmi-tx-ddc-data-gpios, etc.
>>
> Thanks for the inputs,
>
> That's true, These are existing bindings, so I can't change it as part
> of this patch, However I will make another patch to fix this in both
> drivers and DT for good reasons. Just noticed that bindings are not
> consistent with the examples and the driver, which I guess is another
> issue.
Yes, the driver/binding should be fixed and then this patch can be
corrected and applied. There are no implementations of the DT for this
device upstream in the dts directory so there's no breakage or backwards
incompatibility problem by fixing the driver/binding.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
On 10/04/15 21:21, Stephen Boyd wrote:
> On 04/10/15 12:39, Srinivas Kandagatla wrote:
>>
>>
>> On 10/04/15 18:04, Stephen Boyd wrote:
>>> On 04/10/15 05:34, Srinivas Kandagatla wrote:
>>>> @@ -250,6 +265,18 @@
>>>> };
>>>> };
>>>>
>>>> + ext_3p3v: regulator-fixed@1 {
>>>> + compatible = "regulator-fixed";
>>>> + regulator-min-microvolt = <3300000>;
>>>> + regulator-max-microvolt = <3300000>;
>>>> + regulator-name = "ext_3p3v";
>>>> + regulator-type = "voltage";
>>>> + startup-delay-us = <0>;
>>>> + gpio = <&tlmm_pinmux 77 GPIO_ACTIVE_HIGH>;
>>>> + enable-active-high;
>>>> + regulator-boot-on;
>>>> + };
>>>
>>> This shouldn't be inside the SoC node because it doesn't have a reg
>>> property. It should be in a 'regulators' node that's in the root of the
>>> tree:
>>
>> Is this new DT requirement/style? I have not noticed such a dt style
>> in the past. I might have missed it. Any advantage of doing this way?
>
> It's a style. I'm not sure if it's new, but I feel like I've seen
> mention of it before more than a year ago (see
> arch/arm/boot/dts/tegra30-beaver.dts for an example). The advantage of
> doing it this way is we can see all the gpio/fixed regulators in one
> place and they're physically placed on a separate bus from the SoC bus.
> Typically nodes have reg properties too, so making up fake reg
> properties for the regulator nodes when they're on the SoC bus would be
> wrong and confusing. If they're under some regulators container node we
> can number them from 0 to N and use that for the reg property.
>
Thanks for explaining.
>>>
>>>> +
>>>> + hdmi: qcom,hdmi-tx@4a00000 {
>>>> + compatible = "qcom,hdmi-tx-8960";
>>>> + reg-names = "core_physical";
>>>> + reg = <0x04a00000 0x1000>;
>>>> + interrupts = <GIC_SPI 79 IRQ_TYPE_NONE>;
>>>> + clock-names =
>>>> + "core_clk",
>>>> + "master_iface_clk",
>>>> + "slave_iface_clk";
>>>> + clocks =
>>>> + <&mmcc HDMI_APP_CLK>,
>>>> + <&mmcc HDMI_M_AHB_CLK>,
>>>> + <&mmcc HDMI_S_AHB_CLK>;
>>>> + qcom,hdmi-tx-ddc-clk = <&tlmm_pinmux 70
>>>> + GPIO_ACTIVE_HIGH>;
>>>> + qcom,hdmi-tx-ddc-data = <&tlmm_pinmux 71
>>>> + GPIO_ACTIVE_HIGH>;
>>>> + qcom,hdmi-tx-hpd = <&tlmm_pinmux 72
>>>> + GPIO_ACTIVE_HIGH>;
>>>
>>> This should be done via the *-gpios method. i.e. hdmi-tx-ddc-clk-gpios,
>>> hdmi-tx-ddc-data-gpios, etc.
>>>
>> Thanks for the inputs,
>>
>> That's true, These are existing bindings, so I can't change it as part
>> of this patch, However I will make another patch to fix this in both
>> drivers and DT for good reasons. Just noticed that bindings are not
>> consistent with the examples and the driver, which I guess is another
>> issue.
>
> Yes, the driver/binding should be fixed and then this patch can be
> corrected and applied. There are no implementations of the DT for this
> device upstream in the dts directory so there's no breakage or backwards
> incompatibility problem by fixing the driver/binding.
>
Yep, In that case, I should pull this patch out of this series just to
avoid any delays and create a new patchset for fixing bindings + driver
+ DT.
Thanks all for reviewing v2 patches.
Hi Kumar,
Now that the rpm redesign dependency is resolved, If its not too late could you
queue these dt patches for v4.1-rc1 or v4.1-rc2.
I tested these patches on APQ8064 based IFC6410 and CMQS600 board with SATA/USB.
I also rebased these patches on top of your qcom/dt branch.
Thanks,
srini
Changes since v2
* Some cosmetic fixes spotted by Stephen Boyd.
* Rename sata_phy to phy suggested by Stephen Boyd
* Dropped MDP patch to track it in different patchset.
Changes since v1
* Made regulators board specific, as suggested by Bjorn.
* Used correct IRQF flags for rpm, spotted by Bjorn.
* Fixed serial lable to be more appropriate, spotted by Bjorn.
Nicolas Dechesne (2):
ARM: dts: apq8064: Add usb host support to CM QS-600
ARM: dts: apq8064: Add USB OTG support for CM QS-600
Pramod Gurav (1):
ARM: dts: apq8064-ifc6410: Add DT alias for serial port
Srinivas Kandagatla (8):
ARM: dts: apq8064: add RPM regulators support
ARM: dts: apq8064-ifc6410: Add basic regulators
ARM: dts: apq8064: Add usb host support.
ARM: dts: apq8064: Add USB OTG support
ARM: dts: apq8064: Add SATA controller support.
ARM: dts: apq8064-cm-qs600: Add basic regulators.
ARM: dts: apq8064: Move i2c1 pinctrl to apq8064.dtsi
ARM: dts: apq8064: add i2c3 node for panel.
arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 100 ++++++++++++++++
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 136 +++++++++++++++++++--
arch/arm/boot/dts/qcom-apq8064.dtsi | 175 +++++++++++++++++++++++++++-
3 files changed, 402 insertions(+), 9 deletions(-)
--
1.9.1
This patch adds rpm node to apq8064 dt as rpm would be used by other
devices for regulator support.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 6c15112..19629c9 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -276,6 +276,30 @@
#reset-cells = <1>;
};
+ l2cc: clock-controller@2011000 {
+ compatible = "syscon";
+ reg = <0x2011000 0x1000>;
+ };
+
+ rpm@108000 {
+ compatible = "qcom,rpm-apq8064";
+ reg = <0x108000 0x1000>;
+ qcom,ipc = <&l2cc 0x8 2>;
+
+ interrupts = <GIC_SPI 19 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "ack", "err", "wakeup";
+
+ regulators {
+ compatible = "qcom,rpm-pm8921-regulators";
+
+ pm8921_hdmi_switch: hdmi-switch {
+ bias-pull-down;
+ };
+ };
+ };
+
/* Temporary fixed regulator */
vsdcc_fixed: vsdcc-regulator {
compatible = "regulator-fixed";
--
1.9.1
This patch adds support to basic regulators wiredup on IFC6410 board.
All these regulators are tested as part of USB, SATA and HDMI.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 67 ++++++++++++++++++++++++++++++
1 file changed, 67 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index e641001..ca2d7ba 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -23,6 +23,73 @@
};
};
+ rpm@108000 {
+ regulators {
+ vin_lvs1_3_6-supply = <&pm8921_s4>;
+ vin_lvs2-supply = <&pm8921_s1>;
+ vin_lvs4_5_7-supply = <&pm8921_s4>;
+
+ vdd_l1_l2_l12_l18-supply = <&pm8921_s4>;
+ vdd_l24-supply = <&pm8921_s1>;
+ vdd_l25-supply = <&pm8921_s1>;
+ vdd_l26-supply = <&pm8921_s7>;
+ vdd_l27-supply = <&pm8921_s7>;
+ vdd_l28-supply = <&pm8921_s7>;
+
+
+ /* Buck SMPS */
+ pm8921_s1: s1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1225000>;
+ regulator-max-microvolt = <1225000>;
+ qcom,switch-mode-frequency = <3200000>;
+ bias-pull-down;
+ };
+
+ pm8921_s3: s3 {
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1400000>;
+ qcom,switch-mode-frequency = <4800000>;
+ };
+
+ pm8921_s4: s4 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ qcom,switch-mode-frequency = <3200000>;
+ };
+
+ pm8921_s7: s7 {
+ regulator-min-microvolt = <1300000>;
+ regulator-max-microvolt = <1300000>;
+ qcom,switch-mode-frequency = <3200000>;
+ };
+
+ pm8921_l3: l3 {
+ regulator-min-microvolt = <3050000>;
+ regulator-max-microvolt = <3300000>;
+ bias-pull-down;
+ };
+
+ pm8921_l4: l4 {
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1800000>;
+ bias-pull-down;
+ };
+
+ pm8921_l6: l6 {
+ regulator-min-microvolt = <2950000>;
+ regulator-max-microvolt = <2950000>;
+ bias-pull-down;
+ };
+
+ pm8921_l23: l23 {
+ regulator-min-microvolt = <1700000>;
+ regulator-max-microvolt = <1900000>;
+ bias-pull-down;
+ };
+ };
+ };
+
gsbi@12440000 {
status = "okay";
qcom,mode = <GSBI_PROT_I2C>;
--
1.9.1
This patch adds device tree nodes to support two usb hosts on APQ8064
SOC.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 22 ++++++++++++++
arch/arm/boot/dts/qcom-apq8064.dtsi | 47 ++++++++++++++++++++++++++++++
2 files changed, 69 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index ca2d7ba..8fe60fc 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -116,6 +116,28 @@
};
};
+ usb3_phy: phy@12520000 {
+ status = "okay";
+ vddcx-supply = <&pm8921_s3>;
+ v3p3-supply = <&pm8921_l3>;
+ v1p8-supply = <&pm8921_l23>;
+ };
+
+ usb4_phy: phy@12530000 {
+ status = "okay";
+ vddcx-supply = <&pm8921_s3>;
+ v3p3-supply = <&pm8921_l3>;
+ v1p8-supply = <&pm8921_l23>;
+ };
+
+ usb3: usb@12520000 {
+ status = "okay";
+ };
+
+ usb4: usb@12530000 {
+ status = "okay";
+ };
+
amba {
/* eMMC */
sdcc1: sdcc@12400000 {
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 19629c9..99d8e07 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -2,6 +2,7 @@
#include "skeleton.dtsi"
#include <dt-bindings/clock/qcom,gcc-msm8960.h>
+#include <dt-bindings/reset/qcom,gcc-msm8960.h>
#include <dt-bindings/clock/qcom,mmcc-msm8960.h>
#include <dt-bindings/soc/qcom,gsbi.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -300,6 +301,52 @@
};
};
+ usb3_phy: phy@12520000 {
+ compatible = "qcom,usb-otg-ci";
+ reg = <0x12520000 0x400>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_NONE>;
+ status = "disabled";
+ dr_mode = "host";
+
+ clocks = <&gcc USB_HS3_XCVR_CLK>,
+ <&gcc USB_HS3_H_CLK>;
+ clock-names = "core", "iface";
+
+ resets = <&gcc USB_HS3_RESET>;
+ reset-names = "link";
+ };
+
+ usb4_phy: phy@12530000 {
+ compatible = "qcom,usb-otg-ci";
+ reg = <0x12530000 0x400>;
+ interrupts = <GIC_SPI 215 IRQ_TYPE_NONE>;
+ status = "disabled";
+ dr_mode = "host";
+
+ clocks = <&gcc USB_HS4_XCVR_CLK>,
+ <&gcc USB_HS4_H_CLK>;
+ clock-names = "core", "iface";
+
+ resets = <&gcc USB_HS4_RESET>;
+ reset-names = "link";
+ };
+
+ usb3: usb@12520000 {
+ compatible = "qcom,ehci-host";
+ reg = <0x12520000 0x400>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_NONE>;
+ status = "disabled";
+ usb-phy = <&usb3_phy>;
+ };
+
+ usb4: usb@12530000 {
+ compatible = "qcom,ehci-host";
+ reg = <0x12530000 0x400>;
+ interrupts = <GIC_SPI 215 IRQ_TYPE_NONE>;
+ status = "disabled";
+ usb-phy = <&usb4_phy>;
+ };
+
/* Temporary fixed regulator */
vsdcc_fixed: vsdcc-regulator {
compatible = "regulator-fixed";
--
1.9.1
This patch adds USB OTG support on USB1 of APQ8064 SOC.
Tested on IFC6410 with ethernet gadget.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 17 ++++++++++++++++
arch/arm/boot/dts/qcom-apq8064.dtsi | 32 ++++++++++++++++++++++++++++++
2 files changed, 49 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 8fe60fc..122bf34 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -116,6 +116,14 @@
};
};
+ /* OTG */
+ usb1_phy: phy@12500000 {
+ status = "okay";
+ vddcx-supply = <&pm8921_s3>;
+ v3p3-supply = <&pm8921_l3>;
+ v1p8-supply = <&pm8921_l4>;
+ };
+
usb3_phy: phy@12520000 {
status = "okay";
vddcx-supply = <&pm8921_s3>;
@@ -130,6 +138,15 @@
v1p8-supply = <&pm8921_l23>;
};
+ gadget1: gadget@12500000 {
+ status = "okay";
+ };
+
+ /* OTG */
+ usb1: usb@12500000 {
+ status = "okay";
+ };
+
usb3: usb@12520000 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 99d8e07..5aac9a5 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -301,6 +301,21 @@
};
};
+ usb1_phy: phy@12500000 {
+ compatible = "qcom,usb-otg-ci";
+ reg = <0x12500000 0x400>;
+ interrupts = <GIC_SPI 100 IRQ_TYPE_NONE>;
+ status = "disabled";
+ dr_mode = "host";
+
+ clocks = <&gcc USB_HS1_XCVR_CLK>,
+ <&gcc USB_HS1_H_CLK>;
+ clock-names = "core", "iface";
+
+ resets = <&gcc USB_HS1_RESET>;
+ reset-names = "link";
+ };
+
usb3_phy: phy@12520000 {
compatible = "qcom,usb-otg-ci";
reg = <0x12520000 0x400>;
@@ -331,6 +346,23 @@
reset-names = "link";
};
+ gadget1: gadget@12500000 {
+ compatible = "qcom,ci-hdrc";
+ reg = <0x12500000 0x400>;
+ status = "disabled";
+ dr_mode = "peripheral";
+ interrupts = <GIC_SPI 100 IRQ_TYPE_NONE>;
+ usb-phy = <&usb1_phy>;
+ };
+
+ usb1: usb@12500000 {
+ compatible = "qcom,ehci-host";
+ reg = <0x12500000 0x400>;
+ interrupts = <GIC_SPI 100 IRQ_TYPE_NONE>;
+ status = "disabled";
+ usb-phy = <&usb1_phy>;
+ };
+
usb3: usb@12520000 {
compatible = "qcom,ehci-host";
reg = <0x12520000 0x400>;
--
1.9.1
This patch adds AHCI based SATA controller support to APQ8064.
Tested on IFC6410 board.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 9 ++++++++
arch/arm/boot/dts/qcom-apq8064.dtsi | 35 ++++++++++++++++++++++++++++++
2 files changed, 44 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 122bf34..3d96cb8 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -116,6 +116,15 @@
};
};
+ sata_phy0: phy@1b400000 {
+ status = "okay";
+ };
+
+ sata0: sata@29000000 {
+ status = "okay";
+ target-supply = <&pm8921_s4>;
+ };
+
/* OTG */
usb1_phy: phy@12500000 {
status = "okay";
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 5aac9a5..1f900c7 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -379,6 +379,41 @@
usb-phy = <&usb4_phy>;
};
+ sata_phy0: phy@1b400000 {
+ compatible = "qcom,apq8064-sata-phy";
+ status = "disabled";
+ reg = <0x1b400000 0x200>;
+ reg-names = "phy_mem";
+ clocks = <&gcc SATA_PHY_CFG_CLK>;
+ clock-names = "cfg";
+ #phy-cells = <0>;
+ };
+
+ sata0: sata@29000000 {
+ compatible = "generic-ahci";
+ status = "disabled";
+ reg = <0x29000000 0x180>;
+ interrupts = <GIC_SPI 209 IRQ_TYPE_NONE>;
+
+ clocks = <&gcc SFAB_SATA_S_H_CLK>,
+ <&gcc SATA_H_CLK>,
+ <&gcc SATA_A_CLK>,
+ <&gcc SATA_RXOOB_CLK>,
+ <&gcc SATA_PMALIVE_CLK>;
+ clock-names = "slave_iface",
+ "iface",
+ "bus",
+ "rxoob",
+ "core_pmalive";
+
+ assigned-clocks = <&gcc SATA_RXOOB_CLK>,
+ <&gcc SATA_PMALIVE_CLK>;
+ assigned-clock-rates = <100000000>, <100000000>;
+
+ phys = <&sata_phy0>;
+ phy-names = "sata-phy";
+ };
+
/* Temporary fixed regulator */
vsdcc_fixed: vsdcc-regulator {
compatible = "regulator-fixed";
--
1.9.1
This patch adds basic regulator support for USB and HDMI.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 61 +++++++++++++++++++++++++++++
1 file changed, 61 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
index 5d75666..142885d 100644
--- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
@@ -14,6 +14,67 @@
};
};
+ rpm@108000 {
+ regulators {
+ vin_lvs1_3_6-supply = <&pm8921_s4>;
+ vin_lvs2-supply = <&pm8921_s1>;
+ vin_lvs4_5_7-supply = <&pm8921_s4>;
+
+ vdd_l1_l2_l12_l18-supply = <&pm8921_s4>;
+ vdd_l24-supply = <&pm8921_s1>;
+ vdd_l25-supply = <&pm8921_s1>;
+ vdd_l26-supply = <&pm8921_s7>;
+ vdd_l27-supply = <&pm8921_s7>;
+ vdd_l28-supply = <&pm8921_s7>;
+
+
+ /* Buck SMPS */
+ pm8921_s1: s1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1225000>;
+ regulator-max-microvolt = <1225000>;
+ qcom,switch-mode-frequency = <3200000>;
+ bias-pull-down;
+ };
+
+ pm8921_s3: s3 {
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1400000>;
+ qcom,switch-mode-frequency = <4800000>;
+ };
+
+ pm8921_s4: s4 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ qcom,switch-mode-frequency = <3200000>;
+ };
+
+ pm8921_s7: s7 {
+ regulator-min-microvolt = <1300000>;
+ regulator-max-microvolt = <1300000>;
+ qcom,switch-mode-frequency = <3200000>;
+ };
+
+ pm8921_l3: l3 {
+ regulator-min-microvolt = <3050000>;
+ regulator-max-microvolt = <3300000>;
+ bias-pull-down;
+ };
+
+ pm8921_l4: l4 {
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1800000>;
+ bias-pull-down;
+ };
+
+ pm8921_l23: l23 {
+ regulator-min-microvolt = <1700000>;
+ regulator-max-microvolt = <1900000>;
+ bias-pull-down;
+ };
+ };
+ };
+
gsbi@12440000 {
status = "okay";
qcom,mode = <GSBI_PROT_I2C>;
--
1.9.1
From: Nicolas Dechesne <[email protected]>
This patch adds device tree nodes to support two usb hosts on Compulab QS600 board.
Signed-off-by: Srinivas Kandagatla <[email protected]>
[Srinivas Kandagatla: fixed up regulators and status properties]
Signed-off-by: Nicolas Dechesne <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
index 142885d..4eedfe4 100644
--- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
@@ -101,6 +101,28 @@
};
};
+ usb3_phy: phy@12520000 {
+ status = "okay";
+ vddcx-supply = <&pm8921_s3>;
+ v3p3-supply = <&pm8921_l3>;
+ v1p8-supply = <&pm8921_l23>;
+ };
+
+ usb4_phy: phy@12530000 {
+ status = "okay";
+ vddcx-supply = <&pm8921_s3>;
+ v3p3-supply = <&pm8921_l3>;
+ v1p8-supply = <&pm8921_l23>;
+ };
+
+ usb3: usb@12520000 {
+ status = "okay";
+ };
+
+ usb4: usb@12530000 {
+ status = "okay";
+ };
+
amba {
/* eMMC */
sdcc1: sdcc@12400000 {
--
1.9.1
From: Nicolas Dechesne <[email protected]>
This patch adds USB OTG support on USB1 for Compulab QS-600 Board.
Signed-off-by: Srinivas Kandagatla <[email protected]>
[Srinivas Kandagatla: fixed up regulators and status properties]
Signed-off-by: Nicolas Dechesne <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
index 4eedfe4..71512b3 100644
--- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
@@ -101,6 +101,14 @@
};
};
+ /* OTG */
+ usb1_phy: phy@12500000 {
+ status = "okay";
+ vddcx-supply = <&pm8921_s3>;
+ v3p3-supply = <&pm8921_l3>;
+ v1p8-supply = <&pm8921_l4>;
+ };
+
usb3_phy: phy@12520000 {
status = "okay";
vddcx-supply = <&pm8921_s3>;
@@ -115,6 +123,15 @@
v1p8-supply = <&pm8921_l23>;
};
+ gadget1: gadget@12500000 {
+ status = "ok";
+ };
+
+ /* OTG */
+ usb1: usb@12500000 {
+ status = "ok";
+ };
+
usb3: usb@12520000 {
status = "okay";
};
--
1.9.1
From: Pramod Gurav <[email protected]>
Define an alias for serial port present on ifc6410 which is used as
console.
Signed-off-by: Srinivas Kandagatla <[email protected]>
[Srinivas Kandagatla: renamed the serial0 label appropriately]
Signed-off-by: Pramod Gurav <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 4 ++++
arch/arm/boot/dts/qcom-apq8064.dtsi | 3 +--
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 3d96cb8..528cb31 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -5,6 +5,10 @@
model = "Qualcomm APQ8064/IFC6410";
compatible = "qcom,apq8064-ifc6410", "qcom,apq8064";
+ aliases {
+ serial0 = &gsbi7_serial;
+ };
+
soc {
pinctrl@800000 {
i2c1_pins: i2c1 {
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 1f900c7..93de48a 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -236,10 +236,9 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
-
syscon-tcsr = <&tcsr>;
- serial@16640000 {
+ gsbi7_serial: serial@16640000 {
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x16640000 0x1000>,
<0x16600000 0x1000>;
--
1.9.1
I2C1 pinctrl is not really specific to a board, moving to SOC dtsi would
avoid redefining this in every board.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 7 -------
arch/arm/boot/dts/qcom-apq8064.dtsi | 7 +++++++
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 528cb31..f97339a 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -11,13 +11,6 @@
soc {
pinctrl@800000 {
- i2c1_pins: i2c1 {
- mux {
- pins = "gpio20", "gpio21";
- function = "gsbi1";
- };
- };
-
card_detect: card_detect {
mux {
pins = "gpio26";
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 93de48a..345ea08 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -113,6 +113,13 @@
function = "ps_hold";
};
};
+
+ i2c1_pins: i2c1 {
+ mux {
+ pins = "gpio20", "gpio21";
+ function = "gsbi1";
+ };
+ };
};
intc: interrupt-controller@2000000 {
--
1.9.1
This patch adds i2c3 node which is used for panel control on IFC6410.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 10 ++++++++++
arch/arm/boot/dts/qcom-apq8064.dtsi | 27 +++++++++++++++++++++++++++
2 files changed, 37 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index f97339a..a7c939b 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -87,6 +87,16 @@
};
};
+ gsbi3: gsbi@16200000 {
+ status = "okay";
+ qcom,mode = <GSBI_PROT_I2C>;
+ i2c3: i2c@16280000 {
+ status = "okay";
+ pinctrl-0 = <&i2c3_pins>;
+ pinctrl-names = "default";
+ };
+ };
+
gsbi@12440000 {
status = "okay";
qcom,mode = <GSBI_PROT_I2C>;
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 345ea08..df2061e 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -120,6 +120,13 @@
function = "gsbi1";
};
};
+
+ i2c3_pins: i2c3 {
+ mux {
+ pins = "gpio8", "gpio9";
+ function = "gsbi3";
+ };
+ };
};
intc: interrupt-controller@2000000 {
@@ -233,6 +240,26 @@
};
};
+ gsbi3: gsbi@16200000 {
+ status = "disabled";
+ compatible = "qcom,gsbi-v1.0.0";
+ reg = <0x16200000 0x100>;
+ clocks = <&gcc GSBI3_H_CLK>;
+ clock-names = "iface";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ i2c3: i2c@16280000 {
+ compatible = "qcom,i2c-qup-v1.1.1";
+ reg = <0x16280000 0x1000>;
+ interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>;
+ clocks = <&gcc GSBI3_QUP_CLK>,
+ <&gcc GSBI3_H_CLK>;
+ clock-names = "core", "iface";
+ };
+ };
+
gsbi7: gsbi@16600000 {
status = "disabled";
compatible = "qcom,gsbi-v1.0.0";
--
1.9.1
On Fri, Apr 10, 2015 at 4:21 PM, Stephen Boyd <[email protected]> wrote:
>> That's true, These are existing bindings, so I can't change it as part
>> of this patch, However I will make another patch to fix this in both
>> drivers and DT for good reasons. Just noticed that bindings are not
>> consistent with the examples and the driver, which I guess is another
>> issue.
>
> Yes, the driver/binding should be fixed and then this patch can be
> corrected and applied. There are no implementations of the DT for this
> device upstream in the dts directory so there's no breakage or backwards
> incompatibility problem by fixing the driver/binding.
jfyi, some of the current bindings are the way they are to simplify
compatibility w/ downstream kernels which I unfortunately still have
to deal with.. ofc, the sooner I don't have to deal w/ downstream
kernels, the easier it gets to clean up ;-)
ofc, since the number of devices that can run upstream kernel but
don't have upstream dts files is approximately zero, this would be a
case were it would be useful to be able to mark certain bindings as
non-abi and refactor them later.
BR,
-R
On Fri 10 Apr 13:42 PDT 2015, Srinivas Kandagatla wrote:
> This patch adds rpm node to apq8064 dt as rpm would be used by other
> devices for regulator support.
>
> Signed-off-by: Srinivas Kandagatla <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
Regards,
Bjorn
On Fri 10 Apr 13:44 PDT 2015, Srinivas Kandagatla wrote:
> From: Pramod Gurav <[email protected]>
>
> Define an alias for serial port present on ifc6410 which is used as
> console.
>
> Signed-off-by: Srinivas Kandagatla <[email protected]>
> [Srinivas Kandagatla: renamed the serial0 label appropriately]
> Signed-off-by: Pramod Gurav <[email protected]>
> ---
The order of the sobs should be reversed, your name should be last as
you're the last one touching the patch.
Reviewed-by: Bjorn Andersson <[email protected]>
Regards,
Bjorn