Add pl353 static memory controller devicetree binding information.
Signed-off-by: Punnaiah Choudary Kalluri <[email protected]>
---
Changes in v6:
- None
Changes in v5:
- Removed timing properties
Changes in v4:
- none
Changes in v3:
- none
Changes in v2:
- modified timing binding info as per onfi timing parameters
- add suffix nano second as timing unit
- modified the clock names as per the IP spec
---
.../bindings/memory-controllers/pl353-smc.txt | 37 ++++++++++++++++++++
1 files changed, 37 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
diff --git a/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt b/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
new file mode 100644
index 0000000..a868f94
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
@@ -0,0 +1,37 @@
+Device tree bindings for ARM PL353 static memory controller
+
+PL353 static memory controller supports two kinds of memory
+interfaces. i.e NAND and SRAM/NOR interfaces.
+The actual devices are instantiated from the child nodes of pl353 smc node.
+
+Required properties:
+- compatible : Should be "arm,pl353-smc-r2p1"
+- reg : Controller registers map and length.
+- clock-names : List of input clock names - "memclk", "aclk"
+ (See clock bindings for details).
+- clocks : Clock phandles (see clock bindings for details).
+- address-cells : Address cells, must be 1.
+- size-cells : Size cells. Must be 1.
+
+Child nodes:
+ For NAND the "arm,pl353-nand-r2p1" and for NOR the "cfi-flash" drivers are
+supported as child nodes.
+
+for nand partition information please refer the below file
+Documentation/devicetree/bindings/mtd/partition.txt
+
+Example:
+ pl353smcc_0: pl353smcc@e000e000 {
+ compatible = "arm,pl353-smcc-r2p1"
+ clock-names = "memclk", "aclk";
+ clocks = <&clkc 11>, <&clkc 44>;
+ reg = <0xe000e000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ nand_0: nand@e1000000 {
+ compatible = "arm,pl353-nand-r2p1"
+ reg = <0xe1000000 0x1000000>;
+ (...)
+ };
+ };
--
1.7.4
Hey Punnaiah-
A few nitpicks here, in case you'll be spinning up a new version of your
patchset.
On Mon, Apr 13, 2015 at 09:41:51PM +0530, Punnaiah Choudary Kalluri wrote:
> Add pl353 static memory controller devicetree binding information.
>
> Signed-off-by: Punnaiah Choudary Kalluri <[email protected]>
[..]
> @@ -0,0 +1,37 @@
> +Device tree bindings for ARM PL353 static memory controller
> +
> +PL353 static memory controller supports two kinds of memory
> +interfaces. i.e NAND and SRAM/NOR interfaces.
> +The actual devices are instantiated from the child nodes of pl353 smc node.
> +
> +Required properties:
> +- compatible : Should be "arm,pl353-smc-r2p1"
> +- reg : Controller registers map and length.
> +- clock-names : List of input clock names - "memclk", "aclk"
> + (See clock bindings for details).
> +- clocks : Clock phandles (see clock bindings for details).
Technically not clock phandles, but clock specifiers.
> +- address-cells : Address cells, must be 1.
> +- size-cells : Size cells. Must be 1.
These should have the leading '#' as in '#address-cells' and
'#size-cells'.
Josh
Hi Josh,
> -----Original Message-----
> From: Josh Cartwright [mailto:[email protected]]
> Sent: Friday, April 24, 2015 1:21 AM
> To: Punnaiah Choudary Kalluri
> Cc: [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; [email protected];
> Michal Simek; [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; linux-
> [email protected]; [email protected]; [email protected];
> [email protected]; Punnaiah Choudary Kalluri
> Subject: Re: [PATCH v6 1/2] Devicetree: Add pl353 smc controller devicetree
> binding information
>
> Hey Punnaiah-
>
> A few nitpicks here, in case you'll be spinning up a new version of your
> patchset.
>
> On Mon, Apr 13, 2015 at 09:41:51PM +0530, Punnaiah Choudary Kalluri wrote:
> > Add pl353 static memory controller devicetree binding information.
> >
> > Signed-off-by: Punnaiah Choudary Kalluri <[email protected]>
> [..]
> > @@ -0,0 +1,37 @@
> > +Device tree bindings for ARM PL353 static memory controller
> > +
> > +PL353 static memory controller supports two kinds of memory
> > +interfaces. i.e NAND and SRAM/NOR interfaces.
> > +The actual devices are instantiated from the child nodes of pl353 smc
> node.
> > +
> > +Required properties:
> > +- compatible : Should be "arm,pl353-smc-r2p1"
> > +- reg : Controller registers map and length.
> > +- clock-names : List of input clock names - "memclk", "aclk"
> > + (See clock bindings for details).
> > +- clocks : Clock phandles (see clock bindings for details).
>
> Technically not clock phandles, but clock specifiers.
>
> > +- address-cells : Address cells, must be 1.
> > +- size-cells : Size cells. Must be 1.
>
> These should have the leading '#' as in '#address-cells' and
> '#size-cells'.
Thanks for the review. I will take care of them new version
Regards,
Punnaiah
>
> Josh