From: Kan Liang <[email protected]>
The reason of introducing the tracking event (a dummy software event) is
to collect side-band information. Additional sampling is wasteful.
no_aux_samples should be set for tracking event.
Signed-off-by: Kan Liang <[email protected]>
---
Changes since V1
- new patch to set no_aux_samples for the tracking event (jirka)
tools/perf/arch/x86/util/intel-pt.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/perf/arch/x86/util/intel-pt.c b/tools/perf/arch/x86/util/intel-pt.c
index f630de0..4fe1aed 100644
--- a/tools/perf/arch/x86/util/intel-pt.c
+++ b/tools/perf/arch/x86/util/intel-pt.c
@@ -751,6 +751,7 @@ static int intel_pt_recording_options(struct auxtrace_record *itr,
tracking_evsel->attr.freq = 0;
tracking_evsel->attr.sample_period = 1;
+ tracking_evsel->no_aux_samples = true;
if (need_immediate)
tracking_evsel->immediate = true;
--
2.9.4
From: Kan Liang <[email protected]>
An earlier kernel patch allowed enabling PT and LBR at the same time on
Goldmont.
commit ccbebba4c6bf ("perf/x86/intel/pt: Bypass PT vs. LBR exclusivity
if the core supports it")
However, users still cannot use Intel PT and LBRs simultaneously.
$ sudo perf record -e cycles,intel_pt//u -b -- sleep 1
Error:
PMU Hardware doesn't support sampling/overflow-interrupts.
PT implicitly adds dummy event in perf tool. dummy event is software
event which doesn't support LBR.
Always setting no branch for dummy event in Intel PT.
Signed-off-by: Kan Liang <[email protected]>
---
Changes since V1
- change the BRANCH_STACK sample bit directly (jirka)
tools/perf/arch/x86/util/intel-pt.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tools/perf/arch/x86/util/intel-pt.c b/tools/perf/arch/x86/util/intel-pt.c
index 4fe1aed..2201f3b 100644
--- a/tools/perf/arch/x86/util/intel-pt.c
+++ b/tools/perf/arch/x86/util/intel-pt.c
@@ -700,6 +700,7 @@ static int intel_pt_recording_options(struct auxtrace_record *itr,
perf_evsel__set_sample_bit(switch_evsel, TID);
perf_evsel__set_sample_bit(switch_evsel, TIME);
perf_evsel__set_sample_bit(switch_evsel, CPU);
+ perf_evsel__reset_sample_bit(switch_evsel, BRANCH_STACK);
opts->record_switch_events = false;
ptr->have_sched_switch = 3;
@@ -761,6 +762,7 @@ static int intel_pt_recording_options(struct auxtrace_record *itr,
/* And the CPU for switch events */
perf_evsel__set_sample_bit(tracking_evsel, CPU);
}
+ perf_evsel__reset_sample_bit(tracking_evsel, BRANCH_STACK);
}
/*
--
2.9.4
On Fri, Jun 30, 2017 at 10:16:56AM -0400, [email protected] wrote:
> From: Kan Liang <[email protected]>
>
> An earlier kernel patch allowed enabling PT and LBR at the same time on
> Goldmont.
>
> commit ccbebba4c6bf ("perf/x86/intel/pt: Bypass PT vs. LBR exclusivity
> if the core supports it")
>
> However, users still cannot use Intel PT and LBRs simultaneously.
> $ sudo perf record -e cycles,intel_pt//u -b -- sleep 1
> Error:
> PMU Hardware doesn't support sampling/overflow-interrupts.
>
> PT implicitly adds dummy event in perf tool. dummy event is software
> event which doesn't support LBR.
>
> Always setting no branch for dummy event in Intel PT.
>
> Signed-off-by: Kan Liang <[email protected]>
for the patchset:
Acked-by: Jiri Olsa <[email protected]>
thanks,
jirka
Em Mon, Jul 03, 2017 at 09:58:32AM +0200, Jiri Olsa escreveu:
> On Fri, Jun 30, 2017 at 10:16:56AM -0400, [email protected] wrote:
> > From: Kan Liang <[email protected]>
> >
> > An earlier kernel patch allowed enabling PT and LBR at the same time on
> > Goldmont.
> >
> > commit ccbebba4c6bf ("perf/x86/intel/pt: Bypass PT vs. LBR exclusivity
> > if the core supports it")
> >
> > However, users still cannot use Intel PT and LBRs simultaneously.
> > $ sudo perf record -e cycles,intel_pt//u -b -- sleep 1
> > Error:
> > PMU Hardware doesn't support sampling/overflow-interrupts.
> >
> > PT implicitly adds dummy event in perf tool. dummy event is software
> > event which doesn't support LBR.
> >
> > Always setting no branch for dummy event in Intel PT.
> >
> > Signed-off-by: Kan Liang <[email protected]>
>
> for the patchset:
>
> Acked-by: Jiri Olsa <[email protected]>
Thanks, applied.
- Arnaldo
> Em Mon, Jul 03, 2017 at 09:58:32AM +0200, Jiri Olsa escreveu:
> > On Fri, Jun 30, 2017 at 10:16:56AM -0400, [email protected] wrote:
> > > From: Kan Liang <[email protected]>
> > >
> > > An earlier kernel patch allowed enabling PT and LBR at the same time
> > > on Goldmont.
> > >
> > > commit ccbebba4c6bf ("perf/x86/intel/pt: Bypass PT vs. LBR
> > > exclusivity if the core supports it")
> > >
> > > However, users still cannot use Intel PT and LBRs simultaneously.
> > > $ sudo perf record -e cycles,intel_pt//u -b -- sleep 1
> > > Error:
> > > PMU Hardware doesn't support sampling/overflow-interrupts.
> > >
> > > PT implicitly adds dummy event in perf tool. dummy event is software
> > > event which doesn't support LBR.
> > >
> > > Always setting no branch for dummy event in Intel PT.
> > >
> > > Signed-off-by: Kan Liang <[email protected]>
> >
> > for the patchset:
> >
> > Acked-by: Jiri Olsa <[email protected]>
>
> Thanks, applied.
>
Hi Arnaldo,
The patch series looks miss the latest update.
Could you please have a look?
Thanks,
Kan
Em Wed, Jul 19, 2017 at 02:28:26PM +0000, Liang, Kan escreveu:
>
>
> > Em Mon, Jul 03, 2017 at 09:58:32AM +0200, Jiri Olsa escreveu:
> > > On Fri, Jun 30, 2017 at 10:16:56AM -0400, [email protected] wrote:
> > > > From: Kan Liang <[email protected]>
> > > >
> > > > An earlier kernel patch allowed enabling PT and LBR at the same time
> > > > on Goldmont.
> > > >
> > > > commit ccbebba4c6bf ("perf/x86/intel/pt: Bypass PT vs. LBR
> > > > exclusivity if the core supports it")
> > > >
> > > > However, users still cannot use Intel PT and LBRs simultaneously.
> > > > $ sudo perf record -e cycles,intel_pt//u -b -- sleep 1
> > > > Error:
> > > > PMU Hardware doesn't support sampling/overflow-interrupts.
> > > >
> > > > PT implicitly adds dummy event in perf tool. dummy event is software
> > > > event which doesn't support LBR.
> > > >
> > > > Always setting no branch for dummy event in Intel PT.
> > > >
> > > > Signed-off-by: Kan Liang <[email protected]>
> > >
> > > for the patchset:
> > >
> > > Acked-by: Jiri Olsa <[email protected]>
> >
> > Thanks, applied.
> >
>
> Hi Arnaldo,
>
> The patch series looks miss the latest update.
> Could you please have a look?
Will, check, thanks for verifying.
- Arnaldo
Commit-ID: 69d8bd8aa7d8906a1e922ae884d97f0bd7f1b269
Gitweb: http://git.kernel.org/tip/69d8bd8aa7d8906a1e922ae884d97f0bd7f1b269
Author: Kan Liang <[email protected]>
AuthorDate: Fri, 30 Jun 2017 10:16:55 -0400
Committer: Arnaldo Carvalho de Melo <[email protected]>
CommitDate: Thu, 20 Jul 2017 09:55:50 -0300
perf intel-pt: Set no_aux_samples for the tracking event
The reason of introducing the tracking event (a dummy software event) is
to collect side-band information. Additional sampling is wasteful.
no_aux_samples should be set for tracking event.
Signed-off-by: Kan Liang <[email protected]>
Acked-by: Jiri Olsa <[email protected]>
Cc: Adrian Hunter <[email protected]>
Cc: Alexander Shishkin <[email protected]>
Cc: Andi Kleen <[email protected]>
Cc: Peter Zijlstra <[email protected]>
Link: http://lkml.kernel.org/r/[email protected]
Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
---
tools/perf/arch/x86/util/intel-pt.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/perf/arch/x86/util/intel-pt.c b/tools/perf/arch/x86/util/intel-pt.c
index 9535be5..4a461e8 100644
--- a/tools/perf/arch/x86/util/intel-pt.c
+++ b/tools/perf/arch/x86/util/intel-pt.c
@@ -752,6 +752,7 @@ static int intel_pt_recording_options(struct auxtrace_record *itr,
tracking_evsel->attr.freq = 0;
tracking_evsel->attr.sample_period = 1;
+ tracking_evsel->no_aux_samples = true;
if (need_immediate)
tracking_evsel->immediate = true;
Commit-ID: 91a8c5b840f2da31280e14b6268761cf14033756
Gitweb: http://git.kernel.org/tip/91a8c5b840f2da31280e14b6268761cf14033756
Author: Kan Liang <[email protected]>
AuthorDate: Fri, 30 Jun 2017 10:16:56 -0400
Committer: Arnaldo Carvalho de Melo <[email protected]>
CommitDate: Thu, 20 Jul 2017 09:55:51 -0300
perf intel-pt: Always set no branch for dummy event
An earlier kernel patch allowed enabling PT and LBR at the same time on
Goldmont.
commit ccbebba4c6bf ("perf/x86/intel/pt: Bypass PT vs. LBR exclusivity
if the core supports it")
However, users still cannot use Intel PT and LBRs simultaneously. $
sudo perf record -e cycles,intel_pt//u -b -- sleep 1 Error: PMU
Hardware doesn't support sampling/overflow-interrupts.
PT implicitly adds dummy event in perf tool. dummy event is software
event which doesn't support LBR.
Always setting no branch for dummy event in Intel PT.
Signed-off-by: Kan Liang <[email protected]>
Acked-by: Jiri Olsa <[email protected]>
Cc: Adrian Hunter <[email protected]>
Cc: Alexander Shishkin <[email protected]>
Cc: Andi Kleen <[email protected]>
Cc: Peter Zijlstra <[email protected]>
Link: http://lkml.kernel.org/r/[email protected]
Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
---
tools/perf/arch/x86/util/intel-pt.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tools/perf/arch/x86/util/intel-pt.c b/tools/perf/arch/x86/util/intel-pt.c
index 4a461e8..db0ba8c 100644
--- a/tools/perf/arch/x86/util/intel-pt.c
+++ b/tools/perf/arch/x86/util/intel-pt.c
@@ -701,6 +701,7 @@ static int intel_pt_recording_options(struct auxtrace_record *itr,
perf_evsel__set_sample_bit(switch_evsel, TID);
perf_evsel__set_sample_bit(switch_evsel, TIME);
perf_evsel__set_sample_bit(switch_evsel, CPU);
+ perf_evsel__reset_sample_bit(switch_evsel, BRANCH_STACK);
opts->record_switch_events = false;
ptr->have_sched_switch = 3;
@@ -762,6 +763,7 @@ static int intel_pt_recording_options(struct auxtrace_record *itr,
/* And the CPU for switch events */
perf_evsel__set_sample_bit(tracking_evsel, CPU);
}
+ perf_evsel__reset_sample_bit(tracking_evsel, BRANCH_STACK);
}
/*