Add initial DT support for NanoPi NEO Plus2 by FriendlyARM
Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
1 GB DDR3 RAM
8GB eMMC flash (Samsung KLM8G1WEPD-B031)
micro SD card slot
Gigabit Ethernet (external RTL8211E-VB-CG chip)
802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
2x USB 2.0 host ports & 2x USB via headers
The DTS is based on OrangePi PC 2, sun50i-h5-orangepi-pc2
Added dwmac-sun8i Gigabit Ethernet support based on
Nano Pi Neo2 DT and the schematics.
Signed-off-by: Antony Antony <[email protected]>
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts | 262 +++++++++++++++++++++
2 files changed, 263 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
---
Changes
v1 -> v2
add wifi power controller, mmc1, mmc2
remove reg_usb0_vbus
v2 -> v3
fix typo s/orangepi/nanopi/, s/pus/plus/
usb_otg set to host mode
wifi fix, based on commit 442e1f7e brcm,bcm43xx-fmac.txt
remove functions on header pins: spi, ir, ehci 1&2, ohci 1&2, uart 1&2
remove hdmi, de2, r-gpio-keys, mixer - not supported the board
v3->v4 update WiFi chip compatible to bcm43430-fmac
v4->v5 back to bcm4329-fmac bcm43430-fmac is the wrong way.
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 108f12c..e6810c8 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
new file mode 100644
index 0000000..a6687db
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
@@ -0,0 +1,262 @@
+/*
+ * Copyright (C) 2017 Antony Antony <[email protected]>
+ * Copyright (C) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "FriendlyARM NanoPi NEO Plus2";
+ compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5";
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ pwr {
+ label = "nanopi:green:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ status {
+ label = "nanopi:red:status";
+ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac_power_pin_nanopi>;
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&vdd_cpux_r_npi>;
+
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_en_npi>;
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ post-power-on-delay-ms = <200>;
+ };
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <®_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+ status = "okay";
+};
+
+&mdio {
+ ext_rgmii_phy: ethernet-phy@7 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ };
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins_a>;
+ vmmc-supply = <®_vcc3v3>;
+ vqmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ boot_device = <0>;
+ status = "okay";
+
+ /*
+ * AMPAK AP6212A WiFi module with BCM43430, rev=1 inside
+ * sdio vendor ID: 0x02d0, sdio device ID: 0xa9a6
+ * There is no specific Documentation: dt-binding for BCM43430
+ * brcm,bcm4329-fmac compatible can initialize this module
+ */
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ boot_device = <0>;
+ status = "okay";
+};
+
+&mmc2_8bit_pins {
+ /* Increase drive strength for DDR modes */
+ drive-strength = <40>;
+ /* eMMC is missing pull-ups */
+ bias-pull-up;
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&pio {
+ leds_npi: led_pins@0 {
+ pins = "PA10";
+ function = "gpio_out";
+ };
+ gmac_power_pin_nanopi: gmac_power_pin@0 {
+ pins = "PD6";
+ function = "gpio_out";
+ };
+};
+
+&r_pio {
+ leds_r_npi: led_pins@0 {
+ pins = "PL10";
+ function = "gpio_out";
+ };
+
+ vdd_cpux_r_npi: regulator_pins@0 {
+ allwinner,pins = "PL6";
+ allwinner,function = "gpio_out";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ wifi_en_npi: wifi_en_pin {
+ pins = "PL7";
+ function = "gpio_out";
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ /* USB Type-A ports' VBUS is always on */
+ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+ status = "okay";
+};
--
2.9.3
Hi,
On Wed, Aug 30, 2017 at 02:50:57PM +0200, Antony Antony wrote:
> Add initial DT support for NanoPi NEO Plus2 by FriendlyARM
> Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
> 1 GB DDR3 RAM
> 8GB eMMC flash (Samsung KLM8G1WEPD-B031)
> micro SD card slot
> Gigabit Ethernet (external RTL8211E-VB-CG chip)
> 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
> 2x USB 2.0 host ports & 2x USB via headers
This indendation is weird
> The DTS is based on OrangePi PC 2, sun50i-h5-orangepi-pc2
> Added dwmac-sun8i Gigabit Ethernet support based on
> Nano Pi Neo2 DT and the schematics.
And that's outdated.
> Signed-off-by: Antony Antony <[email protected]>
> ---
> arch/arm64/boot/dts/allwinner/Makefile | 1 +
> .../dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts | 262 +++++++++++++++++++++
> 2 files changed, 263 insertions(+)
> create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
>
> ---
> Changes
> v1 -> v2
> add wifi power controller, mmc1, mmc2
> remove reg_usb0_vbus
> v2 -> v3
> fix typo s/orangepi/nanopi/, s/pus/plus/
> usb_otg set to host mode
> wifi fix, based on commit 442e1f7e brcm,bcm43xx-fmac.txt
> remove functions on header pins: spi, ir, ehci 1&2, ohci 1&2, uart 1&2
> remove hdmi, de2, r-gpio-keys, mixer - not supported the board
> v3->v4 update WiFi chip compatible to bcm43430-fmac
> v4->v5 back to bcm4329-fmac bcm43430-fmac is the wrong way.
>
> diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
> index 108f12c..e6810c8 100644
> --- a/arch/arm64/boot/dts/allwinner/Makefile
> +++ b/arch/arm64/boot/dts/allwinner/Makefile
> @@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
> +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
>
> always := $(dtb-y)
> subdir-y := $(dts-dirs)
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
> new file mode 100644
> index 0000000..a6687db
> --- /dev/null
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
> @@ -0,0 +1,262 @@
> +/*
> + * Copyright (C) 2017 Antony Antony <[email protected]>
> + * Copyright (C) 2016 ARM Ltd.
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License, or (at your option) any later version.
> + *
> + * This file is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +#include "sun50i-h5.dtsi"
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/pinctrl/sun4i-a10.h>
> +
> +/ {
> + model = "FriendlyARM NanoPi NEO Plus2";
> + compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5";
> +
> + reg_vcc3v3: vcc3v3 {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc3v3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +
> + aliases {
> + ethernet0 = &emac;
> + serial0 = &uart0;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + pwr {
> + label = "nanopi:green:pwr";
> + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
> + default-state = "on";
> + };
> +
> + status {
> + label = "nanopi:red:status";
> + gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
> + };
> + };
> +
> + reg_gmac_3v3: gmac-3v3 {
> + compatible = "regulator-fixed";
> + pinctrl-names = "default";
> + pinctrl-0 = <&gmac_power_pin_nanopi>;
> + regulator-name = "gmac-3v3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + startup-delay-us = <100000>;
> + enable-active-high;
> + gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
> + };
> +
> + vdd_cpux: gpio-regulator {
> + compatible = "regulator-gpio";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&vdd_cpux_r_npi>;
> +
> + regulator-name = "vdd-cpux";
> + regulator-type = "voltage";
> + regulator-boot-on;
> + regulator-always-on;
> + regulator-min-microvolt = <1100000>;
> + regulator-max-microvolt = <1300000>;
> + regulator-ramp-delay = <50>; /* 4ms */
> +
> + gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
> + gpios-states = <0x1>;
> + states = <1100000 0x0
> + 1300000 0x1>;
> + };
> +
> + wifi_pwrseq: wifi_pwrseq {
> + compatible = "mmc-pwrseq-simple";
> + pinctrl-names = "default";
> + pinctrl-0 = <&wifi_en_npi>;
> + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
> + post-power-on-delay-ms = <200>;
> + };
You should order these nodes alphabetically.
> +&codec {
> + allwinner,audio-routing =
> + "Line Out", "LINEOUT",
> + "MIC1", "Mic",
> + "Mic", "MBIAS";
> + status = "okay";
> +};
> +
> +&ehci0 {
> + status = "okay";
> +};
> +
> +&ehci3 {
> + status = "okay";
> +};
> +
> +&emac {
> + pinctrl-names = "default";
> + pinctrl-0 = <&emac_rgmii_pins>;
> + phy-supply = <®_gmac_3v3>;
> + phy-handle = <&ext_rgmii_phy>;
> + phy-mode = "rgmii";
> + status = "okay";
> +};
> +
> +&mdio {
> + ext_rgmii_phy: ethernet-phy@7 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <7>;
> + };
> +};
This will not compile.
> +&mmc0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
> + vmmc-supply = <®_vcc3v3>;
> + bus-width = <4>;
> + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
> + status = "okay";
> +};
> +
> +&mmc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc1_pins_a>;
> + vmmc-supply = <®_vcc3v3>;
> + vqmmc-supply = <®_vcc3v3>;
> + mmc-pwrseq = <&wifi_pwrseq>;
> + bus-width = <4>;
> + non-removable;
> + boot_device = <0>;
This property is not documented anywhere, I'm not sure what it's here
for.
> + status = "okay";
> +
> + /*
> + * AMPAK AP6212A WiFi module with BCM43430, rev=1 inside
> + * sdio vendor ID: 0x02d0, sdio device ID: 0xa9a6
> + * There is no specific Documentation: dt-binding for BCM43430
> + * brcm,bcm4329-fmac compatible can initialize this module
> + */
This is not really relevant.
> + brcmf: wifi@1 {
> + reg = <1>;
> + compatible = "brcm,bcm4329-fmac";
> + };
> +};
> +
> +&mmc2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc2_8bit_pins>;
> + vmmc-supply = <®_vcc3v3>;
> + bus-width = <8>;
> + non-removable;
> + cap-mmc-hw-reset;
> + boot_device = <0>;
> + status = "okay";
> +};
> +
> +&mmc2_8bit_pins {
> + /* Increase drive strength for DDR modes */
> + drive-strength = <40>;
It's very likely that you actually don't need 40mA
> + /* eMMC is missing pull-ups */
> + bias-pull-up;
> +};
And that one is already here by default.
> +&ohci0 {
> + status = "okay";
> +};
> +
> +&ohci3 {
> + status = "okay";
> +};
> +
> +&pio {
> + leds_npi: led_pins@0 {
> + pins = "PA10";
> + function = "gpio_out";
> + };
> + gmac_power_pin_nanopi: gmac_power_pin@0 {
> + pins = "PD6";
> + function = "gpio_out";
> + };
> +};
You don't need these nodes
> +
> +&r_pio {
> + leds_r_npi: led_pins@0 {
> + pins = "PL10";
> + function = "gpio_out";
> + };
> +
> + vdd_cpux_r_npi: regulator_pins@0 {
> + allwinner,pins = "PL6";
> + allwinner,function = "gpio_out";
> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> + };
> +
> + wifi_en_npi: wifi_en_pin {
> + pins = "PL7";
> + function = "gpio_out";
> + };
> +};
Or those.
> +
> +&uart0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart0_pins_a>;
> + status = "okay";
> +};
> +
> +&usb_otg {
> + dr_mode = "host";
> + status = "okay";
> +};
> +
> +&usbphy {
> + /* USB Type-A ports' VBUS is always on */
> + usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
If it has an ID-detect pin, then it's not a host-only USB OTG
controller. dr_mode should be set to otg.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
Hi Maxime
Thanks for the review. I will send a PATCH v6 soon.
On Thu, Aug 31, 2017 at 04:58:59PM +0200, Maxime Ripard wrote:
> Hi,
>
> On Wed, Aug 30, 2017 at 02:50:57PM +0200, Antony Antony wrote:
> > Add initial DT support for NanoPi NEO Plus2 by FriendlyARM
> > Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
> > 1 GB DDR3 RAM
> > 8GB eMMC flash (Samsung KLM8G1WEPD-B031)
> > micro SD card slot
> > Gigabit Ethernet (external RTL8211E-VB-CG chip)
> > 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
> > 2x USB 2.0 host ports & 2x USB via headers
>
> This indendation is weird
I will fix it.
> > The DTS is based on OrangePi PC 2, sun50i-h5-orangepi-pc2
> > Added dwmac-sun8i Gigabit Ethernet support based on
> > Nano Pi Neo2 DT and the schematics.
>
> And that's outdated.
Now I am glad to delete it.
> > + wifi_pwrseq: wifi_pwrseq {
> > + compatible = "mmc-pwrseq-simple";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&wifi_en_npi>;
> > + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
> > + post-power-on-delay-ms = <200>;
> > + };
>
> You should order these nodes alphabetically.
good point I did.
> > +&codec {
> > + allwinner,audio-routing =
> > + "Line Out", "LINEOUT",
> > + "MIC1", "Mic",
> > + "Mic", "MBIAS";
> > + status = "okay";
> > +};
> > +
> > +&ehci0 {
> > + status = "okay";
> > +};
> > +
> > +&ehci3 {
> > + status = "okay";
> > +};
> > +
> > +&emac {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&emac_rgmii_pins>;
> > + phy-supply = <®_gmac_3v3>;
> > + phy-handle = <&ext_rgmii_phy>;
> > + phy-mode = "rgmii";
> > + status = "okay";
> > +};
> > +
> > +&mdio {
> > + ext_rgmii_phy: ethernet-phy@7 {
> > + compatible = "ethernet-phy-ieee802.3-c22";
> > + reg = <7>;
> > + };
> > +};
>
> This will not compile.
I don't understand you, because, v5 file compiled for me. Here is output
from running system, just the relevant part. using dtc -I fs
/proc/device-tree
ext_rgmii_phy = "/soc/ethernet@1c30000/mdio/ethernet-phy@7";
ethernet@1c30000 {
mdio {
..
ethernet-phy@7 {
compatible = "ethernet-phy-ieee802.3-c22";
phandle = <0x1c>;
reg = <0x7>;
linux,phandle = <0x1c>;
};
};
Is this what you expect?
> > +&mmc1 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&mmc1_pins_a>;
> > + vmmc-supply = <®_vcc3v3>;
> > + vqmmc-supply = <®_vcc3v3>;
> > + mmc-pwrseq = <&wifi_pwrseq>;
> > + bus-width = <4>;
> > + non-removable;
> > + boot_device = <0>;
>
> This property is not documented anywhere, I'm not sure what it's here
> for.
boot_device is deleted. A u-boot property got mixed up in kernel DT.
> > + status = "okay";
> > +
> > + /*
> > + * AMPAK AP6212A WiFi module with BCM43430, rev=1 inside
> > + * sdio vendor ID: 0x02d0, sdio device ID: 0xa9a6
> > + * There is no specific Documentation: dt-binding for BCM43430
> > + * brcm,bcm4329-fmac compatible can initialize this module
> > + */
>
> This is not really relevant.
would you prefer no comment or a rewrite? How does this look?
/*
* AMPAK AP6212A WiFi module with BCM43430, rev=1 inside
* sdio vendor ID: 0x02d0, sdio device ID: 0xa9a6
*/
I am afraid a casual reader would think "brcm,bcm4329-fmac" is wrong,
because that is not the actual chip inside the module.
> > + brcmf: wifi@1 {
> > + reg = <1>;
> > + compatible = "brcm,bcm4329-fmac";
> > + };
> > +};
> > +
> > +&mmc2 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&mmc2_8bit_pins>;
> > + vmmc-supply = <®_vcc3v3>;
> > + bus-width = <8>;
> > + non-removable;
> > + cap-mmc-hw-reset;
> > + boot_device = <0>;
> > + status = "okay";
> > +};
> > +
> > +&mmc2_8bit_pins {
> > + /* Increase drive strength for DDR modes */
> > + drive-strength = <40>;
>
> It's very likely that you actually don't need 40mA
drive-strength and the node mmc2_8bit_pins are gone. When I removed it
drive-strength = <0x1e>; seems the default. And eMMC seems to work when
booting from Micro SD.
NOTE: the 40mA came from a vresion of vendor's old dts file and I also
noticed the same value is used in other dts in kernel e.g
sun8i-h3-orangepi-plus.dts, sun9i-a80-cubieboard4.dts
It could be a copy paste error or those boards need it. Anyway I removed it.
> > + /* eMMC is missing pull-ups */
> > + bias-pull-up;
> > +};
>
> And that one is already here by default.
good, deleteed.
>
> > +&ohci0 {
> > + status = "okay";
> > +};
> > +
> > +&ohci3 {
> > + status = "okay";
> > +};
> > +
> > +&pio {
> > + leds_npi: led_pins@0 {
> > + pins = "PA10";
> > + function = "gpio_out";
> > + };
> > + gmac_power_pin_nanopi: gmac_power_pin@0 {
> > + pins = "PD6";
> > + function = "gpio_out";
> > + };
> > +};
>
> You don't need these nodes
&pio { } and gmac_power_pin_nanopi{} are deleted.
along with
pinctrl-0 = <&gmac_power_pin_nanopi>;
> > +
> > +&r_pio {
> > + leds_r_npi: led_pins@0 {
> > + pins = "PL10";
> > + function = "gpio_out";
> > + };
> > +
> > + vdd_cpux_r_npi: regulator_pins@0 {
> > + allwinner,pins = "PL6";
> > + allwinner,function = "gpio_out";
> > + allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> > + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> > + };
> > +
> > + wifi_en_npi: wifi_en_pin {
> > + pins = "PL7";
> > + function = "gpio_out";
> > + };
> > +};
>
> Or those.
deleted wifi_en_npi.
>
> > +
> > +&uart0 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&uart0_pins_a>;
> > + status = "okay";
> > +};
> > +
> > +&usb_otg {
> > + dr_mode = "host";
> > + status = "okay";
> > +};
> > +
> > +&usbphy {
> > + /* USB Type-A ports' VBUS is always on */
> > + usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
>
> If it has an ID-detect pin, then it's not a host-only USB OTG
> controller. dr_mode should be set to otga
good point. I don't see an ID-detect connected in the schematic. The
previous generation had.
I will leave
&usb_otg {
dr_mode = "host";
status = "okay";
};
&usbphy {
/* USB Type-A ports' VBUS is always on */
status = "okay";
};
Wow, a nice cleanup.
I am surprised defaults works well and thanks for pointing these out.
-antony
Hi Antony,
On Fri, Sep 01, 2017 at 12:53:13PM +0200, Antony Antony wrote:
> > > +&emac {
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <&emac_rgmii_pins>;
> > > + phy-supply = <®_gmac_3v3>;
> > > + phy-handle = <&ext_rgmii_phy>;
> > > + phy-mode = "rgmii";
> > > + status = "okay";
> > > +};
> > > +
> > > +&mdio {
> > > + ext_rgmii_phy: ethernet-phy@7 {
> > > + compatible = "ethernet-phy-ieee802.3-c22";
> > > + reg = <7>;
> > > + };
> > > +};
> >
> > This will not compile.
>
> I don't understand you, because, v5 file compiled for me. Here is output
> from running system, just the relevant part. using dtc -I fs
> /proc/device-tree
>
> ext_rgmii_phy = "/soc/ethernet@1c30000/mdio/ethernet-phy@7";
>
> ethernet@1c30000 {
> mdio {
> ..
> ethernet-phy@7 {
> compatible = "ethernet-phy-ieee802.3-c22";
> phandle = <0x1c>;
> reg = <0x7>;
> linux,phandle = <0x1c>;
> };
> };
>
> Is this what you expect?
The bindings have been reverted recently, so if you based your work on
a version between 4.13-rc1 and 4.13-rc6 it will work, but anything
more recent will not compile anymore.
> > > + status = "okay";
> > > +
> > > + /*
> > > + * AMPAK AP6212A WiFi module with BCM43430, rev=1 inside
> > > + * sdio vendor ID: 0x02d0, sdio device ID: 0xa9a6
> > > + * There is no specific Documentation: dt-binding for BCM43430
> > > + * brcm,bcm4329-fmac compatible can initialize this module
> > > + */
> >
> > This is not really relevant.
>
> would you prefer no comment or a rewrite? How does this look?
>
> /*
> * AMPAK AP6212A WiFi module with BCM43430, rev=1 inside
> * sdio vendor ID: 0x02d0, sdio device ID: 0xa9a6
> */
>
> I am afraid a casual reader would think "brcm,bcm4329-fmac" is wrong,
> because that is not the actual chip inside the module.
No comment is fine, and I'm not sure the casual reader will ever read
this :)
> > > +&mmc2_8bit_pins {
> > > + /* Increase drive strength for DDR modes */
> > > + drive-strength = <40>;
> >
> > It's very likely that you actually don't need 40mA
>
> drive-strength and the node mmc2_8bit_pins are gone. When I removed it
> drive-strength = <0x1e>; seems the default. And eMMC seems to work when
> booting from Micro SD.
Yes, we set the specs default in the DTSI. 40mA is above what the spec
requires, so not a big deal, but useless.
> NOTE: the 40mA came from a vresion of vendor's old dts file and I also
> noticed the same value is used in other dts in kernel e.g
> sun8i-h3-orangepi-plus.dts, sun9i-a80-cubieboard4.dts
> It could be a copy paste error or those boards need it. Anyway I removed it.
And we used to let that in before yes, so there might be some places
where it's left.
Feel free to clean them up if you feel bored :)
> > > +&usb_otg {
> > > + dr_mode = "host";
> > > + status = "okay";
> > > +};
> > > +
> > > +&usbphy {
> > > + /* USB Type-A ports' VBUS is always on */
> > > + usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
> >
> > If it has an ID-detect pin, then it's not a host-only USB OTG
> > controller. dr_mode should be set to otga
>
> good point. I don't see an ID-detect connected in the schematic. The
> previous generation had.
>
> I will leave
> &usb_otg {
> dr_mode = "host";
> status = "okay";
> };
>
> &usbphy {
> /* USB Type-A ports' VBUS is always on */
> status = "okay";
> };
Looking at the schematics, it seems that the micro USB isn't even
wired to a bus but is only used to power the board. If so, you can
even remove the usb_otg node.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
Hi Maxime,
On Mon, Sep 04, 2017 at 10:27:32AM +0200, Maxime Ripard wrote:
> On Fri, Sep 01, 2017 at 12:53:13PM +0200, Antony Antony wrote:
> > > > +&emac {
> > > > + pinctrl-names = "default";
> > > > + pinctrl-0 = <&emac_rgmii_pins>;
> > > > + phy-supply = <®_gmac_3v3>;
> > > > + phy-handle = <&ext_rgmii_phy>;
> > > > + phy-mode = "rgmii";
> > > > + status = "okay";
> > > > +};
> > > > +
> > > > +&mdio {
> > > > + ext_rgmii_phy: ethernet-phy@7 {
> > > > + compatible = "ethernet-phy-ieee802.3-c22";
> > > > + reg = <7>;
> > > > + };
> > > > +};
> > >
> > > This will not compile.
> >
> > I don't understand you, because, v5 file compiled for me. Here is output
> > from running system, just the relevant part. using dtc -I fs
> > /proc/device-tree
> >
> > ext_rgmii_phy = "/soc/ethernet@1c30000/mdio/ethernet-phy@7";
> >
> > ethernet@1c30000 {
> > mdio {
> > ..
> > ethernet-phy@7 {
> > compatible = "ethernet-phy-ieee802.3-c22";
> > phandle = <0x1c>;
> > reg = <0x7>;
> > linux,phandle = <0x1c>;
> > };
> > };
> >
> > Is this what you expect?
>
> The bindings have been reverted recently, so if you based your work on
> a version between 4.13-rc1 and 4.13-rc6 it will work, but anything
> more recent will not compile anymore.
I deleted emc and related node.
I see. I hope stmmac: sun8i come back soon. It works well well on this
board, running 4.13-rc6
> > > > + status = "okay";
> > > > +
> > > > + /*
> > > > + * AMPAK AP6212A WiFi module with BCM43430, rev=1 inside
> > > > + * sdio vendor ID: 0x02d0, sdio device ID: 0xa9a6
> > > > + * There is no specific Documentation: dt-binding for BCM43430
> > > > + * brcm,bcm4329-fmac compatible can initialize this module
> > > > + */
> > >
> > > This is not really relevant.
> >
> > would you prefer no comment or a rewrite? How does this look?
> >
> > /*
> > * AMPAK AP6212A WiFi module with BCM43430, rev=1 inside
> > * sdio vendor ID: 0x02d0, sdio device ID: 0xa9a6
> > */
> >
> > I am afraid a casual reader would think "brcm,bcm4329-fmac" is wrong,
> > because that is not the actual chip inside the module.
>
> No comment is fine, and I'm not sure the casual reader will ever read
> this :)
Deleted.
> > > > +&usb_otg {
> > > > + dr_mode = "host";
> > > > + status = "okay";
> > > > +};
> > > > +
> > > > +&usbphy {
> > > > + /* USB Type-A ports' VBUS is always on */
> > > > + usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
> > >
> > > If it has an ID-detect pin, then it's not a host-only USB OTG
> > > controller. dr_mode should be set to otga
> >
> > good point. I don't see an ID-detect connected in the schematic. The
> > previous generation had.
> >
> > I will leave
> > &usb_otg {
> > dr_mode = "host";
> > status = "okay";
> > };
> >
> > &usbphy {
> > /* USB Type-A ports' VBUS is always on */
> > status = "okay";
> > };
>
> Looking at the schematics, it seems that the micro USB isn't even
> wired to a bus but is only used to power the board. If so, you can
> even remove the usb_otg node.
Yes, the Micro USB data pins are not connected. However, it there is a
second USB A port connected to the processor. If I remove &usb_otg node, in
4.13-rc6, the second port goes to disabled.
BTW would this work s/brcm,bcm4329-fmac/brcm/ or should I revert it?
I will send an updated version, v8, soon.
thanks,
-antony
Hi Antony,
On Mon, Sep 04, 2017 at 04:26:19PM +0200, Antony Antony wrote:
> On Mon, Sep 04, 2017 at 10:27:32AM +0200, Maxime Ripard wrote:
> > On Fri, Sep 01, 2017 at 12:53:13PM +0200, Antony Antony wrote:
> > > > > +&emac {
> > > > > + pinctrl-names = "default";
> > > > > + pinctrl-0 = <&emac_rgmii_pins>;
> > > > > + phy-supply = <®_gmac_3v3>;
> > > > > + phy-handle = <&ext_rgmii_phy>;
> > > > > + phy-mode = "rgmii";
> > > > > + status = "okay";
> > > > > +};
> > > > > +
> > > > > +&mdio {
> > > > > + ext_rgmii_phy: ethernet-phy@7 {
> > > > > + compatible = "ethernet-phy-ieee802.3-c22";
> > > > > + reg = <7>;
> > > > > + };
> > > > > +};
> > > >
> > > > This will not compile.
> > >
> > > I don't understand you, because, v5 file compiled for me. Here is output
> > > from running system, just the relevant part. using dtc -I fs
> > > /proc/device-tree
> > >
> > > ext_rgmii_phy = "/soc/ethernet@1c30000/mdio/ethernet-phy@7";
> > >
> > > ethernet@1c30000 {
> > > mdio {
> > > ..
> > > ethernet-phy@7 {
> > > compatible = "ethernet-phy-ieee802.3-c22";
> > > phandle = <0x1c>;
> > > reg = <0x7>;
> > > linux,phandle = <0x1c>;
> > > };
> > > };
> > >
> > > Is this what you expect?
> >
> > The bindings have been reverted recently, so if you based your work on
> > a version between 4.13-rc1 and 4.13-rc6 it will work, but anything
> > more recent will not compile anymore.
>
> I deleted emc and related node.
> I see. I hope stmmac: sun8i come back soon. It works well well on this
> board, running 4.13-rc6
Yeah, I hope too. Unfortunately, the DT bindings were still under
discussion after it's been merged, so we couldn't guarantee their
stability in the future.
> > > > > +&usb_otg {
> > > > > + dr_mode = "host";
> > > > > + status = "okay";
> > > > > +};
> > > > > +
> > > > > +&usbphy {
> > > > > + /* USB Type-A ports' VBUS is always on */
> > > > > + usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
> > > >
> > > > If it has an ID-detect pin, then it's not a host-only USB OTG
> > > > controller. dr_mode should be set to otga
> > >
> > > good point. I don't see an ID-detect connected in the schematic. The
> > > previous generation had.
> > >
> > > I will leave
> > > &usb_otg {
> > > dr_mode = "host";
> > > status = "okay";
> > > };
> > >
> > > &usbphy {
> > > /* USB Type-A ports' VBUS is always on */
> > > status = "okay";
> > > };
> >
> > Looking at the schematics, it seems that the micro USB isn't even
> > wired to a bus but is only used to power the board. If so, you can
> > even remove the usb_otg node.
>
> Yes, the Micro USB data pins are not connected. However, it there is a
> second USB A port connected to the processor. If I remove &usb_otg node, in
> 4.13-rc6, the second port goes to disabled.
Ok, someone got creative :)
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com