From: Marcel Ziswiler <[email protected]>
Reorder NAND manufacturer ids for clarity.
Signed-off-by: Marcel Ziswiler <[email protected]>
---
drivers/mtd/nand/raw/nand_ids.c | 20 ++++++++++----------
include/linux/mtd/rawnand.h | 8 ++++----
2 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/mtd/nand/raw/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c
index 5423c3bb388e..0851cd86bf19 100644
--- a/drivers/mtd/nand/raw/nand_ids.c
+++ b/drivers/mtd/nand/raw/nand_ids.c
@@ -169,21 +169,21 @@ struct nand_flash_dev nand_flash_ids[] = {
/* Manufacturer IDs */
static const struct nand_manufacturer nand_manufacturers[] = {
- {NAND_MFR_TOSHIBA, "Toshiba", &toshiba_nand_manuf_ops},
+ {NAND_MFR_AMD, "AMD/Spansion", &amd_nand_manuf_ops},
+ {NAND_MFR_ATO, "ATO"},
+ {NAND_MFR_EON, "Eon"},
{NAND_MFR_ESMT, "ESMT"},
- {NAND_MFR_SAMSUNG, "Samsung", &samsung_nand_manuf_ops},
{NAND_MFR_FUJITSU, "Fujitsu"},
- {NAND_MFR_NATIONAL, "National"},
- {NAND_MFR_RENESAS, "Renesas"},
- {NAND_MFR_STMICRO, "ST Micro"},
{NAND_MFR_HYNIX, "Hynix", &hynix_nand_manuf_ops},
- {NAND_MFR_MICRON, "Micron", µn_nand_manuf_ops},
- {NAND_MFR_AMD, "AMD/Spansion", &amd_nand_manuf_ops},
+ {NAND_MFR_INTEL, "Intel"},
{NAND_MFR_MACRONIX, "Macronix", ¯onix_nand_manuf_ops},
- {NAND_MFR_EON, "Eon"},
+ {NAND_MFR_MICRON, "Micron", µn_nand_manuf_ops},
+ {NAND_MFR_NATIONAL, "National"},
+ {NAND_MFR_RENESAS, "Renesas"},
+ {NAND_MFR_SAMSUNG, "Samsung", &samsung_nand_manuf_ops},
{NAND_MFR_SANDISK, "SanDisk"},
- {NAND_MFR_INTEL, "Intel"},
- {NAND_MFR_ATO, "ATO"},
+ {NAND_MFR_STMICRO, "ST Micro"},
+ {NAND_MFR_TOSHIBA, "Toshiba", &toshiba_nand_manuf_ops},
{NAND_MFR_WINBOND, "Winbond"},
};
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index efb2345359bb..ca134851d211 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -1541,12 +1541,12 @@ nand_manufacturer_name(const struct nand_manufacturer *manufacturer)
extern struct nand_flash_dev nand_flash_ids[];
-extern const struct nand_manufacturer_ops toshiba_nand_manuf_ops;
-extern const struct nand_manufacturer_ops samsung_nand_manuf_ops;
-extern const struct nand_manufacturer_ops hynix_nand_manuf_ops;
-extern const struct nand_manufacturer_ops micron_nand_manuf_ops;
extern const struct nand_manufacturer_ops amd_nand_manuf_ops;
+extern const struct nand_manufacturer_ops hynix_nand_manuf_ops;
extern const struct nand_manufacturer_ops macronix_nand_manuf_ops;
+extern const struct nand_manufacturer_ops micron_nand_manuf_ops;
+extern const struct nand_manufacturer_ops samsung_nand_manuf_ops;
+extern const struct nand_manufacturer_ops toshiba_nand_manuf_ops;
int nand_create_bbt(struct nand_chip *chip);
int nand_markbad_bbt(struct mtd_info *mtd, loff_t offs);
--
2.14.4
From: Marcel Ziswiler <[email protected]>
This patch enables support to read the ECC level from the NAND flash
using ESMT SLC NAND ID byte 5 information as documented e.g. in the
following data sheet:
https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F59L1G81LA(2Y).pdf
Signed-off-by: Marcel Ziswiler <[email protected]>
---
drivers/mtd/nand/raw/nand_esmt.c | 46 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
create mode 100644 drivers/mtd/nand/raw/nand_esmt.c
diff --git a/drivers/mtd/nand/raw/nand_esmt.c b/drivers/mtd/nand/raw/nand_esmt.c
new file mode 100644
index 000000000000..360d351ac043
--- /dev/null
+++ b/drivers/mtd/nand/raw/nand_esmt.c
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2018 Toradex AG
+ *
+ * Author: Marcel Ziswiler <[email protected]>
+ */
+
+#include <linux/mtd/rawnand.h>
+
+static void esmt_nand_decode_id(struct nand_chip *chip)
+{
+ nand_decode_ext_id(chip);
+
+ /* Extract ECC requirements from 5th id byte. */
+ if (chip->id.len >= 5 && nand_is_slc(chip)) {
+ chip->ecc_step_ds = 512;
+ switch (chip->id.data[4] & 0x3) {
+ case 0x0:
+ chip->ecc_strength_ds = 4;
+ break;
+ case 0x1:
+ chip->ecc_strength_ds = 2;
+ break;
+ case 0x2:
+ chip->ecc_strength_ds = 1;
+ break;
+ default:
+ WARN(1, "Could not get ECC info");
+ chip->ecc_step_ds = 0;
+ break;
+ }
+ }
+}
+
+static int esmt_nand_init(struct nand_chip *chip)
+{
+ if (nand_is_slc(chip))
+ chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
+
+ return 0;
+}
+
+const struct nand_manufacturer_ops esmt_nand_manuf_ops = {
+ .detect = esmt_nand_decode_id,
+ .init = esmt_nand_init,
+};
--
2.14.4
Hi Marcel,
Marcel Ziswiler <[email protected]> wrote on Thu, 6 Sep 2018
10:49:21 +0200:
> From: Marcel Ziswiler <[email protected]>
>
> Reorder NAND manufacturer ids for clarity.
>
> Signed-off-by: Marcel Ziswiler <[email protected]>
>
> ---
Both patches applied to nand/next with subject prefix s/nand:/rawnand:/
as well as upper-case: s/nand/NAND/ and s/id/ID/ in the commit log.
Thanks,
Miquèl
On Thu, 6 Sep 2018 10:49:21 +0200
Marcel Ziswiler <[email protected]> wrote:
> From: Marcel Ziswiler <[email protected]>
>
> Reorder NAND manufacturer ids for clarity.
>
> Signed-off-by: Marcel Ziswiler <[email protected]>
>
> ---
>
> drivers/mtd/nand/raw/nand_ids.c | 20 ++++++++++----------
> include/linux/mtd/rawnand.h | 8 ++++----
> 2 files changed, 14 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c
> index 5423c3bb388e..0851cd86bf19 100644
> --- a/drivers/mtd/nand/raw/nand_ids.c
> +++ b/drivers/mtd/nand/raw/nand_ids.c
> @@ -169,21 +169,21 @@ struct nand_flash_dev nand_flash_ids[] = {
>
> /* Manufacturer IDs */
> static const struct nand_manufacturer nand_manufacturers[] = {
> - {NAND_MFR_TOSHIBA, "Toshiba", &toshiba_nand_manuf_ops},
> + {NAND_MFR_AMD, "AMD/Spansion", &amd_nand_manuf_ops},
> + {NAND_MFR_ATO, "ATO"},
> + {NAND_MFR_EON, "Eon"},
> {NAND_MFR_ESMT, "ESMT"},
> - {NAND_MFR_SAMSUNG, "Samsung", &samsung_nand_manuf_ops},
> {NAND_MFR_FUJITSU, "Fujitsu"},
> - {NAND_MFR_NATIONAL, "National"},
> - {NAND_MFR_RENESAS, "Renesas"},
> - {NAND_MFR_STMICRO, "ST Micro"},
> {NAND_MFR_HYNIX, "Hynix", &hynix_nand_manuf_ops},
> - {NAND_MFR_MICRON, "Micron", µn_nand_manuf_ops},
> - {NAND_MFR_AMD, "AMD/Spansion", &amd_nand_manuf_ops},
> + {NAND_MFR_INTEL, "Intel"},
> {NAND_MFR_MACRONIX, "Macronix", ¯onix_nand_manuf_ops},
> - {NAND_MFR_EON, "Eon"},
> + {NAND_MFR_MICRON, "Micron", µn_nand_manuf_ops},
> + {NAND_MFR_NATIONAL, "National"},
> + {NAND_MFR_RENESAS, "Renesas"},
> + {NAND_MFR_SAMSUNG, "Samsung", &samsung_nand_manuf_ops},
> {NAND_MFR_SANDISK, "SanDisk"},
> - {NAND_MFR_INTEL, "Intel"},
> - {NAND_MFR_ATO, "ATO"},
> + {NAND_MFR_STMICRO, "ST Micro"},
> + {NAND_MFR_TOSHIBA, "Toshiba", &toshiba_nand_manuf_ops},
> {NAND_MFR_WINBOND, "Winbond"},
> };
>
> diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
> index efb2345359bb..ca134851d211 100644
> --- a/include/linux/mtd/rawnand.h
> +++ b/include/linux/mtd/rawnand.h
> @@ -1541,12 +1541,12 @@ nand_manufacturer_name(const struct nand_manufacturer *manufacturer)
>
> extern struct nand_flash_dev nand_flash_ids[];
>
> -extern const struct nand_manufacturer_ops toshiba_nand_manuf_ops;
> -extern const struct nand_manufacturer_ops samsung_nand_manuf_ops;
> -extern const struct nand_manufacturer_ops hynix_nand_manuf_ops;
> -extern const struct nand_manufacturer_ops micron_nand_manuf_ops;
> extern const struct nand_manufacturer_ops amd_nand_manuf_ops;
> +extern const struct nand_manufacturer_ops hynix_nand_manuf_ops;
> extern const struct nand_manufacturer_ops macronix_nand_manuf_ops;
> +extern const struct nand_manufacturer_ops micron_nand_manuf_ops;
> +extern const struct nand_manufacturer_ops samsung_nand_manuf_ops;
> +extern const struct nand_manufacturer_ops toshiba_nand_manuf_ops;
I'm okay with this kind of alphabetic reordering, but why not
reordering the macro definitions too?
On Thu, 6 Sep 2018 10:49:22 +0200
Marcel Ziswiler <[email protected]> wrote:
> From: Marcel Ziswiler <[email protected]>
>
> This patch enables support to read the ECC level from the NAND flash
> using ESMT SLC NAND ID byte 5 information as documented e.g. in the
> following data sheet:
>
> https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F59L1G81LA(2Y).pdf
>
> Signed-off-by: Marcel Ziswiler <[email protected]>
>
> ---
>
> drivers/mtd/nand/raw/nand_esmt.c | 46 ++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 46 insertions(+)
> create mode 100644 drivers/mtd/nand/raw/nand_esmt.c
>
> diff --git a/drivers/mtd/nand/raw/nand_esmt.c b/drivers/mtd/nand/raw/nand_esmt.c
> new file mode 100644
> index 000000000000..360d351ac043
> --- /dev/null
> +++ b/drivers/mtd/nand/raw/nand_esmt.c
> @@ -0,0 +1,46 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2018 Toradex AG
> + *
> + * Author: Marcel Ziswiler <[email protected]>
> + */
> +
> +#include <linux/mtd/rawnand.h>
> +
> +static void esmt_nand_decode_id(struct nand_chip *chip)
> +{
> + nand_decode_ext_id(chip);
> +
> + /* Extract ECC requirements from 5th id byte. */
> + if (chip->id.len >= 5 && nand_is_slc(chip)) {
> + chip->ecc_step_ds = 512;
> + switch (chip->id.data[4] & 0x3) {
> + case 0x0:
> + chip->ecc_strength_ds = 4;
> + break;
> + case 0x1:
> + chip->ecc_strength_ds = 2;
> + break;
> + case 0x2:
> + chip->ecc_strength_ds = 1;
> + break;
> + default:
> + WARN(1, "Could not get ECC info");
> + chip->ecc_step_ds = 0;
> + break;
> + }
> + }
> +}
> +
> +static int esmt_nand_init(struct nand_chip *chip)
> +{
> + if (nand_is_slc(chip))
> + chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
> +
> + return 0;
> +}
> +
> +const struct nand_manufacturer_ops esmt_nand_manuf_ops = {
> + .detect = esmt_nand_decode_id,
> + .init = esmt_nand_init,
> +};
Looks like you forgot to hook the new esmt_nand_manuf_ops to the ESMT
entry (in the nand_manufacturer table), so as is, the patch is not
exactly adding support for ECC req parsing ;-).
Hi Marcel,
Boris Brezillon <[email protected]> wrote on Thu, 6 Sep 2018
22:44:22 +0200:
> On Thu, 6 Sep 2018 10:49:22 +0200
> Marcel Ziswiler <[email protected]> wrote:
>
> > From: Marcel Ziswiler <[email protected]>
> >
> > This patch enables support to read the ECC level from the NAND flash
> > using ESMT SLC NAND ID byte 5 information as documented e.g. in the
> > following data sheet:
> >
> > https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F59L1G81LA(2Y).pdf
> >
> > Signed-off-by: Marcel Ziswiler <[email protected]>
> >
> > ---
> >
> > drivers/mtd/nand/raw/nand_esmt.c | 46 ++++++++++++++++++++++++++++++++++++++++
> > 1 file changed, 46 insertions(+)
> > create mode 100644 drivers/mtd/nand/raw/nand_esmt.c
> >
> > diff --git a/drivers/mtd/nand/raw/nand_esmt.c b/drivers/mtd/nand/raw/nand_esmt.c
> > new file mode 100644
> > index 000000000000..360d351ac043
> > --- /dev/null
> > +++ b/drivers/mtd/nand/raw/nand_esmt.c
> > @@ -0,0 +1,46 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (C) 2018 Toradex AG
> > + *
> > + * Author: Marcel Ziswiler <[email protected]>
> > + */
> > +
> > +#include <linux/mtd/rawnand.h>
> > +
> > +static void esmt_nand_decode_id(struct nand_chip *chip)
> > +{
> > + nand_decode_ext_id(chip);
> > +
> > + /* Extract ECC requirements from 5th id byte. */
> > + if (chip->id.len >= 5 && nand_is_slc(chip)) {
> > + chip->ecc_step_ds = 512;
> > + switch (chip->id.data[4] & 0x3) {
> > + case 0x0:
> > + chip->ecc_strength_ds = 4;
> > + break;
> > + case 0x1:
> > + chip->ecc_strength_ds = 2;
> > + break;
> > + case 0x2:
> > + chip->ecc_strength_ds = 1;
> > + break;
> > + default:
> > + WARN(1, "Could not get ECC info");
> > + chip->ecc_step_ds = 0;
> > + break;
> > + }
> > + }
> > +}
> > +
> > +static int esmt_nand_init(struct nand_chip *chip)
> > +{
> > + if (nand_is_slc(chip))
> > + chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
> > +
> > + return 0;
> > +}
> > +
> > +const struct nand_manufacturer_ops esmt_nand_manuf_ops = {
> > + .detect = esmt_nand_decode_id,
> > + .init = esmt_nand_init,
> > +};
>
> Looks like you forgot to hook the new esmt_nand_manuf_ops to the ESMT
> entry (in the nand_manufacturer table), so as is, the patch is not
> exactly adding support for ECC req parsing ;-).
I missed that.
Will drop both patches from nand/next, waiting for a v2 (please also
reorder the macros in patch 1 as suggested).
Thanks,
Miquèl