In v7, I've tried to change from a custom binding to use
interrupt-map, modelled on the recent addition of the
renesas,rza1-irqc (commits a644ccb819bc and 5e27a314a11f). It's
possible that the interrupt-map parsing code can be factored to a
common helper, but it's a bit hard to generalize from two examples to
know what a good interface would look like.
The interrupt-map-mask is a bit arbitrary. 0xff would likely work just
as well (but I think the ls2088a has 32 external lines, so it has to
be a least 0x1f).
Also, this drops the fsl,bit-reverse property and instead reads the
SCFGREVCR register to determine if bit-reversing is needed.
The dt/bindings patch now comes first in accordance with
Documentation/devicetree/bindings/submitting-patches.txt.
Earlier versions can be found here:
v6: https://lore.kernel.org/lkml/[email protected]/
v5: https://lore.kernel.org/lkml/[email protected]/
Rasmus Villemoes (2):
dt/bindings: Add bindings for Layerscape external irqs
irqchip: add support for Layerscape external interrupt lines
.../interrupt-controller/fsl,ls-extirq.txt | 49 +++++
drivers/irqchip/Kconfig | 4 +
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-ls-extirq.c | 197 ++++++++++++++++++
4 files changed, 251 insertions(+)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt
create mode 100644 drivers/irqchip/irq-ls-extirq.c
--
2.23.0
On 2019-11-07 13:30, Rasmus Villemoes wrote:
> In v7, I've tried to change from a custom binding to use
> interrupt-map, modelled on the recent addition of the
> renesas,rza1-irqc (commits a644ccb819bc and 5e27a314a11f). It's
> possible that the interrupt-map parsing code can be factored to a
> common helper, but it's a bit hard to generalize from two examples to
> know what a good interface would look like.
>
> The interrupt-map-mask is a bit arbitrary. 0xff would likely work
> just
> as well (but I think the ls2088a has 32 external lines, so it has to
> be a least 0x1f).
>
> Also, this drops the fsl,bit-reverse property and instead reads the
> SCFGREVCR register to determine if bit-reversing is needed.
>
> The dt/bindings patch now comes first in accordance with
> Documentation/devicetree/bindings/submitting-patches.txt.
>
> Earlier versions can be found here:
>
> v6:
> https://lore.kernel.org/lkml/[email protected]/
> v5:
>
> https://lore.kernel.org/lkml/[email protected]/
>
> Rasmus Villemoes (2):
> dt/bindings: Add bindings for Layerscape external irqs
> irqchip: add support for Layerscape external interrupt lines
>
> .../interrupt-controller/fsl,ls-extirq.txt | 49 +++++
> drivers/irqchip/Kconfig | 4 +
> drivers/irqchip/Makefile | 1 +
> drivers/irqchip/irq-ls-extirq.c | 197
> ++++++++++++++++++
> 4 files changed, 251 insertions(+)
> create mode 100644
>
> Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt
> create mode 100644 drivers/irqchip/irq-ls-extirq.c
Applied to irqchip-next.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
On Mon, 11 Nov 2019 at 12:24, Marc Zyngier <[email protected]> wrote:
>
> On 2019-11-07 13:30, Rasmus Villemoes wrote:
> > In v7, I've tried to change from a custom binding to use
> > interrupt-map, modelled on the recent addition of the
> > renesas,rza1-irqc (commits a644ccb819bc and 5e27a314a11f). It's
> > possible that the interrupt-map parsing code can be factored to a
> > common helper, but it's a bit hard to generalize from two examples to
> > know what a good interface would look like.
> >
> > The interrupt-map-mask is a bit arbitrary. 0xff would likely work
> > just
> > as well (but I think the ls2088a has 32 external lines, so it has to
> > be a least 0x1f).
> >
> > Also, this drops the fsl,bit-reverse property and instead reads the
> > SCFGREVCR register to determine if bit-reversing is needed.
> >
> > The dt/bindings patch now comes first in accordance with
> > Documentation/devicetree/bindings/submitting-patches.txt.
> >
> > Earlier versions can be found here:
> >
> > v6:
> > https://lore.kernel.org/lkml/[email protected]/
> > v5:
> >
> > https://lore.kernel.org/lkml/[email protected]/
> >
> > Rasmus Villemoes (2):
> > dt/bindings: Add bindings for Layerscape external irqs
> > irqchip: add support for Layerscape external interrupt lines
> >
> > .../interrupt-controller/fsl,ls-extirq.txt | 49 +++++
> > drivers/irqchip/Kconfig | 4 +
> > drivers/irqchip/Makefile | 1 +
> > drivers/irqchip/irq-ls-extirq.c | 197
> > ++++++++++++++++++
> > 4 files changed, 251 insertions(+)
> > create mode 100644
> >
> > Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt
> > create mode 100644 drivers/irqchip/irq-ls-extirq.c
>
> Applied to irqchip-next.
>
> Thanks,
>
> M.
> --
> Jazz is not dead. It just smells funny...
A bit late, but for what it's worth,
Tested-by: Vladimir Oltean <[email protected]>
Background: https://www.spinics.net/lists/netdev/msg611505.html
Thanks,
-Vladimir
On 11/11/2019 11.24, Marc Zyngier wrote:
> On 2019-11-07 13:30, Rasmus Villemoes wrote:
>> Rasmus Villemoes (2):
>> dt/bindings: Add bindings for Layerscape external irqs
>> irqchip: add support for Layerscape external interrupt lines
>>
>> .../interrupt-controller/fsl,ls-extirq.txt | 49 +++++
>> drivers/irqchip/Kconfig | 4 +
>> drivers/irqchip/Makefile | 1 +
>> drivers/irqchip/irq-ls-extirq.c | 197 ++++++++++++++++++
>> 4 files changed, 251 insertions(+)
>> create mode 100644
>>
>> Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt
>> create mode 100644 drivers/irqchip/irq-ls-extirq.c
>
> Applied to irqchip-next.
Thanks! Can I assume that branch doesn't get rebased so 87cd38dfd9e6 is
a stable SHA1? I want to send a patch adding the node to ls1021a.dtsi,
and I hope not to have to wait another release cycle.
Rasmus
On 2019-11-12 11:27, Rasmus Villemoes wrote:
> On 11/11/2019 11.24, Marc Zyngier wrote:
>> On 2019-11-07 13:30, Rasmus Villemoes wrote:
>
>>> Rasmus Villemoes (2):
>>> dt/bindings: Add bindings for Layerscape external irqs
>>> irqchip: add support for Layerscape external interrupt lines
>>>
>>> .../interrupt-controller/fsl,ls-extirq.txt | 49 +++++
>>> drivers/irqchip/Kconfig | 4 +
>>> drivers/irqchip/Makefile | 1 +
>>> drivers/irqchip/irq-ls-extirq.c | 197
>>> ++++++++++++++++++
>>> 4 files changed, 251 insertions(+)
>>> create mode 100644
>>>
>>>
>>> Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt
>>> create mode 100644 drivers/irqchip/irq-ls-extirq.c
>>
>> Applied to irqchip-next.
>
> Thanks! Can I assume that branch doesn't get rebased so 87cd38dfd9e6
> is
> a stable SHA1? I want to send a patch adding the node to
> ls1021a.dtsi,
> and I hope not to have to wait another release cycle.
I usually try to avoid rebasing it, unless something really bad shows
up.
Now, just adding a node to a DT shouldn't break anything, right? You
should be able to do that change and get things working magically once
this code hits mainline.
Or am I missing something?
M.
--
Jazz is not dead. It just smells funny...
On 12/11/2019 11.58, Marc Zyngier wrote:
> On 2019-11-12 11:27, Rasmus Villemoes wrote:
>> On 11/11/2019 11.24, Marc Zyngier wrote:
>>> Applied to irqchip-next.
>>
>> Thanks! Can I assume that branch doesn't get rebased so 87cd38dfd9e6 is
>> a stable SHA1? I want to send a patch adding the node to ls1021a.dtsi,
>> and I hope not to have to wait another release cycle.
>
> I usually try to avoid rebasing it, unless something really bad shows up.
>
> Now, just adding a node to a DT shouldn't break anything, right? You
> should be able to do that change and get things working magically once
> this code hits mainline.
Well, yes, but I wanted to refer to the binding documentation in the
form of a reference to that SHA1. But I suppose I can just do that in
the cover letter or below ---.
Thanks,
Rasmus