Hello,
The patch series adds a PHY driver for the Xilinx ZynqMP gigabit serial
transceivers (PS-GTR). The PS-GTR is a set of 4 PHYs that can be used by
the PCIe, USB 3.0, DisplayPort, SATA and Ethernet controllers that are
part of the Serial I/O Unit (SIOU).
The code is based on a previous version sent by Anurag Kumar Vulisha and
available at [1]. The DT bindings have been converted to YAML, and both
the bindings and the driver have been considerably reworked (and
simplified). The most notable changes is the removal of manual handling
of the reset lines of the PHY users (which belongs to the PHY users
themselves), and moving to the standard PHY .power_on() and .configure()
operations to replace functions that were previously exported by the
driver. Please see individual patches for a more detailed changelog.
Compared to v7, review comments on the PHY driver have been taken into
account, and the DT bindings have switched to the GPL-2.0-only OR
BSD-2-Clause license
The code is based on v5.6 and has been tested with DisplayPort on the
Xilinx ZC106 board.
[1] https://patchwork.kernel.org/cover/10735681/
Anurag Kumar Vulisha (2):
dt-bindings: phy: Add DT bindings for Xilinx ZynqMP PSGTR PHY
phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver
Laurent Pinchart (1):
arm64: dts: zynqmp: Add GTR transceivers
.../bindings/phy/xlnx,zynqmp-psgtr.yaml | 105 ++
MAINTAINERS | 9 +
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 10 +
drivers/phy/Kconfig | 1 +
drivers/phy/Makefile | 3 +-
drivers/phy/xilinx/Kconfig | 13 +
drivers/phy/xilinx/Makefile | 3 +
drivers/phy/xilinx/phy-zynqmp.c | 995 ++++++++++++++++++
include/dt-bindings/phy/phy.h | 1 +
9 files changed, 1139 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml
create mode 100644 drivers/phy/xilinx/Kconfig
create mode 100644 drivers/phy/xilinx/Makefile
create mode 100644 drivers/phy/xilinx/phy-zynqmp.c
--
Regards,
Laurent Pinchart
Hi Vinod,
On Mon, Jun 29, 2020 at 03:09:43PM +0530, Vinod Koul wrote:
> On 13-05-20, 20:22, Laurent Pinchart wrote:
> > Hello,
> >
> > The patch series adds a PHY driver for the Xilinx ZynqMP gigabit serial
> > transceivers (PS-GTR). The PS-GTR is a set of 4 PHYs that can be used by
> > the PCIe, USB 3.0, DisplayPort, SATA and Ethernet controllers that are
> > part of the Serial I/O Unit (SIOU).
> >
> > The code is based on a previous version sent by Anurag Kumar Vulisha and
> > available at [1]. The DT bindings have been converted to YAML, and both
> > the bindings and the driver have been considerably reworked (and
> > simplified). The most notable changes is the removal of manual handling
> > of the reset lines of the PHY users (which belongs to the PHY users
> > themselves), and moving to the standard PHY .power_on() and .configure()
> > operations to replace functions that were previously exported by the
> > driver. Please see individual patches for a more detailed changelog.
> >
> > Compared to v7, review comments on the PHY driver have been taken into
> > account, and the DT bindings have switched to the GPL-2.0-only OR
> > BSD-2-Clause license
> >
> > The code is based on v5.6 and has been tested with DisplayPort on the
> > Xilinx ZC106 board.
>
> This (dt patch and 8.1 update) fails to apply for me, can you please
> rebased on phy-next and resend. Also I saw this while trying to apply:
>
> WARNING: Misordered MAINTAINERS entry - list 'S:' before 'T:'
> #403: FILE: MAINTAINERS:18605:
> +T: git https://github.com/Xilinx/linux-xlnx.git
> +S: Supported
Rebased, fixed and resent.
--
Regards,
Laurent Pinchart
On 13-05-20, 20:22, Laurent Pinchart wrote:
> Hello,
>
> The patch series adds a PHY driver for the Xilinx ZynqMP gigabit serial
> transceivers (PS-GTR). The PS-GTR is a set of 4 PHYs that can be used by
> the PCIe, USB 3.0, DisplayPort, SATA and Ethernet controllers that are
> part of the Serial I/O Unit (SIOU).
>
> The code is based on a previous version sent by Anurag Kumar Vulisha and
> available at [1]. The DT bindings have been converted to YAML, and both
> the bindings and the driver have been considerably reworked (and
> simplified). The most notable changes is the removal of manual handling
> of the reset lines of the PHY users (which belongs to the PHY users
> themselves), and moving to the standard PHY .power_on() and .configure()
> operations to replace functions that were previously exported by the
> driver. Please see individual patches for a more detailed changelog.
>
> Compared to v7, review comments on the PHY driver have been taken into
> account, and the DT bindings have switched to the GPL-2.0-only OR
> BSD-2-Clause license
>
> The code is based on v5.6 and has been tested with DisplayPort on the
> Xilinx ZC106 board.
This (dt patch and 8.1 update) fails to apply for me, can you please
rebased on phy-next and resend. Also I saw this while trying to apply:
WARNING: Misordered MAINTAINERS entry - list 'S:' before 'T:'
#403: FILE: MAINTAINERS:18605:
+T: git https://github.com/Xilinx/linux-xlnx.git
+S: Supported
Thanks
--
~Vinod