2021-03-10 03:40:52

by Nicolin Chen

[permalink] [raw]
Subject: [PATCH v2] iommu/tegra-smmu: Add pagetable mappings to debugfs

This patch dumps all active mapping entries from pagetable
to a debugfs directory named "mappings".

Ataching an example:

SWGROUP: hc
ASID: 0
reg: 0x250
PTB_ASID: 0xe0080004
as->pd_dma: 0x80004000
{
[1023] 0xf0080013 (1)
{
PTE RANGE PHYS IOVA SIZE ATTR
#1023 - #1023 0x122e5e000 0xfffff000 0x1000 0x5
}
}
Total PDE count: 1
Total PTE count: 1

Signed-off-by: Nicolin Chen <[email protected]>
---

Changelog
v2:
* Expanded mutex range to the entire function
* Added as->lock to protect pagetable walkthrough
* Replaced devm_kzalloc with devm_kcalloc for group_debug
* Added "PTE RANGE" and "SIZE" columns to group contiguous mappings
* Dropped as->count check; added WARN_ON when as->count mismatches pd[pd_index]
v1: https://lkml.org/lkml/2020/9/26/70

drivers/iommu/tegra-smmu.c | 172 +++++++++++++++++++++++++++++++++++--
1 file changed, 167 insertions(+), 5 deletions(-)

diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c
index 97eb62f667d2..155735f6323f 100644
--- a/drivers/iommu/tegra-smmu.c
+++ b/drivers/iommu/tegra-smmu.c
@@ -19,6 +19,11 @@
#include <soc/tegra/ahb.h>
#include <soc/tegra/mc.h>

+struct tegra_smmu_group_debug {
+ const struct tegra_smmu_swgroup *group;
+ void *priv;
+};
+
struct tegra_smmu_group {
struct list_head list;
struct tegra_smmu *smmu;
@@ -47,6 +52,8 @@ struct tegra_smmu {
struct dentry *debugfs;

struct iommu_device iommu; /* IOMMU Core code handle */
+
+ struct tegra_smmu_group_debug *group_debug;
};

struct tegra_smmu_as {
@@ -152,6 +159,9 @@ static inline u32 smmu_readl(struct tegra_smmu *smmu, unsigned long offset)

#define SMMU_PDE_ATTR (SMMU_PDE_READABLE | SMMU_PDE_WRITABLE | \
SMMU_PDE_NONSECURE)
+#define SMMU_PTE_ATTR (SMMU_PTE_READABLE | SMMU_PTE_WRITABLE | \
+ SMMU_PTE_NONSECURE)
+#define SMMU_PTE_ATTR_SHIFT (29)

static unsigned int iova_pd_index(unsigned long iova)
{
@@ -163,6 +173,12 @@ static unsigned int iova_pt_index(unsigned long iova)
return (iova >> SMMU_PTE_SHIFT) & (SMMU_NUM_PTE - 1);
}

+static unsigned long pd_pt_index_iova(unsigned int pd_index, unsigned int pt_index)
+{
+ return ((dma_addr_t)pd_index & (SMMU_NUM_PDE - 1)) << SMMU_PDE_SHIFT |
+ ((dma_addr_t)pt_index & (SMMU_NUM_PTE - 1)) << SMMU_PTE_SHIFT;
+}
+
static bool smmu_dma_addr_valid(struct tegra_smmu *smmu, dma_addr_t addr)
{
addr >>= 12;
@@ -334,7 +350,7 @@ static void tegra_smmu_domain_free(struct iommu_domain *domain)
}

static const struct tegra_smmu_swgroup *
-tegra_smmu_find_swgroup(struct tegra_smmu *smmu, unsigned int swgroup)
+tegra_smmu_find_swgroup(struct tegra_smmu *smmu, unsigned int swgroup, int *index)
{
const struct tegra_smmu_swgroup *group = NULL;
unsigned int i;
@@ -342,6 +358,8 @@ tegra_smmu_find_swgroup(struct tegra_smmu *smmu, unsigned int swgroup)
for (i = 0; i < smmu->soc->num_swgroups; i++) {
if (smmu->soc->swgroups[i].swgroup == swgroup) {
group = &smmu->soc->swgroups[i];
+ if (index)
+ *index = i;
break;
}
}
@@ -350,19 +368,22 @@ tegra_smmu_find_swgroup(struct tegra_smmu *smmu, unsigned int swgroup)
}

static void tegra_smmu_enable(struct tegra_smmu *smmu, unsigned int swgroup,
- unsigned int asid)
+ struct tegra_smmu_as *as)
{
const struct tegra_smmu_swgroup *group;
+ unsigned int asid = as->id;
unsigned int i;
u32 value;

- group = tegra_smmu_find_swgroup(smmu, swgroup);
+ group = tegra_smmu_find_swgroup(smmu, swgroup, &i);
if (group) {
value = smmu_readl(smmu, group->reg);
value &= ~SMMU_ASID_MASK;
value |= SMMU_ASID_VALUE(asid);
value |= SMMU_ASID_ENABLE;
smmu_writel(smmu, value, group->reg);
+ if (smmu->group_debug)
+ smmu->group_debug[i].priv = as;
} else {
pr_warn("%s group from swgroup %u not found\n", __func__,
swgroup);
@@ -389,13 +410,15 @@ static void tegra_smmu_disable(struct tegra_smmu *smmu, unsigned int swgroup,
unsigned int i;
u32 value;

- group = tegra_smmu_find_swgroup(smmu, swgroup);
+ group = tegra_smmu_find_swgroup(smmu, swgroup, &i);
if (group) {
value = smmu_readl(smmu, group->reg);
value &= ~SMMU_ASID_MASK;
value |= SMMU_ASID_VALUE(asid);
value &= ~SMMU_ASID_ENABLE;
smmu_writel(smmu, value, group->reg);
+ if (smmu->group_debug)
+ smmu->group_debug[i].priv = NULL;
}

for (i = 0; i < smmu->soc->num_clients; i++) {
@@ -499,7 +522,7 @@ static int tegra_smmu_attach_dev(struct iommu_domain *domain,
if (err)
goto disable;

- tegra_smmu_enable(smmu, fwspec->ids[index], as->id);
+ tegra_smmu_enable(smmu, fwspec->ids[index], as);
}

if (index == 0)
@@ -1058,8 +1081,132 @@ static int tegra_smmu_clients_show(struct seq_file *s, void *data)

DEFINE_SHOW_ATTRIBUTE(tegra_smmu_clients);

+static int tegra_smmu_mappings_show(struct seq_file *s, void *data)
+{
+ struct tegra_smmu_group_debug *group_debug = s->private;
+ const struct tegra_smmu_swgroup *group;
+ struct tegra_smmu_as *as;
+ struct tegra_smmu *smmu;
+ int pd_index, pt_index;
+ unsigned long flags;
+ u64 pte_count = 0;
+ u32 pde_count = 0;
+ u32 val, ptb_reg;
+ u32 *pd;
+
+ if (!group_debug || !group_debug->priv || !group_debug->group)
+ return 0;
+
+ group = group_debug->group;
+ as = group_debug->priv;
+ smmu = as->smmu;
+
+ mutex_lock(&smmu->lock);
+
+ val = smmu_readl(smmu, group->reg) & SMMU_ASID_ENABLE;
+ if (!val)
+ goto unlock;
+
+ pd = page_address(as->pd);
+ if (!pd)
+ goto unlock;
+
+ seq_printf(s, "\nSWGROUP: %s\nASID: %d\nreg: 0x%x\n", group->name, as->id, group->reg);
+
+ smmu_writel(smmu, as->id & 0x7f, SMMU_PTB_ASID);
+ ptb_reg = smmu_readl(smmu, SMMU_PTB_DATA);
+
+ seq_printf(s, "PTB_ASID: 0x%x\nas->pd_dma: 0x%llx\n", ptb_reg, as->pd_dma);
+ seq_puts(s, "{\n");
+
+ spin_lock_irqsave(&as->lock, flags);
+
+ for (pd_index = 0; pd_index < SMMU_NUM_PDE; pd_index++) {
+ struct page *pt_page;
+ u32 *addr;
+ int i;
+
+ /* An empty PDE should not have a pte use count */
+ WARN_ON_ONCE(!pd[pd_index] ^ !as->count[pd_index]);
+
+ /* Skip this empty PDE */
+ if (!pd[pd_index])
+ continue;
+
+ pde_count++;
+ pte_count += as->count[pd_index];
+ seq_printf(s, "\t[%d] 0x%x (%d)\n", pd_index, pd[pd_index], as->count[pd_index]);
+ pt_page = as->pts[pd_index];
+ addr = page_address(pt_page);
+
+ seq_puts(s, "\t{\n");
+ seq_printf(s, "\t\t%-15s %-14s %-11s %-11s %-6s\n",
+ "PTE RANGE", "PHYS", "IOVA", "SIZE", "ATTR");
+ for (pt_index = 0; pt_index < SMMU_NUM_PTE; pt_index += i) {
+ size_t size = SMMU_SIZE_PT;
+ phys_addr_t pa;
+ u64 iova;
+
+ i = 1;
+
+ if (!addr[pt_index])
+ continue;
+
+ iova = pd_pt_index_iova(pd_index, pt_index);
+ pa = SMMU_PFN_PHYS(addr[pt_index] & ~SMMU_PTE_ATTR);
+
+ /* Check contiguous mappings and increase size */
+ while (pt_index + i < SMMU_NUM_PTE) {
+ phys_addr_t next_pa;
+ u64 next_iova;
+
+ if (!addr[pt_index + i])
+ break;
+
+ next_iova = pd_pt_index_iova(pd_index, pt_index + i);
+ next_pa = SMMU_PFN_PHYS(addr[pt_index + i] & ~SMMU_PTE_ATTR);
+
+ /* Break at the end of a linear mapping */
+ if ((next_iova - iova != SMMU_SIZE_PT * i) ||
+ (next_pa - pa != SMMU_SIZE_PT * i))
+ break;
+
+ i++;
+ }
+
+ seq_printf(s, "\t\t#%-4d - #%-6d 0x%-12llx 0x%-9llx 0x%-9lx 0x%-4x\n",
+ pt_index, pt_index + i - 1, pa, iova, size * i,
+ addr[pt_index] >> SMMU_PTE_ATTR_SHIFT);
+ }
+ seq_puts(s, "\t}\n");
+ }
+
+ spin_unlock_irqrestore(&as->lock, flags);
+
+ seq_puts(s, "}\n");
+ seq_printf(s, "Total PDE count: %d\n", pde_count);
+ seq_printf(s, "Total PTE count: %lld\n", pte_count);
+
+unlock:
+ mutex_unlock(&smmu->lock);
+
+ return 0;
+}
+
+DEFINE_SHOW_ATTRIBUTE(tegra_smmu_mappings);
+
static void tegra_smmu_debugfs_init(struct tegra_smmu *smmu)
{
+ const struct tegra_smmu_soc *soc = smmu->soc;
+ struct tegra_smmu_group_debug *group_debug;
+ struct device *dev = smmu->dev;
+ struct dentry *d;
+ int i;
+
+ group_debug = devm_kcalloc(dev, soc->num_swgroups, sizeof(*group_debug), GFP_KERNEL);
+ if (!group_debug)
+ return;
+
smmu->debugfs = debugfs_create_dir("smmu", NULL);
if (!smmu->debugfs)
return;
@@ -1068,6 +1215,21 @@ static void tegra_smmu_debugfs_init(struct tegra_smmu *smmu)
&tegra_smmu_swgroups_fops);
debugfs_create_file("clients", S_IRUGO, smmu->debugfs, smmu,
&tegra_smmu_clients_fops);
+ d = debugfs_create_dir("mappings", smmu->debugfs);
+
+ for (i = 0; i < soc->num_swgroups; i++) {
+ const struct tegra_smmu_swgroup *group = &soc->swgroups[i];
+
+ if (!group->name)
+ continue;
+
+ group_debug[i].group = group;
+
+ debugfs_create_file(group->name, 0444, d, &group_debug[i],
+ &tegra_smmu_mappings_fops);
+ }
+
+ smmu->group_debug = group_debug;
}

static void tegra_smmu_debugfs_exit(struct tegra_smmu *smmu)
--
2.17.1


2021-03-10 20:43:02

by Dmitry Osipenko

[permalink] [raw]
Subject: Re: [PATCH v2] iommu/tegra-smmu: Add pagetable mappings to debugfs

10.03.2021 06:36, Nicolin Chen пишет:
> This patch dumps all active mapping entries from pagetable
> to a debugfs directory named "mappings".
>
> Ataching an example:
>
> SWGROUP: hc
> ASID: 0
> reg: 0x250
> PTB_ASID: 0xe0080004
> as->pd_dma: 0x80004000
> {
> [1023] 0xf0080013 (1)
> {
> PTE RANGE PHYS IOVA SIZE ATTR
> #1023 - #1023 0x122e5e000 0xfffff000 0x1000 0x5
> }
> }
> Total PDE count: 1
> Total PTE count: 1

Addresses are 32bit on ARM32, please fix the formatting. The phys_addr_t
and dma_addr_t have special printk specifiers [1].

[1]
https://www.kernel.org/doc/html/latest/core-api/printk-formats.html?highlight=printk#physical-address-types-phys-addr-t

as->pd_dma: 0xc026e81b0000026c
{
[0] 0xf0082848 (1024)
{
PTE RANGE PHYS IOVA SIZE
ATTR
#0 - #15 0xc0f9fc40bfde0000 0x0 0x10000
0x7
#16 - #47 0xc0f9fc40bfdc0000 0x10000 0x20000
0x7
#48 - #111 0xc0f9fc40bfd80000 0x30000 0x40000
0x7
#112 - #239 0xc0f9fc40bfd00000 0x70000 0x80000
0x7
#240 - #495 0xc0f9fc40bfc00000 0xf0000 0x100000
0x7
#496 - #999 0xc0f9fc40bf400000 0x1f0000 0x1f8000
0x7
#1000 - #1000 0xc0f9fc40acc40000 0x3e8000 0x1000
0x7
#1001 - #1001 0xc0f9fc40bbb95000 0x3e9000 0x1000
0x7
#1002 - #1002 0xc0f9fc40bbb97000 0x3ea000 0x1000
0x7
#1003 - #1003 0xc0f9fc40bbb91000 0x3eb000 0x1000
0x7
#1004 - #1005 0xc0f9fc40bb455000 0x3ec000 0x2000
0x7
#1006 - #1006 0xc0f9fc40bee9c000 0x3ee000 0x1000
0x7
#1007 - #1007 0xc0f9fc40bed20000 0x3ef000 0x1000
0x7
#1008 - #1008 0xc0f9fc40bbde0000 0x3f0000 0x1000
0x7
#1009 - #1009 0xc0f9fc40be465000 0x3f1000 0x1000
0x7
#1010 - #1010 0xc0f9fc40bb505000 0x3f2000 0x1000
0x7
#1011 - #1011 0xc0f9fc40bdcb9000 0x3f3000 0x1000
0x7
#1012 - #1012 0xc0f9fc40bcdf9000 0x3f4000 0x1000
0x7
#1013 - #1013 0xc0f9fc40bb6ce000 0x3f5000 0x1000
0x7
#1014 - #1014 0xc0f9fc40bcd74000 0x3f6000 0x1000
0x7
#1015 - #1015 0xc0f9fc40bd0d0000 0x3f7000 0x1000
0x7
#1016 - #1016 0xc0f9fc40bb6c5000 0x3f8000 0x1000
0x7
#1017 - #1017 0xc0f9fc40bd121000 0x3f9000 0x1000
0x7
#1018 - #1018 0xc0f9fc40bb6df000 0x3fa000 0x1000
0x7
#1019 - #1020 0xc0f9fc40bb6e9000 0x3fb000 0x2000
0x7
#1021 - #1021 0xc0f9fc40bb713000 0x3fd000 0x1000
0x7
#1022 - #1022 0xc0f9fc40bb738000 0x3fe000 0x1000
0x7
#1023 - #1023 0xc0f9fc40be444000 0x3ff000 0x1000
0x7
}

2021-03-10 22:14:22

by Nicolin Chen

[permalink] [raw]
Subject: Re: [PATCH v2] iommu/tegra-smmu: Add pagetable mappings to debugfs

On Wed, Mar 10, 2021 at 11:38:47PM +0300, Dmitry Osipenko wrote:
> 10.03.2021 06:36, Nicolin Chen пишет:
> > This patch dumps all active mapping entries from pagetable
> > to a debugfs directory named "mappings".
> >
> > Ataching an example:
> >
> > SWGROUP: hc
> > ASID: 0
> > reg: 0x250
> > PTB_ASID: 0xe0080004
> > as->pd_dma: 0x80004000
> > {
> > [1023] 0xf0080013 (1)
> > {
> > PTE RANGE PHYS IOVA SIZE ATTR
> > #1023 - #1023 0x122e5e000 0xfffff000 0x1000 0x5
> > }
> > }
> > Total PDE count: 1
> > Total PTE count: 1
>
> Addresses are 32bit on ARM32, please fix the formatting. The phys_addr_t
> and dma_addr_t have special printk specifiers [1].
>
> [1]
> https://www.kernel.org/doc/html/latest/core-api/printk-formats.html?highlight=printk#physical-address-types-phys-addr-t
>
> as->pd_dma: 0xc026e81b0000026c
> {
> [0] 0xf0082848 (1024)
> {
> PTE RANGE PHYS IOVA SIZE
> ATTR
> #0 - #15 0xc0f9fc40bfde0000 0x0 0x10000

Thanks for the feedback! I will send v3.

2021-03-11 14:05:59

by Dmitry Osipenko

[permalink] [raw]
Subject: Re: [PATCH v2] iommu/tegra-smmu: Add pagetable mappings to debugfs

10.03.2021 06:36, Nicolin Chen пишет:
...
> +static int tegra_smmu_mappings_show(struct seq_file *s, void *data)
> +{
> + struct tegra_smmu_group_debug *group_debug = s->private;
> + const struct tegra_smmu_swgroup *group;
> + struct tegra_smmu_as *as;
> + struct tegra_smmu *smmu;
> + int pd_index, pt_index;

> +DEFINE_SHOW_ATTRIBUTE(tegra_smmu_mappings);
> +
> static void tegra_smmu_debugfs_init(struct tegra_smmu *smmu)
> {
> + const struct tegra_smmu_soc *soc = smmu->soc;
> + struct tegra_smmu_group_debug *group_debug;
> + struct device *dev = smmu->dev;
> + struct dentry *d;
> + int i;

You should use unsigned types for everything that isn't signed.

2021-03-12 01:13:30

by Nicolin Chen

[permalink] [raw]
Subject: Re: [PATCH v2] iommu/tegra-smmu: Add pagetable mappings to debugfs

On Thu, Mar 11, 2021 at 05:04:06PM +0300, Dmitry Osipenko wrote:
> 10.03.2021 06:36, Nicolin Chen пишет:
> ...
> > +static int tegra_smmu_mappings_show(struct seq_file *s, void *data)
> > +{
> > + struct tegra_smmu_group_debug *group_debug = s->private;
> > + const struct tegra_smmu_swgroup *group;
> > + struct tegra_smmu_as *as;
> > + struct tegra_smmu *smmu;
> > + int pd_index, pt_index;
>
> > +DEFINE_SHOW_ATTRIBUTE(tegra_smmu_mappings);
> > +
> > static void tegra_smmu_debugfs_init(struct tegra_smmu *smmu)
> > {
> > + const struct tegra_smmu_soc *soc = smmu->soc;
> > + struct tegra_smmu_group_debug *group_debug;
> > + struct device *dev = smmu->dev;
> > + struct dentry *d;
> > + int i;
>
> You should use unsigned types for everything that isn't signed.

Okay. Will fix. Thanks!