The following series of patches
- Add support for GPIO subsystem in main and wakeup domains.
- Add voltage regulator device tree nodes and their corresponding pinmux
to support power cycle and voltage switch required for UHS-I modes
- sets respective tags in sdhci0 node to support higher speeds
- remove no-1-8-v tag from sdhci1 node to support UHS-I modes
- Update delay values for various speed modes supported.
test logs
- eMMC HS400 speed mode
https://pastebin.ubuntu.com/p/xqZt34mRWf/
- SD SDR104 speed mode
https://pastebin.ubuntu.com/p/qM2H85SQvX/
- GPIO logs
https://pastebin.ubuntu.com/p/7WXdRxxdWz/
Changes since v6:
- Corrected the node name from vdd_sd_dv_pins_default to
vdd-sd-dv-pins-default
Changes since v5:
- Corrected the link in patch 3 as it broken.
- Added the version number for the references used in patch 3.
- picked up reviewed-by from grygorii for patches 1 and 2.
Changes since v4:
- Added main_i2c0 pinmux required for doing power cycles to MMCSD1
subsystem
- Updated delay values for various speed modes supported
- Corrected the ti,ngpio property to indicate highest gpio lines that
can be accessed.
- Reran the performace tests
Changes since v3:
- Removed patch (1 in v3).
- Rebased and included patches that add support for GPIO from series [1].
- Re-ran the performace tests for SD and eMMC.
Changes since v2:
- Added main_gpio0 DT node
- Added voltage regulator device tree nodes required to support UHS-I modes
Changes since v1:
- squashed the two patches into one
- added performance logs for the above mentioned speed modes
Aswath Govindraju (1):
arm64: dts: ti: k3-j7200: Add support for higher speed modes and
update delay select values for MMCSD subsystems
Faiz Abbas (2):
arm64: dts: ti: k3-j7200: Add gpio nodes
arm64: dts: ti: k3-j7200-common-proc-board: Disable unused gpio
modules
.../dts/ti/k3-j7200-common-proc-board.dts | 58 +++++++++++++
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 86 ++++++++++++++++++-
.../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 34 ++++++++
3 files changed, 176 insertions(+), 2 deletions(-)
--
2.17.1
The following speed modes are now supported in J7200 SoC,
- HS200 and HS400 modes at 1.8 V card voltage, in MMCSD0 subsystem [1].
- UHS-I speed modes in MMCSD1 subsystem [1].
Add support for UHS-I modes by adding voltage regulator device tree nodes
and corresponding pinmux details, to power cycle and voltage switch cards.
Set respective tags in sdhci0 and remove no-1-8-v tag from sdhci1
device tree nodes.
Also update the delay values for various speed modes supported, based on
the revised january 2021 J7200 datasheet[2].
[1] - section 12.3.6.1.1 MMCSD Features, in
https://www.ti.com/lit/ug/spruiu1a/spruiu1a.pdf,
(SPRUIU1A – JULY 2020 – REVISED JANUARY 2021)
[2] - https://www.ti.com/lit/ds/symlink/dra821u.pdf,
(SPRSP57B – APRIL 2020 – REVISED JANUARY 2021)
Signed-off-by: Aswath Govindraju <[email protected]>
---
.../dts/ti/k3-j7200-common-proc-board.dts | 42 +++++++++++++++++++
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 14 ++++++-
2 files changed, 54 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index b493f939b09a..de8c06bdc825 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
@@ -16,6 +16,29 @@
stdout-path = "serial2:115200n8";
bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
};
+
+ vdd_mmc1: fixedregulator-sd {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_mmc1";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ enable-active-high;
+ gpios = <&exp2 2 GPIO_ACTIVE_HIGH>;
+ };
+
+ vdd_sd_dv: gpio-regulator-vdd-sd-dv {
+ compatible = "regulator-gpio";
+ regulator-name = "vdd_sd_dv";
+ pinctrl-names = "default";
+ pinctrl-0 = <&vdd_sd_dv_pins_default>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ gpios = <&main_gpio0 55 GPIO_ACTIVE_HIGH>;
+ states = <1800000 0x0
+ 3300000 0x1>;
+ };
};
&wkup_pmx0 {
@@ -45,6 +68,13 @@
};
&main_pmx0 {
+ main_i2c0_pins_default: main-i2c0-pins-default {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */
+ J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */
+ >;
+ };
+
main_i2c1_pins_default: main-i2c1-pins-default {
pinctrl-single,pins = <
J721E_IOPAD(0xdc, PIN_INPUT_PULLUP, 3) /* (U3) ECAP0_IN_APWM_OUT.I2C1_SCL */
@@ -70,6 +100,12 @@
J721E_IOPAD(0x120, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
>;
};
+
+ vdd_sd_dv_pins_default: vdd-sd-dv-pins-default {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0xd0, PIN_INPUT, 7) /* (T5) SPI0_D1.GPIO0_55 */
+ >;
+ };
};
&wkup_uart0 {
@@ -157,6 +193,10 @@
};
&main_i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c0_pins_default>;
+ clock-frequency = <400000>;
+
exp1: gpio@20 {
compatible = "ti,tca6416";
reg = <0x20>;
@@ -206,6 +246,8 @@
/* SD card */
pinctrl-0 = <&main_mmc1_pins_default>;
pinctrl-names = "default";
+ vmmc-supply = <&vdd_mmc1>;
+ vqmmc-supply = <&vdd_sd_dv>;
ti,driver-strength-ohm = <50>;
disable-wp;
};
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
index e60650a62b14..f86c493a44f1 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
@@ -512,11 +512,16 @@
ti,otap-del-sel-mmc-hs = <0x0>;
ti,otap-del-sel-ddr52 = <0x6>;
ti,otap-del-sel-hs200 = <0x8>;
- ti,otap-del-sel-hs400 = <0x0>;
+ ti,otap-del-sel-hs400 = <0x5>;
+ ti,itap-del-sel-legacy = <0x10>;
+ ti,itap-del-sel-mmc-hs = <0xa>;
ti,strobe-sel = <0x77>;
+ ti,clkbuf-sel = <0x7>;
ti,trm-icp = <0x8>;
bus-width = <8>;
mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
dma-coherent;
};
@@ -534,7 +539,12 @@
ti,otap-del-sel-sdr50 = <0xc>;
ti,otap-del-sel-sdr104 = <0x5>;
ti,otap-del-sel-ddr50 = <0xc>;
- no-1-8-v;
+ ti,itap-del-sel-legacy = <0x0>;
+ ti,itap-del-sel-sd-hs = <0x0>;
+ ti,itap-del-sel-sdr12 = <0x0>;
+ ti,itap-del-sel-sdr25 = <0x0>;
+ ti,clkbuf-sel = <0x7>;
+ ti,trm-icp = <0x8>;
dma-coherent;
};
--
2.17.1
From: Faiz Abbas <[email protected]>
There are 6 gpio instances inside SoC with 2 groups as show below:
Group one: wkup_gpio0, wkup_gpio1
Group two: main_gpio0, main_gpio2, main_gpio4, main_gpio6
Only one instance from each group can be used at a time. So use main_gpio0
and wkup_gpio0 in current linux context and disable the rest of the nodes.
Signed-off-by: Faiz Abbas <[email protected]>
Signed-off-by: Sekhar Nori <[email protected]>
Signed-off-by: Aswath Govindraju <[email protected]>
Reviewed-by: Grygorii Strashko <[email protected]>
---
.../boot/dts/ti/k3-j7200-common-proc-board.dts | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index 4a7182abccf5..b493f939b09a 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
@@ -122,6 +122,22 @@
status = "disabled";
};
+&main_gpio2 {
+ status = "disabled";
+};
+
+&main_gpio4 {
+ status = "disabled";
+};
+
+&main_gpio6 {
+ status = "disabled";
+};
+
+&wkup_gpio1 {
+ status = "disabled";
+};
+
&mcu_cpsw {
pinctrl-names = "default";
pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
--
2.17.1
From: Faiz Abbas <[email protected]>
There are 4 instances of gpio modules in main domain:
gpio0, gpio2, gpio4 and gpio6
Groups are created to provide protection between different processor
virtual worlds. Each of these modules I/O pins are muxed within the
group. Exactly one module can be selected to control the corresponding
pin by selecting it in the pad mux configuration registers.
This group in main domain pins out 69 lines (5 banks). Add DT modes for
each module instance in the main domain.
Similar to the gpio groups in main domain, there is one gpio group in
wakeup domain with 2 module instances in it.
The gpio group pins out 72 pins (6 banks) of the first 85 gpio lines. Add
DT nodes for each module instance in the wakeup domain.
Signed-off-by: Faiz Abbas <[email protected]>
Signed-off-by: Sekhar Nori <[email protected]>
Signed-off-by: Aswath Govindraju <[email protected]>
Reviewed-by: Grygorii Strashko <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 72 +++++++++++++++++++
.../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 34 +++++++++
2 files changed, 106 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
index 17477ab0fd8e..e60650a62b14 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
@@ -672,6 +672,78 @@
};
};
+ main_gpio0: gpio@600000 {
+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
+ reg = <0x00 0x00600000 0x00 0x100>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&main_gpio_intr>;
+ interrupts = <145>, <146>, <147>, <148>,
+ <149>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ ti,ngpio = <69>;
+ ti,davinci-gpio-unbanked = <0>;
+ power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 105 0>;
+ clock-names = "gpio";
+ };
+
+ main_gpio2: gpio@610000 {
+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
+ reg = <0x00 0x00610000 0x00 0x100>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&main_gpio_intr>;
+ interrupts = <154>, <155>, <156>, <157>,
+ <158>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ ti,ngpio = <69>;
+ ti,davinci-gpio-unbanked = <0>;
+ power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 107 0>;
+ clock-names = "gpio";
+ };
+
+ main_gpio4: gpio@620000 {
+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
+ reg = <0x00 0x00620000 0x00 0x100>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&main_gpio_intr>;
+ interrupts = <163>, <164>, <165>, <166>,
+ <167>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ ti,ngpio = <69>;
+ ti,davinci-gpio-unbanked = <0>;
+ power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 109 0>;
+ clock-names = "gpio";
+ };
+
+ main_gpio6: gpio@630000 {
+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
+ reg = <0x00 0x00630000 0x00 0x100>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&main_gpio_intr>;
+ interrupts = <172>, <173>, <174>, <175>,
+ <176>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ ti,ngpio = <69>;
+ ti,davinci-gpio-unbanked = <0>;
+ power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 111 0>;
+ clock-names = "gpio";
+ };
+
main_r5fss0: r5fss@5c00000 {
compatible = "ti,j7200-r5fss";
ti,cluster-mode = <1>;
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
index 359e3e8a8cd0..1dd5b30edc6c 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
@@ -107,6 +107,40 @@
ti,interrupt-ranges = <16 960 16>;
};
+ wkup_gpio0: gpio@42110000 {
+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
+ reg = <0x00 0x42110000 0x00 0x100>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&wkup_gpio_intr>;
+ interrupts = <103>, <104>, <105>, <106>, <107>, <108>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ ti,ngpio = <85>;
+ ti,davinci-gpio-unbanked = <0>;
+ power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 113 0>;
+ clock-names = "gpio";
+ };
+
+ wkup_gpio1: gpio@42100000 {
+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
+ reg = <0x00 0x42100000 0x00 0x100>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&wkup_gpio_intr>;
+ interrupts = <112>, <113>, <114>, <115>, <116>, <117>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ ti,ngpio = <85>;
+ ti,davinci-gpio-unbanked = <0>;
+ power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 114 0>;
+ clock-names = "gpio";
+ };
+
mcu_navss: bus@28380000 {
compatible = "simple-mfd";
#address-cells = <2>;
--
2.17.1
On 18:42-20210322, Aswath Govindraju wrote:
> The following speed modes are now supported in J7200 SoC,
> - HS200 and HS400 modes at 1.8 V card voltage, in MMCSD0 subsystem [1].
> - UHS-I speed modes in MMCSD1 subsystem [1].
>
> Add support for UHS-I modes by adding voltage regulator device tree nodes
> and corresponding pinmux details, to power cycle and voltage switch cards.
> Set respective tags in sdhci0 and remove no-1-8-v tag from sdhci1
> device tree nodes.
>
> Also update the delay values for various speed modes supported, based on
> the revised january 2021 J7200 datasheet[2].
>
> [1] - section 12.3.6.1.1 MMCSD Features, in
> https://www.ti.com/lit/ug/spruiu1a/spruiu1a.pdf,
> (SPRUIU1A – JULY 2020 – REVISED JANUARY 2021)
>
> [2] - https://www.ti.com/lit/ds/symlink/dra821u.pdf,
> (SPRSP57B – APRIL 2020 – REVISED JANUARY 2021)
>
> Signed-off-by: Aswath Govindraju <[email protected]>
> ---
> .../dts/ti/k3-j7200-common-proc-board.dts | 42 +++++++++++++++++++
> arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 14 ++++++-
> 2 files changed, 54 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
> index b493f939b09a..de8c06bdc825 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
> @@ -16,6 +16,29 @@
> stdout-path = "serial2:115200n8";
> bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
> };
> +
> + vdd_mmc1: fixedregulator-sd {
> + compatible = "regulator-fixed";
> + regulator-name = "vdd_mmc1";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + enable-active-high;
> + gpios = <&exp2 2 GPIO_ACTIVE_HIGH>;
is that gpio ?
I'd encourage to use vin-supply as well.
> + };
> +
> + vdd_sd_dv: gpio-regulator-vdd-sd-dv {
What does this drive? TLV71033 ?
> + compatible = "regulator-gpio";
> + regulator-name = "vdd_sd_dv";
> + pinctrl-names = "default";
> + pinctrl-0 = <&vdd_sd_dv_pins_default>;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
normally, I'd encourage to use vin-supply as well.
> + gpios = <&main_gpio0 55 GPIO_ACTIVE_HIGH>;
> + states = <1800000 0x0
> + 3300000 0x1>;
states = <1800000 0x0>,
<3300000 0x1>;
Can you look at j721e as reference?
> + };
> };
>
Kishon,
can you look closer at this series?
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
Hi Nishanth,
On 22/03/21 9:05 pm, Nishanth Menon wrote:
> On 18:42-20210322, Aswath Govindraju wrote:
>> The following speed modes are now supported in J7200 SoC,
>> - HS200 and HS400 modes at 1.8 V card voltage, in MMCSD0 subsystem [1].
>> - UHS-I speed modes in MMCSD1 subsystem [1].
>>
>> Add support for UHS-I modes by adding voltage regulator device tree nodes
>> and corresponding pinmux details, to power cycle and voltage switch cards.
>> Set respective tags in sdhci0 and remove no-1-8-v tag from sdhci1
>> device tree nodes.
>>
>> Also update the delay values for various speed modes supported, based on
>> the revised january 2021 J7200 datasheet[2].
>>
>> [1] - section 12.3.6.1.1 MMCSD Features, in
>> https://www.ti.com/lit/ug/spruiu1a/spruiu1a.pdf,
>> (SPRUIU1A – JULY 2020 – REVISED JANUARY 2021)
>>
>> [2] - https://www.ti.com/lit/ds/symlink/dra821u.pdf,
>> (SPRSP57B – APRIL 2020 – REVISED JANUARY 2021)
>>
>> Signed-off-by: Aswath Govindraju <[email protected]>
>> ---
>> .../dts/ti/k3-j7200-common-proc-board.dts | 42 +++++++++++++++++++
>> arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 14 ++++++-
>> 2 files changed, 54 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
>> index b493f939b09a..de8c06bdc825 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
>> +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
>> @@ -16,6 +16,29 @@
>> stdout-path = "serial2:115200n8";
>> bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
>> };
>> +
>> + vdd_mmc1: fixedregulator-sd {
>> + compatible = "regulator-fixed";
>> + regulator-name = "vdd_mmc1";
>> + regulator-min-microvolt = <3300000>;
>> + regulator-max-microvolt = <3300000>;
>> + regulator-boot-on;
>> + enable-active-high;
>> + gpios = <&exp2 2 GPIO_ACTIVE_HIGH>;
>
> is that gpio ?
Yes, that is correct. I'll correct it in the respin
> I'd encourage to use vin-supply as well.
Will add this in respin.
>
>> + };
>> +
>> + vdd_sd_dv: gpio-regulator-vdd-sd-dv {
> What does this drive? TLV71033 ?
Yes, this node models the TLV71033 voltage regulator that switches the
MMC IO signal voltage level between 3.3V and 1.8V.
>> + compatible = "regulator-gpio";
>> + regulator-name = "vdd_sd_dv";
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&vdd_sd_dv_pins_default>;
>> + regulator-min-microvolt = <1800000>;
>> + regulator-max-microvolt = <3300000>;
>> + regulator-boot-on;
>
> normally, I'd encourage to use vin-supply as well.
Will add this in the respin
>
>> + gpios = <&main_gpio0 55 GPIO_ACTIVE_HIGH>;
>> + states = <1800000 0x0
>> + 3300000 0x1>;
> states = <1800000 0x0>,
> <3300000 0x1>;
>
Will make this change in the respin.
> Can you look at j721e as reference?
>
Will make changes accordingly.
>> + };
>> };
>>
>
> Kishon,
> can you look closer at this series?
>
I'll wait for kishon's feedback and then post respin of this series.
Thank you for the review.
Regards,
Aswath
Hi Aswath,
On 23/03/21 10:54 am, Aswath Govindraju wrote:
> Hi Nishanth,
>
> On 22/03/21 9:05 pm, Nishanth Menon wrote:
>> On 18:42-20210322, Aswath Govindraju wrote:
>>> The following speed modes are now supported in J7200 SoC,
>>> - HS200 and HS400 modes at 1.8 V card voltage, in MMCSD0 subsystem [1].
>>> - UHS-I speed modes in MMCSD1 subsystem [1].
>>>
>>> Add support for UHS-I modes by adding voltage regulator device tree nodes
>>> and corresponding pinmux details, to power cycle and voltage switch cards.
>>> Set respective tags in sdhci0 and remove no-1-8-v tag from sdhci1
>>> device tree nodes.
>>>
>>> Also update the delay values for various speed modes supported, based on
>>> the revised january 2021 J7200 datasheet[2].
>>>
>>> [1] - section 12.3.6.1.1 MMCSD Features, in
>>> https://www.ti.com/lit/ug/spruiu1a/spruiu1a.pdf,
>>> (SPRUIU1A – JULY 2020 – REVISED JANUARY 2021)
>>>
>>> [2] - https://www.ti.com/lit/ds/symlink/dra821u.pdf,
>>> (SPRSP57B – APRIL 2020 – REVISED JANUARY 2021)
>>>
>>> Signed-off-by: Aswath Govindraju <[email protected]>
>>> ---
>>> .../dts/ti/k3-j7200-common-proc-board.dts | 42 +++++++++++++++++++
>>> arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 14 ++++++-
>>> 2 files changed, 54 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
>>> index b493f939b09a..de8c06bdc825 100644
>>> --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
>>> +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
>>> @@ -16,6 +16,29 @@
>>> stdout-path = "serial2:115200n8";
>>> bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
>>> };
>>> +
>>> + vdd_mmc1: fixedregulator-sd {
>>> + compatible = "regulator-fixed";
>>> + regulator-name = "vdd_mmc1";
>>> + regulator-min-microvolt = <3300000>;
>>> + regulator-max-microvolt = <3300000>;
>>> + regulator-boot-on;
>>> + enable-active-high;
>>> + gpios = <&exp2 2 GPIO_ACTIVE_HIGH>;
>>
>> is that gpio ?
>
> Yes, that is correct. I'll correct it in the respin
>
>> I'd encourage to use vin-supply as well.
>
> Will add this in respin.
>
>>
>>> + };
>>> +
>>> + vdd_sd_dv: gpio-regulator-vdd-sd-dv {
>> What does this drive? TLV71033 ?
>
> Yes, this node models the TLV71033 voltage regulator that switches the
> MMC IO signal voltage level between 3.3V and 1.8V.
Nope. Unlike J721e SOM which uses TLV71033 for switching voltage, J7200
SOM directly uses GPIO input to PMIC to control the output voltage. So
this should model the gpio input to PMIC.
Thanks
Kishon
Hi Kishon,
On 23/03/21 11:59 am, Kishon Vijay Abraham I wrote:
> Hi Aswath,
>
> On 23/03/21 10:54 am, Aswath Govindraju wrote:
>> Hi Nishanth,
>>
>> On 22/03/21 9:05 pm, Nishanth Menon wrote:
>>> On 18:42-20210322, Aswath Govindraju wrote:
>>>> The following speed modes are now supported in J7200 SoC,
>>>> - HS200 and HS400 modes at 1.8 V card voltage, in MMCSD0 subsystem [1].
>>>> - UHS-I speed modes in MMCSD1 subsystem [1].
>>>>
>>>> Add support for UHS-I modes by adding voltage regulator device tree nodes
>>>> and corresponding pinmux details, to power cycle and voltage switch cards.
>>>> Set respective tags in sdhci0 and remove no-1-8-v tag from sdhci1
>>>> device tree nodes.
>>>>
>>>> Also update the delay values for various speed modes supported, based on
>>>> the revised january 2021 J7200 datasheet[2].
>>>>
>>>> [1] - section 12.3.6.1.1 MMCSD Features, in
>>>> https://www.ti.com/lit/ug/spruiu1a/spruiu1a.pdf,
>>>> (SPRUIU1A – JULY 2020 – REVISED JANUARY 2021)
>>>>
>>>> [2] - https://www.ti.com/lit/ds/symlink/dra821u.pdf,
>>>> (SPRSP57B – APRIL 2020 – REVISED JANUARY 2021)
>>>>
>>>> Signed-off-by: Aswath Govindraju <[email protected]>
>>>> ---
>>>> .../dts/ti/k3-j7200-common-proc-board.dts | 42 +++++++++++++++++++
>>>> arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 14 ++++++-
>>>> 2 files changed, 54 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
>>>> index b493f939b09a..de8c06bdc825 100644
>>>> --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
>>>> +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
>>>> @@ -16,6 +16,29 @@
>>>> stdout-path = "serial2:115200n8";
>>>> bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
>>>> };
>>>> +
>>>> + vdd_mmc1: fixedregulator-sd {
>>>> + compatible = "regulator-fixed";
>>>> + regulator-name = "vdd_mmc1";
>>>> + regulator-min-microvolt = <3300000>;
>>>> + regulator-max-microvolt = <3300000>;
>>>> + regulator-boot-on;
>>>> + enable-active-high;
>>>> + gpios = <&exp2 2 GPIO_ACTIVE_HIGH>;
>>>
>>> is that gpio ?
>>
>> Yes, that is correct. I'll correct it in the respin
>>
>>> I'd encourage to use vin-supply as well.
>>
>> Will add this in respin.
>>
>>>
>>>> + };
>>>> +
>>>> + vdd_sd_dv: gpio-regulator-vdd-sd-dv {
>>> What does this drive? TLV71033 ?
>>
>> Yes, this node models the TLV71033 voltage regulator that switches the
>> MMC IO signal voltage level between 3.3V and 1.8V.
>
> Nope. Unlike J721e SOM which uses TLV71033 for switching voltage, J7200
> SOM directly uses GPIO input to PMIC to control the output voltage. So
> this should model the gpio input to PMIC.
>
This was the case with older SoMs and on newer ones load switches are
being used[1].
[1] - https://www.ti.com/lit/zip/sprr424, PROC105E6(001)_SCH.pdf, page 24
Thanks,
Aswath