2021-10-14 08:01:16

by Sam Shih

Subject: [PATCH v7 0/4] Mediatek MT7986 pinctrl support

This patch series add pinctrl support for mediatek mt7986 SoC series.
It is based on patch series "Add basic SoC support for mediatek mt7986":
https://lore.kernel.org/all/[email protected]/

---
v7 : separate pinctrl part into a single patch series

According to the maintainer’s suggestion, this patch splits the previous
thread into independent patch series.
This patch include clock driver and device tree update

Original thread:
https://lore.kernel.org/all/[email protected]/
---

Sam Shih (4):
dt-bindings: pinctrl: update bindings for MT7986 SoC
pinctrl: mediatek: add support for MT7986 SoC
arm64: dts: mediatek: add pinctrl support for mt7986a
arm64: dts: mediatek: add pinctrl support for mt7986b

.../pinctrl/mediatek,mt7986-pinctrl.yaml | 363 +++++++
arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 20 +
arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 21 +
arch/arm64/boot/dts/mediatek/mt7986b.dtsi | 21 +
drivers/pinctrl/mediatek/Kconfig | 7 +
drivers/pinctrl/mediatek/Makefile | 1 +
drivers/pinctrl/mediatek/pinctrl-mt7986.c | 927 ++++++++++++++++++
7 files changed, 1360 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
create mode 100644 drivers/pinctrl/mediatek/pinctrl-mt7986.c

--
2.29.2

2021-10-14 08:02:01

by Sam Shih

Subject: [PATCH v7 3/4] arm64: dts: mediatek: add pinctrl support for mt7986a

Add mt7986a pinctrl node, and update pinmux setting for mt7986a

Signed-off-by: Sam Shih <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 20 +++++++++++++++++++
arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 21 ++++++++++++++++++++
2 files changed, 41 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
index 5348fc427463..0a54b1ed4fce 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
@@ -26,9 +26,29 @@ &uart0 {
};

&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
status = "okay";
};

&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
status = "okay";
};
+
+&pio {
+ uart1_pins: uart1-pins {
+ mux {
+ function = "uart";
+ groups = "uart1";
+ };
+ };
+
+ uart2_pins: uart2-pins {
+ mux {
+ function = "uart";
+ groups = "uart2";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
index a8cf0eb79688..c59a27aa86e2 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
@@ -128,6 +128,27 @@ apmixedsys: apmixedsys@1001e000 {
#clock-cells = <1>;
};

+ pio: pinctrl@1001f000 {
+ compatible = "mediatek,mt7986a-pinctrl";
+ reg = <0 0x1001f000 0 0x1000>,
+ <0 0x11c30000 0 0x1000>,
+ <0 0x11c40000 0 0x1000>,
+ <0 0x11e20000 0 0x1000>,
+ <0 0x11e30000 0 0x1000>,
+ <0 0x11f00000 0 0x1000>,
+ <0 0x11f10000 0 0x1000>,
+ <0 0x1000b000 0 0x1000>;
+ reg-names = "gpio", "iocfg_rt", "iocfg_rb", "iocfg_lt",
+ "iocfg_lb", "iocfg_tr", "iocfg_tl", "eint";
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pio 0 0 100>;
+ interrupt-controller;
+ interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-parent = <&gic>;
+ #interrupt-cells = <2>;
+ };
+
sgmiisys0: syscon@10060000 {
compatible = "mediatek,mt7986-sgmiisys_0",
"syscon";
--
2.29.2