On the StarFive JH7100 RISC-V SoC the UART core clocks can't be set to
exactly 16 * 115200Hz and many other common bitrates. Trying this will
only result in a higher input clock, but low enough that the UART's
internal divisor can't come close enough to the baud rate target.
So rather than try to set the input clock it's better to skip the
clk_set_rate call and rely solely on the UART's internal divisor.
Signed-off-by: Emil Renner Berthing <[email protected]>
---
drivers/tty/serial/8250/8250_dw.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
index 53f57c3b9f42..1769808031c5 100644
--- a/drivers/tty/serial/8250/8250_dw.c
+++ b/drivers/tty/serial/8250/8250_dw.c
@@ -414,6 +414,8 @@ static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data)
if (of_device_is_compatible(np, "marvell,armada-38x-uart"))
p->serial_out = dw8250_serial_out38x;
+ if (of_device_is_compatible(np, "starfive,jh7100-uart"))
+ p->set_termios = dw8250_do_set_termios;
} else if (acpi_dev_present("APMC0D08", NULL, -1)) {
p->iotype = UPIO_MEM32;
@@ -696,6 +698,7 @@ static const struct of_device_id dw8250_of_match[] = {
{ .compatible = "cavium,octeon-3860-uart" },
{ .compatible = "marvell,armada-38x-uart" },
{ .compatible = "renesas,rzn1-uart" },
+ { .compatible = "starfive,jh7100-uart" },
{ /* Sentinel */ }
};
MODULE_DEVICE_TABLE(of, dw8250_of_match);
--
2.33.1
On Tue, Nov 2, 2021 at 6:44 PM Emil Renner Berthing <[email protected]> wrote:
>
> On the StarFive JH7100 RISC-V SoC the UART core clocks can't be set to
> exactly 16 * 115200Hz and many other common bitrates. Trying this will
> only result in a higher input clock, but low enough that the UART's
> internal divisor can't come close enough to the baud rate target.
> So rather than try to set the input clock it's better to skip the
> clk_set_rate call and rely solely on the UART's internal divisor.
Bingo!
Reviewed-by: Andy Shevchenko <[email protected]>
> Signed-off-by: Emil Renner Berthing <[email protected]>
> ---
> drivers/tty/serial/8250/8250_dw.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
> index 53f57c3b9f42..1769808031c5 100644
> --- a/drivers/tty/serial/8250/8250_dw.c
> +++ b/drivers/tty/serial/8250/8250_dw.c
> @@ -414,6 +414,8 @@ static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data)
>
> if (of_device_is_compatible(np, "marvell,armada-38x-uart"))
> p->serial_out = dw8250_serial_out38x;
> + if (of_device_is_compatible(np, "starfive,jh7100-uart"))
> + p->set_termios = dw8250_do_set_termios;
>
> } else if (acpi_dev_present("APMC0D08", NULL, -1)) {
> p->iotype = UPIO_MEM32;
> @@ -696,6 +698,7 @@ static const struct of_device_id dw8250_of_match[] = {
> { .compatible = "cavium,octeon-3860-uart" },
> { .compatible = "marvell,armada-38x-uart" },
> { .compatible = "renesas,rzn1-uart" },
> + { .compatible = "starfive,jh7100-uart" },
> { /* Sentinel */ }
> };
> MODULE_DEVICE_TABLE(of, dw8250_of_match);
> --
> 2.33.1
>
--
With Best Regards,
Andy Shevchenko
Hi Esmil,
On Tue, Nov 2, 2021 at 5:12 PM Emil Renner Berthing <[email protected]> wrote:
> On the StarFive JH7100 RISC-V SoC the UART core clocks can't be set to
> exactly 16 * 115200Hz and many other common bitrates. Trying this will
> only result in a higher input clock, but low enough that the UART's
> internal divisor can't come close enough to the baud rate target.
> So rather than try to set the input clock it's better to skip the
> clk_set_rate call and rely solely on the UART's internal divisor.
>
> Signed-off-by: Emil Renner Berthing <[email protected]>
Thanks for your patch!
Reviewed-by: Geert Uytterhoeven <[email protected]>
> --- a/drivers/tty/serial/8250/8250_dw.c
> +++ b/drivers/tty/serial/8250/8250_dw.c
> @@ -414,6 +414,8 @@ static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data)
>
> if (of_device_is_compatible(np, "marvell,armada-38x-uart"))
> p->serial_out = dw8250_serial_out38x;
> + if (of_device_is_compatible(np, "starfive,jh7100-uart"))
> + p->set_termios = dw8250_do_set_termios;
BTW, it would be great for a follow-up patch to get rid of
all these of_device_is_compatible() checks, and start using
dw8250_of_match[...].data instead.
>
> } else if (acpi_dev_present("APMC0D08", NULL, -1)) {
> p->iotype = UPIO_MEM32;
> @@ -696,6 +698,7 @@ static const struct of_device_id dw8250_of_match[] = {
> { .compatible = "cavium,octeon-3860-uart" },
> { .compatible = "marvell,armada-38x-uart" },
> { .compatible = "renesas,rzn1-uart" },
> + { .compatible = "starfive,jh7100-uart" },
> { /* Sentinel */ }
> };
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds