This adds a gpio-driver which multiplexes existing GPIOs using latches.
Uwe asked [1] if that would be accectable as a new gpio driver, and here
is the result. For a better description what this is all about have a
look at the drawings in the patches.
The driver is pretty much straight forward. The only thing I wasn't sure
about is in which category in Kconfig the driver should be sorted in. I
decided for "Virtual GPIO drivers" which is not an exact match, but the
best I could find in the existing categories.
Sascha
[1] https://lore.kernel.org/all/CACRpkdaBO=JzokGUF6uXZc7ASVD7LjqBxTLGwX-FShM=A9gw9A@mail.gmail.com/t/
Sascha Hauer (2):
gpio: Add gpio latch driver
dt-bindings: gpio: Add gpio-latch binding document
.../devicetree/bindings/gpio/gpio-latch.yaml | 83 ++++++++
drivers/gpio/Kconfig | 6 +
drivers/gpio/Makefile | 1 +
drivers/gpio/gpio-latch.c | 188 ++++++++++++++++++
4 files changed, 278 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpio/gpio-latch.yaml
create mode 100644 drivers/gpio/gpio-latch.c
--
2.30.2
This driver implements a GPIO multiplexer based on latches connected to
other GPIOs. A set of data GPIOs is connected to the data input of
multiple latches. The clock input of each latch is driven by another
set of GPIOs. With two 8-bit latches 10 GPIOs can be multiplexed into
16 GPIOs. GPOs might be a better term as in fact the multiplexed pins
are output only.
Signed-off-by: Sascha Hauer <[email protected]>
---
drivers/gpio/Kconfig | 6 ++
drivers/gpio/Makefile | 1 +
drivers/gpio/gpio-latch.c | 188 ++++++++++++++++++++++++++++++++++++++
3 files changed, 195 insertions(+)
create mode 100644 drivers/gpio/gpio-latch.c
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 0642f579196f2..e4603810ec910 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -1690,6 +1690,12 @@ config GPIO_AGGREGATOR
industrial control context, to be operated from userspace using
the GPIO chardev interface.
+config GPIO_LATCH
+ tristate "GPIO latch driver"
+ help
+ Say yes here to enable a driver for GPIO multiplexers based on latches
+ connected to other GPIOs.
+
config GPIO_MOCKUP
tristate "GPIO Testing Driver"
select IRQ_SIM
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index a0985d30f51bb..310fa08decc69 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -75,6 +75,7 @@ obj-$(CONFIG_GPIO_IT87) += gpio-it87.o
obj-$(CONFIG_GPIO_IXP4XX) += gpio-ixp4xx.o
obj-$(CONFIG_GPIO_JANZ_TTL) += gpio-janz-ttl.o
obj-$(CONFIG_GPIO_KEMPLD) += gpio-kempld.o
+obj-$(CONFIG_GPIO_LATCH) += gpio-latch.o
obj-$(CONFIG_GPIO_LOGICVC) += gpio-logicvc.o
obj-$(CONFIG_GPIO_LOONGSON1) += gpio-loongson1.o
obj-$(CONFIG_GPIO_LOONGSON) += gpio-loongson.o
diff --git a/drivers/gpio/gpio-latch.c b/drivers/gpio/gpio-latch.c
new file mode 100644
index 0000000000000..117fcadf76a51
--- /dev/null
+++ b/drivers/gpio/gpio-latch.c
@@ -0,0 +1,188 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * GPIO latch driver
+ *
+ * Copyright (C) 2022 Sascha Hauer <[email protected]>
+ *
+ * This driver implements a GPIO (or better GPO as there is no input)
+ * multiplexer based on latches like this:
+ *
+ * CLK0 ----------------------. ,--------.
+ * CLK1 -------------------. `--------|> #0 |
+ * | | |
+ * OUT0 ----------------+--|-----------|D0 Q0|-----|<
+ * OUT1 --------------+-|--|-----------|D1 Q1|-----|<
+ * OUT2 ------------+-|-|--|-----------|D2 Q2|-----|<
+ * OUT3 ----------+-|-|-|--|-----------|D3 Q3|-----|<
+ * OUT4 --------+-|-|-|-|--|-----------|D4 Q4|-----|<
+ * OUT5 ------+-|-|-|-|-|--|-----------|D5 Q5|-----|<
+ * OUT6 ----+-|-|-|-|-|-|--|-----------|D6 Q6|-----|<
+ * OUT7 --+-|-|-|-|-|-|-|--|-----------|D7 Q7|-----|<
+ * | | | | | | | | | `--------'
+ * | | | | | | | | |
+ * | | | | | | | | | ,--------.
+ * | | | | | | | | `-----------|> #1 |
+ * | | | | | | | | | |
+ * | | | | | | | `--------------|D0 Q0|-----|<
+ * | | | | | | `----------------|D1 Q1|-----|<
+ * | | | | | `------------------|D2 Q2|-----|<
+ * | | | | `--------------------|D3 Q3|-----|<
+ * | | | `----------------------|D4 Q4|-----|<
+ * | | `------------------------|D5 Q5|-----|<
+ * | `--------------------------|D6 Q6|-----|<
+ * `----------------------------|D7 Q7|-----|<
+ * `--------'
+ *
+ * The above is just an example. The actual number of number of latches and
+ * the number of inputs per latch is derived from the number of GPIOs given
+ * in the corresponding device tree properties.
+ */
+
+#include <linux/err.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/gpio/driver.h>
+#include <linux/platform_device.h>
+#include <linux/gpio/consumer.h>
+
+#include "gpiolib.h"
+
+struct gpio_latch_priv {
+ struct gpio_chip gc;
+ struct gpio_descs *clk_gpios;
+ struct gpio_descs *data_gpios;
+ spinlock_t lock;
+ int n_ports;
+ int n_pins;
+ unsigned int *shadow;
+ struct mutex mutex;
+ spinlock_t spinlock;
+};
+
+static const struct of_device_id gpio_latch_ids[] = {
+ {
+ .compatible = "gpio-latch",
+ }, {
+ /* sentinel */
+ }
+};
+MODULE_DEVICE_TABLE(of, gpio_latch_ids);
+
+static int gpio_latch_get_direction(struct gpio_chip *gc, unsigned int offset)
+{
+ return GPIO_LINE_DIRECTION_OUT;
+}
+
+static void __gpio_latch_set(struct gpio_latch_priv *priv, unsigned int offset, int val)
+{
+ int latch = offset / priv->n_pins;
+ int i;
+
+ if (val)
+ priv->shadow[latch] |= BIT(offset % priv->n_pins);
+ else
+ priv->shadow[latch] &= ~BIT(offset % priv->n_pins);
+
+ for (i = 0; i < priv->n_pins; i++)
+ gpiod_set_value(priv->data_gpios->desc[i], priv->shadow[latch] & BIT(i));
+
+ gpiod_set_value(priv->clk_gpios->desc[latch], 1);
+ gpiod_set_value(priv->clk_gpios->desc[latch], 0);
+}
+
+static void gpio_latch_set(struct gpio_chip *gc, unsigned int offset, int val)
+{
+ struct gpio_latch_priv *priv = gpiochip_get_data(gc);
+ unsigned long flags;
+
+ spin_lock_irqsave(&priv->spinlock, flags);
+
+ __gpio_latch_set(priv, offset, val);
+
+ spin_unlock_irqrestore(&priv->spinlock, flags);
+}
+
+static void gpio_latch_set_can_sleep(struct gpio_chip *gc, unsigned int offset, int val)
+{
+ struct gpio_latch_priv *priv = gpiochip_get_data(gc);
+
+ mutex_lock(&priv->mutex);
+
+ __gpio_latch_set(priv, offset, val);
+
+ mutex_unlock(&priv->mutex);
+}
+
+static bool gpio_latch_can_sleep(struct gpio_latch_priv *priv)
+{
+ int i;
+
+ for (i = 0; i < priv->n_ports; i++)
+ if (gpiod_cansleep(priv->clk_gpios->desc[i]))
+ return true;
+
+ for (i = 0; i < priv->n_pins; i++)
+ if (gpiod_cansleep(priv->data_gpios->desc[i]))
+ return true;
+
+ return false;
+}
+
+static int gpio_latch_probe(struct platform_device *pdev)
+{
+ struct gpio_latch_priv *priv;
+
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ priv->clk_gpios = devm_gpiod_get_array(&pdev->dev, "clk", GPIOD_OUT_LOW);
+ if (IS_ERR(priv->clk_gpios))
+ return PTR_ERR(priv->clk_gpios);
+
+ priv->data_gpios = devm_gpiod_get_array(&pdev->dev, "data", GPIOD_OUT_LOW);
+ if (IS_ERR(priv->data_gpios))
+ return PTR_ERR(priv->data_gpios);
+
+ priv->n_ports = priv->clk_gpios->ndescs;
+ priv->n_pins = priv->data_gpios->ndescs;
+
+ priv->shadow = devm_kcalloc(&pdev->dev, priv->n_ports, sizeof(*priv->shadow),
+ GFP_KERNEL);
+ if (!priv->shadow)
+ return -ENOMEM;
+
+ if (gpio_latch_can_sleep(priv)) {
+ priv->gc.can_sleep = true;
+ priv->gc.set = gpio_latch_set_can_sleep;
+ mutex_init(&priv->mutex);
+ } else {
+ priv->gc.can_sleep = false;
+ priv->gc.set = gpio_latch_set;
+ spin_lock_init(&priv->spinlock);
+ }
+
+ priv->gc.get_direction = gpio_latch_get_direction;
+ priv->gc.ngpio = priv->n_ports * priv->n_pins;
+ priv->gc.owner = THIS_MODULE;
+ priv->gc.base = -1;
+ priv->gc.parent = &pdev->dev;
+ priv->gc.of_node = pdev->dev.of_node;
+
+ platform_set_drvdata(pdev, priv);
+
+ return devm_gpiochip_add_data(&pdev->dev, &priv->gc, priv);
+}
+
+static struct platform_driver gpio_latch_driver = {
+ .driver = {
+ .name = "gpio-latch",
+ .of_match_table = gpio_latch_ids,
+ },
+ .probe = gpio_latch_probe,
+};
+module_platform_driver(gpio_latch_driver);
+
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Sascha Hauer <[email protected]>");
+MODULE_DESCRIPTION("GPIO latch driver");
--
2.30.2
This adds a binding for a GPIO multiplexer driver based on latches
connected to other GPIOs.
Signed-off-by: Sascha Hauer <[email protected]>
---
.../devicetree/bindings/gpio/gpio-latch.yaml | 83 +++++++++++++++++++
1 file changed, 83 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpio/gpio-latch.yaml
diff --git a/Documentation/devicetree/bindings/gpio/gpio-latch.yaml b/Documentation/devicetree/bindings/gpio/gpio-latch.yaml
new file mode 100644
index 0000000000000..0652c9d2130af
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-latch.yaml
@@ -0,0 +1,83 @@
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpio/gpio-latch.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: GPIO latch controller
+
+maintainers:
+ - Sascha Hauer <[email protected]>
+
+description: |
+ This binding describes a GPIO multiplexer based on latches connected to
+ other GPIOs, like this:
+
+ CLK0 ----------------------. ,--------.
+ CLK1 -------------------. `--------|> #0 |
+ | | |
+ OUT0 ----------------+--|-----------|D0 Q0|-----|<
+ OUT1 --------------+-|--|-----------|D1 Q1|-----|<
+ OUT2 ------------+-|-|--|-----------|D2 Q2|-----|<
+ OUT3 ----------+-|-|-|--|-----------|D3 Q3|-----|<
+ OUT4 --------+-|-|-|-|--|-----------|D4 Q4|-----|<
+ OUT5 ------+-|-|-|-|-|--|-----------|D5 Q5|-----|<
+ OUT6 ----+-|-|-|-|-|-|--|-----------|D6 Q6|-----|<
+ OUT7 --+-|-|-|-|-|-|-|--|-----------|D7 Q7|-----|<
+ | | | | | | | | | `--------'
+ | | | | | | | | |
+ | | | | | | | | | ,--------.
+ | | | | | | | | `-----------|> #1 |
+ | | | | | | | | | |
+ | | | | | | | `--------------|D0 Q0|-----|<
+ | | | | | | `----------------|D1 Q1|-----|<
+ | | | | | `------------------|D2 Q2|-----|<
+ | | | | `--------------------|D3 Q3|-----|<
+ | | | `----------------------|D4 Q4|-----|<
+ | | `------------------------|D5 Q5|-----|<
+ | `--------------------------|D6 Q6|-----|<
+ `----------------------------|D7 Q7|-----|<
+ `--------'
+
+ The number of clk-gpios and data-gpios is not fixed. The actual number of
+ GPIOs used for clk and data are taken from the corresponding array lengths.
+
+properties:
+ compatible:
+ const: gpio-latch
+ "#gpio-cells":
+ const: 2
+
+ clk-gpios:
+ description: Array of GPIOs to be used to clock a latch
+
+ data-gpios:
+ description: Array of GPIOs to be used as data GPIOs
+
+ gpio-controller: true
+
+ gpio-line-names: true
+
+required:
+ - compatible
+ - "#gpio-cells"
+ - gpio-controller
+ - clk-gpios
+ - data-gpios
+
+additionalProperties: false
+
+examples:
+ - |
+ gpio-latch {
+ #gpio-cells = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_di_do_leds>;
+ compatible = "gpio-latch";
+ gpio-controller;
+
+ clk-gpios = <&gpio3 7 0>, <&gpio3 8 0>;
+ data-gpios = <&gpio3 21 0>, <&gpio3 22 0>,
+ <&gpio3 23 0>, <&gpio3 24 0>,
+ <&gpio3 25 0>, <&gpio3 26 0>,
+ <&gpio3 27 0>, <&gpio3 28 0>;
+ };
--
2.30.2
Hi Sascha,
nice patche, please see inline.
On 22-08-25, Sascha Hauer wrote:
> This driver implements a GPIO multiplexer based on latches connected to
> other GPIOs. A set of data GPIOs is connected to the data input of
> multiple latches. The clock input of each latch is driven by another
> set of GPIOs. With two 8-bit latches 10 GPIOs can be multiplexed into
> 16 GPIOs. GPOs might be a better term as in fact the multiplexed pins
> are output only.
>
> Signed-off-by: Sascha Hauer <[email protected]>
> ---
> drivers/gpio/Kconfig | 6 ++
> drivers/gpio/Makefile | 1 +
> drivers/gpio/gpio-latch.c | 188 ++++++++++++++++++++++++++++++++++++++
> 3 files changed, 195 insertions(+)
> create mode 100644 drivers/gpio/gpio-latch.c
>
> diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
> index 0642f579196f2..e4603810ec910 100644
> --- a/drivers/gpio/Kconfig
> +++ b/drivers/gpio/Kconfig
> @@ -1690,6 +1690,12 @@ config GPIO_AGGREGATOR
> industrial control context, to be operated from userspace using
> the GPIO chardev interface.
>
> +config GPIO_LATCH
> + tristate "GPIO latch driver"
> + help
> + Say yes here to enable a driver for GPIO multiplexers based on latches
> + connected to other GPIOs.
> +
> config GPIO_MOCKUP
> tristate "GPIO Testing Driver"
> select IRQ_SIM
> diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
> index a0985d30f51bb..310fa08decc69 100644
> --- a/drivers/gpio/Makefile
> +++ b/drivers/gpio/Makefile
> @@ -75,6 +75,7 @@ obj-$(CONFIG_GPIO_IT87) += gpio-it87.o
> obj-$(CONFIG_GPIO_IXP4XX) += gpio-ixp4xx.o
> obj-$(CONFIG_GPIO_JANZ_TTL) += gpio-janz-ttl.o
> obj-$(CONFIG_GPIO_KEMPLD) += gpio-kempld.o
> +obj-$(CONFIG_GPIO_LATCH) += gpio-latch.o
> obj-$(CONFIG_GPIO_LOGICVC) += gpio-logicvc.o
> obj-$(CONFIG_GPIO_LOONGSON1) += gpio-loongson1.o
> obj-$(CONFIG_GPIO_LOONGSON) += gpio-loongson.o
> diff --git a/drivers/gpio/gpio-latch.c b/drivers/gpio/gpio-latch.c
> new file mode 100644
> index 0000000000000..117fcadf76a51
> --- /dev/null
> +++ b/drivers/gpio/gpio-latch.c
> @@ -0,0 +1,188 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * GPIO latch driver
> + *
> + * Copyright (C) 2022 Sascha Hauer <[email protected]>
> + *
> + * This driver implements a GPIO (or better GPO as there is no input)
> + * multiplexer based on latches like this:
> + *
> + * CLK0 ----------------------. ,--------.
> + * CLK1 -------------------. `--------|> #0 |
> + * | | |
> + * OUT0 ----------------+--|-----------|D0 Q0|-----|<
> + * OUT1 --------------+-|--|-----------|D1 Q1|-----|<
> + * OUT2 ------------+-|-|--|-----------|D2 Q2|-----|<
> + * OUT3 ----------+-|-|-|--|-----------|D3 Q3|-----|<
> + * OUT4 --------+-|-|-|-|--|-----------|D4 Q4|-----|<
> + * OUT5 ------+-|-|-|-|-|--|-----------|D5 Q5|-----|<
> + * OUT6 ----+-|-|-|-|-|-|--|-----------|D6 Q6|-----|<
> + * OUT7 --+-|-|-|-|-|-|-|--|-----------|D7 Q7|-----|<
> + * | | | | | | | | | `--------'
> + * | | | | | | | | |
> + * | | | | | | | | | ,--------.
> + * | | | | | | | | `-----------|> #1 |
> + * | | | | | | | | | |
> + * | | | | | | | `--------------|D0 Q0|-----|<
> + * | | | | | | `----------------|D1 Q1|-----|<
> + * | | | | | `------------------|D2 Q2|-----|<
> + * | | | | `--------------------|D3 Q3|-----|<
> + * | | | `----------------------|D4 Q4|-----|<
> + * | | `------------------------|D5 Q5|-----|<
> + * | `--------------------------|D6 Q6|-----|<
> + * `----------------------------|D7 Q7|-----|<
> + * `--------'
> + *
> + * The above is just an example. The actual number of number of latches and
> + * the number of inputs per latch is derived from the number of GPIOs given
> + * in the corresponding device tree properties.
> + */
> +
> +#include <linux/err.h>
> +#include <linux/module.h>
> +#include <linux/of_device.h>
> +#include <linux/gpio/driver.h>
> +#include <linux/platform_device.h>
> +#include <linux/gpio/consumer.h>
> +
> +#include "gpiolib.h"
> +
> +struct gpio_latch_priv {
> + struct gpio_chip gc;
> + struct gpio_descs *clk_gpios;
> + struct gpio_descs *data_gpios;
> + spinlock_t lock;
> + int n_ports;
> + int n_pins;
> + unsigned int *shadow;
> + struct mutex mutex;
> + spinlock_t spinlock;
> +};
> +
> +static const struct of_device_id gpio_latch_ids[] = {
> + {
> + .compatible = "gpio-latch",
> + }, {
> + /* sentinel */
> + }
> +};
> +MODULE_DEVICE_TABLE(of, gpio_latch_ids);
Nit normally this is at the end of the file.
> +static int gpio_latch_get_direction(struct gpio_chip *gc, unsigned int offset)
> +{
> + return GPIO_LINE_DIRECTION_OUT;
> +}
> +
> +static void __gpio_latch_set(struct gpio_latch_priv *priv, unsigned int offset, int val)
> +{
> + int latch = offset / priv->n_pins;
> + int i;
> +
> + if (val)
> + priv->shadow[latch] |= BIT(offset % priv->n_pins);
> + else
> + priv->shadow[latch] &= ~BIT(offset % priv->n_pins);
> +
> + for (i = 0; i < priv->n_pins; i++)
> + gpiod_set_value(priv->data_gpios->desc[i], priv->shadow[latch] & BIT(i));
> +
> + gpiod_set_value(priv->clk_gpios->desc[latch], 1);
> + gpiod_set_value(priv->clk_gpios->desc[latch], 0);
Your have two access function for _can_sleep and "can not sleep" but
here you don't resepect it.
Regards,
Marco
> +}
> +
> +static void gpio_latch_set(struct gpio_chip *gc, unsigned int offset, int val)
> +{
> + struct gpio_latch_priv *priv = gpiochip_get_data(gc);
> + unsigned long flags;
> +
> + spin_lock_irqsave(&priv->spinlock, flags);
> +
> + __gpio_latch_set(priv, offset, val);
> +
> + spin_unlock_irqrestore(&priv->spinlock, flags);
> +}
> +
> +static void gpio_latch_set_can_sleep(struct gpio_chip *gc, unsigned int offset, int val)
> +{
> + struct gpio_latch_priv *priv = gpiochip_get_data(gc);
> +
> + mutex_lock(&priv->mutex);
> +
> + __gpio_latch_set(priv, offset, val);
> +
> + mutex_unlock(&priv->mutex);
> +}
> +
> +static bool gpio_latch_can_sleep(struct gpio_latch_priv *priv)
> +{
> + int i;
> +
> + for (i = 0; i < priv->n_ports; i++)
> + if (gpiod_cansleep(priv->clk_gpios->desc[i]))
> + return true;
> +
> + for (i = 0; i < priv->n_pins; i++)
> + if (gpiod_cansleep(priv->data_gpios->desc[i]))
> + return true;
> +
> + return false;
> +}
> +
> +static int gpio_latch_probe(struct platform_device *pdev)
> +{
> + struct gpio_latch_priv *priv;
> +
> + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
> + if (!priv)
> + return -ENOMEM;
> +
> + priv->clk_gpios = devm_gpiod_get_array(&pdev->dev, "clk", GPIOD_OUT_LOW);
> + if (IS_ERR(priv->clk_gpios))
> + return PTR_ERR(priv->clk_gpios);
> +
> + priv->data_gpios = devm_gpiod_get_array(&pdev->dev, "data", GPIOD_OUT_LOW);
> + if (IS_ERR(priv->data_gpios))
> + return PTR_ERR(priv->data_gpios);
> +
> + priv->n_ports = priv->clk_gpios->ndescs;
> + priv->n_pins = priv->data_gpios->ndescs;
> +
> + priv->shadow = devm_kcalloc(&pdev->dev, priv->n_ports, sizeof(*priv->shadow),
> + GFP_KERNEL);
> + if (!priv->shadow)
> + return -ENOMEM;
> +
> + if (gpio_latch_can_sleep(priv)) {
> + priv->gc.can_sleep = true;
> + priv->gc.set = gpio_latch_set_can_sleep;
> + mutex_init(&priv->mutex);
> + } else {
> + priv->gc.can_sleep = false;
> + priv->gc.set = gpio_latch_set;
> + spin_lock_init(&priv->spinlock);
> + }
> +
> + priv->gc.get_direction = gpio_latch_get_direction;
> + priv->gc.ngpio = priv->n_ports * priv->n_pins;
> + priv->gc.owner = THIS_MODULE;
> + priv->gc.base = -1;
> + priv->gc.parent = &pdev->dev;
> + priv->gc.of_node = pdev->dev.of_node;
> +
> + platform_set_drvdata(pdev, priv);
> +
> + return devm_gpiochip_add_data(&pdev->dev, &priv->gc, priv);
> +}
> +
> +static struct platform_driver gpio_latch_driver = {
> + .driver = {
> + .name = "gpio-latch",
> + .of_match_table = gpio_latch_ids,
> + },
> + .probe = gpio_latch_probe,
> +};
> +module_platform_driver(gpio_latch_driver);
> +
> +MODULE_LICENSE("GPL v2");
> +MODULE_AUTHOR("Sascha Hauer <[email protected]>");
> +MODULE_DESCRIPTION("GPIO latch driver");
> --
> 2.30.2
>
>
>
On Thu, Aug 25, 2022 at 11:41 AM Sascha Hauer <[email protected]> wrote:
> This driver implements a GPIO multiplexer based on latches connected to
> other GPIOs. A set of data GPIOs is connected to the data input of
> multiple latches. The clock input of each latch is driven by another
> set of GPIOs. With two 8-bit latches 10 GPIOs can be multiplexed into
> 16 GPIOs. GPOs might be a better term as in fact the multiplexed pins
> are output only.
>
> Signed-off-by: Sascha Hauer <[email protected]>
Take a close look at the other forwarding driver:
drivers/gpio/gpio-aggregator.c
Especially (as pointed out by Marco) the sleeping/non-sleeping calls.
There was a lot of discussion around that patch before we got the
forwarding of GPIOs into a nice working shape.
Also get Geert to review this because he knows what you need to
do. :)
Yours,
Linus Walleij
On Thu, Aug 25, 2022 at 11:41 AM Sascha Hauer <[email protected]> wrote:
> This adds a binding for a GPIO multiplexer driver based on latches
> connected to other GPIOs.
>
> Signed-off-by: Sascha Hauer <[email protected]>
Nice overall!
> +++ b/Documentation/devicetree/bindings/gpio/gpio-latch.yaml
> @@ -0,0 +1,83 @@
> +%YAML 1.2
No license?
> + data-gpios:
> + description: Array of GPIOs to be used as data GPIOs
Hm I wanted to just call these "gpios" but that is maybe confusing.
What about "latch-gpios"?
Yours,
Linus Walleij
Hi Marco,
On Fri, Aug 26, 2022 at 07:53:07AM +0200, Marco Felsch wrote:
> Hi Sascha,
>
> nice patche, please see inline.
>
> On 22-08-25, Sascha Hauer wrote:
> > This driver implements a GPIO multiplexer based on latches connected to
> > other GPIOs. A set of data GPIOs is connected to the data input of
> > multiple latches. The clock input of each latch is driven by another
> > set of GPIOs. With two 8-bit latches 10 GPIOs can be multiplexed into
> > 16 GPIOs. GPOs might be a better term as in fact the multiplexed pins
> > are output only.
> >
[snip]
> > +
> > +static void __gpio_latch_set(struct gpio_latch_priv *priv, unsigned int offset, int val)
> > +{
> > + int latch = offset / priv->n_pins;
> > + int i;
> > +
> > + if (val)
> > + priv->shadow[latch] |= BIT(offset % priv->n_pins);
> > + else
> > + priv->shadow[latch] &= ~BIT(offset % priv->n_pins);
> > +
> > + for (i = 0; i < priv->n_pins; i++)
> > + gpiod_set_value(priv->data_gpios->desc[i], priv->shadow[latch] & BIT(i));
> > +
> > + gpiod_set_value(priv->clk_gpios->desc[latch], 1);
> > + gpiod_set_value(priv->clk_gpios->desc[latch], 0);
>
> Your have two access function for _can_sleep and "can not sleep" but
> here you don't resepect it.
I thought the gpio framework would pick the right implementation
automatically. Apparently it doesn't. Will fix in v2.
Sascha
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Hi Linus,
On Fri, Aug 26, 2022 at 03:37:40PM +0200, Linus Walleij wrote:
> On Thu, Aug 25, 2022 at 11:41 AM Sascha Hauer <[email protected]> wrote:
>
> > This adds a binding for a GPIO multiplexer driver based on latches
> > connected to other GPIOs.
> >
> > Signed-off-by: Sascha Hauer <[email protected]>
>
> Nice overall!
>
> > +++ b/Documentation/devicetree/bindings/gpio/gpio-latch.yaml
> > @@ -0,0 +1,83 @@
> > +%YAML 1.2
>
> No license?
Will add in v2.
>
> > + data-gpios:
> > + description: Array of GPIOs to be used as data GPIOs
>
> Hm I wanted to just call these "gpios" but that is maybe confusing.
> What about "latch-gpios"?
Hm, the clk input is used to latch the current state of the inputs to
the outputs, so "latch-gpios" might even be confused with the GPIO
routed to the clk unput of the latch. Overall, the whole thing is a
latch, so "latch-gpios" doesn't sound like a good name to distinguish
the different types of inputs of a latch. I still like data-gpios best
as these lines are described as "Data inputs" in my 74273 data sheet.
Sascha
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
On Mon, Aug 29, 2022 at 4:40 PM Sascha Hauer <[email protected]> wrote:
> > Hm I wanted to just call these "gpios" but that is maybe confusing.
> > What about "latch-gpios"?
>
> Hm, the clk input is used to latch the current state of the inputs to
> the outputs, so "latch-gpios" might even be confused with the GPIO
> routed to the clk unput of the latch. Overall, the whole thing is a
> latch, so "latch-gpios" doesn't sound like a good name to distinguish
> the different types of inputs of a latch. I still like data-gpios best
> as these lines are described as "Data inputs" in my 74273 data sheet.
How about "latched-gpios" (notice the "d")
It makes some semantic sense.
But I will not nitpick, data is fine, just a bit unspecific.
Yours,
Linus Walleij
On Wed, Aug 31, 2022 at 02:40:13PM +0200, Linus Walleij wrote:
> On Mon, Aug 29, 2022 at 4:40 PM Sascha Hauer <[email protected]> wrote:
>
> > > Hm I wanted to just call these "gpios" but that is maybe confusing.
> > > What about "latch-gpios"?
> >
> > Hm, the clk input is used to latch the current state of the inputs to
> > the outputs, so "latch-gpios" might even be confused with the GPIO
> > routed to the clk unput of the latch. Overall, the whole thing is a
> > latch, so "latch-gpios" doesn't sound like a good name to distinguish
> > the different types of inputs of a latch. I still like data-gpios best
> > as these lines are described as "Data inputs" in my 74273 data sheet.
>
> How about "latched-gpios" (notice the "d")
Fine with me.
Sascha
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |