2023-04-10 20:43:54

by Yazen Ghannam

Subject: [PATCH] EDAC/mce_amd: Decode Cache Level "L0" Error Code

The "L0" cache level is listed as "reserved" in legacy documentation.
This has now been defined as "Core" in current documentation for
Zen-based systems.

Update the cache level strings to include this new definition.

Signed-off-by: Yazen Ghannam <[email protected]>
---
drivers/edac/mce_amd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c
index cc5c63feb26a..1d1b9da3b9bd 100644
--- a/drivers/edac/mce_amd.c
+++ b/drivers/edac/mce_amd.c
@@ -37,7 +37,7 @@ EXPORT_SYMBOL_GPL(amd_unregister_ecc_decoder);
static const char * const tt_msgs[] = { "INSN", "DATA", "GEN", "RESV" };

/* cache level */
-static const char * const ll_msgs[] = { "RESV", "L1", "L2", "L3/GEN" };
+static const char * const ll_msgs[] = { "CORE", "L1", "L2", "L3/GEN" };

/* memory transaction type */
static const char * const rrrr_msgs[] = {
--
2.34.1

2023-04-10 20:47:40

by Borislav Petkov

Subject: Re: [PATCH] EDAC/mce_amd: Decode Cache Level "L0" Error Code

On Mon, Apr 10, 2023 at 03:33:57PM -0500, Yazen Ghannam wrote:
> The "L0" cache level is listed as "reserved" in legacy documentation.
> This has now been defined as "Core" in current documentation for
> Zen-based systems.
>
> Update the cache level strings to include this new definition.
>
> Signed-off-by: Yazen Ghannam <[email protected]>
> ---
> drivers/edac/mce_amd.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c
> index cc5c63feb26a..1d1b9da3b9bd 100644
> --- a/drivers/edac/mce_amd.c
> +++ b/drivers/edac/mce_amd.c
> @@ -37,7 +37,7 @@ EXPORT_SYMBOL_GPL(amd_unregister_ecc_decoder);
> static const char * const tt_msgs[] = { "INSN", "DATA", "GEN", "RESV" };
>
> /* cache level */
> -static const char * const ll_msgs[] = { "RESV", "L1", "L2", "L3/GEN" };
> +static const char * const ll_msgs[] = { "CORE", "L1", "L2", "L3/GEN" };

Still used on legacy machines. I thought we agreed we'll move all the
decoding to luserspace, for newer Zens...

--
Regards/Gruss,
Boris.

https://people.kernel.org/tglx/notes-about-netiquette

2023-04-10 20:55:06

by Yazen Ghannam

Subject: Re: [PATCH] EDAC/mce_amd: Decode Cache Level "L0" Error Code

On 4/10/23 16:47, Borislav Petkov wrote:
> On Mon, Apr 10, 2023 at 03:33:57PM -0500, Yazen Ghannam wrote:
>> The "L0" cache level is listed as "reserved" in legacy documentation.
>> This has now been defined as "Core" in current documentation for
>> Zen-based systems.
>>
>> Update the cache level strings to include this new definition.
>>
>> Signed-off-by: Yazen Ghannam <[email protected]>
>> ---
>> drivers/edac/mce_amd.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c
>> index cc5c63feb26a..1d1b9da3b9bd 100644
>> --- a/drivers/edac/mce_amd.c
>> +++ b/drivers/edac/mce_amd.c
>> @@ -37,7 +37,7 @@ EXPORT_SYMBOL_GPL(amd_unregister_ecc_decoder);
>> static const char * const tt_msgs[] = { "INSN", "DATA", "GEN", "RESV" };
>>
>> /* cache level */
>> -static const char * const ll_msgs[] = { "RESV", "L1", "L2", "L3/GEN" };
>> +static const char * const ll_msgs[] = { "CORE", "L1", "L2", "L3/GEN" };
>
> Still used on legacy machines. I thought we agreed we'll move all the
> decoding to luserspace, for newer Zens...
>

I was thinking about that for the Extended Error Code descriptions. But good
point, please disregard this patch.

Thanks,
Yazen