2023-06-15 07:31:17

by Nylon Chen

[permalink] [raw]
Subject: [PATCH v2] RISC-V: Support 32_PCREL relocation type in kernel module

Fix the 'unsupported relocation type' error caused by
enabling the -fasynchronous-unwind-tables flag,
which generates relocation types that are not supported.

Signed-off-by: Nylon Chen <[email protected]>
Reviewed-by: Zong Li <[email protected]>
---
Changed in v2:
- add commit message.

arch/riscv/kernel/module.c | 10 ++++++++++
1 file changed, 10 insertions(+)

diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c
index 7c651d55fcbd..65be0360a494 100644
--- a/arch/riscv/kernel/module.c
+++ b/arch/riscv/kernel/module.c
@@ -310,6 +310,15 @@ static int apply_r_riscv_sub64_rela(struct module *me, u32 *location,
return 0;
}

+static int apply_r_riscv_pcrel_32_rela(struct module *me, u32 *location,
+ Elf_Addr v)
+{
+ ptrdiff_t offset = (void *)v - (void *)location;
+
+ *location = (*location & 0xffff0000) | (offset & 0xffff);
+ return 0;
+}
+
static int (*reloc_handlers_rela[]) (struct module *me, u32 *location,
Elf_Addr v) = {
[R_RISCV_32] = apply_r_riscv_32_rela,
@@ -335,6 +344,7 @@ static int (*reloc_handlers_rela[]) (struct module *me, u32 *location,
[R_RISCV_SUB16] = apply_r_riscv_sub16_rela,
[R_RISCV_SUB32] = apply_r_riscv_sub32_rela,
[R_RISCV_SUB64] = apply_r_riscv_sub64_rela,
+ [R_RISCV_32_PCREL] = apply_r_riscv_pcrel_32_rela,
};

int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab,
--
2.40.1



2023-06-15 08:13:03

by Conor Dooley

[permalink] [raw]
Subject: Re: [PATCH v2] RISC-V: Support 32_PCREL relocation type in kernel module

Hey Nylon, thanks for the update.

On Thu, Jun 15, 2023 at 03:23:02PM +0800, Nylon Chen wrote:
> Fix the 'unsupported relocation type' error caused by
> enabling the -fasynchronous-unwind-tables flag,
> which generates relocation types that are not supported.

What commit adds the -fasynchronous-unwind-tables flag?
Should there be a Fixes: tag for that commit?

Cheers,
Conor.

>
> Signed-off-by: Nylon Chen <[email protected]>
> Reviewed-by: Zong Li <[email protected]>
> ---
> Changed in v2:
> - add commit message.
>
> arch/riscv/kernel/module.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c
> index 7c651d55fcbd..65be0360a494 100644
> --- a/arch/riscv/kernel/module.c
> +++ b/arch/riscv/kernel/module.c
> @@ -310,6 +310,15 @@ static int apply_r_riscv_sub64_rela(struct module *me, u32 *location,
> return 0;
> }
>
> +static int apply_r_riscv_pcrel_32_rela(struct module *me, u32 *location,
> + Elf_Addr v)
> +{
> + ptrdiff_t offset = (void *)v - (void *)location;
> +
> + *location = (*location & 0xffff0000) | (offset & 0xffff);
> + return 0;
> +}
> +
> static int (*reloc_handlers_rela[]) (struct module *me, u32 *location,
> Elf_Addr v) = {
> [R_RISCV_32] = apply_r_riscv_32_rela,
> @@ -335,6 +344,7 @@ static int (*reloc_handlers_rela[]) (struct module *me, u32 *location,
> [R_RISCV_SUB16] = apply_r_riscv_sub16_rela,
> [R_RISCV_SUB32] = apply_r_riscv_sub32_rela,
> [R_RISCV_SUB64] = apply_r_riscv_sub64_rela,
> + [R_RISCV_32_PCREL] = apply_r_riscv_pcrel_32_rela,
> };
>
> int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab,
> --
> 2.40.1
>


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2023-06-15 08:15:45

by Andreas Schwab

[permalink] [raw]
Subject: Re: [PATCH v2] RISC-V: Support 32_PCREL relocation type in kernel module

On Jun 15 2023, Nylon Chen wrote:

> I mean, when we use the flag "-fasynchronous-unwind-tables,"

Why?

--
Andreas Schwab, SUSE Labs, [email protected]
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7
"And now for something completely different."

2023-06-15 08:16:41

by Andreas Schwab

[permalink] [raw]
Subject: Re: [PATCH v2] RISC-V: Support 32_PCREL relocation type in kernel module

On Jun 15 2023, Nylon Chen wrote:

> Fix the 'unsupported relocation type' error caused by
> enabling the -fasynchronous-unwind-tables flag,
> which generates relocation types that are not supported.

arch/riscv/Makefile has
KBUILD_CFLAGS += -fno-asynchronous-unwind-tables -fno-unwind-tables

--
Andreas Schwab, SUSE Labs, [email protected]
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7
"And now for something completely different."

2023-06-15 08:35:42

by Conor Dooley

[permalink] [raw]
Subject: Re: [PATCH v2] RISC-V: Support 32_PCREL relocation type in kernel module

Hey Nylon,

Firstly, no html emails please :/

On Thu, Jun 15, 2023 at 03:52:27PM +0800, Nylon Chen wrote:
> Conor Dooley <[email protected]<mailto:[email protected]>> 於 2023年6月15日 週四 下午3:38寫道:
> > On Thu, Jun 15, 2023 at 03:23:02PM +0800, Nylon Chen wrote:
> > > Fix the 'unsupported relocation type' error caused by
> > > enabling the -fasynchronous-unwind-tables flag,
> > > which generates relocation types that are not supported.
> >
> > What commit adds the -fasynchronous-unwind-tables flag?
> sorry my description is not correct, please allow me to add
>
> I mean, when we use the flag "-fasynchronous-unwind-tables," it generates
> the relocation type R_RISCV_32_PCCREL. However, this type is currently not
> supported, so an error will occur.

(snip)

> > Should there be a Fixes: tag for that commit?

> yes, I will do it.

What mainline commit actually enables this flag?

Cheers,
Conor.


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2023-06-15 08:52:18

by Nylon Chen

[permalink] [raw]
Subject: Re: [PATCH v2] RISC-V: Support 32_PCREL relocation type in kernel module

On Thu, Jun 15, 2023 at 09:11:33AM +0100, Conor Dooley wrote:
Hi Conor,
> Hey Nylon,
>
> Firstly, no html emails please :/
Sorry, my Gmail settings got messed up. I will be more careful in the future.
>
> On Thu, Jun 15, 2023 at 03:52:27PM +0800, Nylon Chen wrote:
> > Conor Dooley <[email protected]<mailto:[email protected]>> 於 2023年6月15日 週四 下午3:38寫道:
> > > On Thu, Jun 15, 2023 at 03:23:02PM +0800, Nylon Chen wrote:
> > > > Fix the 'unsupported relocation type' error caused by
> > > > enabling the -fasynchronous-unwind-tables flag,
> > > > which generates relocation types that are not supported.
> > >
> > > What commit adds the -fasynchronous-unwind-tables flag?
> > sorry my description is not correct, please allow me to add
> >
> > I mean, when we use the flag "-fasynchronous-unwind-tables," it generates
> > the relocation type R_RISCV_32_PCCREL. However, this type is currently not
> > supported, so an error will occur.
>
> (snip)
>
> > > Should there be a Fixes: tag for that commit?
>
> > yes, I will do it.
>
> What mainline commit actually enables this flag?
Because LLVM currently has it enabled by default(https://reviews.llvm.org/D145164), it will generate this
relocation type.

From what I know, GCC will also enable it in the future.

>
> Cheers,
> Conor.



2023-06-15 09:20:58

by Andreas Schwab

[permalink] [raw]
Subject: Re: [PATCH v2] RISC-V: Support 32_PCREL relocation type in kernel module

On Jun 15 2023, Nylon Chen wrote:

> Because LLVM currently has it enabled by default(https://reviews.llvm.org/D145164), it will generate this
> relocation type.
>
>>From what I know, GCC will also enable it in the future.

That's why the kernel explicitly disables it.

--
Andreas Schwab, SUSE Labs, [email protected]
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7
"And now for something completely different."

2023-06-15 10:26:53

by Nylon Chen

[permalink] [raw]
Subject: Re: [PATCH v2] RISC-V: Support 32_PCREL relocation type in kernel module

On Thu, Jun 15, 2023 at 11:11:49AM +0200, Andreas Schwab wrote:
> On Jun 15 2023, Nylon Chen wrote:
>
Hi Andreas,
> > Because LLVM currently has it enabled by default(https://reviews.llvm.org/D145164), it will generate this
> > relocation type.
> >
> >>From what I know, GCC will also enable it in the future.
>
> That's why the kernel explicitly disables it.
Ok, thanks for your feedback, after I cross-tested, there is indeed no relevant relocation type generated.

If this error no longer occurs.

I am open to the idea of adding this patch to the upstream and would like to hear your thoughts on whether it is still necessary.
>
> --
> Andreas Schwab, SUSE Labs, [email protected]
> GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7
> "And now for something completely different."