2023-06-15 20:57:12

by Thomas Gleixner

Subject: [patch v3 6/7] x86/smp: Split sending INIT IPI out into a helper function

Putting CPUs into INIT is a safer place during kexec() to park CPUs.

Split the INIT assert/deassert sequence out so it can be reused.

Signed-off-by: Thomas Gleixner <[email protected]>
Reviewed-by: Ashok Raj <[email protected]>
---
V2: Fix rebase screwup
---
arch/x86/kernel/smpboot.c | 49 ++++++++++++++++++----------------------------
1 file changed, 20 insertions(+), 29 deletions(-)

--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -853,47 +853,38 @@ wakeup_secondary_cpu_via_nmi(int apicid,
return (send_status | accept_status);
}

-static int
-wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
+static void send_init_sequence(int phys_apicid)
{
- unsigned long send_status = 0, accept_status = 0;
- int maxlvt, num_starts, j;
-
- maxlvt = lapic_get_maxlvt();
+ int maxlvt = lapic_get_maxlvt();

- /*
- * Be paranoid about clearing APIC errors.
- */
+ /* Be paranoid about clearing APIC errors. */
if (APIC_INTEGRATED(boot_cpu_apic_version)) {
- if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
+ /* Due to the Pentium erratum 3AP. */
+ if (maxlvt > 3)
apic_write(APIC_ESR, 0);
apic_read(APIC_ESR);
}

- pr_debug("Asserting INIT\n");
-
- /*
- * Turn INIT on target chip
- */
- /*
- * Send IPI
- */
- apic_icr_write(APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT,
- phys_apicid);
-
- pr_debug("Waiting for send to finish...\n");
- send_status = safe_apic_wait_icr_idle();
+ /* Assert INIT on the target CPU */
+ apic_icr_write(APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT, phys_apicid);
+ safe_apic_wait_icr_idle();

udelay(init_udelay);

- pr_debug("Deasserting INIT\n");
-
- /* Target chip */
- /* Send IPI */
+ /* Deassert INIT on the target CPU */
apic_icr_write(APIC_INT_LEVELTRIG | APIC_DM_INIT, phys_apicid);
+ safe_apic_wait_icr_idle();
+}
+
+/*
+ * Wake up AP by INIT, INIT, STARTUP sequence.
+ */
+static int wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
+{
+ unsigned long send_status = 0, accept_status = 0;
+ int num_starts, j, maxlvt = lapic_get_maxlvt();

- pr_debug("Waiting for send to finish...\n");
- send_status = safe_apic_wait_icr_idle();
+ send_init_sequence(phys_apicid);

mb();

2023-06-20 10:03:47

by Borislav Petkov

Subject: Re: [patch v3 6/7] x86/smp: Split sending INIT IPI out into a helper function

On Thu, Jun 15, 2023 at 10:33:58PM +0200, Thomas Gleixner wrote:
> Putting CPUs into INIT is a safer place during kexec() to park CPUs.
>
> Split the INIT assert/deassert sequence out so it can be reused.
>
> Signed-off-by: Thomas Gleixner <[email protected]>
> Reviewed-by: Ashok Raj <[email protected]>
> ---
> V2: Fix rebase screwup
> ---
> arch/x86/kernel/smpboot.c | 49 ++++++++++++++++++----------------------------
> 1 file changed, 20 insertions(+), 29 deletions(-)
>
> --- a/arch/x86/kernel/smpboot.c
> +++ b/arch/x86/kernel/smpboot.c
> @@ -853,47 +853,38 @@ wakeup_secondary_cpu_via_nmi(int apicid,
> return (send_status | accept_status);
> }
>
> -static int
> -wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
> +static void send_init_sequence(int phys_apicid)
> {
> - unsigned long send_status = 0, accept_status = 0;
> - int maxlvt, num_starts, j;
> -
> - maxlvt = lapic_get_maxlvt();
> + int maxlvt = lapic_get_maxlvt();

Whoops:

arch/x86/kernel/smpboot.c: In function ‘send_init_sequence’:
arch/x86/kernel/smpboot.c:860:9: warning: ISO C90 forbids mixed declarations and code [-Wdeclaration-after-statement]
860 | int maxlvt = lapic_get_maxlvt();
| ^~~

--
Regards/Gruss,
Boris.

https://people.kernel.org/tglx/notes-about-netiquette

2023-06-20 12:53:54

by Thomas Gleixner

Subject: Re: [patch v3 6/7] x86/smp: Split sending INIT IPI out into a helper function

On Tue, Jun 20 2023 at 11:29, Borislav Petkov wrote:
> On Thu, Jun 15, 2023 at 10:33:58PM +0200, Thomas Gleixner wrote:
>>
>> -static int
>> -wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
>> +static void send_init_sequence(int phys_apicid)
>> {
>> - unsigned long send_status = 0, accept_status = 0;
>> - int maxlvt, num_starts, j;
>> -
>> - maxlvt = lapic_get_maxlvt();
>> + int maxlvt = lapic_get_maxlvt();
>
> Whoops:
>
> arch/x86/kernel/smpboot.c: In function ‘send_init_sequence’:
> arch/x86/kernel/smpboot.c:860:9: warning: ISO C90 forbids mixed declarations and code [-Wdeclaration-after-statement]
> 860 | int maxlvt = lapic_get_maxlvt();
> | ^~~

How so? It's the first thing in the function, no?

And in the other hunk it's _before_ code too.

Conflict resolution artifact?

Thanks,

tglx

2023-06-20 13:16:22

by tip-bot2 for Alexey Makhalov

Subject: [tip: x86/core] x86/smp: Split sending INIT IPI out into a helper function

The following commit has been merged into the x86/core branch of tip:

Commit-ID: 6087dd5e86ff03a8cd4cffdf463a7f457e65cbff
Gitweb: https://git.kernel.org/tip/6087dd5e86ff03a8cd4cffdf463a7f457e65cbff
Author: Thomas Gleixner <[email protected]>
AuthorDate: Thu, 15 Jun 2023 22:33:58 +02:00
Committer: Thomas Gleixner <[email protected]>
CommitterDate: Tue, 20 Jun 2023 14:51:47 +02:00

x86/smp: Split sending INIT IPI out into a helper function

Putting CPUs into INIT is a safer place during kexec() to park CPUs.

Split the INIT assert/deassert sequence out so it can be reused.

Signed-off-by: Thomas Gleixner <[email protected]>
Reviewed-by: Ashok Raj <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
---
arch/x86/kernel/smpboot.c | 49 +++++++++++++++-----------------------
1 file changed, 20 insertions(+), 29 deletions(-)

diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 483df04..b403ead 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -853,47 +853,38 @@ wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip)
return (send_status | accept_status);
}

-static int
-wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
+static void send_init_sequence(int phys_apicid)
{
- unsigned long send_status = 0, accept_status = 0;
- int maxlvt, num_starts, j;
+ int maxlvt = lapic_get_maxlvt();

- maxlvt = lapic_get_maxlvt();
-
- /*
- * Be paranoid about clearing APIC errors.
- */
+ /* Be paranoid about clearing APIC errors. */
if (APIC_INTEGRATED(boot_cpu_apic_version)) {
- if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
+ /* Due to the Pentium erratum 3AP. */
+ if (maxlvt > 3)
apic_write(APIC_ESR, 0);
apic_read(APIC_ESR);
}

- pr_debug("Asserting INIT\n");
-
- /*
- * Turn INIT on target chip
- */
- /*
- * Send IPI
- */
- apic_icr_write(APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT,
- phys_apicid);
-
- pr_debug("Waiting for send to finish...\n");
- send_status = safe_apic_wait_icr_idle();
+ /* Assert INIT on the target CPU */
+ apic_icr_write(APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT, phys_apicid);
+ safe_apic_wait_icr_idle();

udelay(init_udelay);

- pr_debug("Deasserting INIT\n");
-
- /* Target chip */
- /* Send IPI */
+ /* Deassert INIT on the target CPU */
apic_icr_write(APIC_INT_LEVELTRIG | APIC_DM_INIT, phys_apicid);
+ safe_apic_wait_icr_idle();
+}

- pr_debug("Waiting for send to finish...\n");
- send_status = safe_apic_wait_icr_idle();
+/*
+ * Wake up AP by INIT, INIT, STARTUP sequence.
+ */
+static int wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
+{
+ unsigned long send_status = 0, accept_status = 0;
+ int num_starts, j, maxlvt = lapic_get_maxlvt();
+
+ send_init_sequence(phys_apicid);

mb();