From: Francesco Dolcini <[email protected]>
On AM62x there are no hardware interrupts routed to A53 GIC
interrupt controller for MCU MCAN IPs, so MCU MCAN nodes were
omitted from MCU dtsi.
Timer polling was introduced in commits [1][2] so now add MCU MCAN nodes
to the MCU dtsi for Cortex A53.
[1] b382380c0d2d ("can: m_can: Add hrtimer to generate software interrupt")
[2] bb410c03b999 ("dt-bindings: net: can: Remove interrupt properties for MCAN")
Once the MCU MCANs are added to the SOC dtsi, enable the Verdin CAN2.
Hiago De Franco (1):
arm64: dts: ti: k3-am625-verdin: enable CAN_2
Judith Mendez (1):
arm64: dts: ti: k3-am62: Add MCU MCAN nodes
arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi | 24 +++++++++++++++++++
.../boot/dts/ti/k3-am62-verdin-dahlia.dtsi | 5 ++++
.../arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi | 5 ++++
.../boot/dts/ti/k3-am62-verdin-yavia.dtsi | 5 ++++
arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi | 19 +++++++++++++--
5 files changed, 56 insertions(+), 2 deletions(-)
--
2.25.1
From: Judith Mendez <[email protected]>
On AM62x there are no hardware interrupts routed to A53 GIC
interrupt controller for MCU MCAN IPs, so MCU MCAN nodes were
omitted from MCU dtsi.
Timer polling was introduced in commits [1][2] so now add MCU MCAN nodes
to the MCU dtsi for the Cortex A53.
[1] b382380c0d2d ("can: m_can: Add hrtimer to generate software interrupt")
[2] bb410c03b999 ("dt-bindings: net: can: Remove interrupt properties for MCAN")
Signed-off-by: Judith Mendez <[email protected]>
[fd: fixed labels to match datasheet numbering, revised commit message,
fixed reg/reg-names order]
Signed-off-by: Francesco Dolcini <[email protected]>
---
arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
index 19fc38157d94..fed50666d95b 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
@@ -147,4 +147,28 @@ mcu_rti0: watchdog@4880000 {
/* Tightly coupled to M4F */
status = "reserved";
};
+
+ mcu_mcan0: can@4e00000 {
+ compatible = "bosch,m_can";
+ reg = <0x00 0x4e08000 0x00 0x200>,
+ <0x00 0x4e00000 0x00 0x8000>;
+ reg-names = "m_can", "message_ram";
+ power-domains = <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 188 6>, <&k3_clks 188 1>;
+ clock-names = "hclk", "cclk";
+ bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
+ status = "disabled";
+ };
+
+ mcu_mcan1: can@4e10000 {
+ compatible = "bosch,m_can";
+ reg = <0x00 0x4e18000 0x00 0x200>,
+ <0x00 0x4e10000 0x00 0x8000>;
+ reg-names = "m_can", "message_ram";
+ power-domains = <&k3_pds 189 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 189 6>, <&k3_clks 189 1>;
+ clock-names = "hclk", "cclk";
+ bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
+ status = "disabled";
+ };
};
--
2.25.1
From: Hiago De Franco <[email protected]>
Add Verdin CAN_2 (TI AM62 MCU_MCAN0) and enable it on the Yavia,
Dahlia and Verdin Development board.
Signed-off-by: Hiago De Franco <[email protected]>
Signed-off-by: Francesco Dolcini <[email protected]>
---
.../boot/dts/ti/k3-am62-verdin-dahlia.dtsi | 5 +++++
.../arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi | 5 +++++
.../boot/dts/ti/k3-am62-verdin-yavia.dtsi | 5 +++++
arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi | 19 +++++++++++++++++--
4 files changed, 32 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi
index 3abd8d1d6761..33c8f6ffaa30 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi
@@ -115,6 +115,11 @@ &mcu_i2c0 {
status = "okay";
};
+/* Verdin CAN_2 */
+&mcu_mcan0 {
+ status = "okay";
+};
+
/* Verdin UART_4 */
&mcu_uart0 {
status = "okay";
diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi
index 846caee7dfa4..8205081fda33 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi
@@ -144,6 +144,11 @@ &mcu_i2c0 {
status = "okay";
};
+/* Verdin CAN_2 */
+&mcu_mcan0 {
+ status = "okay";
+};
+
/* Verdin UART_4 */
&mcu_uart0 {
status = "okay";
diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi
index cb11d6e7f525..c685df7deaee 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi
@@ -167,6 +167,11 @@ &mcu_i2c0 {
status = "okay";
};
+/* Verdin CAN_2 */
+&mcu_mcan0 {
+ status = "okay";
+};
+
/* Verdin UART_4 */
&mcu_uart0 {
status = "okay";
diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
index 57dd061911ab..12dd1d64eac9 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
@@ -19,6 +19,8 @@ chosen {
};
aliases {
+ can0 = &main_mcan0;
+ can1 = &mcu_mcan0;
ethernet0 = &cpsw_port1;
ethernet1 = &cpsw_port2;
i2c0 = &main_i2c0;
@@ -732,6 +734,14 @@ AM62X_MCU_IOPAD(0x0048, PIN_INPUT, 0) /* (D10) MCU_I2C0_SDA */ /* SODIMM 57 */
>;
};
+ /* Verdin CAN_2 */
+ pinctrl_mcu_mcan0: mcu-mcan0-default-pins {
+ pinctrl-single,pins = <
+ AM62X_MCU_IOPAD(0x0038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */ /* SODIMM 26 */
+ AM62X_MCU_IOPAD(0x0034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */ /* SODIMM 24 */
+ >;
+ };
+
/* Verdin UART_4 - Reserved to Cortex-M4 */
pinctrl_mcu_uart0: mcu-uart0-default-pins {
pinctrl-single,pins = <
@@ -1238,8 +1248,6 @@ &main_mcan0 {
status = "disabled";
};
-/* Verdin CAN_2 - Reserved to Cortex-M4 */
-
/* Verdin SPI_1 */
&main_spi1 {
pinctrl-names = "default";
@@ -1333,6 +1341,13 @@ &mcu_gpio0 {
"";
};
+/* Verdin CAN_2 */
+&mcu_mcan0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mcu_mcan0>;
+ status = "disabled";
+};
+
/* Verdin UART_4 - Cortex-M4 UART */
&mcu_uart0 {
pinctrl-names = "default";
--
2.25.1
Hi Francesco,
On 7/24/23 8:36 AM, Francesco Dolcini wrote:
> From: Judith Mendez <[email protected]>
>
> On AM62x there are no hardware interrupts routed to A53 GIC
> interrupt controller for MCU MCAN IPs, so MCU MCAN nodes were
> omitted from MCU dtsi.
>
> Timer polling was introduced in commits [1][2] so now add MCU MCAN nodes
> to the MCU dtsi for the Cortex A53.
>
> [1] b382380c0d2d ("can: m_can: Add hrtimer to generate software interrupt")
> [2] bb410c03b999 ("dt-bindings: net: can: Remove interrupt properties for MCAN")
>
> Signed-off-by: Judith Mendez <[email protected]>
> [fd: fixed labels to match datasheet numbering, revised commit message,
> fixed reg/reg-names order]
> Signed-off-by: Francesco Dolcini <[email protected]>
> ---
> arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi | 24 ++++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
> index 19fc38157d94..fed50666d95b 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
> @@ -147,4 +147,28 @@ mcu_rti0: watchdog@4880000 {
> /* Tightly coupled to M4F */
> status = "reserved";
> };
> +
> + mcu_mcan0: can@4e00000 {
> + compatible = "bosch,m_can";
> + reg = <0x00 0x4e08000 0x00 0x200>,
> + <0x00 0x4e00000 0x00 0x8000>;
> + reg-names = "m_can", "message_ram";
> + power-domains = <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 188 6>, <&k3_clks 188 1>;
> + clock-names = "hclk", "cclk";
> + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> + status = "disabled";
> + };
> +
> + mcu_mcan1: can@4e10000 {
> + compatible = "bosch,m_can";
> + reg = <0x00 0x4e18000 0x00 0x200>,
> + <0x00 0x4e10000 0x00 0x8000>;
> + reg-names = "m_can", "message_ram";
> + power-domains = <&k3_pds 189 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 189 6>, <&k3_clks 189 1>;
> + clock-names = "hclk", "cclk";
> + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> + status = "disabled";
> + };
> };
Thanks for sending this patch, will also send for AM62ax.
~ Judith
Hello Judith,
On Mon, Jul 24, 2023 at 11:06:24AM -0500, Judith Mendez wrote:
> On 7/24/23 8:36 AM, Francesco Dolcini wrote:
> > From: Judith Mendez <[email protected]>
> >
> > On AM62x there are no hardware interrupts routed to A53 GIC
> > interrupt controller for MCU MCAN IPs, so MCU MCAN nodes were
> > omitted from MCU dtsi.
> >
> > Timer polling was introduced in commits [1][2] so now add MCU MCAN nodes
> > to the MCU dtsi for the Cortex A53.
> >
> > [1] b382380c0d2d ("can: m_can: Add hrtimer to generate software interrupt")
> > [2] bb410c03b999 ("dt-bindings: net: can: Remove interrupt properties for MCAN")
> >
> > Signed-off-by: Judith Mendez <[email protected]>
> > [fd: fixed labels to match datasheet numbering, revised commit message,
> > fixed reg/reg-names order]
> > Signed-off-by: Francesco Dolcini <[email protected]>
> > ---
...
> Thanks for sending this patch, will also send for AM62ax.
Please have a look at the couple of changes I did:
- corrected the label to be coherent with the datasheet and the other
peripheral names
- inverted "m_can" and "message_ram" regs/regs-names to fix a binding
checker error.
These might be relevant also for the AM62a.
Francesco
Hi Francesco,
On 7/24/23 11:22 AM, Francesco Dolcini wrote:
> Hello Judith,
>
> On Mon, Jul 24, 2023 at 11:06:24AM -0500, Judith Mendez wrote:
>> On 7/24/23 8:36 AM, Francesco Dolcini wrote:
>>> From: Judith Mendez <[email protected]>
>>>
>>> On AM62x there are no hardware interrupts routed to A53 GIC
>>> interrupt controller for MCU MCAN IPs, so MCU MCAN nodes were
>>> omitted from MCU dtsi.
>>>
>>> Timer polling was introduced in commits [1][2] so now add MCU MCAN nodes
>>> to the MCU dtsi for the Cortex A53.
>>>
>>> [1] b382380c0d2d ("can: m_can: Add hrtimer to generate software interrupt")
>>> [2] bb410c03b999 ("dt-bindings: net: can: Remove interrupt properties for MCAN")
>>>
>>> Signed-off-by: Judith Mendez <[email protected]>
>>> [fd: fixed labels to match datasheet numbering, revised commit message,
>>> fixed reg/reg-names order]
>>> Signed-off-by: Francesco Dolcini <[email protected]>
>>> ---
>
> ...
>
>> Thanks for sending this patch, will also send for AM62ax.
>
> Please have a look at the couple of changes I did:
> - corrected the label to be coherent with the datasheet and the other
> peripheral names
> - inverted "m_can" and "message_ram" regs/regs-names to fix a binding
> checker error.
>
> These might be relevant also for the AM62a.
Yes, already did. The changes look good to me, tested and everything
works on AM62x. Did the same changes to AM62ax MCU dtsi. Thanks!
~ Judith
On 15:36-20230724, Francesco Dolcini wrote:
> From: Judith Mendez <[email protected]>
>
> On AM62x there are no hardware interrupts routed to A53 GIC
> interrupt controller for MCU MCAN IPs, so MCU MCAN nodes were
> omitted from MCU dtsi.
>
> Timer polling was introduced in commits [1][2] so now add MCU MCAN nodes
> to the MCU dtsi for the Cortex A53.
>
> [1] b382380c0d2d ("can: m_can: Add hrtimer to generate software interrupt")
> [2] bb410c03b999 ("dt-bindings: net: can: Remove interrupt properties for MCAN")
Check patch complains:
+[2] bb410c03b999 ("dt-bindings: net: can: Remove interrupt properties for MCAN")
+ERROR: Please use git commit description style 'commit <12+ chars of sha1> ("<title line>")' - ie: 'commit bb410c03b999 ("dt-bindings: net: can: Remove interrupt properties for MCAN")'
Either use commit sha ("title") or just drop the para.
>
> Signed-off-by: Judith Mendez <[email protected]>
> [fd: fixed labels to match datasheet numbering, revised commit message,
> fixed reg/reg-names order]
> Signed-off-by: Francesco Dolcini <[email protected]>
> ---
> arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi | 24 ++++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
> index 19fc38157d94..fed50666d95b 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
> @@ -147,4 +147,28 @@ mcu_rti0: watchdog@4880000 {
> /* Tightly coupled to M4F */
> status = "reserved";
> };
> +
> + mcu_mcan0: can@4e00000 {
/bus@f0000/bus@4000000/can@4e00000: simple-bus unit address format error, expected "4e08000"
can@4e08000
> + compatible = "bosch,m_can";
> + reg = <0x00 0x4e08000 0x00 0x200>,
> + <0x00 0x4e00000 0x00 0x8000>;
> + reg-names = "m_can", "message_ram";
> + power-domains = <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 188 6>, <&k3_clks 188 1>;
> + clock-names = "hclk", "cclk";
> + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> + status = "disabled";
> + };
> +
> + mcu_mcan1: can@4e10000 {
same: can@4e18000
> + compatible = "bosch,m_can";
> + reg = <0x00 0x4e18000 0x00 0x200>,
> + <0x00 0x4e10000 0x00 0x8000>;
> + reg-names = "m_can", "message_ram";
> + power-domains = <&k3_pds 189 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 189 6>, <&k3_clks 189 1>;
> + clock-names = "hclk", "cclk";
> + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> + status = "disabled";
> + };
> };
> --
> 2.25.1
>
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
On 15:36-20230724, Francesco Dolcini wrote:
[...]
> + /* Verdin CAN_2 */
> + pinctrl_mcu_mcan0: mcu-mcan0-default-pins {
> + pinctrl-single,pins = <
> + AM62X_MCU_IOPAD(0x0038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */ /* SODIMM 26 */
> + AM62X_MCU_IOPAD(0x0034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */ /* SODIMM 24 */
This is minor - I realize we already accepted this, but:
/* (B3) MCU_MCAN0_RX */ /* SODIMM 26 */
Vs
/* (B3) MCU_MCAN0_RX - SODIMM 26 */
I wonder if you'd like the second style.
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
On Tue, Aug 01, 2023 at 10:43:25PM -0500, Nishanth Menon wrote:
> On 15:36-20230724, Francesco Dolcini wrote:
> [...]
>
> > + /* Verdin CAN_2 */
> > + pinctrl_mcu_mcan0: mcu-mcan0-default-pins {
> > + pinctrl-single,pins = <
> > + AM62X_MCU_IOPAD(0x0038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */ /* SODIMM 26 */
> > + AM62X_MCU_IOPAD(0x0034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */ /* SODIMM 24 */
>
> This is minor - I realize we already accepted this, but:
> /* (B3) MCU_MCAN0_RX */ /* SODIMM 26 */
> Vs
> /* (B3) MCU_MCAN0_RX - SODIMM 26 */
>
> I wonder if you'd like the second style.
For sure I do not like to have the file with 2 different styles, and to
me this is just a taste thingy that would not justify updating the whole
file.
I'll keep it as it is.
Francesco
On 09:42-20230802, Francesco Dolcini wrote:
> On Tue, Aug 01, 2023 at 10:43:25PM -0500, Nishanth Menon wrote:
> > On 15:36-20230724, Francesco Dolcini wrote:
> > [...]
> >
> > > + /* Verdin CAN_2 */
> > > + pinctrl_mcu_mcan0: mcu-mcan0-default-pins {
> > > + pinctrl-single,pins = <
> > > + AM62X_MCU_IOPAD(0x0038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */ /* SODIMM 26 */
> > > + AM62X_MCU_IOPAD(0x0034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */ /* SODIMM 24 */
> >
> > This is minor - I realize we already accepted this, but:
> > /* (B3) MCU_MCAN0_RX */ /* SODIMM 26 */
> > Vs
> > /* (B3) MCU_MCAN0_RX - SODIMM 26 */
> >
> > I wonder if you'd like the second style.
>
> For sure I do not like to have the file with 2 different styles, and to
> me this is just a taste thingy that would not justify updating the whole
> file.
>
> I'll keep it as it is.
That is fine. Thanks.
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D