2023-09-13 20:20:09

by MD Danish Anwar

Subject: [PATCH net-next v3 0/2] Add Half Duplex support for ICSSG Driver

This series adds support for half duplex operation for ICSSG driver.

In order to support half-duplex operation at 10M and 100M link speeds, the
PHY collision detection signal (COL) should be routed to ICSSG GPIO pin
(PRGx_PRU0/1_GPI10) so that firmware can detect collision signal and apply
the CSMA/CD algorithm applicable for half duplex operation. A DT property,
"ti,half-duplex-capable" is introduced for this purpose in the first patch
of the series. If board has PHY COL pin conencted to PRGx_PRU1_GPIO10,
this DT property can be added to eth node of ICSSG, MII port to support
half duplex operation at that port.

Second patch of the series configures driver to support half-duplex
operation if the DT property "ti,half-duplex-capable" is enabled.

This series addresses comments on [v2]. This series is based on the latest
net-next/main. This series has no dependency.

Changes from v1 to v2:
*) Changed the description of "ti,half-duplex-capable" property as asked
by Rob and Andrew to avoid confusion between capable and enable.

Changes from v1 to v2:
*) Dropped the RFC tag.
*) Added RB tags of Andrew and Roger.

[v1] https://lore.kernel.org/all/[email protected]/
[v2] https://lore.kernel.org/all/[email protected]/

Thanks and Regards,
Md Danish Anwar

MD Danish Anwar (2):
dt-bindings: net: Add documentation for Half duplex support.
net: ti: icssg-prueth: Add support for half duplex operation

.../bindings/net/ti,icssg-prueth.yaml | 7 +++++++
drivers/net/ethernet/ti/icssg/icssg_config.c | 14 ++++++++++++++
drivers/net/ethernet/ti/icssg/icssg_prueth.c | 17 +++++++++++++++--
drivers/net/ethernet/ti/icssg/icssg_prueth.h | 2 ++
4 files changed, 38 insertions(+), 2 deletions(-)

--
2.34.1

2023-09-15 13:06:41

by patchwork-bot+netdevbpf

Subject: Re: [PATCH net-next v3 0/2] Add Half Duplex support for ICSSG Driver

Hello:

This series was applied to netdev/net-next.git (main)
by David S. Miller <[email protected]>:

On Wed, 13 Sep 2023 14:40:09 +0530 you wrote:
> This series adds support for half duplex operation for ICSSG driver.
>
> In order to support half-duplex operation at 10M and 100M link speeds, the
> PHY collision detection signal (COL) should be routed to ICSSG GPIO pin
> (PRGx_PRU0/1_GPI10) so that firmware can detect collision signal and apply
> the CSMA/CD algorithm applicable for half duplex operation. A DT property,
> "ti,half-duplex-capable" is introduced for this purpose in the first patch
> of the series. If board has PHY COL pin conencted to PRGx_PRU1_GPIO10,
> this DT property can be added to eth node of ICSSG, MII port to support
> half duplex operation at that port.
>
> [...]

Here is the summary with links:
- [net-next,v3,1/2] dt-bindings: net: Add documentation for Half duplex support.
https://git.kernel.org/netdev/net-next/c/927c568d6212
- [net-next,v3,2/2] net: ti: icssg-prueth: Add support for half duplex operation
https://git.kernel.org/netdev/net-next/c/0a205f0fe8dd

You are awesome, thank you!
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