2023-12-29 20:30:19

by David Heidelberg

Subject: [PATCH] arm64: dts: qcom: sdm845: add power domain to UFS phy interface

Reported by: `make CHECK_DTBS=1 qcom/sdm845-oneplus-enchilada.dtb`

Signed-off-by: David Heidelberg <[email protected]>
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 ++
1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index c2244824355a..ad8677b62bfb 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -2644,6 +2644,8 @@ ufs_mem_phy: phy@1d87000 {
clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
<&gcc GCC_UFS_PHY_PHY_AUX_CLK>;

+ power-domains = <&gcc UFS_PHY_GDSC>;
+
resets = <&ufs_mem_hc 0>;
reset-names = "ufsphy";

--
2.43.0

2023-12-29 21:38:14

by Luca Weiss

Subject: Re: [PATCH] arm64: dts: qcom: sdm845: add power domain to UFS phy interface

On Freitag, 29. Dezember 2023 21:29:54 CET David Heidelberg wrote:
> Reported by: `make CHECK_DTBS=1 qcom/sdm845-oneplus-enchilada.dtb`
>
> Signed-off-by: David Heidelberg <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> b/arch/arm64/boot/dts/qcom/sdm845.dtsi index c2244824355a..ad8677b62bfb
> 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -2644,6 +2644,8 @@ ufs_mem_phy: phy@1d87000 {
> clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
> <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
>
> + power-domains = <&gcc UFS_PHY_GDSC>;
> +
> resets = <&ufs_mem_hc 0>;
> reset-names = "ufsphy";

This is potentially the wrong power domain, see the conversation here:
https://lore.kernel.org/linux-arm-msm/20231204172829.GA69580@thinkpad/

Hopefully Mani can give some input here :)

Regards
Luca

2023-12-29 23:18:51

by David Heidelberg

Subject: Re: [PATCH] arm64: dts: qcom: sdm845: add power domain to UFS phy interface

On 29/12/2023 22:37, Luca Weiss wrote:

> On Freitag, 29. Dezember 2023 21:29:54 CET David Heidelberg wrote:
>> Reported by: `make CHECK_DTBS=1 qcom/sdm845-oneplus-enchilada.dtb`
>>
>> Signed-off-by: David Heidelberg <[email protected]>
>> ---
>> arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
>> b/arch/arm64/boot/dts/qcom/sdm845.dtsi index c2244824355a..ad8677b62bfb
>> 100644
>> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
>> @@ -2644,6 +2644,8 @@ ufs_mem_phy: phy@1d87000 {
>> clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
>> <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
>>
>> + power-domains = <&gcc UFS_PHY_GDSC>;
>> +
>> resets = <&ufs_mem_hc 0>;
>> reset-names = "ufsphy";
> This is potentially the wrong power domain, see the conversation here:
> https://lore.kernel.org/linux-arm-msm/20231204172829.GA69580@thinkpad/
Thanks, I was thinking about  SDM845_MX, but then looked at rest more
closer qcom archs and thought it'll be likely GDSC (also by looking at
ufs_mem_hc reset vectors).
>
> Hopefully Mani can give some input here :)
>
> Regards
> Luca
>
>
--
David Heidelberg

2023-12-30 23:28:57

by Caleb Connolly

Subject: Re: [PATCH] arm64: dts: qcom: sdm845: add power domain to UFS phy interface

Hi David,

Did you boot-test this?

On 30/12/2023 00:18, David Heidelberg wrote:
> On 29/12/2023 22:37, Luca Weiss wrote:
>
>> On Freitag, 29. Dezember 2023 21:29:54 CET David Heidelberg wrote:
>>> Reported by: `make CHECK_DTBS=1 qcom/sdm845-oneplus-enchilada.dtb`
>>>
>>> Signed-off-by: David Heidelberg <[email protected]>
>>> ---
>>>   arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 ++
>>>   1 file changed, 2 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
>>> b/arch/arm64/boot/dts/qcom/sdm845.dtsi index c2244824355a..ad8677b62bfb
>>> 100644
>>> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
>>> @@ -2644,6 +2644,8 @@ ufs_mem_phy: phy@1d87000 {
>>>               clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
>>>                    <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
>>>
>>> +            power-domains = <&gcc UFS_PHY_GDSC>;
>>> +
>>>               resets = <&ufs_mem_hc 0>;
>>>               reset-names = "ufsphy";
>> This is potentially the wrong power domain, see the conversation here:
>> https://lore.kernel.org/linux-arm-msm/20231204172829.GA69580@thinkpad/
> Thanks, I was thinking about  SDM845_MX, but then looked at rest more
> closer qcom archs and thought it'll be likely GDSC (also by looking at
> ufs_mem_hc reset vectors).
>>
>> Hopefully Mani can give some input here :)
>>
>> Regards
>> Luca
>>
>>

--
// Caleb (they/them)

2024-01-01 15:43:58

by Manivannan Sadhasivam

Subject: Re: [PATCH] arm64: dts: qcom: sdm845: add power domain to UFS phy interface

On Fri, Dec 29, 2023 at 10:37:56PM +0100, Luca Weiss wrote:
> On Freitag, 29. Dezember 2023 21:29:54 CET David Heidelberg wrote:
> > Reported by: `make CHECK_DTBS=1 qcom/sdm845-oneplus-enchilada.dtb`
> >
> > Signed-off-by: David Heidelberg <[email protected]>
> > ---
> > arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > b/arch/arm64/boot/dts/qcom/sdm845.dtsi index c2244824355a..ad8677b62bfb
> > 100644
> > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > @@ -2644,6 +2644,8 @@ ufs_mem_phy: phy@1d87000 {
> > clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
> > <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
> >
> > + power-domains = <&gcc UFS_PHY_GDSC>;
> > +
> > resets = <&ufs_mem_hc 0>;
> > reset-names = "ufsphy";
>
> This is potentially the wrong power domain, see the conversation here:
> https://lore.kernel.org/linux-arm-msm/20231204172829.GA69580@thinkpad/
>

Yes, GDSCs are the power domain of the controllers, not PHYs. This applies to
other peripherals such as USB, PCIe etc...

- Mani

> Hopefully Mani can give some input here :)
>
> Regards
> Luca
>
>

--
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