Signed-off-by: Yang Xiwen <[email protected]>
---
Changes in v6:
- add missing "not" in commit logs (Andrew)
- rework binding changes, split it into several commits (Krzysztof Kozlowski)
- Link to v5: https://lore.kernel.org/r/[email protected]
Changes in v5:
- hisi-femac-mdio: remove clock completely (Krzysztof Kozlowski)
- dt-bindings: mdio: apply comments from Krzysztof Kozlowski
Changes in v4:
- edit commit log to show why mdio bus clk is optional (Krzysztof Kozlowski)
- add clk_bulk_disable_unprepare() during error path (Maxime Chevallier)
- remove of_node_put() (Simon Horman)
- remove histb-clock.h header in binding example as it's goign to be deprecated.
- rearrange patches so binding comes before driver
- Link to v3: https://lore.kernel.org/r/[email protected]
Changes in v3:
- rearrange patches to fix bot error. (Rob Herring)
- rewrite commit logs (Andrew Lunn)
- use clk_bulk_ APIs (Andrew Lunn)
- fix uninitialization use of ret (assign to -ENODEV before goto) (Simon Horman)
- Link to v2: https://lore.kernel.org/r/[email protected]
Changes in v2:
- replace email.
- hisi-femac: s/BUS/MACIF (Andrew Lunn)
- hisi-femac: add "hisilicon,hisi-femac" compatible since the driver
seems generic enough for various SoCs
- hisi-femac-mdio: convert binding to YAML (Krzysztof Kozlowski)
- rewrite commit logs (Krzysztof Kozlowski)
- Link to v1: https://lore.kernel.org/r/[email protected]
---
Yang Xiwen (11):
dt-bindings: net: hisilicon-femac-mdio: convert to YAML
dt-bindings: net: hisilicon,hisi-femac-mdio: remove clocks
net: mdio: hisi-femac: remove clock
dt-bindings: net: convert hisi-femac.txt to YAML
dt-bindings: net: hisi-femac: remove core specific versioning
dt-bindings: net: hisi-femac: add missing clocks
dt-bindings: net: hisi-femac: replace deprecated phy-mode with recommended phy-connection-type
dt-bindings: net: hisi-femac: add mandatory MDIO bus subnode
dt-bindings: net: hisi-femac: add binding for Hi3798MV200 FEMAC core
net: hisi_femac: remove unused compatible strings
net: hisi_femac: add support for hisi_femac core on Hi3798MV200
.../bindings/net/hisilicon,hisi-femac-mdio.yaml | 39 +++++++
.../bindings/net/hisilicon,hisi-femac.yaml | 120 +++++++++++++++++++++
.../bindings/net/hisilicon-femac-mdio.txt | 22 ----
.../devicetree/bindings/net/hisilicon-femac.txt | 41 -------
drivers/net/ethernet/hisilicon/hisi_femac.c | 77 ++++++++++---
drivers/net/mdio/mdio-hisi-femac.c | 18 +---
6 files changed, 221 insertions(+), 96 deletions(-)
---
base-commit: d206a76d7d2726f3b096037f2079ce0bd3ba329b
change-id: 20240216-net-9a208e17c40f
Best regards,
--
Yang Xiwen <[email protected]>
From: Yang Xiwen <[email protected]>
The old property "phy-mode" should be replaced with the latest
"phy-connection-type".
Signed-off-by: Yang Xiwen <[email protected]>
---
Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml
index ba207f2c9ae4..6c5888897876 100644
--- a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml
+++ b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml
@@ -66,7 +66,7 @@ required:
- clocks
- resets
- reset-names
- - phy-mode
+ - phy-connection-type
- phy-handle
- hisilicon,phy-reset-delays-us
@@ -83,7 +83,7 @@ examples:
resets = <&crg 0xec 0>, <&crg 0xec 3>;
reset-names = "mac", "phy";
mac-address = [00 00 00 00 00 00];
- phy-mode = "mii";
+ phy-connection-type = "mii";
phy-handle = <&fephy>;
hisilicon,phy-reset-delays-us = <10000 20000 20000>;
};
--
2.43.0
From: Yang Xiwen <[email protected]>
convert the old text biinding to new YAML. No semantic change.
Signed-off-by: Yang Xiwen <[email protected]>
---
.../bindings/net/hisilicon,hisi-femac.yaml | 82 ++++++++++++++++++++++
.../devicetree/bindings/net/hisilicon-femac.txt | 41 -----------
2 files changed, 82 insertions(+), 41 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml
new file mode 100644
index 000000000000..016e9e409a30
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml
@@ -0,0 +1,82 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/hisilicon,hisi-femac.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Hisilicon Fast Ethernet MAC controller
+
+maintainers:
+ - Yang Xiwen <[email protected]>
+
+allOf:
+ - $ref: ethernet-controller.yaml
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - hisilicon,hi3516cv300-femac
+ - enum:
+ - hisilicon,hisi-femac-v1
+ - hisilicon,hisi-femac-v2
+
+ reg:
+ items:
+ - description: The first region is the MAC core register base and size.
+ - description: The second region is the global MAC control register.
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: MAC main clock
+
+ resets:
+ items:
+ - description: MAC reset signal
+ - description: PHY reset signal
+
+ reset-names:
+ items:
+ - const: mac
+ - const: phy
+
+ hisilicon,phy-reset-delays-us:
+ description: PHY reset timing requirement (in micro seconds).
+ The integrated PHY usually have a special reset timing sequence and must
+ interact with MAC controller to accomplish the entire reset procedure. So
+ these properties belong to MAC controller, not PHY.
+ items:
+ - description: pre-reset delay for PHY
+ - description: reset pulse for PHY
+ - description: post-reset delay for PHY
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - resets
+ - reset-names
+ - phy-mode
+ - phy-handle
+ - hisilicon,phy-reset-delays-us
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ ethernet@10090000 {
+ compatible = "hisilicon,hi3516cv300-femac", "hisilicon,hisi-femac-v2";
+ reg = <0x10090000 0x1000>, <0x10091300 0x200>;
+ interrupts = <12>;
+ clocks = <&clk_femac>;
+ resets = <&crg 0xec 0>, <&crg 0xec 3>;
+ reset-names = "mac", "phy";
+ mac-address = [00 00 00 00 00 00];
+ phy-mode = "mii";
+ phy-handle = <&fephy>;
+ hisilicon,phy-reset-delays-us = <10000 20000 20000>;
+ };
diff --git a/Documentation/devicetree/bindings/net/hisilicon-femac.txt b/Documentation/devicetree/bindings/net/hisilicon-femac.txt
deleted file mode 100644
index 5f96976f3cea..000000000000
--- a/Documentation/devicetree/bindings/net/hisilicon-femac.txt
+++ /dev/null
@@ -1,41 +0,0 @@
-Hisilicon Fast Ethernet MAC controller
-
-Required properties:
-- compatible: should contain one of the following version strings:
- * "hisilicon,hisi-femac-v1"
- * "hisilicon,hisi-femac-v2"
- and the soc string "hisilicon,hi3516cv300-femac".
-- reg: specifies base physical address(s) and size of the device registers.
- The first region is the MAC core register base and size.
- The second region is the global MAC control register.
-- interrupts: should contain the MAC interrupt.
-- clocks: A phandle to the MAC main clock.
-- resets: should contain the phandle to the MAC reset signal(required) and
- the PHY reset signal(optional).
-- reset-names: should contain the reset signal name "mac"(required)
- and "phy"(optional).
-- phy-mode: see ethernet.txt [1].
-- phy-handle: see ethernet.txt [1].
-- hisilicon,phy-reset-delays-us: triplet of delays if PHY reset signal given.
- The 1st cell is reset pre-delay in micro seconds.
- The 2nd cell is reset pulse in micro seconds.
- The 3rd cell is reset post-delay in micro seconds.
-
-The MAC address will be determined using the optional properties
-defined in ethernet.txt[1].
-
-[1] Documentation/devicetree/bindings/net/ethernet.txt
-
-Example:
- hisi_femac: ethernet@10090000 {
- compatible = "hisilicon,hi3516cv300-femac","hisilicon,hisi-femac-v2";
- reg = <0x10090000 0x1000>,<0x10091300 0x200>;
- interrupts = <12>;
- clocks = <&crg HI3518EV200_ETH_CLK>;
- resets = <&crg 0xec 0>,<&crg 0xec 3>;
- reset-names = "mac","phy";
- mac-address = [00 00 00 00 00 00];
- phy-mode = "mii";
- phy-handle = <&phy0>;
- hisilicon,phy-reset-delays-us = <10000 20000 20000>;
- };
--
2.43.0
From: Yang Xiwen <[email protected]>
HiSilicon FEMAC core is also found on Hi3798MV200 SoC. Document it in
binding.
Signed-off-by: Yang Xiwen <[email protected]>
---
Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml
index d56ff8538a86..0e5e62d2b8aa 100644
--- a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml
+++ b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml
@@ -17,6 +17,7 @@ properties:
items:
- enum:
- hisilicon,hi3516cv300-femac
+ - hisilicon,hi3798mv200-femac
- const: hisilicon,hisi-femac
reg:
--
2.43.0
From: Yang Xiwen <[email protected]>
Register the sub MDIO bus if it is found. Also implement the internal
PHY reset procedure as needed.
Note it's unable to put the MDIO bus node outside of MAC controller
(i.e. at the same level in the parent bus node). Because we need to
control all clocks and resets in FEMAC driver due to the phy reset
procedure. So the clocks can't be assigned to MDIO bus device, which is
an essential resource for the MDIO bus to work.
No backward compatibility is maintained since the only existing
user(Hi3516DV300) has not received any updates from HiSilicon for about
8 years already. And till today, no mainline dts for this SoC is found.
It seems unlikely that there are still existing mainline Hi3516DV300
users. The effort to maintain the old binding seems gain a little.
Signed-off-by: Yang Xiwen <[email protected]>
---
drivers/net/ethernet/hisilicon/hisi_femac.c | 74 +++++++++++++++++++++++------
1 file changed, 60 insertions(+), 14 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hisi_femac.c b/drivers/net/ethernet/hisilicon/hisi_femac.c
index 3c5c095dad05..be2bfd06c8d2 100644
--- a/drivers/net/ethernet/hisilicon/hisi_femac.c
+++ b/drivers/net/ethernet/hisilicon/hisi_femac.c
@@ -10,8 +10,10 @@
#include <linux/etherdevice.h>
#include <linux/interrupt.h>
#include <linux/module.h>
+#include <linux/of.h>
#include <linux/of_mdio.h>
#include <linux/of_net.h>
+#include <linux/of_platform.h>
#include <linux/platform_device.h>
#include <linux/reset.h>
@@ -97,6 +99,13 @@ enum phy_reset_delays {
DELAYS_NUM,
};
+enum clk_type {
+ CLK_MAC,
+ CLK_MACIF,
+ CLK_PHY,
+ CLK_NUM,
+};
+
struct hisi_femac_queue {
struct sk_buff **skb;
dma_addr_t *dma_phys;
@@ -108,7 +117,7 @@ struct hisi_femac_queue {
struct hisi_femac_priv {
void __iomem *port_base;
void __iomem *glb_base;
- struct clk *clk;
+ struct clk_bulk_data *clks;
struct reset_control *mac_rst;
struct reset_control *phy_rst;
u32 phy_reset_delays[DELAYS_NUM];
@@ -116,6 +125,7 @@ struct hisi_femac_priv {
struct device *dev;
struct net_device *ndev;
+ struct platform_device *mdio_pdev;
struct hisi_femac_queue txq;
struct hisi_femac_queue rxq;
@@ -693,6 +703,7 @@ static const struct net_device_ops hisi_femac_netdev_ops = {
static void hisi_femac_core_reset(struct hisi_femac_priv *priv)
{
reset_control_assert(priv->mac_rst);
+ usleep_range(200, 300);
reset_control_deassert(priv->mac_rst);
}
@@ -712,6 +723,10 @@ static void hisi_femac_sleep_us(u32 time_us)
static void hisi_femac_phy_reset(struct hisi_femac_priv *priv)
{
+ /* MAC clock must be disabled before PHY reset
+ */
+ clk_disable(priv->clks[CLK_MAC].clk);
+ clk_disable(priv->clks[CLK_MACIF].clk);
/* To make sure PHY hardware reset success,
* we must keep PHY in deassert state first and
* then complete the hardware reset operation
@@ -727,6 +742,9 @@ static void hisi_femac_phy_reset(struct hisi_femac_priv *priv)
reset_control_deassert(priv->phy_rst);
/* delay some time to ensure later MDIO access */
hisi_femac_sleep_us(priv->phy_reset_delays[POST_DELAY]);
+
+ clk_enable(priv->clks[CLK_MAC].clk);
+ clk_enable(priv->clks[CLK_MACIF].clk);
}
static void hisi_femac_port_init(struct hisi_femac_priv *priv)
@@ -768,11 +786,12 @@ static void hisi_femac_port_init(struct hisi_femac_priv *priv)
static int hisi_femac_drv_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
- struct device_node *node = dev->of_node;
+ struct device_node *node = dev->of_node, *mdio_np;
struct net_device *ndev;
struct hisi_femac_priv *priv;
struct phy_device *phy;
int ret;
+ bool mdio_registered = false;
ndev = alloc_etherdev(sizeof(*priv));
if (!ndev)
@@ -797,17 +816,16 @@ static int hisi_femac_drv_probe(struct platform_device *pdev)
goto out_free_netdev;
}
- priv->clk = devm_clk_get(&pdev->dev, NULL);
- if (IS_ERR(priv->clk)) {
- dev_err(dev, "failed to get clk\n");
- ret = -ENODEV;
+ ret = devm_clk_bulk_get_all(&pdev->dev, &priv->clks);
+ if (ret < 0 || ret != CLK_NUM) {
+ dev_err(dev, "failed to get clk bulk: %d\n", ret);
goto out_free_netdev;
}
- ret = clk_prepare_enable(priv->clk);
+ ret = clk_bulk_prepare_enable(CLK_NUM, priv->clks);
if (ret) {
- dev_err(dev, "failed to enable clk %d\n", ret);
- goto out_free_netdev;
+ dev_err(dev, "failed to enable clk bulk: %d\n", ret);
+ goto out_disable_clk;
}
priv->mac_rst = devm_reset_control_get(dev, "mac");
@@ -830,11 +848,29 @@ static int hisi_femac_drv_probe(struct platform_device *pdev)
hisi_femac_phy_reset(priv);
}
+ // Register the optional MDIO bus
+ for_each_available_child_of_node(node, mdio_np) {
+ if (of_node_name_prefix(mdio_np, "mdio")) {
+ priv->mdio_pdev = of_platform_device_create(mdio_np, NULL, dev);
+ of_node_put(mdio_np);
+ if (!priv->mdio_pdev) {
+ dev_err(dev, "failed to register MDIO bus device\n");
+ ret = -ENODEV;
+ goto out_disable_clk;
+ }
+ mdio_registered = true;
+ break;
+ }
+ }
+
+ if (!mdio_registered)
+ dev_warn(dev, "MDIO subnode not found. This is usually a bug.\n");
+
phy = of_phy_get_and_connect(ndev, node, hisi_femac_adjust_link);
if (!phy) {
dev_err(dev, "connect to PHY failed!\n");
ret = -ENODEV;
- goto out_disable_clk;
+ goto out_unregister_mdio_bus;
}
phy_attached_print(phy, "phy_id=0x%.8lx, phy_mode=%s\n",
@@ -885,8 +921,10 @@ static int hisi_femac_drv_probe(struct platform_device *pdev)
out_disconnect_phy:
netif_napi_del(&priv->napi);
phy_disconnect(phy);
+out_unregister_mdio_bus:
+ platform_device_unregister(priv->mdio_pdev);
out_disable_clk:
- clk_disable_unprepare(priv->clk);
+ clk_bulk_disable_unprepare(CLK_NUM, priv->clks);
out_free_netdev:
free_netdev(ndev);
@@ -902,7 +940,8 @@ static void hisi_femac_drv_remove(struct platform_device *pdev)
unregister_netdev(ndev);
phy_disconnect(ndev->phydev);
- clk_disable_unprepare(priv->clk);
+ platform_device_unregister(priv->mdio_pdev);
+ clk_bulk_disable_unprepare(CLK_NUM, priv->clks);
free_netdev(ndev);
}
@@ -919,7 +958,7 @@ static int hisi_femac_drv_suspend(struct platform_device *pdev,
netif_device_detach(ndev);
}
- clk_disable_unprepare(priv->clk);
+ clk_bulk_disable_unprepare(CLK_NUM, priv->clks);
return 0;
}
@@ -928,8 +967,14 @@ static int hisi_femac_drv_resume(struct platform_device *pdev)
{
struct net_device *ndev = platform_get_drvdata(pdev);
struct hisi_femac_priv *priv = netdev_priv(ndev);
+ int ret;
+
+ ret = clk_bulk_prepare_enable(CLK_NUM, priv->clks);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to enable clk bulk: %d\n", ret);
+ return ret;
+ }
- clk_prepare_enable(priv->clk);
if (priv->phy_rst)
hisi_femac_phy_reset(priv);
@@ -947,6 +992,7 @@ static int hisi_femac_drv_resume(struct platform_device *pdev)
static const struct of_device_id hisi_femac_match[] = {
{.compatible = "hisilicon,hisi-femac",},
{.compatible = "hisilicon,hi3516cv300-femac",},
+ {.compatible = "hisilicon,hi3798mv200-femac",},
{},
};
--
2.43.0
On 2/28/2024 5:02 PM, Yang Xiwen via B4 Relay wrote:
> From: Yang Xiwen <[email protected]>
>
> Register the sub MDIO bus if it is found. Also implement the internal
> PHY reset procedure as needed.
>
> Note it's unable to put the MDIO bus node outside of MAC controller
> (i.e. at the same level in the parent bus node). Because we need to
> control all clocks and resets in FEMAC driver due to the phy reset
> procedure. So the clocks can't be assigned to MDIO bus device, which is
> an essential resource for the MDIO bus to work.
>
> No backward compatibility is maintained since the only existing
> user(Hi3516DV300) has not received any updates from HiSilicon for about
> 8 years already. And till today, no mainline dts for this SoC is found.
> It seems unlikely that there are still existing mainline Hi3516DV300
> users. The effort to maintain the old binding seems gain a little.
Will rewrite commit log in next version
>
> Signed-off-by: Yang Xiwen <[email protected]>
> ---
> drivers/net/ethernet/hisilicon/hisi_femac.c | 74 +++++++++++++++++++++++------
> 1 file changed, 60 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/net/ethernet/hisilicon/hisi_femac.c b/drivers/net/ethernet/hisilicon/hisi_femac.c
> index 3c5c095dad05..be2bfd06c8d2 100644
> --- a/drivers/net/ethernet/hisilicon/hisi_femac.c
> +++ b/drivers/net/ethernet/hisilicon/hisi_femac.c
> @@ -10,8 +10,10 @@
> #include <linux/etherdevice.h>
> #include <linux/interrupt.h>
> #include <linux/module.h>
> +#include <linux/of.h>
> #include <linux/of_mdio.h>
> #include <linux/of_net.h>
> +#include <linux/of_platform.h>
> #include <linux/platform_device.h>
> #include <linux/reset.h>
>
> @@ -97,6 +99,13 @@ enum phy_reset_delays {
> DELAYS_NUM,
> };
>
> +enum clk_type {
> + CLK_MAC,
> + CLK_MACIF,
> + CLK_PHY,
> + CLK_NUM,
> +};
> +
> struct hisi_femac_queue {
> struct sk_buff **skb;
> dma_addr_t *dma_phys;
> @@ -108,7 +117,7 @@ struct hisi_femac_queue {
> struct hisi_femac_priv {
> void __iomem *port_base;
> void __iomem *glb_base;
> - struct clk *clk;
> + struct clk_bulk_data *clks;
> struct reset_control *mac_rst;
> struct reset_control *phy_rst;
> u32 phy_reset_delays[DELAYS_NUM];
> @@ -116,6 +125,7 @@ struct hisi_femac_priv {
>
> struct device *dev;
> struct net_device *ndev;
> + struct platform_device *mdio_pdev;
>
> struct hisi_femac_queue txq;
> struct hisi_femac_queue rxq;
> @@ -693,6 +703,7 @@ static const struct net_device_ops hisi_femac_netdev_ops = {
> static void hisi_femac_core_reset(struct hisi_femac_priv *priv)
> {
> reset_control_assert(priv->mac_rst);
> + usleep_range(200, 300);
> reset_control_deassert(priv->mac_rst);
> }
>
> @@ -712,6 +723,10 @@ static void hisi_femac_sleep_us(u32 time_us)
>
> static void hisi_femac_phy_reset(struct hisi_femac_priv *priv)
> {
> + /* MAC clock must be disabled before PHY reset
> + */
> + clk_disable(priv->clks[CLK_MAC].clk);
> + clk_disable(priv->clks[CLK_MACIF].clk);
> /* To make sure PHY hardware reset success,
> * we must keep PHY in deassert state first and
> * then complete the hardware reset operation
> @@ -727,6 +742,9 @@ static void hisi_femac_phy_reset(struct hisi_femac_priv *priv)
> reset_control_deassert(priv->phy_rst);
> /* delay some time to ensure later MDIO access */
> hisi_femac_sleep_us(priv->phy_reset_delays[POST_DELAY]);
> +
> + clk_enable(priv->clks[CLK_MAC].clk);
> + clk_enable(priv->clks[CLK_MACIF].clk);
> }
>
> static void hisi_femac_port_init(struct hisi_femac_priv *priv)
> @@ -768,11 +786,12 @@ static void hisi_femac_port_init(struct hisi_femac_priv *priv)
> static int hisi_femac_drv_probe(struct platform_device *pdev)
> {
> struct device *dev = &pdev->dev;
> - struct device_node *node = dev->of_node;
> + struct device_node *node = dev->of_node, *mdio_np;
> struct net_device *ndev;
> struct hisi_femac_priv *priv;
> struct phy_device *phy;
> int ret;
> + bool mdio_registered = false;
>
> ndev = alloc_etherdev(sizeof(*priv));
> if (!ndev)
> @@ -797,17 +816,16 @@ static int hisi_femac_drv_probe(struct platform_device *pdev)
> goto out_free_netdev;
> }
>
> - priv->clk = devm_clk_get(&pdev->dev, NULL);
> - if (IS_ERR(priv->clk)) {
> - dev_err(dev, "failed to get clk\n");
> - ret = -ENODEV;
> + ret = devm_clk_bulk_get_all(&pdev->dev, &priv->clks);
> + if (ret < 0 || ret != CLK_NUM) {
> + dev_err(dev, "failed to get clk bulk: %d\n", ret);
> goto out_free_netdev;
> }
>
> - ret = clk_prepare_enable(priv->clk);
> + ret = clk_bulk_prepare_enable(CLK_NUM, priv->clks);
> if (ret) {
> - dev_err(dev, "failed to enable clk %d\n", ret);
> - goto out_free_netdev;
> + dev_err(dev, "failed to enable clk bulk: %d\n", ret);
> + goto out_disable_clk;
> }
>
> priv->mac_rst = devm_reset_control_get(dev, "mac");
> @@ -830,11 +848,29 @@ static int hisi_femac_drv_probe(struct platform_device *pdev)
> hisi_femac_phy_reset(priv);
> }
>
> + // Register the optional MDIO bus
> + for_each_available_child_of_node(node, mdio_np) {
> + if (of_node_name_prefix(mdio_np, "mdio")) {
> + priv->mdio_pdev = of_platform_device_create(mdio_np, NULL, dev);
> + of_node_put(mdio_np);
> + if (!priv->mdio_pdev) {
> + dev_err(dev, "failed to register MDIO bus device\n");
> + ret = -ENODEV;
> + goto out_disable_clk;
> + }
> + mdio_registered = true;
> + break;
> + }
> + }
> +
> + if (!mdio_registered)
> + dev_warn(dev, "MDIO subnode not found. This is usually a bug.\n");
> +
> phy = of_phy_get_and_connect(ndev, node, hisi_femac_adjust_link);
> if (!phy) {
> dev_err(dev, "connect to PHY failed!\n");
> ret = -ENODEV;
> - goto out_disable_clk;
> + goto out_unregister_mdio_bus;
> }
>
> phy_attached_print(phy, "phy_id=0x%.8lx, phy_mode=%s\n",
> @@ -885,8 +921,10 @@ static int hisi_femac_drv_probe(struct platform_device *pdev)
> out_disconnect_phy:
> netif_napi_del(&priv->napi);
> phy_disconnect(phy);
> +out_unregister_mdio_bus:
> + platform_device_unregister(priv->mdio_pdev);
> out_disable_clk:
> - clk_disable_unprepare(priv->clk);
> + clk_bulk_disable_unprepare(CLK_NUM, priv->clks);
> out_free_netdev:
> free_netdev(ndev);
>
> @@ -902,7 +940,8 @@ static void hisi_femac_drv_remove(struct platform_device *pdev)
> unregister_netdev(ndev);
>
> phy_disconnect(ndev->phydev);
> - clk_disable_unprepare(priv->clk);
> + platform_device_unregister(priv->mdio_pdev);
> + clk_bulk_disable_unprepare(CLK_NUM, priv->clks);
> free_netdev(ndev);
> }
>
> @@ -919,7 +958,7 @@ static int hisi_femac_drv_suspend(struct platform_device *pdev,
> netif_device_detach(ndev);
> }
>
> - clk_disable_unprepare(priv->clk);
> + clk_bulk_disable_unprepare(CLK_NUM, priv->clks);
>
> return 0;
> }
> @@ -928,8 +967,14 @@ static int hisi_femac_drv_resume(struct platform_device *pdev)
> {
> struct net_device *ndev = platform_get_drvdata(pdev);
> struct hisi_femac_priv *priv = netdev_priv(ndev);
> + int ret;
> +
> + ret = clk_bulk_prepare_enable(CLK_NUM, priv->clks);
> + if (ret) {
> + dev_err(&pdev->dev, "failed to enable clk bulk: %d\n", ret);
> + return ret;
> + }
>
> - clk_prepare_enable(priv->clk);
> if (priv->phy_rst)
> hisi_femac_phy_reset(priv);
>
> @@ -947,6 +992,7 @@ static int hisi_femac_drv_resume(struct platform_device *pdev)
> static const struct of_device_id hisi_femac_match[] = {
> {.compatible = "hisilicon,hisi-femac",},
> {.compatible = "hisilicon,hi3516cv300-femac",},
> + {.compatible = "hisilicon,hi3798mv200-femac",},
> {},
> };
>
>
--
Best regards,
Yang Xiwen
From: Yang Xiwen <[email protected]>
It's hard to get the version number for each FEMAC core and it's unknown
how the version can be used. Remove them until it's really needed.
Signed-off-by: Yang Xiwen <[email protected]>
---
drivers/net/ethernet/hisilicon/hisi_femac.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hisi_femac.c b/drivers/net/ethernet/hisilicon/hisi_femac.c
index 2406263c9dd3..3c5c095dad05 100644
--- a/drivers/net/ethernet/hisilicon/hisi_femac.c
+++ b/drivers/net/ethernet/hisilicon/hisi_femac.c
@@ -945,8 +945,7 @@ static int hisi_femac_drv_resume(struct platform_device *pdev)
#endif
static const struct of_device_id hisi_femac_match[] = {
- {.compatible = "hisilicon,hisi-femac-v1",},
- {.compatible = "hisilicon,hisi-femac-v2",},
+ {.compatible = "hisilicon,hisi-femac",},
{.compatible = "hisilicon,hi3516cv300-femac",},
{},
};
--
2.43.0
From: Yang Xiwen <[email protected]>
FEMAC core always has an integrated MDIO bus mapped in its address
space. Add required properties '#address-cells', 'size-cells', 'ranges'
and MDIO bus subnode.
Signed-off-by: Yang Xiwen <[email protected]>
---
.../bindings/net/hisilicon,hisi-femac.yaml | 30 ++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml
index 6c5888897876..d56ff8538a86 100644
--- a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml
+++ b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml
@@ -24,6 +24,15 @@ properties:
- description: The first region is the MAC core register base and size.
- description: The second region is the global MAC control register.
+ ranges:
+ maxItems: 1
+
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 1
+
interrupts:
maxItems: 1
@@ -59,9 +68,16 @@ properties:
- description: reset pulse for PHY
- description: post-reset delay for PHY
+patternProperties:
+ 'mdio@[0-9a-f]+':
+ $ref: hisilicon,hisi-femac-mdio.yaml#
+
required:
- compatible
- reg
+ - ranges
+ - '#address-cells'
+ - '#size-cells'
- interrupts
- clocks
- resets
@@ -77,6 +93,9 @@ examples:
ethernet@10090000 {
compatible = "hisilicon,hi3516cv300-femac", "hisilicon,hisi-femac";
reg = <0x10090000 0x1000>, <0x10091300 0x200>;
+ ranges = <0x0 0x10090000 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
interrupts = <12>;
clocks = <&clk_femac>, <&clk_femacif>, <&clk_fephy>;
clock-names = "mac", "macif", "phy";
@@ -86,4 +105,15 @@ examples:
phy-connection-type = "mii";
phy-handle = <&fephy>;
hisilicon,phy-reset-delays-us = <10000 20000 20000>;
+
+ mdio@1100 {
+ compatible = "hisilicon,hisi-femac-mdio";
+ reg = <0x1100 0x20>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy@1 {
+ reg = <1>;
+ };
+ };
};
--
2.43.0
On 28/02/2024 10:02, Yang Xiwen via B4 Relay wrote:
> From: Yang Xiwen <[email protected]>
>
> It's hard to get the version number for each FEMAC core and it's unknown
> how the version can be used. Remove them until it's really needed.
>
> Signed-off-by: Yang Xiwen <[email protected]>
> ---
> drivers/net/ethernet/hisilicon/hisi_femac.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/net/ethernet/hisilicon/hisi_femac.c b/drivers/net/ethernet/hisilicon/hisi_femac.c
> index 2406263c9dd3..3c5c095dad05 100644
> --- a/drivers/net/ethernet/hisilicon/hisi_femac.c
> +++ b/drivers/net/ethernet/hisilicon/hisi_femac.c
> @@ -945,8 +945,7 @@ static int hisi_femac_drv_resume(struct platform_device *pdev)
> #endif
>
> static const struct of_device_id hisi_femac_match[] = {
> - {.compatible = "hisilicon,hisi-femac-v1",},
> - {.compatible = "hisilicon,hisi-femac-v2",},
> + {.compatible = "hisilicon,hisi-femac",},
Drop and just use SoC compatibles.
> {.compatible = "hisilicon,hi3516cv300-femac",},
Best regards,
Krzysztof
On 28/02/2024 10:02, Yang Xiwen via B4 Relay wrote:
> From: Yang Xiwen <[email protected]>
>
> The old property "phy-mode" should be replaced with the latest
> "phy-connection-type".
Why? The old property is not deprecated.
Best regards,
Krzysztof
On 28/02/2024 10:02, Yang Xiwen via B4 Relay wrote:
> From: Yang Xiwen <[email protected]>
>
> Register the sub MDIO bus if it is found. Also implement the internal
> PHY reset procedure as needed.
>
>
> @@ -947,6 +992,7 @@ static int hisi_femac_drv_resume(struct platform_device *pdev)
> static const struct of_device_id hisi_femac_match[] = {
> {.compatible = "hisilicon,hisi-femac",},
> {.compatible = "hisilicon,hi3516cv300-femac",},
> + {.compatible = "hisilicon,hi3798mv200-femac",},
No, it does not make any sense. Why do you keep growing this table?
Best regards,
Krzysztof
On 28/02/2024 10:02, Yang Xiwen via B4 Relay wrote:
> From: Yang Xiwen <[email protected]>
>
> convert the old text biinding to new YAML. No semantic change.
Typo: binding. Also missing capital letter.
>
> Signed-off-by: Yang Xiwen <[email protected]>
> ---
> .../bindings/net/hisilicon,hisi-femac.yaml | 82 ++++++++++++++++++++++
> .../devicetree/bindings/net/hisilicon-femac.txt | 41 -----------
> 2 files changed, 82 insertions(+), 41 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml
> new file mode 100644
> index 000000000000..016e9e409a30
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml
> @@ -0,0 +1,82 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/hisilicon,hisi-femac.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Hisilicon Fast Ethernet MAC controller
> +
> +maintainers:
> + - Yang Xiwen <[email protected]>
> +
> +allOf:
> + - $ref: ethernet-controller.yaml
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - hisilicon,hi3516cv300-femac
> + - enum:
> + - hisilicon,hisi-femac-v1
> + - hisilicon,hisi-femac-v2
This does not make sense. You cannot have two fallbacks. Old binding was
here confusing or even incorrect, so please fix this in the conversion.
It's fine to do the conversion and change, just explain what is done
here and why.
> +
> + reg:
> + items:
> + - description: The first region is the MAC core register base and size.
> + - description: The second region is the global MAC control register.
> +
> + interrupts:
> + maxItems: 1
> +
Best regards,
Krzysztof
On 2/29/2024 4:10 PM, Krzysztof Kozlowski wrote:
> On 28/02/2024 10:02, Yang Xiwen via B4 Relay wrote:
>> From: Yang Xiwen <[email protected]>
>>
>> Register the sub MDIO bus if it is found. Also implement the internal
>> PHY reset procedure as needed.
>>
>
>
>>
>> @@ -947,6 +992,7 @@ static int hisi_femac_drv_resume(struct platform_device *pdev)
>> static const struct of_device_id hisi_femac_match[] = {
>> {.compatible = "hisilicon,hisi-femac",},
>> {.compatible = "hisilicon,hi3516cv300-femac",},
>> + {.compatible = "hisilicon,hi3798mv200-femac",},
>
> No, it does not make any sense. Why do you keep growing this table?
So do I only have to keep the generic compatible "hisilicon,hisi-femac"
or the two SoC compatibles?
>
> Best regards,
> Krzysztof
>
--
Best regards,
Yang Xiwen
On 28/02/2024 10:02, Yang Xiwen via B4 Relay wrote:
> From: Yang Xiwen <[email protected]>
>
> FEMAC core always has an integrated MDIO bus mapped in its address
> space. Add required properties '#address-cells', 'size-cells', 'ranges'
> and MDIO bus subnode.
>
> Signed-off-by: Yang Xiwen <[email protected]>
> ---
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On 2/29/2024 4:08 PM, Krzysztof Kozlowski wrote:
> On 28/02/2024 10:02, Yang Xiwen via B4 Relay wrote:
>> From: Yang Xiwen <[email protected]>
>>
>> The old property "phy-mode" should be replaced with the latest
>> "phy-connection-type".
>
> Why? The old property is not deprecated.
The old property is just a $ref to the new property. While at it, i
would like to update it as well.
Since there is no real user in mainline yet, this update does not need
to keep dts sync. I would expect it(the old property) to be deprecated
in the future.
>
>
>
> Best regards,
> Krzysztof
>
--
Best regards,
Yang Xiwen
On 29/02/2024 09:12, Yang Xiwen wrote:
> On 2/29/2024 4:08 PM, Krzysztof Kozlowski wrote:
>> On 28/02/2024 10:02, Yang Xiwen via B4 Relay wrote:
>>> From: Yang Xiwen <[email protected]>
>>>
>>> The old property "phy-mode" should be replaced with the latest
>>> "phy-connection-type".
>>
>> Why? The old property is not deprecated.
>
> The old property is just a $ref to the new property. While at it, i
> would like to update it as well.
It does not mean which property is preferred. Please provide some
context why this change should be done.
>
> Since there is no real user in mainline yet, this update does not need
> to keep dts sync. I would expect it(the old property) to be deprecated
> in the future.
Best regards,
Krzysztof
On 29/02/2024 09:14, Yang Xiwen wrote:
> On 2/29/2024 4:10 PM, Krzysztof Kozlowski wrote:
>> On 28/02/2024 10:02, Yang Xiwen via B4 Relay wrote:
>>> From: Yang Xiwen <[email protected]>
>>>
>>> Register the sub MDIO bus if it is found. Also implement the internal
>>> PHY reset procedure as needed.
>>>
>>
>>
>>>
>>> @@ -947,6 +992,7 @@ static int hisi_femac_drv_resume(struct platform_device *pdev)
>>> static const struct of_device_id hisi_femac_match[] = {
>>> {.compatible = "hisilicon,hisi-femac",},
>>> {.compatible = "hisilicon,hi3516cv300-femac",},
>>> + {.compatible = "hisilicon,hi3798mv200-femac",},
>>
>> No, it does not make any sense. Why do you keep growing this table?
>
> So do I only have to keep the generic compatible "hisilicon,hisi-femac"
> or the two SoC compatibles?
You only need to keep here fallback compatible.
Best regards,
Krzysztof
On Wed, Feb 28, 2024 at 05:02:31PM +0800, Yang Xiwen via B4 Relay wrote:
> From: Yang Xiwen <[email protected]>
>
> The old property "phy-mode" should be replaced with the latest
> "phy-connection-type".
In practice, phy-mode is typically used, and phy-connection-type is
not used much. All new user tend to be phy-mode.
~/linux$ grep -r phy-mode arch/* | wc
1561 6258 113122
~/linux$ grep -r phy-connection-type arch/* | wc
372 1489 28981
Most of the phy-connection-type appear in PowerPC.
~/linux$ grep -r phy-connection-type arch/powerpc/* | wc
247 990 18335
It was the early adopter of DT, long before ARM. The DT standard of
the time, which PowerPC followed, said to use
phy-connection-type. When ARM started using DT, it did not follow the
standard too well, and phy-mode got used a lot. Officially, phy-mode
is deprecated because it is not part of the standard. But practice
does not always follow the standard.
So both are O.K, all the generic code accepts both, and there is no
real reason to change.
Andrew
On 2/29/2024 4:07 PM, Krzysztof Kozlowski wrote:
> On 28/02/2024 10:02, Yang Xiwen via B4 Relay wrote:
>> From: Yang Xiwen <[email protected]>
>>
>> It's hard to get the version number for each FEMAC core and it's unknown
>> how the version can be used. Remove them until it's really needed.
>>
>> Signed-off-by: Yang Xiwen <[email protected]>
>> ---
>> drivers/net/ethernet/hisilicon/hisi_femac.c | 3 +--
>> 1 file changed, 1 insertion(+), 2 deletions(-)
>>
>> diff --git a/drivers/net/ethernet/hisilicon/hisi_femac.c b/drivers/net/ethernet/hisilicon/hisi_femac.c
>> index 2406263c9dd3..3c5c095dad05 100644
>> --- a/drivers/net/ethernet/hisilicon/hisi_femac.c
>> +++ b/drivers/net/ethernet/hisilicon/hisi_femac.c
>> @@ -945,8 +945,7 @@ static int hisi_femac_drv_resume(struct platform_device *pdev)
>> #endif
>>
>> static const struct of_device_id hisi_femac_match[] = {
>> - {.compatible = "hisilicon,hisi-femac-v1",},
>> - {.compatible = "hisilicon,hisi-femac-v2",},
>> + {.compatible = "hisilicon,hisi-femac",},
> Drop and just use SoC compatibles.
Will be fixed in v8.
>
>> {.compatible = "hisilicon,hi3516cv300-femac",},
>
>
> Best regards,
> Krzysztof
>
--
Regards,
Yang Xiwen