From: Lad Prabhakar <[email protected]>
Hi All,
This patch series updates DT binding doc and scif driver to add support
for the Renesas RZ/V2H(P) SoC. RZ/V2H(P) SoC supports one channel SCIF
interface.
v3->v4
- patch 2/4 reverted back to version 2
- new patch 3/5 added
- Added new reg type for RZ/V2H
v2->v3
- Included DT validation patches
- Added a new compat string for RZ/V2H(P) SoC
- Added driver changes for RZ/V2H(P) SoC
- Listed interrupts and interrupt-names for every SoC in if check
Cheers,
Prabhakar
Lad Prabhakar (5):
dt-bindings: serial: renesas,scif: Move ref for serial.yaml at the end
dt-bindings: serial: renesas,scif: Validate 'interrupts' and
'interrupt-names'
dt-bindings: serial: renesas,scif: Make 'interrupt-names' property as
required
dt-bindings: serial: Add documentation for Renesas RZ/V2H(P)
(R9A09G057) SCIF support
serial: sh-sci: Add support for RZ/V2H(P) SoC
.../bindings/serial/renesas,scif.yaml | 136 +++++++++++++-----
drivers/tty/serial/sh-sci.c | 55 ++++++-
include/linux/serial_sci.h | 1 +
3 files changed, 154 insertions(+), 38 deletions(-)
--
2.34.1
From: Lad Prabhakar <[email protected]>
In preparation for adding more validation checks move the ref for
'serial.yaml' to the end and also move reset check in 'allOf' block.
Signed-off-by: Lad Prabhakar <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
---
v3->v4
- no change
v2->v3
- no change
---
.../bindings/serial/renesas,scif.yaml | 30 +++++++++----------
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
index 4610a5bd580c..af72c3420453 100644
--- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml
+++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
@@ -9,9 +9,6 @@ title: Renesas Serial Communication Interface with FIFO (SCIF)
maintainers:
- Geert Uytterhoeven <[email protected]>
-allOf:
- - $ref: serial.yaml#
-
properties:
compatible:
oneOf:
@@ -160,18 +157,21 @@ required:
- clock-names
- power-domains
-if:
- properties:
- compatible:
- contains:
- enum:
- - renesas,rcar-gen2-scif
- - renesas,rcar-gen3-scif
- - renesas,rcar-gen4-scif
- - renesas,scif-r9a07g044
-then:
- required:
- - resets
+allOf:
+ - $ref: serial.yaml#
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - renesas,rcar-gen2-scif
+ - renesas,rcar-gen3-scif
+ - renesas,rcar-gen4-scif
+ - renesas,scif-r9a07g044
+ then:
+ required:
+ - resets
unevaluatedProperties: false
--
2.34.1
From: Lad Prabhakar <[email protected]>
As all the SoCs having multiple interrupts have 'interrupt-names' property
in their respective DTSIs, make 'interrupt-names' property as required
so that we can validate them using dtbs_check.
Signed-off-by: Lad Prabhakar <[email protected]>
---
v3->v4
- New patch
Note, we need patch [0] to be applied or else we might see
dtbs_check warning.
[0] https://patchwork.kernel.org/project/linux-renesas-soc/patch/[email protected]/
---
Documentation/devicetree/bindings/serial/renesas,scif.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
index eb2aa5e75e02..c13b31c28049 100644
--- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml
+++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
@@ -179,6 +179,9 @@ allOf:
maxItems: 1
interrupt-names: false
+ else:
+ required:
+ - interrupt-names
- if:
properties:
--
2.34.1
From: Lad Prabhakar <[email protected]>
Document support for the Serial Communication Interface with FIFO (SCIF)
available in the Renesas RZ/V2H(P) (R9A09G057) SoC. The SCIF interface in
the Renesas RZ/V2H(P) is similar to that available in the RZ/G2L
(R9A07G044) SoC, with the following differences:
- RZ/V2H(P) SoC has three additional interrupts: one for Tx end/Rx ready
and two for Rx and Tx buffer full, all of which are edge-triggered.
- RZ/V2H(P) supports asynchronous mode, whereas RZ/G2L supports both
synchronous and asynchronous modes.
- There are differences in the configuration of certain registers such
as SCSMR, SCFCR, and SCSPTR between the two SoCs.
To handle these differences in the driver, a new SoC-specific compatible
string is added, ensuring proper handling of the unique features and
register configurations of the RZ/V2H(P) SoC.
Signed-off-by: Lad Prabhakar <[email protected]>
---
v3->v4
- Appended the interrupts instead of adding SoC specific
- Added restriction for clocks and reset
v2->v3
- Added SoC specific compat string
---
.../bindings/serial/renesas,scif.yaml | 30 +++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
index c13b31c28049..93fc7b75e2e5 100644
--- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml
+++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
@@ -79,6 +79,8 @@ properties:
- renesas,scif-r9a08g045 # RZ/G3S
- const: renesas,scif-r9a07g044 # RZ/G2{L,LC} fallback
+ - const: renesas,scif-r9a09g057 # RZ/V2H(P)
+
reg:
maxItems: 1
@@ -93,6 +95,9 @@ properties:
- description: Break interrupt
- description: Data Ready interrupt
- description: Transmit End interrupt
+ - description: Transmit End/Data Ready interrupt
+ - description: Receive buffer full interrupt (EDGE trigger)
+ - description: Transmit buffer empty interrupt (EDGE trigger)
minItems: 4
interrupt-names:
@@ -104,6 +109,9 @@ properties:
- const: bri
- const: dri
- const: tei
+ - const: tei-dri
+ - const: rxi-edge
+ - const: txi-edge
clocks:
minItems: 1
@@ -160,6 +168,7 @@ allOf:
- renesas,rcar-gen3-scif
- renesas,rcar-gen4-scif
- renesas,scif-r9a07g044
+ - renesas,scif-r9a09g057
then:
required:
- resets
@@ -209,9 +218,30 @@ allOf:
properties:
interrupts:
minItems: 6
+ maxItems: 6
interrupt-names:
minItems: 6
+ maxItems: 6
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: renesas,scif-r9a09g057
+ then:
+ properties:
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ maxItems: 1
+
+ interrupts:
+ minItems: 9
+
+ interrupt-names:
+ minItems: 9
unevaluatedProperties: false
--
2.34.1
From: Lad Prabhakar <[email protected]>
Add serial support for RZ/V2H(P) SoC with earlycon.
The SCIF interface in the Renesas RZ/V2H(P) is similar to that available
in the RZ/G2L (R9A07G044) SoC, with the following differences:
- RZ/V2H(P) SoC has three additional interrupts: one for Tx end/Rx ready
and two for Rx and Tx buffer full, all of which are edge-triggered.
- RZ/V2H(P) supports asynchronous mode, whereas RZ/G2L supports both
synchronous and asynchronous modes.
- There are differences in the configuration of certain registers such
as SCSMR, SCFCR, and SCSPTR between the two SoCs.
To handle these differences on RZ/V2H(P) SoC SCIx_RZV2H_SCIF_REGTYPE
is added.
Signed-off-by: Lad Prabhakar <[email protected]>
---
Hi Geert,
To keep the changes minimal I've added a new regtype instead of
port type.
Cheers, Prabhakar
v3 - > v4
- Added SCIx_RZV2H_SCIF_REGTYPE to handle the differences on the
RZ/V2H(P) SoC
v2 - > v3
- new patch
---
drivers/tty/serial/sh-sci.c | 55 +++++++++++++++++++++++++++++++++----
include/linux/serial_sci.h | 1 +
2 files changed, 51 insertions(+), 5 deletions(-)
diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index a85e7b9a2e49..297787dc5c1c 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -317,6 +317,37 @@ static const struct sci_port_params sci_port_params[SCIx_NR_REGTYPES] = {
.error_clear = SCIF_ERROR_CLEAR,
},
+ /*
+ * The "SCIF" that is in RZ/V2H(P) SoC is similar to one found on RZ/G2L SoC
+ * with below differences,
+ * - Break out of interrupts are different: ERI, BRI, RXI, TXI, TEI, DRI,
+ * TEI-DRI, RXI-EDGE and TXI-EDGE.
+ * - SCSMR register does not have CM bit (BIT(7)) ie it does not support synchronous mode.
+ * - SCFCR register does not have SCFCR_MCE bit.
+ * - SCSPTR register has only bits SCSPTR_SPB2DT and SCSPTR_SPB2IO.
+ */
+ [SCIx_RZV2H_SCIF_REGTYPE] = {
+ .regs = {
+ [SCSMR] = { 0x00, 16 },
+ [SCBRR] = { 0x02, 8 },
+ [SCSCR] = { 0x04, 16 },
+ [SCxTDR] = { 0x06, 8 },
+ [SCxSR] = { 0x08, 16 },
+ [SCxRDR] = { 0x0a, 8 },
+ [SCFCR] = { 0x0c, 16 },
+ [SCFDR] = { 0x0e, 16 },
+ [SCSPTR] = { 0x10, 16 },
+ [SCLSR] = { 0x12, 16 },
+ [SEMR] = { 0x14, 8 },
+ },
+ .fifosize = 16,
+ .overrun_reg = SCLSR,
+ .overrun_mask = SCLSR_ORER,
+ .sampling_rate_mask = SCI_SR(32),
+ .error_mask = SCIF_DEFAULT_ERROR_MASK,
+ .error_clear = SCIF_ERROR_CLEAR,
+ },
+
/*
* Common SH-3 SCIF definitions.
*/
@@ -758,7 +789,7 @@ static void sci_init_pins(struct uart_port *port, unsigned int cflag)
}
serial_port_out(port, SCPDR, data);
serial_port_out(port, SCPCR, ctrl);
- } else if (sci_getreg(port, SCSPTR)->size) {
+ } else if (sci_getreg(port, SCSPTR)->size && s->cfg->regtype != SCIx_RZV2H_SCIF_REGTYPE) {
u16 status = serial_port_in(port, SCSPTR);
/* RTS# is always output; and active low, unless autorts */
@@ -2120,8 +2151,9 @@ static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
if (!(mctrl & TIOCM_RTS)) {
/* Disable Auto RTS */
- serial_port_out(port, SCFCR,
- serial_port_in(port, SCFCR) & ~SCFCR_MCE);
+ if (s->cfg->regtype != SCIx_RZV2H_SCIF_REGTYPE)
+ serial_port_out(port, SCFCR,
+ serial_port_in(port, SCFCR) & ~SCFCR_MCE);
/* Clear RTS */
sci_set_rts(port, 0);
@@ -2133,8 +2165,9 @@ static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
}
/* Enable Auto RTS */
- serial_port_out(port, SCFCR,
- serial_port_in(port, SCFCR) | SCFCR_MCE);
+ if (s->cfg->regtype != SCIx_RZV2H_SCIF_REGTYPE)
+ serial_port_out(port, SCFCR,
+ serial_port_in(port, SCFCR) | SCFCR_MCE);
} else {
/* Set RTS */
sci_set_rts(port, 1);
@@ -3224,6 +3257,10 @@ static const struct of_device_id of_sci_match[] __maybe_unused = {
.compatible = "renesas,scif-r9a07g044",
.data = SCI_OF_DATA(PORT_SCIF, SCIx_RZ_SCIFA_REGTYPE),
},
+ {
+ .compatible = "renesas,scif-r9a09g057",
+ .data = SCI_OF_DATA(PORT_SCIF, SCIx_RZV2H_SCIF_REGTYPE),
+ },
/* Family-specific types */
{
.compatible = "renesas,rcar-gen1-scif",
@@ -3534,6 +3571,13 @@ static int __init rzscifa_early_console_setup(struct earlycon_device *device,
return early_console_setup(device, PORT_SCIF);
}
+static int __init rzv2hscif_early_console_setup(struct earlycon_device *device,
+ const char *opt)
+{
+ port_cfg.regtype = SCIx_RZV2H_SCIF_REGTYPE;
+ return early_console_setup(device, PORT_SCIF);
+}
+
static int __init scifa_early_console_setup(struct earlycon_device *device,
const char *opt)
{
@@ -3554,6 +3598,7 @@ OF_EARLYCON_DECLARE(sci, "renesas,sci", sci_early_console_setup);
OF_EARLYCON_DECLARE(scif, "renesas,scif", scif_early_console_setup);
OF_EARLYCON_DECLARE(scif, "renesas,scif-r7s9210", rzscifa_early_console_setup);
OF_EARLYCON_DECLARE(scif, "renesas,scif-r9a07g044", rzscifa_early_console_setup);
+OF_EARLYCON_DECLARE(scif, "renesas,scif-r9a09g057", rzv2hscif_early_console_setup);
OF_EARLYCON_DECLARE(scifa, "renesas,scifa", scifa_early_console_setup);
OF_EARLYCON_DECLARE(scifb, "renesas,scifb", scifb_early_console_setup);
OF_EARLYCON_DECLARE(hscif, "renesas,hscif", hscif_early_console_setup);
diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
index 1c89611e0e06..0f2f50b8d28e 100644
--- a/include/linux/serial_sci.h
+++ b/include/linux/serial_sci.h
@@ -37,6 +37,7 @@ enum {
SCIx_SH7705_SCIF_REGTYPE,
SCIx_HSCIF_REGTYPE,
SCIx_RZ_SCIFA_REGTYPE,
+ SCIx_RZV2H_SCIF_REGTYPE,
SCIx_NR_REGTYPES,
};
--
2.34.1
From: Lad Prabhakar <[email protected]>
This commit adds support to validate the 'interrupts' and 'interrupt-names'
properties for every supported SoC. This ensures proper handling and
configuration of interrupt-related properties across supported platforms.
Signed-off-by: Lad Prabhakar <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
---
v3->v4
- Reverted back to v2 version of the patch.
- Used suggestion from Krzysztof for interrupts
- Restored RB tag from Geert
v2->v3
- Listed interrupts and interrupt-names for every SoC in if check
---
.../bindings/serial/renesas,scif.yaml | 73 ++++++++++++++-----
1 file changed, 55 insertions(+), 18 deletions(-)
diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
index af72c3420453..eb2aa5e75e02 100644
--- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml
+++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
@@ -86,11 +86,6 @@ properties:
oneOf:
- items:
- description: A combined interrupt
- - items:
- - description: Error interrupt
- - description: Receive buffer full interrupt
- - description: Transmit buffer empty interrupt
- - description: Break interrupt
- items:
- description: Error interrupt
- description: Receive buffer full interrupt
@@ -98,21 +93,17 @@ properties:
- description: Break interrupt
- description: Data Ready interrupt
- description: Transmit End interrupt
+ minItems: 4
interrupt-names:
- oneOf:
- - items:
- - const: eri
- - const: rxi
- - const: txi
- - const: bri
- - items:
- - const: eri
- - const: rxi
- - const: txi
- - const: bri
- - const: dri
- - const: tei
+ minItems: 4
+ items:
+ - const: eri
+ - const: rxi
+ - const: txi
+ - const: bri
+ - const: dri
+ - const: tei
clocks:
minItems: 1
@@ -173,6 +164,52 @@ allOf:
required:
- resets
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - renesas,rcar-gen1-scif
+ - renesas,rcar-gen2-scif
+ - renesas,rcar-gen3-scif
+ - renesas,rcar-gen4-scif
+ then:
+ properties:
+ interrupts:
+ maxItems: 1
+
+ interrupt-names: false
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - renesas,scif-r7s72100
+ then:
+ properties:
+ interrupts:
+ minItems: 4
+ maxItems: 4
+
+ interrupt-names:
+ maxItems: 4
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - renesas,scif-r7s9210
+ - renesas,scif-r9a07g044
+ then:
+ properties:
+ interrupts:
+ minItems: 6
+
+ interrupt-names:
+ minItems: 6
+
unevaluatedProperties: false
examples:
--
2.34.1
On Fri, Mar 22, 2024 at 02:43:53PM +0000, Prabhakar wrote:
> From: Lad Prabhakar <[email protected]>
>
> As all the SoCs having multiple interrupts have 'interrupt-names' property
> in their respective DTSIs, make 'interrupt-names' property as required
> so that we can validate them using dtbs_check.
>
> Signed-off-by: Lad Prabhakar <[email protected]>
Provided drivers will still work with the old devicetrees that
didn't have names for everything:
Acked-by: Conor Dooley <[email protected]>
Cheers,
Conor.
> ---
> v3->v4
> - New patch
>
> Note, we need patch [0] to be applied or else we might see
> dtbs_check warning.
>
> [0] https://patchwork.kernel.org/project/linux-renesas-soc/patch/[email protected]/
> ---
> Documentation/devicetree/bindings/serial/renesas,scif.yaml | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> index eb2aa5e75e02..c13b31c28049 100644
> --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> @@ -179,6 +179,9 @@ allOf:
> maxItems: 1
>
> interrupt-names: false
> + else:
> + required:
> + - interrupt-names
>
> - if:
> properties:
> --
> 2.34.1
>
On Fri, Mar 22, 2024 at 02:43:54PM +0000, Prabhakar wrote:
> From: Lad Prabhakar <[email protected]>
>
> Document support for the Serial Communication Interface with FIFO (SCIF)
> available in the Renesas RZ/V2H(P) (R9A09G057) SoC. The SCIF interface in
> the Renesas RZ/V2H(P) is similar to that available in the RZ/G2L
> (R9A07G044) SoC, with the following differences:
>
> - RZ/V2H(P) SoC has three additional interrupts: one for Tx end/Rx ready
> and two for Rx and Tx buffer full, all of which are edge-triggered.
> - RZ/V2H(P) supports asynchronous mode, whereas RZ/G2L supports both
> synchronous and asynchronous modes.
> - There are differences in the configuration of certain registers such
> as SCSMR, SCFCR, and SCSPTR between the two SoCs.
>
> To handle these differences in the driver, a new SoC-specific compatible
> string is added, ensuring proper handling of the unique features and
> register configurations of the RZ/V2H(P) SoC.
>
> Signed-off-by: Lad Prabhakar <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
Thanks,
Conor.
> ---
> v3->v4
> - Appended the interrupts instead of adding SoC specific
> - Added restriction for clocks and reset
>
> v2->v3
> - Added SoC specific compat string
> ---
> .../bindings/serial/renesas,scif.yaml | 30 +++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> index c13b31c28049..93fc7b75e2e5 100644
> --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> @@ -79,6 +79,8 @@ properties:
> - renesas,scif-r9a08g045 # RZ/G3S
> - const: renesas,scif-r9a07g044 # RZ/G2{L,LC} fallback
>
> + - const: renesas,scif-r9a09g057 # RZ/V2H(P)
> +
> reg:
> maxItems: 1
>
> @@ -93,6 +95,9 @@ properties:
> - description: Break interrupt
> - description: Data Ready interrupt
> - description: Transmit End interrupt
> + - description: Transmit End/Data Ready interrupt
> + - description: Receive buffer full interrupt (EDGE trigger)
> + - description: Transmit buffer empty interrupt (EDGE trigger)
> minItems: 4
>
> interrupt-names:
> @@ -104,6 +109,9 @@ properties:
> - const: bri
> - const: dri
> - const: tei
> + - const: tei-dri
> + - const: rxi-edge
> + - const: txi-edge
>
> clocks:
> minItems: 1
> @@ -160,6 +168,7 @@ allOf:
> - renesas,rcar-gen3-scif
> - renesas,rcar-gen4-scif
> - renesas,scif-r9a07g044
> + - renesas,scif-r9a09g057
> then:
> required:
> - resets
> @@ -209,9 +218,30 @@ allOf:
> properties:
> interrupts:
> minItems: 6
> + maxItems: 6
>
> interrupt-names:
> minItems: 6
> + maxItems: 6
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: renesas,scif-r9a09g057
> + then:
> + properties:
> + clocks:
> + maxItems: 1
> +
> + clock-names:
> + maxItems: 1
> +
> + interrupts:
> + minItems: 9
> +
> + interrupt-names:
> + minItems: 9
>
> unevaluatedProperties: false
>
> --
> 2.34.1
>
On Fri, Mar 22, 2024 at 02:43:52PM +0000, Prabhakar wrote:
> From: Lad Prabhakar <[email protected]>
>
> This commit adds support to validate the 'interrupts' and 'interrupt-names'
> properties for every supported SoC. This ensures proper handling and
> configuration of interrupt-related properties across supported platforms.
>
> Signed-off-by: Lad Prabhakar <[email protected]>
> Reviewed-by: Geert Uytterhoeven <[email protected]>
> ---
> v3->v4
> - Reverted back to v2 version of the patch.
> - Used suggestion from Krzysztof for interrupts
It seems fine to me, but maybe Krzysztof wants to take another look.
Reviewed-by: Conor Dooley <[email protected]>
Cheers,
Conor.
Hi Prabhakar,
> -----Original Message-----
> From: Prabhakar <[email protected]>
> Sent: Friday, March 22, 2024 2:44 PM
> Subject: [PATCH v4 2/5] dt-bindings: serial: renesas,scif: Validate 'interrupts' and 'interrupt-
> names'
>
> From: Lad Prabhakar <[email protected]>
>
> This commit adds support to validate the 'interrupts' and 'interrupt-names'
> properties for every supported SoC. This ensures proper handling and configuration of interrupt-
> related properties across supported platforms.
>
> Signed-off-by: Lad Prabhakar <[email protected]>
> Reviewed-by: Geert Uytterhoeven <[email protected]>
> ---
> v3->v4
> - Reverted back to v2 version of the patch.
> - Used suggestion from Krzysztof for interrupts
> - Restored RB tag from Geert
>
> v2->v3
> - Listed interrupts and interrupt-names for every SoC in if check
> ---
> .../bindings/serial/renesas,scif.yaml | 73 ++++++++++++++-----
> 1 file changed, 55 insertions(+), 18 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> index af72c3420453..eb2aa5e75e02 100644
> --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> @@ -86,11 +86,6 @@ properties:
> oneOf:
> - items:
> - description: A combined interrupt
> - - items:
> - - description: Error interrupt
> - - description: Receive buffer full interrupt
> - - description: Transmit buffer empty interrupt
> - - description: Break interrupt
> - items:
> - description: Error interrupt
> - description: Receive buffer full interrupt @@ -98,21 +93,17 @@ properties:
> - description: Break interrupt
> - description: Data Ready interrupt
> - description: Transmit End interrupt
> + minItems: 4
I think here minItems is 1 as it is either 1 or 4 or 6
Cheers,
Biju
>
> interrupt-names:
> - oneOf:
> - - items:
> - - const: eri
> - - const: rxi
> - - const: txi
> - - const: bri
> - - items:
> - - const: eri
> - - const: rxi
> - - const: txi
> - - const: bri
> - - const: dri
> - - const: tei
> + minItems: 4
> + items:
> + - const: eri
> + - const: rxi
> + - const: txi
> + - const: bri
> + - const: dri
> + - const: tei
>
> clocks:
> minItems: 1
> @@ -173,6 +164,52 @@ allOf:
> required:
> - resets
>
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - renesas,rcar-gen1-scif
> + - renesas,rcar-gen2-scif
> + - renesas,rcar-gen3-scif
> + - renesas,rcar-gen4-scif
> + then:
> + properties:
> + interrupts:
> + maxItems: 1
> +
> + interrupt-names: false
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - renesas,scif-r7s72100
> + then:
> + properties:
> + interrupts:
> + minItems: 4
> + maxItems: 4
> +
> + interrupt-names:
> + maxItems: 4
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - renesas,scif-r7s9210
> + - renesas,scif-r9a07g044
> + then:
> + properties:
> + interrupts:
> + minItems: 6
> +
> + interrupt-names:
> + minItems: 6
> +
> unevaluatedProperties: false
>
> examples:
> --
> 2.34.1
>
Hi Biju,
On Mon, Mar 25, 2024 at 5:21 PM Biju Das <[email protected]> wrote:
> > -----Original Message-----
> > From: Prabhakar <[email protected]>
> > Sent: Friday, March 22, 2024 2:44 PM
> > Subject: [PATCH v4 2/5] dt-bindings: serial: renesas,scif: Validate 'interrupts' and 'interrupt-
> > names'
> >
> > From: Lad Prabhakar <[email protected]>
> >
> > This commit adds support to validate the 'interrupts' and 'interrupt-names'
> > properties for every supported SoC. This ensures proper handling and configuration of interrupt-
> > related properties across supported platforms.
> >
> > Signed-off-by: Lad Prabhakar <[email protected]>
> > Reviewed-by: Geert Uytterhoeven <[email protected]>
> > ---
> > v3->v4
> > - Reverted back to v2 version of the patch.
> > - Used suggestion from Krzysztof for interrupts
> > - Restored RB tag from Geert
> >
> > v2->v3
> > - Listed interrupts and interrupt-names for every SoC in if check
> > ---
> > .../bindings/serial/renesas,scif.yaml | 73 ++++++++++++++-----
> > 1 file changed, 55 insertions(+), 18 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> > b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> > index af72c3420453..eb2aa5e75e02 100644
> > --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> > +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> > @@ -86,11 +86,6 @@ properties:
> > oneOf:
> > - items:
> > - description: A combined interrupt
> > - - items:
> > - - description: Error interrupt
> > - - description: Receive buffer full interrupt
> > - - description: Transmit buffer empty interrupt
> > - - description: Break interrupt
> > - items:
> > - description: Error interrupt
> > - description: Receive buffer full interrupt @@ -98,21 +93,17 @@ properties:
> > - description: Break interrupt
> > - description: Data Ready interrupt
> > - description: Transmit End interrupt
> > + minItems: 4
>
> I think here minItems is 1 as it is either 1 or 4 or 6
The single interrupt is handled by the first case in the oneOf (which
can probably be simplified by dropping the "items"?).
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68korg
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Hi Geert,
> -----Original Message-----
> From: Geert Uytterhoeven <[email protected]>
> Sent: Tuesday, March 26, 2024 8:02 AM
> Subject: Re: [PATCH v4 2/5] dt-bindings: serial: renesas,scif: Validate 'interrupts' and
> 'interrupt-names'
>
> Hi Biju,
>
> On Mon, Mar 25, 2024 at 5:21 PM Biju Das <[email protected]> wrote:
> > > -----Original Message-----
> > > From: Prabhakar <[email protected]>
> > > Sent: Friday, March 22, 2024 2:44 PM
> > > Subject: [PATCH v4 2/5] dt-bindings: serial: renesas,scif: Validate
> > > 'interrupts' and 'interrupt- names'
> > >
> > > From: Lad Prabhakar <[email protected]>
> > >
> > > This commit adds support to validate the 'interrupts' and 'interrupt-names'
> > > properties for every supported SoC. This ensures proper handling and
> > > configuration of interrupt- related properties across supported platforms.
> > >
> > > Signed-off-by: Lad Prabhakar
> > > <[email protected]>
> > > Reviewed-by: Geert Uytterhoeven <[email protected]>
> > > ---
> > > v3->v4
> > > - Reverted back to v2 version of the patch.
> > > - Used suggestion from Krzysztof for interrupts
> > > - Restored RB tag from Geert
> > >
> > > v2->v3
> > > - Listed interrupts and interrupt-names for every SoC in if check
> > > ---
> > > .../bindings/serial/renesas,scif.yaml | 73 ++++++++++++++-----
> > > 1 file changed, 55 insertions(+), 18 deletions(-)
> > >
> > > diff --git
> > > a/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> > > b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> > > index af72c3420453..eb2aa5e75e02 100644
> > > --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> > > +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> > > @@ -86,11 +86,6 @@ properties:
> > > oneOf:
> > > - items:
> > > - description: A combined interrupt
> > > - - items:
> > > - - description: Error interrupt
> > > - - description: Receive buffer full interrupt
> > > - - description: Transmit buffer empty interrupt
> > > - - description: Break interrupt
> > > - items:
> > > - description: Error interrupt
> > > - description: Receive buffer full interrupt @@ -98,21 +93,17 @@ properties:
> > > - description: Break interrupt
> > > - description: Data Ready interrupt
> > > - description: Transmit End interrupt
> > > + minItems: 4
> >
> > I think here minItems is 1 as it is either 1 or 4 or 6
>
> The single interrupt is handled by the first case in the oneOf (which can probably be simplified by
> dropping the "items"?).
Good point, it is not items, so it can be dropped.
Cheers,
Biju
Hi Biju,
On Mon, Mar 25, 2024 at 4:21 PM Biju Das <[email protected]> wrote:
>
> Hi Prabhakar,
>
> > -----Original Message-----
> > From: Prabhakar <[email protected]>
> > Sent: Friday, March 22, 2024 2:44 PM
> > Subject: [PATCH v4 2/5] dt-bindings: serial: renesas,scif: Validate 'interrupts' and 'interrupt-
> > names'
> >
> > From: Lad Prabhakar <[email protected]>
> >
> > This commit adds support to validate the 'interrupts' and 'interrupt-names'
> > properties for every supported SoC. This ensures proper handling and configuration of interrupt-
> > related properties across supported platforms.
> >
> > Signed-off-by: Lad Prabhakar <[email protected]>
> > Reviewed-by: Geert Uytterhoeven <[email protected]>
> > ---
> > v3->v4
> > - Reverted back to v2 version of the patch.
> > - Used suggestion from Krzysztof for interrupts
> > - Restored RB tag from Geert
> >
> > v2->v3
> > - Listed interrupts and interrupt-names for every SoC in if check
> > ---
> > .../bindings/serial/renesas,scif.yaml | 73 ++++++++++++++-----
> > 1 file changed, 55 insertions(+), 18 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> > b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> > index af72c3420453..eb2aa5e75e02 100644
> > --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> > +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> > @@ -86,11 +86,6 @@ properties:
> > oneOf:
> > - items:
> > - description: A combined interrupt
> > - - items:
> > - - description: Error interrupt
> > - - description: Receive buffer full interrupt
> > - - description: Transmit buffer empty interrupt
> > - - description: Break interrupt
> > - items:
> > - description: Error interrupt
> > - description: Receive buffer full interrupt @@ -98,21 +93,17 @@ properties:
> > - description: Break interrupt
> > - description: Data Ready interrupt
> > - description: Transmit End interrupt
> > + minItems: 4
>
> I think here minItems is 1 as it is either 1 or 4 or 6
>
minItems 1 case is already handled above.
Cheers,
Prabhakar
Hi Geert,
On Tue, Mar 26, 2024 at 8:02 AM Geert Uytterhoeven <[email protected]> wrote:
>
> Hi Biju,
>
> On Mon, Mar 25, 2024 at 5:21 PM Biju Das <[email protected]> wrote:
> > > -----Original Message-----
> > > From: Prabhakar <[email protected]>
> > > Sent: Friday, March 22, 2024 2:44 PM
> > > Subject: [PATCH v4 2/5] dt-bindings: serial: renesas,scif: Validate 'interrupts' and 'interrupt-
> > > names'
> > >
> > > From: Lad Prabhakar <[email protected]>
> > >
> > > This commit adds support to validate the 'interrupts' and 'interrupt-names'
> > > properties for every supported SoC. This ensures proper handling and configuration of interrupt-
> > > related properties across supported platforms.
> > >
> > > Signed-off-by: Lad Prabhakar <[email protected]>
> > > Reviewed-by: Geert Uytterhoeven <[email protected]>
> > > ---
> > > v3->v4
> > > - Reverted back to v2 version of the patch.
> > > - Used suggestion from Krzysztof for interrupts
> > > - Restored RB tag from Geert
> > >
> > > v2->v3
> > > - Listed interrupts and interrupt-names for every SoC in if check
> > > ---
> > > .../bindings/serial/renesas,scif.yaml | 73 ++++++++++++++-----
> > > 1 file changed, 55 insertions(+), 18 deletions(-)
> > >
> > > diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> > > b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> > > index af72c3420453..eb2aa5e75e02 100644
> > > --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> > > +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> > > @@ -86,11 +86,6 @@ properties:
> > > oneOf:
> > > - items:
> > > - description: A combined interrupt
> > > - - items:
> > > - - description: Error interrupt
> > > - - description: Receive buffer full interrupt
> > > - - description: Transmit buffer empty interrupt
> > > - - description: Break interrupt
> > > - items:
> > > - description: Error interrupt
> > > - description: Receive buffer full interrupt @@ -98,21 +93,17 @@ properties:
> > > - description: Break interrupt
> > > - description: Data Ready interrupt
> > > - description: Transmit End interrupt
> > > + minItems: 4
> >
> > I think here minItems is 1 as it is either 1 or 4 or 6
>
> The single interrupt is handled by the first case in the oneOf (which
> can probably be simplified by dropping the "items"?).
>
Agreed, I'll make this change as a separate patch or squash it here if
I have to re-spin the series.
Cheers,
Prabhakar
Hi Prabhakar,
> -----Original Message-----
> From: Lad, Prabhakar <[email protected]>
> Sent: Tuesday, March 26, 2024 8:29 AM
> Subject: Re: [PATCH v4 2/5] dt-bindings: serial: renesas,scif: Validate 'interrupts' and
> 'interrupt-names'
>
> Hi Biju,
>
> On Mon, Mar 25, 2024 at 4:21 PM Biju Das <[email protected]> wrote:
> >
> > Hi Prabhakar,
> >
> > > -----Original Message-----
> > > From: Prabhakar <[email protected]>
> > > Sent: Friday, March 22, 2024 2:44 PM
> > > Subject: [PATCH v4 2/5] dt-bindings: serial: renesas,scif: Validate
> > > 'interrupts' and 'interrupt- names'
> > >
> > > From: Lad Prabhakar <[email protected]>
> > >
> > > This commit adds support to validate the 'interrupts' and 'interrupt-names'
> > > properties for every supported SoC. This ensures proper handling and
> > > configuration of interrupt- related properties across supported platforms.
> > >
> > > Signed-off-by: Lad Prabhakar
> > > <[email protected]>
> > > Reviewed-by: Geert Uytterhoeven <[email protected]>
> > > ---
> > > v3->v4
> > > - Reverted back to v2 version of the patch.
> > > - Used suggestion from Krzysztof for interrupts
> > > - Restored RB tag from Geert
> > >
> > > v2->v3
> > > - Listed interrupts and interrupt-names for every SoC in if check
> > > ---
> > > .../bindings/serial/renesas,scif.yaml | 73 ++++++++++++++-----
> > > 1 file changed, 55 insertions(+), 18 deletions(-)
> > >
> > > diff --git
> > > a/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> > > b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> > > index af72c3420453..eb2aa5e75e02 100644
> > > --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> > > +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> > > @@ -86,11 +86,6 @@ properties:
> > > oneOf:
> > > - items:
> > > - description: A combined interrupt
> > > - - items:
> > > - - description: Error interrupt
> > > - - description: Receive buffer full interrupt
> > > - - description: Transmit buffer empty interrupt
> > > - - description: Break interrupt
> > > - items:
> > > - description: Error interrupt
> > > - description: Receive buffer full interrupt @@ -98,21 +93,17 @@ properties:
> > > - description: Break interrupt
> > > - description: Data Ready interrupt
> > > - description: Transmit End interrupt
> > > + minItems: 4
> >
> > I think here minItems is 1 as it is either 1 or 4 or 6
> >
> minItems 1 case is already handled above.
IIC, As per the above oneOf list, items{1, 4, 6} for minItems is 1.
Cheers,
Biju
On Fri, Mar 22, 2024 at 3:45 PM Prabhakar <[email protected]> wrote:
> From: Lad Prabhakar <[email protected]>
>
> As all the SoCs having multiple interrupts have 'interrupt-names' property
> in their respective DTSIs, make 'interrupt-names' property as required
> so that we can validate them using dtbs_check.
>
> Signed-off-by: Lad Prabhakar <[email protected]>
> ---
> v3->v4
> - New patch
Reviewed-by: Geert Uytterhoeven <[email protected]>
> Note, we need patch [0] to be applied or else we might see
> dtbs_check warning.
>
> [0] https://patchwork.kernel.org/project/linux-renesas-soc/patch/[email protected]/
That is commit 7db74b65a93bac5a ("ARM: dts: renesas: r7s72100:
Add interrupt-names to SCIF nodes") in renesas-dts-for-v6.10
(next-20240327 and later).
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68korg
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
On Fri, Mar 22, 2024 at 3:45 PM Prabhakar <[email protected]> wrote:
> From: Lad Prabhakar <[email protected]>
>
> Add serial support for RZ/V2H(P) SoC with earlycon.
>
> The SCIF interface in the Renesas RZ/V2H(P) is similar to that available
> in the RZ/G2L (R9A07G044) SoC, with the following differences:
>
> - RZ/V2H(P) SoC has three additional interrupts: one for Tx end/Rx ready
> and two for Rx and Tx buffer full, all of which are edge-triggered.
> - RZ/V2H(P) supports asynchronous mode, whereas RZ/G2L supports both
> synchronous and asynchronous modes.
> - There are differences in the configuration of certain registers such
> as SCSMR, SCFCR, and SCSPTR between the two SoCs.
>
> To handle these differences on RZ/V2H(P) SoC SCIx_RZV2H_SCIF_REGTYPE
> is added.
>
> Signed-off-by: Lad Prabhakar <[email protected]>
> ---
> Hi Geert,
>
> To keep the changes minimal I've added a new regtype instead of
> port type.
>
> Cheers, Prabhakar
>
> v3 - > v4
> - Added SCIx_RZV2H_SCIF_REGTYPE to handle the differences on the
> RZ/V2H(P) SoC
Reviewed-by: Geert Uytterhoeven <[email protected]>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68korg
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
On Fri, Mar 22, 2024 at 3:45 PM Prabhakar <[email protected]> wrote:
> From: Lad Prabhakar <[email protected]>
>
> Document support for the Serial Communication Interface with FIFO (SCIF)
> available in the Renesas RZ/V2H(P) (R9A09G057) SoC. The SCIF interface in
> the Renesas RZ/V2H(P) is similar to that available in the RZ/G2L
> (R9A07G044) SoC, with the following differences:
>
> - RZ/V2H(P) SoC has three additional interrupts: one for Tx end/Rx ready
> and two for Rx and Tx buffer full, all of which are edge-triggered.
> - RZ/V2H(P) supports asynchronous mode, whereas RZ/G2L supports both
> synchronous and asynchronous modes.
> - There are differences in the configuration of certain registers such
> as SCSMR, SCFCR, and SCSPTR between the two SoCs.
>
> To handle these differences in the driver, a new SoC-specific compatible
> string is added, ensuring proper handling of the unique features and
> register configurations of the RZ/V2H(P) SoC.
>
> Signed-off-by: Lad Prabhakar <[email protected]>
> ---
> v3->v4
> - Appended the interrupts instead of adding SoC specific
> - Added restriction for clocks and reset
Reviewed-by: Geert Uytterhoeven <[email protected]>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68korg
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Hi Greg,
On Fri, Mar 22, 2024 at 2:45 PM Prabhakar <[email protected]> wrote:
>
> From: Lad Prabhakar <[email protected]>
>
> Hi All,
>
> This patch series updates DT binding doc and scif driver to add support
> for the Renesas RZ/V2H(P) SoC. RZ/V2H(P) SoC supports one channel SCIF
> interface.
>
> v3->v4
> - patch 2/4 reverted back to version 2
> - new patch 3/5 added
> - Added new reg type for RZ/V2H
>
> v2->v3
> - Included DT validation patches
> - Added a new compat string for RZ/V2H(P) SoC
> - Added driver changes for RZ/V2H(P) SoC
> - Listed interrupts and interrupt-names for every SoC in if check
>
> Cheers,
> Prabhakar
>
> Lad Prabhakar (5):
> dt-bindings: serial: renesas,scif: Move ref for serial.yaml at the end
> dt-bindings: serial: renesas,scif: Validate 'interrupts' and
> 'interrupt-names'
> dt-bindings: serial: renesas,scif: Make 'interrupt-names' property as
> required
> dt-bindings: serial: Add documentation for Renesas RZ/V2H(P)
> (R9A09G057) SCIF support
> serial: sh-sci: Add support for RZ/V2H(P) SoC
>
Gentle ping.
All the patches have been Acked/Reviewed.
Cheers,
Prabhakar
> .../bindings/serial/renesas,scif.yaml | 136 +++++++++++++-----
> drivers/tty/serial/sh-sci.c | 55 ++++++-
> include/linux/serial_sci.h | 1 +
> 3 files changed, 154 insertions(+), 38 deletions(-)
>
> --
> 2.34.1
>
On Wed, May 29, 2024 at 07:15:23AM +0100, Lad, Prabhakar wrote:
> Hi Greg,
>
> On Fri, Mar 22, 2024 at 2:45 PM Prabhakar <[email protected]> wrote:
> >
> > From: Lad Prabhakar <[email protected]>
> >
> > Hi All,
> >
> > This patch series updates DT binding doc and scif driver to add support
> > for the Renesas RZ/V2H(P) SoC. RZ/V2H(P) SoC supports one channel SCIF
> > interface.
> >
> > v3->v4
> > - patch 2/4 reverted back to version 2
> > - new patch 3/5 added
> > - Added new reg type for RZ/V2H
> >
> > v2->v3
> > - Included DT validation patches
> > - Added a new compat string for RZ/V2H(P) SoC
> > - Added driver changes for RZ/V2H(P) SoC
> > - Listed interrupts and interrupt-names for every SoC in if check
> >
> > Cheers,
> > Prabhakar
> >
> > Lad Prabhakar (5):
> > dt-bindings: serial: renesas,scif: Move ref for serial.yaml at the end
> > dt-bindings: serial: renesas,scif: Validate 'interrupts' and
> > 'interrupt-names'
> > dt-bindings: serial: renesas,scif: Make 'interrupt-names' property as
> > required
> > dt-bindings: serial: Add documentation for Renesas RZ/V2H(P)
> > (R9A09G057) SCIF support
> > serial: sh-sci: Add support for RZ/V2H(P) SoC
> >
> Gentle ping.
It is only 3 days since the merge window ended, please be patient for
maintainers to catch up with their pending review queue. Especially for
non-bugfixes like these that will be included in the 6.11-rc1 release,
there is not any rush here for anyone just yet.
For example, my todo queue currently has 1458 emails to process in it,
this thread is somewhere in the middle.
In the meantime, please help review other pending patches for the
subsystem to help enable your patches to move toward the top of the
queue.
thanks,
greg k-h
On Wed, May 29, 2024 at 09:42:50AM +0200, Greg Kroah-Hartman wrote:
> On Wed, May 29, 2024 at 07:15:23AM +0100, Lad, Prabhakar wrote:
> > Hi Greg,
> >
> > On Fri, Mar 22, 2024 at 2:45 PM Prabhakar <[email protected]> wrote:
> > >
> > > From: Lad Prabhakar <[email protected]>
> > >
> > > Hi All,
> > >
> > > This patch series updates DT binding doc and scif driver to add support
> > > for the Renesas RZ/V2H(P) SoC. RZ/V2H(P) SoC supports one channel SCIF
> > > interface.
> > >
> > > v3->v4
> > > - patch 2/4 reverted back to version 2
> > > - new patch 3/5 added
> > > - Added new reg type for RZ/V2H
> > >
> > > v2->v3
> > > - Included DT validation patches
> > > - Added a new compat string for RZ/V2H(P) SoC
> > > - Added driver changes for RZ/V2H(P) SoC
> > > - Listed interrupts and interrupt-names for every SoC in if check
> > >
> > > Cheers,
> > > Prabhakar
> > >
> > > Lad Prabhakar (5):
> > > dt-bindings: serial: renesas,scif: Move ref for serial.yaml at the end
> > > dt-bindings: serial: renesas,scif: Validate 'interrupts' and
> > > 'interrupt-names'
> > > dt-bindings: serial: renesas,scif: Make 'interrupt-names' property as
> > > required
> > > dt-bindings: serial: Add documentation for Renesas RZ/V2H(P)
> > > (R9A09G057) SCIF support
> > > serial: sh-sci: Add support for RZ/V2H(P) SoC
> > >
> > Gentle ping.
>
> It is only 3 days since the merge window ended, please be patient for
> maintainers to catch up with their pending review queue. Especially for
> non-bugfixes like these that will be included in the 6.11-rc1 release,
> there is not any rush here for anyone just yet.
>
> For example, my todo queue currently has 1458 emails to process in it,
> this thread is somewhere in the middle.
>
> In the meantime, please help review other pending patches for the
> subsystem to help enable your patches to move toward the top of the
> queue.
And this patch series does not even apply, so how could it be accepted?
Please fix and resend with the proper reviews added.
greg k-h
Hi Greg,
On Tue, Jun 4, 2024 at 1:06 PM Greg Kroah-Hartman
<[email protected]> wrote:
>
> On Wed, May 29, 2024 at 09:42:50AM +0200, Greg Kroah-Hartman wrote:
> > On Wed, May 29, 2024 at 07:15:23AM +0100, Lad, Prabhakar wrote:
> > > Hi Greg,
> > >
> > > On Fri, Mar 22, 2024 at 2:45 PM Prabhakar <[email protected]> wrote:
> > > >
> > > > From: Lad Prabhakar <[email protected]>
> > > >
> > > > Hi All,
> > > >
> > > > This patch series updates DT binding doc and scif driver to add support
> > > > for the Renesas RZ/V2H(P) SoC. RZ/V2H(P) SoC supports one channel SCIF
> > > > interface.
> > > >
> > > > v3->v4
> > > > - patch 2/4 reverted back to version 2
> > > > - new patch 3/5 added
> > > > - Added new reg type for RZ/V2H
> > > >
> > > > v2->v3
> > > > - Included DT validation patches
> > > > - Added a new compat string for RZ/V2H(P) SoC
> > > > - Added driver changes for RZ/V2H(P) SoC
> > > > - Listed interrupts and interrupt-names for every SoC in if check
> > > >
> > > > Cheers,
> > > > Prabhakar
> > > >
> > > > Lad Prabhakar (5):
> > > > dt-bindings: serial: renesas,scif: Move ref for serial.yaml at the end
> > > > dt-bindings: serial: renesas,scif: Validate 'interrupts' and
> > > > 'interrupt-names'
> > > > dt-bindings: serial: renesas,scif: Make 'interrupt-names' property as
> > > > required
> > > > dt-bindings: serial: Add documentation for Renesas RZ/V2H(P)
> > > > (R9A09G057) SCIF support
> > > > serial: sh-sci: Add support for RZ/V2H(P) SoC
> > > >
> > > Gentle ping.
> >
> > It is only 3 days since the merge window ended, please be patient for
> > maintainers to catch up with their pending review queue. Especially for
> > non-bugfixes like these that will be included in the 6.11-rc1 release,
> > there is not any rush here for anyone just yet.
> >
> > For example, my todo queue currently has 1458 emails to process in it,
> > this thread is somewhere in the middle.
> >
> > In the meantime, please help review other pending patches for the
> > subsystem to help enable your patches to move toward the top of the
> > queue.
>
> And this patch series does not even apply, so how could it be accepted?
>
Oops I'll rebase the changes now.
> Please fix and resend with the proper reviews added.
>
Sure will do.
Cheers,
Prabhakar