From: Laurentiu Mihalcea <[email protected]>
Add devicetree node for imx8ulp's DSP core. Also,
update the schema for the DSP node to accomodate
the clocks used by it and add a new schema for its
syscon type node dependency.
Laurentiu Mihalcea (3):
dt-bindings: dsp: support imx8ulp dsp clocks
dt-bindings: mfd: add schema for 8ulp AVD-SIM
arm64: dts: imx8ulp: add DSP node
.../devicetree/bindings/dsp/fsl,dsp.yaml | 51 ++++++++++++++-----
.../bindings/mfd/fsl,imx8ulp-avd-sim.yaml | 42 +++++++++++++++
arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 39 ++++++++++++++
arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 22 ++++++++
4 files changed, 142 insertions(+), 12 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mfd/fsl,imx8ulp-avd-sim.yaml
--
2.34.1
From: Laurentiu Mihalcea <[email protected]>
i.MX8ULP DSP node needs a MU clock, but doesn't need
a debug clock. Change "clocks" and "clock-names" properties
to allow for this case.
Signed-off-by: Laurentiu Mihalcea <[email protected]>
---
.../devicetree/bindings/dsp/fsl,dsp.yaml | 51 ++++++++++++++-----
1 file changed, 39 insertions(+), 12 deletions(-)
diff --git a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
index 9af40da5688e..4a39d57b1cc6 100644
--- a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
+++ b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
@@ -30,22 +30,12 @@ properties:
maxItems: 1
clocks:
- items:
- - description: ipg clock
- - description: ocram clock
- - description: core clock
- - description: debug interface clock
- - description: message unit clock
minItems: 3
+ maxItems: 5
clock-names:
- items:
- - const: ipg
- - const: ocram
- - const: core
- - const: debug
- - const: mu
minItems: 3
+ maxItems: 5
power-domains:
description:
@@ -93,6 +83,43 @@ required:
- memory-region
allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: fsl,imx8ulp-hifi4
+ then:
+ properties:
+ clocks:
+ items:
+ - description: ipg clock
+ - description: ocram clock
+ - description: core clock
+ - description: message unit clock
+ clock-names:
+ items:
+ - const: ipg
+ - const: ocram
+ - const: core
+ - const: mu
+ else:
+ properties:
+ clocks:
+ items:
+ - description: ipg clock
+ - description: ocram clock
+ - description: core clock
+ - description: debug interface clock
+ - description: message unit clock
+ minItems: 3
+ clock-names:
+ items:
+ - const: ipg
+ - const: ocram
+ - const: core
+ - const: debug
+ - const: mu
+ minItems: 3
- if:
properties:
compatible:
--
2.34.1
From: Laurentiu Mihalcea <[email protected]>
Add schema for i.MX8ULP's AVD-SIM module.
Signed-off-by: Liu Ying <[email protected]>
Signed-off-by: Laurentiu Mihalcea <[email protected]>
---
.../bindings/mfd/fsl,imx8ulp-avd-sim.yaml | 42 +++++++++++++++++++
1 file changed, 42 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mfd/fsl,imx8ulp-avd-sim.yaml
diff --git a/Documentation/devicetree/bindings/mfd/fsl,imx8ulp-avd-sim.yaml b/Documentation/devicetree/bindings/mfd/fsl,imx8ulp-avd-sim.yaml
new file mode 100644
index 000000000000..4020c6e37f80
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/fsl,imx8ulp-avd-sim.yaml
@@ -0,0 +1,42 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/fsl,imx8ulp-avd-sim.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX8ULP Audio-Video Domain System Integration Module
+
+maintainers:
+ - Liu Ying <[email protected]>
+
+description: |
+ The AVD-SIM module provides configuration options for components of AVD.
+
+properties:
+ compatible:
+ items:
+ - const: fsl,imx8ulp-avd-sim
+ - const: syscon
+ - const: simple-mfd
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/imx8ulp-clock.h>
+ avd_sim: syscon@2da50000 {
+ compatible = "fsl,imx8ulp-avd-sim", "syscon", "simple-mfd";
+ reg = <0x2da50000 0x38>;
+ clocks = <&pcc5 IMX8ULP_CLK_AVD_SIM>;
+ };
--
2.34.1
From: Laurentiu Mihalcea <[email protected]>
Add node for i.MX8ULP's DSP core and its dependencies.
Signed-off-by: Shengjiu Wang <[email protected]>
Signed-off-by: Laurentiu Mihalcea <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 39 +++++++++++++++++++
arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 22 +++++++++++
2 files changed, 61 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
index 24bb253b938d..5dadcbba370d 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
@@ -67,6 +67,32 @@ vdevbuffer: vdevbuffer@a8400000 {
reg = <0 0xa8400000 0 0x100000>;
no-map;
};
+
+ dsp_reserved: dsp_reserved@8e000000 {
+ reg = <0 0x8e000000 0 0x1000000>;
+ no-map;
+ };
+
+ dsp_reserved_heap: dsp_reserved_heap@8f000000 {
+ reg = <0 0x8f000000 0 0xef0000>;
+ no-map;
+ };
+
+ dsp_vdev0vring0: vdev0vring0@8fef0000 {
+ reg = <0 0x8fef0000 0 0x8000>;
+ no-map;
+ };
+
+ dsp_vdev0vring1: vdev0vring1@8fef8000 {
+ reg = <0 0x8fef8000 0 0x8000>;
+ no-map;
+ };
+
+ dsp_vdev0buffer: vdev0buffer@8ff00000 {
+ compatible = "shared-dma-pool";
+ reg = <0 0x8ff00000 0 0x100000>;
+ no-map;
+ };
};
clock_ext_rmii: clock-ext-rmii {
@@ -95,6 +121,15 @@ &cm33 {
status = "okay";
};
+&dsp {
+ assigned-clocks = <&cgc2 IMX8ULP_CLK_HIFI_SEL>, <&cgc2 IMX8ULP_CLK_HIFI_DIVCORE>;
+ assigned-clock-parents = <&cgc2 IMX8ULP_CLK_PLL4_PFD0>;
+ assigned-clock-rates = <0>, <475200000>;
+ memory-region = <&dsp_vdev0buffer>, <&dsp_vdev0vring0>,
+ <&dsp_vdev0vring1>, <&dsp_reserved>;
+ status = "okay";
+};
+
&flexspi2 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&pinctrl_flexspi2_ptd>;
@@ -176,6 +211,10 @@ &mu {
status = "okay";
};
+&mu3 {
+ status = "okay";
+};
+
&iomuxc1 {
pinctrl_enet: enetgrp {
fsl,pins = <
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
index c4a0082f30d3..99ed8c1ee57c 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
@@ -198,6 +198,22 @@ soc: soc@0 {
ranges = <0x0 0x0 0x0 0x40000000>,
<0x60000000 0x0 0x60000000 0x1000000>;
+ dsp: dsp@21170000 {
+ compatible = "fsl,imx8ulp-hifi4";
+ reg = <0x21170000 0x20000>;
+ clocks = <&cgc2 IMX8ULP_CLK_LPAV_BUS_DIV>,
+ <&cgc2 IMX8ULP_CLK_HIFI_DIVPLAT>,
+ <&cgc2 IMX8ULP_CLK_HIFI_DIVCORE>,
+ <&pcc5 IMX8ULP_CLK_MU3_B>;
+ clock-names = "ipg", "ocram", "core", "mu";
+ power-domains = <&scmi_devpd IMX8ULP_PD_HIFI4>;
+ firmware-name = "imx/dsp/hifi4.bin";
+ mbox-names = "tx", "rx", "rxdb";
+ mboxes = <&mu3 0 0>, <&mu3 1 0>, <&mu3 3 0>;
+ fsl,dsp-ctrl = <&avd_sim>;
+ status = "disabled";
+ };
+
s4muap: mailbox@27020000 {
compatible = "fsl,imx8ulp-mu-s4";
reg = <0x27020000 0x10000>;
@@ -520,6 +536,12 @@ per_bridge5: bus@2d800000 {
#size-cells = <1>;
ranges;
+ avd_sim: syscon@2da50000 {
+ compatible = "fsl,imx8ulp-avd-sim", "syscon", "simple-mfd";
+ reg = <0x2da50000 0x38>;
+ clocks = <&pcc5 IMX8ULP_CLK_AVD_SIM>;
+ };
+
cgc2: clock-controller@2da60000 {
compatible = "fsl,imx8ulp-cgc2";
reg = <0x2da60000 0x10000>;
--
2.34.1
On Thu, Apr 18, 2024 at 11:37:18PM +0300, Laurentiu Mihalcea wrote:
> From: Laurentiu Mihalcea <[email protected]>
>
> i.MX8ULP DSP node needs a MU clock, but doesn't need
> a debug clock. Change "clocks" and "clock-names" properties
> to allow for this case.
>
> Signed-off-by: Laurentiu Mihalcea <[email protected]>
> ---
> .../devicetree/bindings/dsp/fsl,dsp.yaml | 51 ++++++++++++++-----
> 1 file changed, 39 insertions(+), 12 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
> index 9af40da5688e..4a39d57b1cc6 100644
> --- a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
> +++ b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
> @@ -30,22 +30,12 @@ properties:
> maxItems: 1
>
> clocks:
> - items:
> - - description: ipg clock
> - - description: ocram clock
> - - description: core clock
> - - description: debug interface clock
> - - description: message unit clock
> minItems: 3
> + maxItems: 5
>
> clock-names:
> - items:
> - - const: ipg
> - - const: ocram
> - - const: core
> - - const: debug
> - - const: mu
> minItems: 3
> + maxItems: 5
>
> power-domains:
> description:
> @@ -93,6 +83,43 @@ required:
> - memory-region
>
> allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: fsl,imx8ulp-hifi4
> + then:
> + properties:
> + clocks:
> + items:
> + - description: ipg clock
> + - description: ocram clock
> + - description: core clock
> + - description: message unit clock
> + clock-names:
> + items:
> + - const: ipg
> + - const: ocram
> + - const: core
> + - const: mu
> + else:
> + properties:
> + clocks:
> + items:
> + - description: ipg clock
> + - description: ocram clock
> + - description: core clock
> + - description: debug interface clock
> + - description: message unit clock
> + minItems: 3
> + clock-names:
> + items:
> + - const: ipg
> + - const: ocram
> + - const: core
> + - const: debug
> + - const: mu
> + minItems: 3
According to your descript, look like only clk "debug" is difference.
How about
clocks:
items:
- description: ipg clock
- description: ocram clock
- description: core clock
- description: message unit clock
- description: debug interface clock
clock-names:
items:
- const: ipg
- const: ocram
- const: core
- const: mu
- const: debug
allOf:
if:
properties:
compatible:
contains:
const: fsl,imx8ulp-hifi4
then:
properties:
clocks:
minItems: 4
clock-names:
minItems: 4
else:
propertyies:
clocks:
minItems: 3
clock-names:
minItems: 3
> - if:
> properties:
> compatible:
> --
> 2.34.1
>
On Thu, Apr 18, 2024 at 11:37:19PM +0300, Laurentiu Mihalcea wrote:
> From: Laurentiu Mihalcea <[email protected]>
>
> Add schema for i.MX8ULP's AVD-SIM module.
>
> Signed-off-by: Liu Ying <[email protected]>
> Signed-off-by: Laurentiu Mihalcea <[email protected]>
> ---
> .../bindings/mfd/fsl,imx8ulp-avd-sim.yaml | 42 +++++++++++++++++++
> 1 file changed, 42 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mfd/fsl,imx8ulp-avd-sim.yaml
>
> diff --git a/Documentation/devicetree/bindings/mfd/fsl,imx8ulp-avd-sim.yaml b/Documentation/devicetree/bindings/mfd/fsl,imx8ulp-avd-sim.yaml
> new file mode 100644
> index 000000000000..4020c6e37f80
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/fsl,imx8ulp-avd-sim.yaml
> @@ -0,0 +1,42 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mfd/fsl,imx8ulp-avd-sim.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP i.MX8ULP Audio-Video Domain System Integration Module
> +
> +maintainers:
> + - Liu Ying <[email protected]>
> +
> +description: |
> + The AVD-SIM module provides configuration options for components of AVD.
Needn't "|"
> +
> +properties:
> + compatible:
> + items:
> + - const: fsl,imx8ulp-avd-sim
> + - const: syscon
> + - const: simple-mfd
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/imx8ulp-clock.h>
> + avd_sim: syscon@2da50000 {
Needn't label 'avd_sim'
> + compatible = "fsl,imx8ulp-avd-sim", "syscon", "simple-mfd";
> + reg = <0x2da50000 0x38>;
> + clocks = <&pcc5 IMX8ULP_CLK_AVD_SIM>;
> + };
> --
> 2.34.1
>
On Thu, Apr 18, 2024 at 11:37:20PM +0300, Laurentiu Mihalcea wrote:
> From: Laurentiu Mihalcea <[email protected]>
>
> Add node for i.MX8ULP's DSP core and its dependencies.
>
> Signed-off-by: Shengjiu Wang <[email protected]>
> Signed-off-by: Laurentiu Mihalcea <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 39 +++++++++++++++++++
> arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 22 +++++++++++
8ulp.dtsi and imx8ulp-evk.dts need two patches. one for imx8ulp.dtsi, the
other for imx8ulp-evk.dts.
Frank
> 2 files changed, 61 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
> index 24bb253b938d..5dadcbba370d 100644
> --- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
> @@ -67,6 +67,32 @@ vdevbuffer: vdevbuffer@a8400000 {
> reg = <0 0xa8400000 0 0x100000>;
> no-map;
> };
> +
> + dsp_reserved: dsp_reserved@8e000000 {
> + reg = <0 0x8e000000 0 0x1000000>;
> + no-map;
> + };
> +
> + dsp_reserved_heap: dsp_reserved_heap@8f000000 {
> + reg = <0 0x8f000000 0 0xef0000>;
> + no-map;
> + };
> +
> + dsp_vdev0vring0: vdev0vring0@8fef0000 {
> + reg = <0 0x8fef0000 0 0x8000>;
> + no-map;
> + };
> +
> + dsp_vdev0vring1: vdev0vring1@8fef8000 {
> + reg = <0 0x8fef8000 0 0x8000>;
> + no-map;
> + };
> +
> + dsp_vdev0buffer: vdev0buffer@8ff00000 {
> + compatible = "shared-dma-pool";
> + reg = <0 0x8ff00000 0 0x100000>;
> + no-map;
> + };
> };
>
> clock_ext_rmii: clock-ext-rmii {
> @@ -95,6 +121,15 @@ &cm33 {
> status = "okay";
> };
>
> +&dsp {
> + assigned-clocks = <&cgc2 IMX8ULP_CLK_HIFI_SEL>, <&cgc2 IMX8ULP_CLK_HIFI_DIVCORE>;
> + assigned-clock-parents = <&cgc2 IMX8ULP_CLK_PLL4_PFD0>;
> + assigned-clock-rates = <0>, <475200000>;
> + memory-region = <&dsp_vdev0buffer>, <&dsp_vdev0vring0>,
> + <&dsp_vdev0vring1>, <&dsp_reserved>;
> + status = "okay";
> +};
> +
> &flexspi2 {
> pinctrl-names = "default", "sleep";
> pinctrl-0 = <&pinctrl_flexspi2_ptd>;
> @@ -176,6 +211,10 @@ &mu {
> status = "okay";
> };
>
> +&mu3 {
> + status = "okay";
> +};
> +
> &iomuxc1 {
> pinctrl_enet: enetgrp {
> fsl,pins = <
> diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> index c4a0082f30d3..99ed8c1ee57c 100644
> --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> @@ -198,6 +198,22 @@ soc: soc@0 {
> ranges = <0x0 0x0 0x0 0x40000000>,
> <0x60000000 0x0 0x60000000 0x1000000>;
>
> + dsp: dsp@21170000 {
> + compatible = "fsl,imx8ulp-hifi4";
> + reg = <0x21170000 0x20000>;
> + clocks = <&cgc2 IMX8ULP_CLK_LPAV_BUS_DIV>,
> + <&cgc2 IMX8ULP_CLK_HIFI_DIVPLAT>,
> + <&cgc2 IMX8ULP_CLK_HIFI_DIVCORE>,
> + <&pcc5 IMX8ULP_CLK_MU3_B>;
> + clock-names = "ipg", "ocram", "core", "mu";
> + power-domains = <&scmi_devpd IMX8ULP_PD_HIFI4>;
> + firmware-name = "imx/dsp/hifi4.bin";
> + mbox-names = "tx", "rx", "rxdb";
> + mboxes = <&mu3 0 0>, <&mu3 1 0>, <&mu3 3 0>;
> + fsl,dsp-ctrl = <&avd_sim>;
> + status = "disabled";
> + };
> +
> s4muap: mailbox@27020000 {
> compatible = "fsl,imx8ulp-mu-s4";
> reg = <0x27020000 0x10000>;
> @@ -520,6 +536,12 @@ per_bridge5: bus@2d800000 {
> #size-cells = <1>;
> ranges;
>
> + avd_sim: syscon@2da50000 {
> + compatible = "fsl,imx8ulp-avd-sim", "syscon", "simple-mfd";
Any driver actually use "fsl,imx8ulp-avd-sim"?
> + reg = <0x2da50000 0x38>;
> + clocks = <&pcc5 IMX8ULP_CLK_AVD_SIM>;
> + };
> +
> cgc2: clock-controller@2da60000 {
> compatible = "fsl,imx8ulp-cgc2";
> reg = <0x2da60000 0x10000>;
> --
> 2.34.1
>
On Thu, Apr 18, 2024 at 05:08:20PM -0400, Frank Li wrote:
> On Thu, Apr 18, 2024 at 11:37:18PM +0300, Laurentiu Mihalcea wrote:
> > From: Laurentiu Mihalcea <[email protected]>
> >
> > i.MX8ULP DSP node needs a MU clock, but doesn't need
> > a debug clock. Change "clocks" and "clock-names" properties
> > to allow for this case.
> >
> > Signed-off-by: Laurentiu Mihalcea <[email protected]>
> > ---
> > .../devicetree/bindings/dsp/fsl,dsp.yaml | 51 ++++++++++++++-----
> > 1 file changed, 39 insertions(+), 12 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
> > index 9af40da5688e..4a39d57b1cc6 100644
> > --- a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
> > +++ b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
> > @@ -30,22 +30,12 @@ properties:
> > maxItems: 1
> >
> > clocks:
> > - items:
> > - - description: ipg clock
> > - - description: ocram clock
> > - - description: core clock
> > - - description: debug interface clock
> > - - description: message unit clock
> > minItems: 3
> > + maxItems: 5
> >
> > clock-names:
> > - items:
> > - - const: ipg
> > - - const: ocram
> > - - const: core
> > - - const: debug
> > - - const: mu
> > minItems: 3
> > + maxItems: 5
> >
> > power-domains:
> > description:
> > @@ -93,6 +83,43 @@ required:
> > - memory-region
> >
> > allOf:
> > + - if:
> > + properties:
> > + compatible:
> > + contains:
> > + const: fsl,imx8ulp-hifi4
> > + then:
> > + properties:
> > + clocks:
> > + items:
> > + - description: ipg clock
> > + - description: ocram clock
> > + - description: core clock
> > + - description: message unit clock
> > + clock-names:
> > + items:
> > + - const: ipg
> > + - const: ocram
> > + - const: core
> > + - const: mu
> > + else:
> > + properties:
> > + clocks:
> > + items:
> > + - description: ipg clock
> > + - description: ocram clock
> > + - description: core clock
> > + - description: debug interface clock
> > + - description: message unit clock
> > + minItems: 3
> > + clock-names:
> > + items:
> > + - const: ipg
> > + - const: ocram
> > + - const: core
> > + - const: debug
> > + - const: mu
> > + minItems: 3
>
> According to your descript, look like only clk "debug" is difference.
>
> How about
>
> clocks:
> items:
> - description: ipg clock
> - description: ocram clock
> - description: core clock
> - description: message unit clock
> - description: debug interface clock
>
> clock-names:
> items:
> - const: ipg
> - const: ocram
> - const: core
> - const: mu
> - const: debug
You can't change the existing order, so this does not work.
Rob
On Thu, Apr 18, 2024 at 11:37:18PM +0300, Laurentiu Mihalcea wrote:
> From: Laurentiu Mihalcea <[email protected]>
>
> i.MX8ULP DSP node needs a MU clock, but doesn't need
> a debug clock. Change "clocks" and "clock-names" properties
> to allow for this case.
>
> Signed-off-by: Laurentiu Mihalcea <[email protected]>
> ---
> .../devicetree/bindings/dsp/fsl,dsp.yaml | 51 ++++++++++++++-----
> 1 file changed, 39 insertions(+), 12 deletions(-)
Reviewed-by: Rob Herring (Arm) <[email protected]>
On Thu, Apr 18, 2024 at 11:37:19PM +0300, Laurentiu Mihalcea wrote:
> From: Laurentiu Mihalcea <[email protected]>
>
> Add schema for i.MX8ULP's AVD-SIM module.
>
> Signed-off-by: Liu Ying <[email protected]>
> Signed-off-by: Laurentiu Mihalcea <[email protected]>
> ---
> .../bindings/mfd/fsl,imx8ulp-avd-sim.yaml | 42 +++++++++++++++++++
> 1 file changed, 42 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mfd/fsl,imx8ulp-avd-sim.yaml
>
> diff --git a/Documentation/devicetree/bindings/mfd/fsl,imx8ulp-avd-sim.yaml b/Documentation/devicetree/bindings/mfd/fsl,imx8ulp-avd-sim.yaml
> new file mode 100644
> index 000000000000..4020c6e37f80
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/fsl,imx8ulp-avd-sim.yaml
> @@ -0,0 +1,42 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mfd/fsl,imx8ulp-avd-sim.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP i.MX8ULP Audio-Video Domain System Integration Module
> +
> +maintainers:
> + - Liu Ying <[email protected]>
> +
> +description: |
> + The AVD-SIM module provides configuration options for components of AVD.
> +
> +properties:
> + compatible:
> + items:
> + - const: fsl,imx8ulp-avd-sim
> + - const: syscon
> + - const: simple-mfd
'simple-mfd' means you have child nodes, but you have none defined.
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
If you do add child nodes, 'simple-mfd' also means there is not any
dependency on the parent node such as needing this clock to be enabled
for the child nodes.
Rob