The purpose of this patch is to enable Linux to be a I2C slave by enabling the
slave functionality in the designware I2C controller. The patch refactors the
original i2c-designware-core and extracts all master functions to a
i2c-designware-master source file as suggested by Andy Shevchenko. It also
creates a i2c-designware-slave source file and keeps the common functions in the
i2c-designware-src source file. For that changes also had to be made in the
Makefile and Kconfig.
The driver instantiates in slave or master mode by checking the reg address that
must be defined in the DT and evaluating if is a I2C_OWN_SLAVE_ADDRESS".
ACPI is not supported in this driver.
The functionality was tested using the hardware independent software backend
slave-eeprom driver.
Luis Oliveira (7):
i2c: designware: Cleaning and comment style fixes.
i2c: designware: refactoring of the i2c-designware
i2c: designware: MASTER mode as separated driver
i2c: designware: introducing I2C_SLAVE definitions
i2c: designware: add SLAVE mode functions
i2c: designware: enable SLAVE in platform module
i2c: designware: style changes in existing code
drivers/i2c/busses/Kconfig | 3 +-
drivers/i2c/busses/Makefile | 1 +
drivers/i2c/busses/i2c-designware-common.c | 261 ++++++++++++
drivers/i2c/busses/i2c-designware-core.h | 164 ++++++++
...c-designware-core.c => i2c-designware-master.c} | 444 +++------------------
drivers/i2c/busses/i2c-designware-platdrv.c | 144 +++++--
drivers/i2c/busses/i2c-designware-slave.c | 434 ++++++++++++++++++++
7 files changed, 1029 insertions(+), 422 deletions(-)
create mode 100644 drivers/i2c/busses/i2c-designware-common.c
rename drivers/i2c/busses/{i2c-designware-core.c => i2c-designware-master.c} (62%)
create mode 100644 drivers/i2c/busses/i2c-designware-slave.c
--
2.11.0
Replaced all the return variables 'r' in the existing
code by 'ret' to make the code easier to read (and
more standard).
Signed-off-by: Luis Oliveira <[email protected]>
---
Changes V4->V5: (Andy Shevchenko)
- Replaced all the old code using "r" as return to "ret". For consistency
purposes.
drivers/i2c/busses/i2c-designware-master.c | 30 ++++++++++++++---------------
drivers/i2c/busses/i2c-designware-platdrv.c | 16 +++++++--------
2 files changed, 23 insertions(+), 23 deletions(-)
diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busses/i2c-designware-master.c
index b55a7f4c5149..0d5aca6edb48 100644
--- a/drivers/i2c/busses/i2c-designware-master.c
+++ b/drivers/i2c/busses/i2c-designware-master.c
@@ -644,18 +644,18 @@ EXPORT_SYMBOL_GPL(i2c_dw_read_comp_param);
int i2c_dw_probe(struct dw_i2c_dev *dev)
{
struct i2c_adapter *adap = &dev->adapter;
- int r;
+ int ret;
u32 reg;
init_completion(&dev->cmd_complete);
- r = i2c_dw_init(dev);
- if (r)
- return r;
+ ret = i2c_dw_init(dev);
+ if (ret)
+ return ret;
- r = i2c_dw_acquire_lock(dev);
- if (r)
- return r;
+ ret = i2c_dw_acquire_lock(dev);
+ if (ret)
+ return ret;
/*
* Test if dynamic TAR update is enabled in this controller by writing
@@ -681,13 +681,13 @@ int i2c_dw_probe(struct dw_i2c_dev *dev)
i2c_set_adapdata(adap, dev);
i2c_dw_disable_int(dev);
- r = devm_request_irq(dev->dev, dev->irq, i2c_dw_isr,
+ ret = devm_request_irq(dev->dev, dev->irq, i2c_dw_isr,
IRQF_SHARED | IRQF_COND_SUSPEND,
dev_name(dev->dev), dev);
- if (r) {
+ if (ret) {
dev_err(dev->dev, "failure requesting irq %i: %d\n",
- dev->irq, r);
- return r;
+ dev->irq, ret);
+ return ret;
}
/*
@@ -697,12 +697,12 @@ int i2c_dw_probe(struct dw_i2c_dev *dev)
* registered I2C slaves that do I2C transfers in their probe.
*/
pm_runtime_get_noresume(dev->dev);
- r = i2c_add_numbered_adapter(adap);
- if (r)
- dev_err(dev->dev, "failure adding adapter: %d\n", r);
+ ret = i2c_add_numbered_adapter(adap);
+ if (ret)
+ dev_err(dev->dev, "failure adding adapter: %d\n", ret);
pm_runtime_put_noidle(dev->dev);
- return r;
+ return ret;
}
EXPORT_SYMBOL_GPL(i2c_dw_probe);
diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
index ef75031f8a62..785f4380c9a9 100644
--- a/drivers/i2c/busses/i2c-designware-platdrv.c
+++ b/drivers/i2c/busses/i2c-designware-platdrv.c
@@ -234,7 +234,7 @@ static int dw_i2c_plat_probe(struct platform_device *pdev)
struct fwnode_handle *child;
u32 acpi_speed, ht = 0;
struct resource *mem;
- int irq, r;
+ int irq, ret;
u32 reg;
irq = platform_get_irq(pdev, 0);
@@ -293,9 +293,9 @@ static int dw_i2c_plat_probe(struct platform_device *pdev)
return -EINVAL;
}
- r = i2c_dw_eval_lock_support(dev);
- if (r)
- return r;
+ ret = i2c_dw_eval_lock_support(dev);
+ if (ret)
+ return ret;
if (ACPI_HANDLE(&pdev->dev) == NULL) {
device_for_each_child_node(&pdev->dev, child) {
@@ -336,14 +336,14 @@ static int dw_i2c_plat_probe(struct platform_device *pdev)
}
if (dev->mode == DW_IC_SLAVE)
- r = i2c_dw_probe_slave(dev);
+ ret = i2c_dw_probe_slave(dev);
else
- r = i2c_dw_probe(dev);
+ ret = i2c_dw_probe(dev);
- if (r && !dev->pm_runtime_disabled)
+ if (ret && !dev->pm_runtime_disabled)
pm_runtime_disable(&pdev->dev);
- return r;
+ return ret;
}
static int dw_i2c_plat_remove(struct platform_device *pdev)
--
2.11.0
- Definitions were added
SLAVE related definitions were added to the core of the controller.
Signed-off-by: Luis Oliveira <[email protected]>
---
Changes V4->V5: (Andy Shevchenko)
- This patch just introduces SLAVE definitions (as suggested in V4)
drivers/i2c/busses/i2c-designware-core.h | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h
index 8bba7a37c3ce..5080f1d2d2ec 100644
--- a/drivers/i2c/busses/i2c-designware-core.h
+++ b/drivers/i2c/busses/i2c-designware-core.h
@@ -36,15 +36,20 @@
#define DW_IC_CON_SPEED_FAST 0x4
#define DW_IC_CON_SPEED_HIGH 0x6
#define DW_IC_CON_SPEED_MASK 0x6
+#define DW_IC_CON_10BITADDR_SLAVE 0x8
#define DW_IC_CON_10BITADDR_MASTER 0x10
#define DW_IC_CON_RESTART_EN 0x20
#define DW_IC_CON_SLAVE_DISABLE 0x40
+#define DW_IC_CON_STOP_DET_IFADDRESSED 0x80
+#define DW_IC_CON_TX_EMPTY_CTRL 0x100
+#define DW_IC_CON_RX_FIFO_FULL_HLD_CTRL 0x200
/*
* Registers offset
*/
#define DW_IC_CON 0x0
#define DW_IC_TAR 0x4
+#define DW_IC_SAR 0x8
#define DW_IC_DATA_CMD 0x10
#define DW_IC_SS_SCL_HCNT 0x14
#define DW_IC_SS_SCL_LCNT 0x18
@@ -75,6 +80,7 @@
#define DW_IC_SDA_HOLD 0x7c
#define DW_IC_TX_ABRT_SOURCE 0x80
#define DW_IC_ENABLE_STATUS 0x9c
+#define DW_IC_CLR_RESTART_DET 0xa8
#define DW_IC_COMP_PARAM_1 0xf4
#define DW_IC_COMP_VERSION 0xf8
#define DW_IC_SDA_HOLD_MIN_VERS 0x3131312A
@@ -93,15 +99,22 @@
#define DW_IC_INTR_STOP_DET 0x200
#define DW_IC_INTR_START_DET 0x400
#define DW_IC_INTR_GEN_CALL 0x800
+#define DW_IC_INTR_RESTART_DET 0x1000
#define DW_IC_INTR_DEFAULT_MASK (DW_IC_INTR_RX_FULL | \
DW_IC_INTR_TX_ABRT | \
DW_IC_INTR_STOP_DET)
#define DW_IC_INTR_MASTER_MASK (DW_IC_INTR_DEFAULT_MASK | \
DW_IC_INTR_TX_EMPTY)
+#define DW_IC_INTR_SLAVE_MASK (DW_IC_INTR_DEFAULT_MASK | \
+ DW_IC_INTR_RX_DONE | \
+ DW_IC_INTR_RX_UNDER | \
+ DW_IC_INTR_RD_REQ)
+
#define DW_IC_STATUS_ACTIVITY 0x1
#define DW_IC_STATUS_TFE BIT(2)
#define DW_IC_STATUS_MASTER_ACTIVITY BIT(5)
+#define DW_IC_STATUS_SLAVE_ACTIVITY BIT(6)
#define DW_IC_SDA_HOLD_RX_SHIFT 16
#define DW_IC_SDA_HOLD_RX_MASK GENMASK(23, DW_IC_SDA_HOLD_RX_SHIFT)
@@ -123,6 +136,12 @@
#define TIMEOUT 20 /* ms */
/*
+ * operation modes
+ */
+#define DW_IC_MASTER 0
+#define DW_IC_SLAVE 1
+
+/*
* hardware abort codes from the DW_IC_TX_ABRT_SOURCE register
*
* only expected abort codes are listed here
@@ -139,6 +158,9 @@
#define ABRT_10B_RD_NORSTRT 10
#define ABRT_MASTER_DIS 11
#define ARB_LOST 12
+#define ABRT_SLAVE_FLUSH_TXFIFO 13
+#define ABRT_SLAVE_ARBLOST 14
+#define ABRT_SLAVE_RD_INTX 15
#define DW_IC_TX_ABRT_7B_ADDR_NOACK (1UL << ABRT_7B_ADDR_NOACK)
#define DW_IC_TX_ABRT_10ADDR1_NOACK (1UL << ABRT_10ADDR1_NOACK)
@@ -151,6 +173,9 @@
#define DW_IC_TX_ABRT_10B_RD_NORSTRT (1UL << ABRT_10B_RD_NORSTRT)
#define DW_IC_TX_ABRT_MASTER_DIS (1UL << ABRT_MASTER_DIS)
#define DW_IC_TX_ARB_LOST (1UL << ARB_LOST)
+#define DW_IC_RX_ABRT_SLAVE_RD_INTX (1UL << ABRT_SLAVE_RD_INTX)
+#define DW_IC_RX_ABRT_SLAVE_ARBLOST (1UL << ABRT_SLAVE_ARBLOST)
+#define DW_IC_RX_ABRT_SLAVE_FLUSH_TXFIFO (1UL << ABRT_SLAVE_FLUSH_TXFIFO)
#define DW_IC_TX_ABRT_NOACK (DW_IC_TX_ABRT_7B_ADDR_NOACK | \
DW_IC_TX_ABRT_10ADDR1_NOACK | \
@@ -206,6 +231,7 @@ struct dw_i2c_dev {
void __iomem *base;
struct completion cmd_complete;
struct clk *clk;
+ struct i2c_client *slave;
u32 (*get_clk_rate_khz) (struct dw_i2c_dev *dev);
struct dw_pci_controller *controller;
int cmd_err;
@@ -225,6 +251,7 @@ struct dw_i2c_dev {
struct i2c_adapter adapter;
u32 functionality;
u32 master_cfg;
+ u32 slave_cfg;
unsigned int tx_fifo_depth;
unsigned int rx_fifo_depth;
int rx_outstanding;
--
2.11.0
- Factor out all _master() part of code from i2c-designware-core
and i2c-designware-platdrv to separate functions.
- Standardize all code related with MASTER mode.
- I have to take off DW_IC_INTR_TX_EMPTY from DW_IC_INTR_DEFAULT_MASK
because it is master specific.
The purpose of this is to prepare the controller to have is I2C MASTER
flow in a separate driver. To do this first all the
functions/definitions related to the MASTER flow were identified.
Signed-off-by: Luis Oliveira <[email protected]>
---
Changes V4->V5: (ACK by Andy)
Fixed the bellow issues:
- Removed a part belonging to slave patch
- Removed unused variable "mode"
- Changed dev_info() to dev_dbg()
drivers/i2c/busses/i2c-designware-core.c | 56 ++++++++++++++++++-----------
drivers/i2c/busses/i2c-designware-platdrv.c | 35 +++++++++++-------
2 files changed, 58 insertions(+), 33 deletions(-)
diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c
index 9d724a6a7ec8..951ababbd9a3 100644
--- a/drivers/i2c/busses/i2c-designware-core.c
+++ b/drivers/i2c/busses/i2c-designware-core.c
@@ -87,10 +87,12 @@
#define DW_IC_INTR_GEN_CALL 0x800
#define DW_IC_INTR_DEFAULT_MASK (DW_IC_INTR_RX_FULL | \
- DW_IC_INTR_TX_EMPTY | \
DW_IC_INTR_TX_ABRT | \
DW_IC_INTR_STOP_DET)
+#define DW_IC_INTR_MASTER_MASK (DW_IC_INTR_DEFAULT_MASK | \
+ DW_IC_INTR_TX_EMPTY)
+
#define DW_IC_STATUS_ACTIVITY 0x1
#define DW_IC_SDA_HOLD_RX_SHIFT 16
@@ -202,6 +204,16 @@ static void dw_writel(struct dw_i2c_dev *dev, u32 b, int offset)
}
}
+static void i2c_dw_configure_fifo_master(struct dw_i2c_dev *dev)
+{
+ /* Configure Tx/Rx FIFO threshold levels */
+ dw_writel(dev, dev->tx_fifo_depth / 2, DW_IC_TX_TL);
+ dw_writel(dev, 0, DW_IC_RX_TL);
+
+ /* configure the i2c master */
+ dw_writel(dev, dev->master_cfg, DW_IC_CON);
+}
+
static u32
i2c_dw_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf, int cond, int offset)
{
@@ -318,10 +330,10 @@ static void i2c_dw_release_lock(struct dw_i2c_dev *dev)
}
/**
- * i2c_dw_init() - initialize the designware i2c master hardware
+ * i2c_dw_init() - initialize the designware i2c hardware
* @dev: device private data
*
- * This functions configures and enables the I2C master.
+ * This functions configures and enables the I2C.
* This function is called during I2C init function, and in case of timeout at
* run time.
*/
@@ -440,12 +452,7 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
"Hardware too old to adjust SDA hold time.\n");
}
- /* Configure Tx/Rx FIFO threshold levels */
- dw_writel(dev, dev->tx_fifo_depth / 2, DW_IC_TX_TL);
- dw_writel(dev, 0, DW_IC_RX_TL);
-
- /* Configure the I2C master */
- dw_writel(dev, dev->master_cfg , DW_IC_CON);
+ i2c_dw_configure_fifo_master(dev);
i2c_dw_release_lock(dev);
@@ -513,7 +520,7 @@ static void i2c_dw_xfer_init(struct dw_i2c_dev *dev)
/* Clear and enable interrupts */
dw_readl(dev, DW_IC_CLR_INTR);
- dw_writel(dev, DW_IC_INTR_DEFAULT_MASK, DW_IC_INTR_MASK);
+ dw_writel(dev, DW_IC_INTR_MASTER_MASK, DW_IC_INTR_MASK);
}
/*
@@ -533,7 +540,7 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev)
u8 *buf = dev->tx_buf;
bool need_restart = false;
- intr_mask = DW_IC_INTR_DEFAULT_MASK;
+ intr_mask = DW_IC_INTR_MASTER_MASK;
for (; dev->msg_write_idx < dev->msgs_num; dev->msg_write_idx++) {
u32 flags = msgs[dev->msg_write_idx].flags;
@@ -886,16 +893,9 @@ static u32 i2c_dw_read_clear_intrbits(struct dw_i2c_dev *dev)
* Interrupt service routine. This gets called whenever an I2C interrupt
* occurs.
*/
-static irqreturn_t i2c_dw_isr(int this_irq, void *dev_id)
+int i2c_dw_irq_handler_master(struct dw_i2c_dev *dev)
{
- struct dw_i2c_dev *dev = dev_id;
- u32 stat, enabled;
-
- enabled = dw_readl(dev, DW_IC_ENABLE);
- stat = dw_readl(dev, DW_IC_RAW_INTR_STAT);
- dev_dbg(dev->dev, "%s: enabled=%#x stat=%#x\n", __func__, enabled, stat);
- if (!enabled || !(stat & ~DW_IC_INTR_ACTIVITY))
- return IRQ_NONE;
+ u32 stat;
stat = i2c_dw_read_clear_intrbits(dev);
@@ -932,6 +932,22 @@ static irqreturn_t i2c_dw_isr(int this_irq, void *dev_id)
i2c_dw_disable_int(dev);
dw_writel(dev, stat, DW_IC_INTR_MASK);
}
+ return 0;
+}
+
+static irqreturn_t i2c_dw_isr(int this_irq, void *dev_id)
+{
+ struct dw_i2c_dev *dev = dev_id;
+ u32 stat, enabled;
+
+ enabled = dw_readl(dev, DW_IC_ENABLE);
+ stat = dw_readl(dev, DW_IC_RAW_INTR_STAT);
+ dev_dbg(dev->dev,
+ "%s: enabled=%#x stat=%#x\n", __func__, enabled, stat);
+ if (!enabled || !(stat & ~DW_IC_INTR_ACTIVITY))
+ return IRQ_NONE;
+
+ i2c_dw_irq_handler_master(dev);
return IRQ_HANDLED;
}
diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
index 4070baea4fb9..5cf4df63dbe8 100644
--- a/drivers/i2c/busses/i2c-designware-platdrv.c
+++ b/drivers/i2c/busses/i2c-designware-platdrv.c
@@ -139,6 +139,27 @@ static inline int dw_i2c_acpi_configure(struct platform_device *pdev)
}
#endif
+static void i2c_dw_configure_master(struct platform_device *pdev)
+{
+ struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
+
+ dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
+ DW_IC_CON_RESTART_EN;
+
+ dev_dbg(&pdev->dev, "I am registed as a I2C Master!\n");
+
+ switch (dev->clk_freq) {
+ case 100000:
+ dev->master_cfg |= DW_IC_CON_SPEED_STD;
+ break;
+ case 3400000:
+ dev->master_cfg |= DW_IC_CON_SPEED_HIGH;
+ break;
+ default:
+ dev->master_cfg |= DW_IC_CON_SPEED_FAST;
+ }
+}
+
static int i2c_dw_plat_prepare_clk(struct dw_i2c_dev *i_dev, bool prepare)
{
if (IS_ERR(i_dev->clk))
@@ -245,19 +266,7 @@ static int dw_i2c_plat_probe(struct platform_device *pdev)
dev->functionality = I2C_FUNC_10BIT_ADDR | DW_IC_DEFAULT_FUNCTIONALITY;
- dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
- DW_IC_CON_RESTART_EN;
-
- switch (dev->clk_freq) {
- case 100000:
- dev->master_cfg |= DW_IC_CON_SPEED_STD;
- break;
- case 3400000:
- dev->master_cfg |= DW_IC_CON_SPEED_HIGH;
- break;
- default:
- dev->master_cfg |= DW_IC_CON_SPEED_FAST;
- }
+ i2c_dw_configure_master(pdev);
dev->clk = devm_clk_get(&pdev->dev, NULL);
if (!i2c_dw_plat_prepare_clk(dev, true)) {
--
2.11.0
The purpose of this commit is to fix some comments and styling issues
in the existing code due to the need of reuse this code. What is being
made here is:
- Sorted the headers files
- Corrected some comments style
- Reverse tree in the variables declaration
- Add/remove empty lines and tabs where needed
- Fix of a misspelled word
The value of this, besides the rules of coding style, is because I
will use this code after and it will make my future patch a lot bigger
and complicated to review. The work here won't bring any additional work
to backported fixes because is just style and reordering.
Signed-off-by: Luis Oliveira <[email protected]>
---
Changes V5 (Jarkko):
- This patch was submitted by it self and it god ACK. I need it in the
patchset because the next patch relly on this one.
- Also fixed the commit length.
drivers/i2c/busses/i2c-designware-core.c | 36 ++++++++++++++---------------
drivers/i2c/busses/i2c-designware-platdrv.c | 27 +++++++++++-----------
2 files changed, 32 insertions(+), 31 deletions(-)
diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c
index 6d81c56184d3..9d724a6a7ec8 100644
--- a/drivers/i2c/busses/i2c-designware-core.c
+++ b/drivers/i2c/busses/i2c-designware-core.c
@@ -21,17 +21,17 @@
* ----------------------------------------------------------------------------
*
*/
+#include <linux/delay.h>
#include <linux/export.h>
#include <linux/errno.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/io.h>
-#include <linux/pm_runtime.h>
-#include <linux/delay.h>
#include <linux/module.h>
-#include "i2c-designware-core.h"
+#include <linux/pm_runtime.h>
+#include "i2c-designware-core.h"
/*
* Registers offset
*/
@@ -98,7 +98,7 @@
#define DW_IC_ERR_TX_ABRT 0x1
-#define DW_IC_TAR_10BITADDR_MASTER BIT(12)
+#define DW_IC_TAR_10BITADDR_MASTER BIT(12)
#define DW_IC_COMP_PARAM_1_SPEED_MODE_HIGH (BIT(2) | BIT(3))
#define DW_IC_COMP_PARAM_1_SPEED_MODE_MASK GENMASK(3, 2)
@@ -113,10 +113,10 @@
#define TIMEOUT 20 /* ms */
/*
- * hardware abort codes from the DW_IC_TX_ABRT_SOURCE register
+ * Hardware abort codes from the DW_IC_TX_ABRT_SOURCE register
*
- * only expected abort codes are listed here
- * refer to the datasheet for the full list
+ * Only expected abort codes are listed here,
+ * refer to the datasheet for the full list.
*/
#define ABRT_7B_ADDR_NOACK 0
#define ABRT_10ADDR1_NOACK 1
@@ -338,14 +338,14 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
reg = dw_readl(dev, DW_IC_COMP_TYPE);
if (reg == ___constant_swab32(DW_IC_COMP_TYPE_VALUE)) {
- /* Configure register endianess access */
+ /* Configure register endianness access */
dev->accessor_flags |= ACCESS_SWAP;
} else if (reg == (DW_IC_COMP_TYPE_VALUE & 0x0000ffff)) {
/* Configure register access mode 16bit */
dev->accessor_flags |= ACCESS_16BIT;
} else if (reg != DW_IC_COMP_TYPE_VALUE) {
- dev_err(dev->dev, "Unknown Synopsys component type: "
- "0x%08x\n", reg);
+ dev_err(dev->dev,
+ "Unknown Synopsys component type: 0x%08x\n", reg);
i2c_dw_release_lock(dev);
return -ENODEV;
}
@@ -355,7 +355,7 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
/* Disable the adapter */
__i2c_dw_enable_and_wait(dev, false);
- /* set standard and fast speed deviders for high/low periods */
+ /* Set standard and fast speed deviders for high/low periods */
sda_falling_time = dev->sda_falling_time ?: 300; /* ns */
scl_falling_time = dev->scl_falling_time ?: 300; /* ns */
@@ -444,7 +444,7 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
dw_writel(dev, dev->tx_fifo_depth / 2, DW_IC_TX_TL);
dw_writel(dev, 0, DW_IC_RX_TL);
- /* configure the i2c master */
+ /* Configure the I2C master */
dw_writel(dev, dev->master_cfg , DW_IC_CON);
i2c_dw_release_lock(dev);
@@ -480,7 +480,7 @@ static void i2c_dw_xfer_init(struct dw_i2c_dev *dev)
/* Disable the adapter */
__i2c_dw_enable_and_wait(dev, false);
- /* if the slave address is ten bit address, enable 10BITADDR */
+ /* If the slave address is ten bit address, enable 10BITADDR */
if (dev->dynamic_tar_update_enabled) {
/*
* If I2C_DYNAMIC_TAR_UPDATE is set, the 10-bit addressing
@@ -505,7 +505,7 @@ static void i2c_dw_xfer_init(struct dw_i2c_dev *dev)
*/
dw_writel(dev, msgs[dev->msg_write_idx].addr | ic_tar, DW_IC_TAR);
- /* enforce disabled interrupts (due to HW issues) */
+ /* Enforce disabled interrupts (due to HW issues) */
i2c_dw_disable_int(dev);
/* Enable the adapter */
@@ -539,7 +539,7 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev)
u32 flags = msgs[dev->msg_write_idx].flags;
/*
- * if target address has changed, we need to
+ * If target address has changed, we need to
* reprogram the target address in the i2c
* adapter when we are done with this transfer
*/
@@ -601,7 +601,7 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev)
if (msgs[dev->msg_write_idx].flags & I2C_M_RD) {
- /* avoid rx buffer overrun */
+ /* Avoid rx buffer overrun */
if (dev->rx_outstanding >= dev->rx_fifo_depth)
break;
@@ -905,7 +905,7 @@ static irqreturn_t i2c_dw_isr(int this_irq, void *dev_id)
/*
* Anytime TX_ABRT is set, the contents of the tx/rx
- * buffers are flushed. Make sure to skip them.
+ * buffers are flushed. Make sure to skip them.
*/
dw_writel(dev, 0, DW_IC_INTR_MASK);
goto tx_aborted;
@@ -927,7 +927,7 @@ static irqreturn_t i2c_dw_isr(int this_irq, void *dev_id)
if ((stat & (DW_IC_INTR_TX_ABRT | DW_IC_INTR_STOP_DET)) || dev->msg_err)
complete(&dev->cmd_complete);
else if (unlikely(dev->accessor_flags & ACCESS_INTR_MASK)) {
- /* workaround to trigger pending interrupt */
+ /* Workaround to trigger pending interrupt */
stat = dw_readl(dev, DW_IC_INTR_MASK);
i2c_dw_disable_int(dev);
dw_writel(dev, stat, DW_IC_INTR_MASK);
diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
index 6ce431323125..4070baea4fb9 100644
--- a/drivers/i2c/busses/i2c-designware-platdrv.c
+++ b/drivers/i2c/busses/i2c-designware-platdrv.c
@@ -21,26 +21,27 @@
* ----------------------------------------------------------------------------
*
*/
-#include <linux/kernel.h>
-#include <linux/module.h>
+#include <linux/acpi.h>
+#include <linux/clk-provider.h>
+#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/dmi.h>
-#include <linux/i2c.h>
-#include <linux/clk.h>
-#include <linux/clk-provider.h>
-#include <linux/errno.h>
-#include <linux/sched.h>
#include <linux/err.h>
+#include <linux/errno.h>
+#include <linux/i2c.h>
#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
#include <linux/of.h>
+#include <linux/platform_data/i2c-designware.h>
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
#include <linux/property.h>
-#include <linux/io.h>
+#include <linux/sched.h>
#include <linux/slab.h>
-#include <linux/acpi.h>
-#include <linux/platform_data/i2c-designware.h>
+
#include "i2c-designware-core.h"
static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
@@ -176,11 +177,11 @@ static void dw_i2c_set_fifo_size(struct dw_i2c_dev *dev, int id)
static int dw_i2c_plat_probe(struct platform_device *pdev)
{
struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
- struct dw_i2c_dev *dev;
struct i2c_adapter *adap;
+ struct dw_i2c_dev *dev;
+ u32 acpi_speed, ht = 0;
struct resource *mem;
int irq, r;
- u32 acpi_speed, ht = 0;
irq = platform_get_irq(pdev, 0);
if (irq < 0)
@@ -371,7 +372,7 @@ static const struct dev_pm_ops dw_i2c_dev_pm_ops = {
#define DW_I2C_DEV_PMOPS NULL
#endif
-/* work with hotplug and coldplug */
+/* Work with hotplug and coldplug */
MODULE_ALIAS("platform:i2c_designware");
static struct platform_driver dw_i2c_driver = {
--
2.11.0
- Changes in Kconfig to enable I2C_SLAVE support
- Slave functions added to core library file
- Slave abort sources added to common source file
- New driver: i2c-designware-slave added
- Changes in the Makefile to compile it all
All the SLAVE flow is added but it is not enabled via platform
driver.
Signed-off-by: Luis Oliveira <[email protected]>
---
Changes V4->V5: (Andy Shevchenko)
- This patch adds the SLAVE support functions but it still not enable it
via platform module. I think it is more readable now
drivers/i2c/busses/Kconfig | 3 +-
drivers/i2c/busses/Makefile | 2 +-
drivers/i2c/busses/i2c-designware-common.c | 10 +-
drivers/i2c/busses/i2c-designware-core.h | 6 +
drivers/i2c/busses/i2c-designware-slave.c | 434 +++++++++++++++++++++++++++++
5 files changed, 452 insertions(+), 3 deletions(-)
create mode 100644 drivers/i2c/busses/i2c-designware-slave.c
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 0cdc8443deab..b58fdcde93a7 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -469,11 +469,12 @@ config I2C_DESIGNWARE_CORE
config I2C_DESIGNWARE_PLATFORM
tristate "Synopsys DesignWare Platform"
+ select I2C_SLAVE
select I2C_DESIGNWARE_CORE
depends on (ACPI && COMMON_CLK) || !ACPI
help
If you say yes to this option, support will be included for the
- Synopsys DesignWare I2C adapter. Only master mode is supported.
+ Synopsys DesignWare I2C adapter.
This driver can also be built as a module. If so, the module
will be called i2c-designware-platform.
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 4f8f6a2b9346..c2ed84a86f49 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -40,7 +40,7 @@ obj-$(CONFIG_I2C_CBUS_GPIO) += i2c-cbus-gpio.o
obj-$(CONFIG_I2C_CPM) += i2c-cpm.o
obj-$(CONFIG_I2C_DAVINCI) += i2c-davinci.o
obj-$(CONFIG_I2C_DESIGNWARE_CORE) += i2c-designware-core.o
-i2c-designware-core-objs := i2c-designware-common.o i2c-designware-master.o
+i2c-designware-core-objs := i2c-designware-common.o i2c-designware-slave.o i2c-designware-master.o
obj-$(CONFIG_I2C_DESIGNWARE_PLATFORM) += i2c-designware-platform.o
i2c-designware-platform-objs := i2c-designware-platdrv.o
i2c-designware-platform-$(CONFIG_I2C_DESIGNWARE_BAYTRAIL) += i2c-designware-baytrail.o
diff --git a/drivers/i2c/busses/i2c-designware-common.c b/drivers/i2c/busses/i2c-designware-common.c
index 012b8f9dec15..b3beba639e98 100644
--- a/drivers/i2c/busses/i2c-designware-common.c
+++ b/drivers/i2c/busses/i2c-designware-common.c
@@ -30,6 +30,7 @@
#include <linux/pm_runtime.h>
#include <linux/delay.h>
#include <linux/module.h>
+
#include "i2c-designware-core.h"
static char *abort_sources[] = {
@@ -42,7 +43,7 @@ static char *abort_sources[] = {
[ABRT_TXDATA_NOACK] =
"data not acknowledged",
[ABRT_GCALL_NOACK] =
- "no acknowledgement for a general call",
+ "no acknowledgment for a general call",
[ABRT_GCALL_READ] =
"read after general call",
[ABRT_SBYTE_ACKDET] =
@@ -55,6 +56,13 @@ static char *abort_sources[] = {
"trying to use disabled adapter",
[ARB_LOST] =
"lost arbitration",
+ [ABRT_SLAVE_FLUSH_TXFIFO] =
+ "read command so flush old data in the TX FIFO",
+ [ABRT_SLAVE_ARBLOST] =
+ "slave lost the bus while transmitting data to a remote master",
+ [ABRT_SLAVE_RD_INTX] =
+ "slave request for data to be transmitted and there is a 1 in "
+ "bit 8 of IC_DATA_CMD",
};
u32 dw_readl(struct dw_i2c_dev *dev, int offset)
diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h
index 5080f1d2d2ec..1729b6bb5239 100644
--- a/drivers/i2c/busses/i2c-designware-core.h
+++ b/drivers/i2c/busses/i2c-designware-core.h
@@ -271,6 +271,7 @@ struct dw_i2c_dev {
void (*release_lock)(struct dw_i2c_dev *dev);
bool pm_runtime_disabled;
bool dynamic_tar_update_enabled;
+ bool mode;
};
#define ACCESS_SWAP 0x00000001
@@ -295,6 +296,11 @@ extern void i2c_dw_disable(struct dw_i2c_dev *dev);
extern void i2c_dw_disable_int(struct dw_i2c_dev *dev);
extern u32 i2c_dw_read_comp_param(struct dw_i2c_dev *dev);
extern int i2c_dw_probe(struct dw_i2c_dev *dev);
+extern int i2c_dw_init_slave(struct dw_i2c_dev *dev);
+extern void i2c_dw_disable_slave(struct dw_i2c_dev *dev);
+extern void i2c_dw_disable_int_slave(struct dw_i2c_dev *dev);
+extern u32 i2c_dw_read_comp_param_slave(struct dw_i2c_dev *dev);
+extern int i2c_dw_probe_slave(struct dw_i2c_dev *dev);
#if IS_ENABLED(CONFIG_I2C_DESIGNWARE_BAYTRAIL)
extern int i2c_dw_eval_lock_support(struct dw_i2c_dev *dev);
diff --git a/drivers/i2c/busses/i2c-designware-slave.c b/drivers/i2c/busses/i2c-designware-slave.c
new file mode 100644
index 000000000000..5afc88d9e6b7
--- /dev/null
+++ b/drivers/i2c/busses/i2c-designware-slave.c
@@ -0,0 +1,434 @@
+/*
+ * Synopsys DesignWare I2C adapter driver (slave only).
+ *
+ * Based on the Synopsys DesignWare I2C adapter driver (master).
+ *
+ * Copyright (C) 2016 Synopsys Inc.
+ *
+ * ----------------------------------------------------------------------------
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ * ----------------------------------------------------------------------------
+ *
+ */
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/pm_runtime.h>
+#include <linux/delay.h>
+#include <linux/module.h>
+
+#include "i2c-designware-core.h"
+
+static void i2c_dw_configure_fifo_slave(struct dw_i2c_dev *dev)
+{
+ /* Configure Tx/Rx FIFO threshold levels. */
+ dw_writel(dev, 0, DW_IC_TX_TL);
+ dw_writel(dev, 0, DW_IC_RX_TL);
+
+ /* Configure the I2C slave. */
+ dw_writel(dev, dev->slave_cfg, DW_IC_CON);
+ dw_writel(dev, DW_IC_INTR_SLAVE_MASK, DW_IC_INTR_MASK);
+}
+
+/**
+ * i2c_dw_init_slave() - Initialize the designware i2c slave hardware
+ * @dev: device private data
+ *
+ * This functions configures and enables the I2C.
+ * This function is called during I2C init function, and in case of timeout at
+ * run time.
+ */
+int i2c_dw_init_slave(struct dw_i2c_dev *dev)
+{
+ u32 sda_falling_time, scl_falling_time;
+ u32 reg, comp_param1;
+ u32 hcnt, lcnt;
+ int ret;
+
+ ret = i2c_dw_acquire_lock(dev);
+ if (ret)
+ return ret;
+
+ reg = dw_readl(dev, DW_IC_COMP_TYPE);
+ if (reg == ___constant_swab32(DW_IC_COMP_TYPE_VALUE)) {
+ /* Configure register endianness access. */
+ dev->accessor_flags |= ACCESS_SWAP;
+ } else if (reg == (DW_IC_COMP_TYPE_VALUE & 0x0000ffff)) {
+ /* Configure register access mode 16bit. */
+ dev->accessor_flags |= ACCESS_16BIT;
+ } else if (reg != DW_IC_COMP_TYPE_VALUE) {
+ dev_err(dev->dev,
+ "Unknown Synopsys component type: 0x%08x\n", reg);
+ i2c_dw_release_lock(dev);
+ return -ENODEV;
+ }
+
+ comp_param1 = dw_readl(dev, DW_IC_COMP_PARAM_1);
+
+ /* Disable the adapter. */
+ __i2c_dw_enable_and_wait(dev, false);
+
+ /* Set standard and fast speed deviders for high/low periods. */
+ sda_falling_time = dev->sda_falling_time ?: 300; /* ns */
+ scl_falling_time = dev->scl_falling_time ?: 300; /* ns */
+
+ /* Set SCL timing parameters for standard-mode. */
+ if (dev->ss_hcnt && dev->ss_lcnt) {
+ hcnt = dev->ss_hcnt;
+ lcnt = dev->ss_lcnt;
+ } else {
+ hcnt = i2c_dw_scl_hcnt(i2c_dw_clk_rate(dev),
+ 4000, /* tHD;STA = tHIGH = 4.0 us */
+ sda_falling_time,
+ 0, /* 0: DW default, 1: Ideal */
+ 0); /* No offset */
+ lcnt = i2c_dw_scl_lcnt(i2c_dw_clk_rate(dev),
+ 4700, /* tLOW = 4.7 us */
+ scl_falling_time,
+ 0); /* No offset */
+ }
+ dw_writel(dev, hcnt, DW_IC_SS_SCL_HCNT);
+ dw_writel(dev, lcnt, DW_IC_SS_SCL_LCNT);
+ dev_dbg(dev->dev, "Standard-mode HCNT:LCNT = %d:%d\n", hcnt, lcnt);
+
+ /* Set SCL timing parameters for fast-mode or fast-mode plus. */
+ if ((dev->clk_freq == 1000000) && dev->fp_hcnt && dev->fp_lcnt) {
+ hcnt = dev->fp_hcnt;
+ lcnt = dev->fp_lcnt;
+ } else if (dev->fs_hcnt && dev->fs_lcnt) {
+ hcnt = dev->fs_hcnt;
+ lcnt = dev->fs_lcnt;
+ } else {
+ hcnt = i2c_dw_scl_hcnt(i2c_dw_clk_rate(dev),
+ 600, /* tHD;STA = tHIGH = 0.6 us */
+ sda_falling_time,
+ 0, /* 0: DW default, 1: Ideal */
+ 0); /* No offset */
+ lcnt = i2c_dw_scl_lcnt(i2c_dw_clk_rate(dev),
+ 1300, /* tLOW = 1.3 us */
+ scl_falling_time,
+ 0); /* No offset */
+ }
+ dw_writel(dev, hcnt, DW_IC_FS_SCL_HCNT);
+ dw_writel(dev, lcnt, DW_IC_FS_SCL_LCNT);
+ dev_dbg(dev->dev, "Fast-mode HCNT:LCNT = %d:%d\n", hcnt, lcnt);
+
+ if ((dev->slave_cfg & DW_IC_CON_SPEED_MASK) ==
+ DW_IC_CON_SPEED_HIGH) {
+ if ((comp_param1 & DW_IC_COMP_PARAM_1_SPEED_MODE_MASK)
+ != DW_IC_COMP_PARAM_1_SPEED_MODE_HIGH) {
+ dev_err(dev->dev, "High Speed not supported!\n");
+ dev->slave_cfg &= ~DW_IC_CON_SPEED_MASK;
+ dev->slave_cfg |= DW_IC_CON_SPEED_FAST;
+ } else if (dev->hs_hcnt && dev->hs_lcnt) {
+ hcnt = dev->hs_hcnt;
+ lcnt = dev->hs_lcnt;
+ dw_writel(dev, hcnt, DW_IC_HS_SCL_HCNT);
+ dw_writel(dev, lcnt, DW_IC_HS_SCL_LCNT);
+ dev_dbg(dev->dev, "HighSpeed-mode HCNT:LCNT = %d:%d\n",
+ hcnt, lcnt);
+ }
+ }
+
+ /* Configure SDA Hold Time if required. */
+ reg = dw_readl(dev, DW_IC_COMP_VERSION);
+ if (reg >= DW_IC_SDA_HOLD_MIN_VERS) {
+ if (!dev->sda_hold_time) {
+ /* Keep previous hold time setting if no one set it. */
+ dev->sda_hold_time = dw_readl(dev, DW_IC_SDA_HOLD);
+ }
+ /*
+ * Workaround for avoiding TX arbitration lost in case I2C
+ * slave pulls SDA down "too quickly" after falling egde of
+ * SCL by enabling non-zero SDA RX hold. Specification says it
+ * extends incoming SDA low to high transition while SCL is
+ * high but it apprears to help also above issue.
+ */
+ if (!(dev->sda_hold_time & DW_IC_SDA_HOLD_RX_MASK))
+ dev->sda_hold_time |= 1 << DW_IC_SDA_HOLD_RX_SHIFT;
+ dw_writel(dev, dev->sda_hold_time, DW_IC_SDA_HOLD);
+ } else {
+ dev_warn(dev->dev,
+ "Hardware too old to adjust SDA hold time.\n");
+ }
+
+ i2c_dw_configure_fifo_slave(dev);
+ i2c_dw_release_lock(dev);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(i2c_dw_init_slave);
+
+int i2c_dw_reg_slave(struct i2c_client *slave)
+{
+ struct dw_i2c_dev *dev = i2c_get_adapdata(slave->adapter);
+
+ if (dev->slave)
+ return -EBUSY;
+ if (slave->flags & I2C_CLIENT_TEN)
+ return -EAFNOSUPPORT;
+ /*
+ * Set slave address in the IC_SAR register,
+ * the address to which the DW_apb_i2c responds.
+ */
+
+ __i2c_dw_enable(dev, false);
+ dw_writel(dev, slave->addr, DW_IC_SAR);
+ dev->slave = slave;
+
+ __i2c_dw_enable(dev, true);
+
+ dev->cmd_err = 0;
+ dev->msg_write_idx = 0;
+ dev->msg_read_idx = 0;
+ dev->msg_err = 0;
+ dev->status = STATUS_IDLE;
+ dev->abort_source = 0;
+ dev->rx_outstanding = 0;
+
+ return 0;
+}
+
+static int i2c_dw_unreg_slave(struct i2c_client *slave)
+{
+ struct dw_i2c_dev *dev = i2c_get_adapdata(slave->adapter);
+
+ i2c_dw_disable_int_slave(dev);
+ i2c_dw_disable_slave(dev);
+ dev->slave = NULL;
+
+ return 0;
+}
+
+static u32 i2c_dw_read_clear_intrbits_slave(struct dw_i2c_dev *dev)
+{
+ u32 stat;
+
+ /*
+ * The IC_INTR_STAT register just indicates "enabled" interrupts.
+ * Ths unmasked raw version of interrupt status bits are available
+ * in the IC_RAW_INTR_STAT register.
+ *
+ * That is,
+ * stat = dw_readl(IC_INTR_STAT);
+ * equals to,
+ * stat = dw_readl(IC_RAW_INTR_STAT) & dw_readl(IC_INTR_MASK);
+ *
+ * The raw version might be useful for debugging purposes.
+ */
+ stat = dw_readl(dev, DW_IC_INTR_STAT);
+
+ /*
+ * Do not use the IC_CLR_INTR register to clear interrupts, or
+ * you'll miss some interrupts, triggered during the period from
+ * dw_readl(IC_INTR_STAT) to dw_readl(IC_CLR_INTR).
+ *
+ * Instead, use the separately-prepared IC_CLR_* registers.
+ */
+ if (stat & DW_IC_INTR_TX_ABRT)
+ dw_readl(dev, DW_IC_CLR_TX_ABRT);
+ if (stat & DW_IC_INTR_RX_UNDER)
+ dw_readl(dev, DW_IC_CLR_RX_UNDER);
+ if (stat & DW_IC_INTR_RX_OVER)
+ dw_readl(dev, DW_IC_CLR_RX_OVER);
+ if (stat & DW_IC_INTR_TX_OVER)
+ dw_readl(dev, DW_IC_CLR_TX_OVER);
+ if (stat & DW_IC_INTR_RX_DONE)
+ dw_readl(dev, DW_IC_CLR_RX_DONE);
+ if (stat & DW_IC_INTR_ACTIVITY)
+ dw_readl(dev, DW_IC_CLR_ACTIVITY);
+ if (stat & DW_IC_INTR_STOP_DET)
+ dw_readl(dev, DW_IC_CLR_STOP_DET);
+ if (stat & DW_IC_INTR_START_DET)
+ dw_readl(dev, DW_IC_CLR_START_DET);
+ if (stat & DW_IC_INTR_GEN_CALL)
+ dw_readl(dev, DW_IC_CLR_GEN_CALL);
+
+ return stat;
+}
+
+/*
+ * Interrupt service routine. This gets called whenever an I2C slave interrupt
+ * occurs.
+ */
+
+static int i2c_dw_irq_handler_slave(struct dw_i2c_dev *dev)
+{
+ u32 raw_stat, stat, enabled;
+ u8 val, slave_activity;
+
+ stat = dw_readl(dev, DW_IC_INTR_STAT);
+ enabled = dw_readl(dev, DW_IC_ENABLE);
+ raw_stat = dw_readl(dev, DW_IC_RAW_INTR_STAT);
+ slave_activity = ((dw_readl(dev, DW_IC_STATUS) &
+ DW_IC_STATUS_SLAVE_ACTIVITY) >> 6);
+
+ if (!enabled || !(raw_stat & ~DW_IC_INTR_ACTIVITY))
+ return 0;
+
+ dev_dbg(dev->dev,
+ "%s: %#x SLAVE_ACTV=%#x : RAW_INTR_STAT=%#x : INTR_STAT=%#x\n",
+ __func__, enabled, slave_activity, raw_stat, stat);
+
+ if (stat & DW_IC_INTR_RESTART_DET)
+ dw_readl(dev, DW_IC_CLR_RESTART_DET);
+ if (stat & DW_IC_INTR_START_DET)
+ dw_readl(dev, DW_IC_CLR_START_DET);
+ if (stat & DW_IC_INTR_ACTIVITY)
+ dw_readl(dev, DW_IC_CLR_ACTIVITY);
+ if (stat & DW_IC_INTR_RX_OVER)
+ dw_readl(dev, DW_IC_CLR_RX_OVER);
+ if ((stat & DW_IC_INTR_RX_FULL) && (stat & DW_IC_INTR_STOP_DET))
+ i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_REQUESTED, &val);
+
+ if (slave_activity) {
+ if (stat & DW_IC_INTR_RD_REQ) {
+ if (stat & DW_IC_INTR_RX_FULL) {
+ val = dw_readl(dev, DW_IC_DATA_CMD);
+ if (!i2c_slave_event(dev->slave,
+ I2C_SLAVE_WRITE_RECEIVED, &val)) {
+ dev_dbg(dev->dev, "Byte %X acked!",
+ val);
+ }
+ dw_readl(dev, DW_IC_CLR_RD_REQ);
+ stat = i2c_dw_read_clear_intrbits_slave(dev);
+ } else {
+ dw_readl(dev, DW_IC_CLR_RD_REQ);
+ dw_readl(dev, DW_IC_CLR_RX_UNDER);
+ stat = i2c_dw_read_clear_intrbits_slave(dev);
+ }
+ if (!i2c_slave_event(dev->slave,
+ I2C_SLAVE_READ_REQUESTED, &val))
+ dw_writel(dev, val, DW_IC_DATA_CMD);
+ }
+ }
+
+ if (stat & DW_IC_INTR_RX_DONE) {
+ if (!i2c_slave_event(dev->slave, I2C_SLAVE_READ_PROCESSED,
+ &val))
+ dw_readl(dev, DW_IC_CLR_RX_DONE);
+
+ i2c_slave_event(dev->slave, I2C_SLAVE_STOP, &val);
+ stat = i2c_dw_read_clear_intrbits_slave(dev);
+ return true;
+ }
+
+ if (stat & DW_IC_INTR_RX_FULL) {
+ val = dw_readl(dev, DW_IC_DATA_CMD);
+ if (!i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_RECEIVED,
+ &val))
+ dev_dbg(dev->dev, "Byte %X acked!", val);
+ } else {
+ i2c_slave_event(dev->slave, I2C_SLAVE_STOP, &val);
+ stat = i2c_dw_read_clear_intrbits_slave(dev);
+ }
+
+ if (stat & DW_IC_INTR_TX_OVER)
+ dw_readl(dev, DW_IC_CLR_TX_OVER);
+
+ return 1;
+}
+
+static irqreturn_t i2c_dw_isr_slave(int this_irq, void *dev_id)
+{
+ struct dw_i2c_dev *dev = dev_id;
+ int ret;
+
+ i2c_dw_read_clear_intrbits_slave(dev);
+ ret = i2c_dw_irq_handler_slave(dev);
+
+ if (ret > 0)
+ complete(&dev->cmd_complete);
+
+ return IRQ_RETVAL(ret);
+}
+
+static struct i2c_algorithm i2c_dw_algo = {
+ .functionality = i2c_dw_func,
+ .reg_slave = i2c_dw_reg_slave,
+ .unreg_slave = i2c_dw_unreg_slave,
+};
+
+void i2c_dw_disable_slave(struct dw_i2c_dev *dev)
+{
+ /* Disable controller. */
+ __i2c_dw_enable_and_wait(dev, false);
+
+ /* Disable all interupts. */
+ dw_writel(dev, 0, DW_IC_INTR_MASK);
+ dw_readl(dev, DW_IC_CLR_INTR);
+}
+EXPORT_SYMBOL_GPL(i2c_dw_disable_slave);
+
+void i2c_dw_disable_int_slave(struct dw_i2c_dev *dev)
+{
+ dw_writel(dev, 0, DW_IC_INTR_MASK);
+}
+EXPORT_SYMBOL_GPL(i2c_dw_disable_int_slave);
+
+u32 i2c_dw_read_comp_param_slave(struct dw_i2c_dev *dev)
+{
+ return dw_readl(dev, DW_IC_COMP_PARAM_1);
+}
+EXPORT_SYMBOL_GPL(i2c_dw_read_comp_param_slave);
+
+int i2c_dw_probe_slave(struct dw_i2c_dev *dev)
+{
+ struct i2c_adapter *adap = &dev->adapter;
+ int ret;
+
+ init_completion(&dev->cmd_complete);
+
+ ret = i2c_dw_init_slave(dev);
+ if (ret)
+ return ret;
+
+ ret = i2c_dw_acquire_lock(dev);
+ if (ret)
+ return ret;
+
+ i2c_dw_release_lock(dev);
+ snprintf(adap->name, sizeof(adap->name),
+ "Synopsys DesignWare I2C Slave adapter");
+ adap->retries = 3;
+ adap->algo = &i2c_dw_algo;
+ adap->dev.parent = dev->dev;
+ i2c_set_adapdata(adap, dev);
+
+ ret = devm_request_irq(dev->dev, dev->irq, i2c_dw_isr_slave,
+ IRQF_SHARED, dev_name(dev->dev), dev);
+ if (ret) {
+ dev_err(dev->dev, "failure requesting irq %i: %d\n",
+ dev->irq, ret);
+ return ret;
+ }
+ /*
+ * Increment PM usage count during adapter registration in order to
+ * avoid possible spurious runtime suspend when adapter device is
+ * registered to the device core and immediate resume in case bus has
+ * registered I2C slaves that do I2C transfers in their probe.
+ */
+ pm_runtime_get_noresume(dev->dev);
+ ret = i2c_add_numbered_adapter(adap);
+ if (ret)
+ dev_err(dev->dev, "failure adding adapter: %d\n", ret);
+ pm_runtime_put_noidle(dev->dev);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(i2c_dw_probe_slave);
+
+MODULE_AUTHOR("Luis Oliveira <[email protected]>");
+MODULE_DESCRIPTION("Synopsys DesignWare I2C bus slave adapter");
+MODULE_LICENSE("GPL v2");
--
2.11.0
- The functions related to I2C master mode of operation were transformed
in a single driver.
- Common definitions were moved to i2c-designware-core.h
- The i2c-designware-core is now only a library file, the functions
associated are in a source file called i2c-designware-common and
are used by both i2c-designware-master and i2c-designware-slave.
Almost all of the "core" source is now part of the "master" source. The
difference is the functions used by both modes and they are in the
"common" source file.
Signed-off-by: Luis Oliveira <[email protected]>
---
Changes V4->V5: (ACK by Andy)
- No changes
drivers/i2c/busses/Makefile | 1 +
drivers/i2c/busses/i2c-designware-common.c | 253 +++++++++++++++
drivers/i2c/busses/i2c-designware-core.h | 131 ++++++++
...c-designware-core.c => i2c-designware-master.c} | 352 +--------------------
4 files changed, 394 insertions(+), 343 deletions(-)
create mode 100644 drivers/i2c/busses/i2c-designware-common.c
rename drivers/i2c/busses/{i2c-designware-core.c => i2c-designware-master.c} (66%)
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 1c1bac87a9db..4f8f6a2b9346 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -40,6 +40,7 @@ obj-$(CONFIG_I2C_CBUS_GPIO) += i2c-cbus-gpio.o
obj-$(CONFIG_I2C_CPM) += i2c-cpm.o
obj-$(CONFIG_I2C_DAVINCI) += i2c-davinci.o
obj-$(CONFIG_I2C_DESIGNWARE_CORE) += i2c-designware-core.o
+i2c-designware-core-objs := i2c-designware-common.o i2c-designware-master.o
obj-$(CONFIG_I2C_DESIGNWARE_PLATFORM) += i2c-designware-platform.o
i2c-designware-platform-objs := i2c-designware-platdrv.o
i2c-designware-platform-$(CONFIG_I2C_DESIGNWARE_BAYTRAIL) += i2c-designware-baytrail.o
diff --git a/drivers/i2c/busses/i2c-designware-common.c b/drivers/i2c/busses/i2c-designware-common.c
new file mode 100644
index 000000000000..012b8f9dec15
--- /dev/null
+++ b/drivers/i2c/busses/i2c-designware-common.c
@@ -0,0 +1,253 @@
+/*
+ * Synopsys DesignWare I2C adapter driver.
+ *
+ * Based on the TI DAVINCI I2C adapter driver.
+ *
+ * Copyright (C) 2006 Texas Instruments.
+ * Copyright (C) 2007 MontaVista Software Inc.
+ * Copyright (C) 2009 Provigent Ltd.
+ *
+ * ----------------------------------------------------------------------------
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ * ----------------------------------------------------------------------------
+ *
+ */
+#include <linux/export.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/pm_runtime.h>
+#include <linux/delay.h>
+#include <linux/module.h>
+#include "i2c-designware-core.h"
+
+static char *abort_sources[] = {
+ [ABRT_7B_ADDR_NOACK] =
+ "slave address not acknowledged (7bit mode)",
+ [ABRT_10ADDR1_NOACK] =
+ "first address byte not acknowledged (10bit mode)",
+ [ABRT_10ADDR2_NOACK] =
+ "second address byte not acknowledged (10bit mode)",
+ [ABRT_TXDATA_NOACK] =
+ "data not acknowledged",
+ [ABRT_GCALL_NOACK] =
+ "no acknowledgement for a general call",
+ [ABRT_GCALL_READ] =
+ "read after general call",
+ [ABRT_SBYTE_ACKDET] =
+ "start byte acknowledged",
+ [ABRT_SBYTE_NORSTRT] =
+ "trying to send start byte when restart is disabled",
+ [ABRT_10B_RD_NORSTRT] =
+ "trying to read when restart is disabled (10bit mode)",
+ [ABRT_MASTER_DIS] =
+ "trying to use disabled adapter",
+ [ARB_LOST] =
+ "lost arbitration",
+};
+
+u32 dw_readl(struct dw_i2c_dev *dev, int offset)
+{
+ u32 value;
+
+ if (dev->accessor_flags & ACCESS_16BIT)
+ value = readw_relaxed(dev->base + offset) |
+ (readw_relaxed(dev->base + offset + 2) << 16);
+ else
+ value = readl_relaxed(dev->base + offset);
+
+ if (dev->accessor_flags & ACCESS_SWAP)
+ return swab32(value);
+ else
+ return value;
+}
+
+void dw_writel(struct dw_i2c_dev *dev, u32 b, int offset)
+{
+ if (dev->accessor_flags & ACCESS_SWAP)
+ b = swab32(b);
+
+ if (dev->accessor_flags & ACCESS_16BIT) {
+ writew_relaxed((u16)b, dev->base + offset);
+ writew_relaxed((u16)(b >> 16), dev->base + offset + 2);
+ } else {
+ writel_relaxed(b, dev->base + offset);
+ }
+}
+
+u32 i2c_dw_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf, int cond, int offset)
+{
+ /*
+ * DesignWare I2C core doesn't seem to have solid strategy to meet
+ * the tHD;STA timing spec. Configuring _HCNT based on tHIGH spec
+ * will result in violation of the tHD;STA spec.
+ */
+ if (cond)
+ /*
+ * Conditional expression:
+ *
+ * IC_[FS]S_SCL_HCNT + (1+4+3) >= IC_CLK * tHIGH
+ *
+ * This is based on the DW manuals, and represents an ideal
+ * configuration. The resulting I2C bus speed will be
+ * faster than any of the others.
+ *
+ * If your hardware is free from tHD;STA issue, try this one.
+ */
+ return (ic_clk * tSYMBOL + 500000) / 1000000 - 8 + offset;
+ else
+ /*
+ * Conditional expression:
+ *
+ * IC_[FS]S_SCL_HCNT + 3 >= IC_CLK * (tHD;STA + tf)
+ *
+ * This is just experimental rule; the tHD;STA period turned
+ * out to be proportinal to (_HCNT + 3). With this setting,
+ * we could meet both tHIGH and tHD;STA timing specs.
+ *
+ * If unsure, you'd better to take this alternative.
+ *
+ * The reason why we need to take into account "tf" here,
+ * is the same as described in i2c_dw_scl_lcnt().
+ */
+ return (ic_clk * (tSYMBOL + tf) + 500000) / 1000000
+ - 3 + offset;
+}
+
+u32 i2c_dw_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf, int offset)
+{
+ /*
+ * Conditional expression:
+ *
+ * IC_[FS]S_SCL_LCNT + 1 >= IC_CLK * (tLOW + tf)
+ *
+ * DW I2C core starts counting the SCL CNTs for the LOW period
+ * of the SCL clock (tLOW) as soon as it pulls the SCL line.
+ * In order to meet the tLOW timing spec, we need to take into
+ * account the fall time of SCL signal (tf). Default tf value
+ * should be 0.3 us, for safety.
+ */
+ return ((ic_clk * (tLOW + tf) + 500000) / 1000000) - 1 + offset;
+}
+
+void __i2c_dw_enable(struct dw_i2c_dev *dev, bool enable)
+{
+ dw_writel(dev, enable, DW_IC_ENABLE);
+}
+
+void __i2c_dw_enable_and_wait(struct dw_i2c_dev *dev, bool enable)
+{
+ int timeout = 100;
+
+ do {
+ __i2c_dw_enable(dev, enable);
+ if ((dw_readl(dev, DW_IC_ENABLE_STATUS) & 1) == enable)
+ return;
+
+ /*
+ * Wait 10 times the signaling period of the highest I2C
+ * transfer supported by the driver (for 400KHz this is
+ * 25us) as described in the DesignWare I2C databook.
+ */
+ usleep_range(25, 250);
+ } while (timeout--);
+
+ dev_warn(dev->dev, "timeout in %sabling adapter\n",
+ enable ? "en" : "dis");
+}
+
+unsigned long i2c_dw_clk_rate(struct dw_i2c_dev *dev)
+{
+ /*
+ * Clock is not necessary if we got LCNT/HCNT values directly from
+ * the platform code.
+ */
+ if (WARN_ON_ONCE(!dev->get_clk_rate_khz))
+ return 0;
+ return dev->get_clk_rate_khz(dev);
+}
+
+int i2c_dw_acquire_lock(struct dw_i2c_dev *dev)
+{
+ int ret;
+
+ if (!dev->acquire_lock)
+ return 0;
+
+ ret = dev->acquire_lock(dev);
+ if (!ret)
+ return 0;
+
+ dev_err(dev->dev, "couldn't acquire bus ownership\n");
+
+ return ret;
+}
+
+void i2c_dw_release_lock(struct dw_i2c_dev *dev)
+{
+ if (dev->release_lock)
+ dev->release_lock(dev);
+}
+
+/*
+ * Waiting for bus not busy
+ */
+int i2c_dw_wait_bus_not_busy(struct dw_i2c_dev *dev)
+{
+ int timeout = TIMEOUT;
+
+ while (dw_readl(dev, DW_IC_STATUS) & DW_IC_STATUS_ACTIVITY) {
+ if (timeout <= 0) {
+ dev_warn(dev->dev, "timeout waiting for bus ready\n");
+ return -ETIMEDOUT;
+ }
+ timeout--;
+ usleep_range(1000, 1100);
+ }
+
+ return 0;
+}
+
+int i2c_dw_handle_tx_abort(struct dw_i2c_dev *dev)
+{
+ unsigned long abort_source = dev->abort_source;
+ int i;
+
+ if (abort_source & DW_IC_TX_ABRT_NOACK) {
+ for_each_set_bit(i, &abort_source, ARRAY_SIZE(abort_sources))
+ dev_dbg(dev->dev,
+ "%s: %s\n", __func__, abort_sources[i]);
+ return -EREMOTEIO;
+ }
+
+ for_each_set_bit(i, &abort_source, ARRAY_SIZE(abort_sources))
+ dev_err(dev->dev, "%s: %s\n", __func__, abort_sources[i]);
+
+ if (abort_source & DW_IC_TX_ARB_LOST)
+ return -EAGAIN;
+ else if (abort_source & DW_IC_TX_ABRT_GCALL_READ)
+ return -EINVAL; /* wrong msgs[] data */
+ else
+ return -EIO;
+}
+
+u32 i2c_dw_func(struct i2c_adapter *adap)
+{
+ struct dw_i2c_dev *dev = i2c_get_adapdata(adap);
+
+ return dev->functionality;
+}
+
+MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter core");
+MODULE_LICENSE("GPL");
diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h
index 26250b425e2f..8bba7a37c3ce 100644
--- a/drivers/i2c/busses/i2c-designware-core.h
+++ b/drivers/i2c/busses/i2c-designware-core.h
@@ -40,6 +40,124 @@
#define DW_IC_CON_RESTART_EN 0x20
#define DW_IC_CON_SLAVE_DISABLE 0x40
+/*
+ * Registers offset
+ */
+#define DW_IC_CON 0x0
+#define DW_IC_TAR 0x4
+#define DW_IC_DATA_CMD 0x10
+#define DW_IC_SS_SCL_HCNT 0x14
+#define DW_IC_SS_SCL_LCNT 0x18
+#define DW_IC_FS_SCL_HCNT 0x1c
+#define DW_IC_FS_SCL_LCNT 0x20
+#define DW_IC_HS_SCL_HCNT 0x24
+#define DW_IC_HS_SCL_LCNT 0x28
+#define DW_IC_INTR_STAT 0x2c
+#define DW_IC_INTR_MASK 0x30
+#define DW_IC_RAW_INTR_STAT 0x34
+#define DW_IC_RX_TL 0x38
+#define DW_IC_TX_TL 0x3c
+#define DW_IC_CLR_INTR 0x40
+#define DW_IC_CLR_RX_UNDER 0x44
+#define DW_IC_CLR_RX_OVER 0x48
+#define DW_IC_CLR_TX_OVER 0x4c
+#define DW_IC_CLR_RD_REQ 0x50
+#define DW_IC_CLR_TX_ABRT 0x54
+#define DW_IC_CLR_RX_DONE 0x58
+#define DW_IC_CLR_ACTIVITY 0x5c
+#define DW_IC_CLR_STOP_DET 0x60
+#define DW_IC_CLR_START_DET 0x64
+#define DW_IC_CLR_GEN_CALL 0x68
+#define DW_IC_ENABLE 0x6c
+#define DW_IC_STATUS 0x70
+#define DW_IC_TXFLR 0x74
+#define DW_IC_RXFLR 0x78
+#define DW_IC_SDA_HOLD 0x7c
+#define DW_IC_TX_ABRT_SOURCE 0x80
+#define DW_IC_ENABLE_STATUS 0x9c
+#define DW_IC_COMP_PARAM_1 0xf4
+#define DW_IC_COMP_VERSION 0xf8
+#define DW_IC_SDA_HOLD_MIN_VERS 0x3131312A
+#define DW_IC_COMP_TYPE 0xfc
+#define DW_IC_COMP_TYPE_VALUE 0x44570140
+
+#define DW_IC_INTR_RX_UNDER 0x001
+#define DW_IC_INTR_RX_OVER 0x002
+#define DW_IC_INTR_RX_FULL 0x004
+#define DW_IC_INTR_TX_OVER 0x008
+#define DW_IC_INTR_TX_EMPTY 0x010
+#define DW_IC_INTR_RD_REQ 0x020
+#define DW_IC_INTR_TX_ABRT 0x040
+#define DW_IC_INTR_RX_DONE 0x080
+#define DW_IC_INTR_ACTIVITY 0x100
+#define DW_IC_INTR_STOP_DET 0x200
+#define DW_IC_INTR_START_DET 0x400
+#define DW_IC_INTR_GEN_CALL 0x800
+
+#define DW_IC_INTR_DEFAULT_MASK (DW_IC_INTR_RX_FULL | \
+ DW_IC_INTR_TX_ABRT | \
+ DW_IC_INTR_STOP_DET)
+#define DW_IC_INTR_MASTER_MASK (DW_IC_INTR_DEFAULT_MASK | \
+ DW_IC_INTR_TX_EMPTY)
+#define DW_IC_STATUS_ACTIVITY 0x1
+#define DW_IC_STATUS_TFE BIT(2)
+#define DW_IC_STATUS_MASTER_ACTIVITY BIT(5)
+
+#define DW_IC_SDA_HOLD_RX_SHIFT 16
+#define DW_IC_SDA_HOLD_RX_MASK GENMASK(23, DW_IC_SDA_HOLD_RX_SHIFT)
+
+#define DW_IC_ERR_TX_ABRT 0x1
+
+#define DW_IC_TAR_10BITADDR_MASTER BIT(12)
+
+#define DW_IC_COMP_PARAM_1_SPEED_MODE_HIGH (BIT(2) | BIT(3))
+#define DW_IC_COMP_PARAM_1_SPEED_MODE_MASK GENMASK(3, 2)
+
+/*
+ * status codes
+ */
+#define STATUS_IDLE 0x0
+#define STATUS_WRITE_IN_PROGRESS 0x1
+#define STATUS_READ_IN_PROGRESS 0x2
+
+#define TIMEOUT 20 /* ms */
+
+/*
+ * hardware abort codes from the DW_IC_TX_ABRT_SOURCE register
+ *
+ * only expected abort codes are listed here
+ * refer to the datasheet for the full list
+ */
+#define ABRT_7B_ADDR_NOACK 0
+#define ABRT_10ADDR1_NOACK 1
+#define ABRT_10ADDR2_NOACK 2
+#define ABRT_TXDATA_NOACK 3
+#define ABRT_GCALL_NOACK 4
+#define ABRT_GCALL_READ 5
+#define ABRT_SBYTE_ACKDET 7
+#define ABRT_SBYTE_NORSTRT 9
+#define ABRT_10B_RD_NORSTRT 10
+#define ABRT_MASTER_DIS 11
+#define ARB_LOST 12
+
+#define DW_IC_TX_ABRT_7B_ADDR_NOACK (1UL << ABRT_7B_ADDR_NOACK)
+#define DW_IC_TX_ABRT_10ADDR1_NOACK (1UL << ABRT_10ADDR1_NOACK)
+#define DW_IC_TX_ABRT_10ADDR2_NOACK (1UL << ABRT_10ADDR2_NOACK)
+#define DW_IC_TX_ABRT_TXDATA_NOACK (1UL << ABRT_TXDATA_NOACK)
+#define DW_IC_TX_ABRT_GCALL_NOACK (1UL << ABRT_GCALL_NOACK)
+#define DW_IC_TX_ABRT_GCALL_READ (1UL << ABRT_GCALL_READ)
+#define DW_IC_TX_ABRT_SBYTE_ACKDET (1UL << ABRT_SBYTE_ACKDET)
+#define DW_IC_TX_ABRT_SBYTE_NORSTRT (1UL << ABRT_SBYTE_NORSTRT)
+#define DW_IC_TX_ABRT_10B_RD_NORSTRT (1UL << ABRT_10B_RD_NORSTRT)
+#define DW_IC_TX_ABRT_MASTER_DIS (1UL << ABRT_MASTER_DIS)
+#define DW_IC_TX_ARB_LOST (1UL << ARB_LOST)
+
+#define DW_IC_TX_ABRT_NOACK (DW_IC_TX_ABRT_7B_ADDR_NOACK | \
+ DW_IC_TX_ABRT_10ADDR1_NOACK | \
+ DW_IC_TX_ABRT_10ADDR2_NOACK | \
+ DW_IC_TX_ABRT_TXDATA_NOACK | \
+ DW_IC_TX_ABRT_GCALL_NOACK)
+
/**
* struct dw_i2c_dev - private i2c-designware data
@@ -132,6 +250,19 @@ struct dw_i2c_dev {
#define ACCESS_16BIT 0x00000002
#define ACCESS_INTR_MASK 0x00000004
+u32 dw_readl(struct dw_i2c_dev *dev, int offset);
+void dw_writel(struct dw_i2c_dev *dev, u32 b, int offset);
+u32 i2c_dw_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf, int cond, int offset);
+u32 i2c_dw_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf, int offset);
+void __i2c_dw_enable(struct dw_i2c_dev *dev, bool enable);
+void __i2c_dw_enable_and_wait(struct dw_i2c_dev *dev, bool enable);
+unsigned long i2c_dw_clk_rate(struct dw_i2c_dev *dev);
+int i2c_dw_acquire_lock(struct dw_i2c_dev *dev);
+void i2c_dw_release_lock(struct dw_i2c_dev *dev);
+int i2c_dw_wait_bus_not_busy(struct dw_i2c_dev *dev);
+int i2c_dw_handle_tx_abort(struct dw_i2c_dev *dev);
+u32 i2c_dw_func(struct i2c_adapter *adap);
+
extern int i2c_dw_init(struct dw_i2c_dev *dev);
extern void i2c_dw_disable(struct dw_i2c_dev *dev);
extern void i2c_dw_disable_int(struct dw_i2c_dev *dev);
diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-master.c
similarity index 66%
rename from drivers/i2c/busses/i2c-designware-core.c
rename to drivers/i2c/busses/i2c-designware-master.c
index 951ababbd9a3..b55a7f4c5149 100644
--- a/drivers/i2c/busses/i2c-designware-core.c
+++ b/drivers/i2c/busses/i2c-designware-master.c
@@ -32,177 +32,6 @@
#include <linux/pm_runtime.h>
#include "i2c-designware-core.h"
-/*
- * Registers offset
- */
-#define DW_IC_CON 0x0
-#define DW_IC_TAR 0x4
-#define DW_IC_DATA_CMD 0x10
-#define DW_IC_SS_SCL_HCNT 0x14
-#define DW_IC_SS_SCL_LCNT 0x18
-#define DW_IC_FS_SCL_HCNT 0x1c
-#define DW_IC_FS_SCL_LCNT 0x20
-#define DW_IC_HS_SCL_HCNT 0x24
-#define DW_IC_HS_SCL_LCNT 0x28
-#define DW_IC_INTR_STAT 0x2c
-#define DW_IC_INTR_MASK 0x30
-#define DW_IC_RAW_INTR_STAT 0x34
-#define DW_IC_RX_TL 0x38
-#define DW_IC_TX_TL 0x3c
-#define DW_IC_CLR_INTR 0x40
-#define DW_IC_CLR_RX_UNDER 0x44
-#define DW_IC_CLR_RX_OVER 0x48
-#define DW_IC_CLR_TX_OVER 0x4c
-#define DW_IC_CLR_RD_REQ 0x50
-#define DW_IC_CLR_TX_ABRT 0x54
-#define DW_IC_CLR_RX_DONE 0x58
-#define DW_IC_CLR_ACTIVITY 0x5c
-#define DW_IC_CLR_STOP_DET 0x60
-#define DW_IC_CLR_START_DET 0x64
-#define DW_IC_CLR_GEN_CALL 0x68
-#define DW_IC_ENABLE 0x6c
-#define DW_IC_STATUS 0x70
-#define DW_IC_TXFLR 0x74
-#define DW_IC_RXFLR 0x78
-#define DW_IC_SDA_HOLD 0x7c
-#define DW_IC_TX_ABRT_SOURCE 0x80
-#define DW_IC_ENABLE_STATUS 0x9c
-#define DW_IC_COMP_PARAM_1 0xf4
-#define DW_IC_COMP_VERSION 0xf8
-#define DW_IC_SDA_HOLD_MIN_VERS 0x3131312A
-#define DW_IC_COMP_TYPE 0xfc
-#define DW_IC_COMP_TYPE_VALUE 0x44570140
-
-#define DW_IC_INTR_RX_UNDER 0x001
-#define DW_IC_INTR_RX_OVER 0x002
-#define DW_IC_INTR_RX_FULL 0x004
-#define DW_IC_INTR_TX_OVER 0x008
-#define DW_IC_INTR_TX_EMPTY 0x010
-#define DW_IC_INTR_RD_REQ 0x020
-#define DW_IC_INTR_TX_ABRT 0x040
-#define DW_IC_INTR_RX_DONE 0x080
-#define DW_IC_INTR_ACTIVITY 0x100
-#define DW_IC_INTR_STOP_DET 0x200
-#define DW_IC_INTR_START_DET 0x400
-#define DW_IC_INTR_GEN_CALL 0x800
-
-#define DW_IC_INTR_DEFAULT_MASK (DW_IC_INTR_RX_FULL | \
- DW_IC_INTR_TX_ABRT | \
- DW_IC_INTR_STOP_DET)
-
-#define DW_IC_INTR_MASTER_MASK (DW_IC_INTR_DEFAULT_MASK | \
- DW_IC_INTR_TX_EMPTY)
-
-#define DW_IC_STATUS_ACTIVITY 0x1
-
-#define DW_IC_SDA_HOLD_RX_SHIFT 16
-#define DW_IC_SDA_HOLD_RX_MASK GENMASK(23, DW_IC_SDA_HOLD_RX_SHIFT)
-
-#define DW_IC_ERR_TX_ABRT 0x1
-
-#define DW_IC_TAR_10BITADDR_MASTER BIT(12)
-
-#define DW_IC_COMP_PARAM_1_SPEED_MODE_HIGH (BIT(2) | BIT(3))
-#define DW_IC_COMP_PARAM_1_SPEED_MODE_MASK GENMASK(3, 2)
-
-/*
- * status codes
- */
-#define STATUS_IDLE 0x0
-#define STATUS_WRITE_IN_PROGRESS 0x1
-#define STATUS_READ_IN_PROGRESS 0x2
-
-#define TIMEOUT 20 /* ms */
-
-/*
- * Hardware abort codes from the DW_IC_TX_ABRT_SOURCE register
- *
- * Only expected abort codes are listed here,
- * refer to the datasheet for the full list.
- */
-#define ABRT_7B_ADDR_NOACK 0
-#define ABRT_10ADDR1_NOACK 1
-#define ABRT_10ADDR2_NOACK 2
-#define ABRT_TXDATA_NOACK 3
-#define ABRT_GCALL_NOACK 4
-#define ABRT_GCALL_READ 5
-#define ABRT_SBYTE_ACKDET 7
-#define ABRT_SBYTE_NORSTRT 9
-#define ABRT_10B_RD_NORSTRT 10
-#define ABRT_MASTER_DIS 11
-#define ARB_LOST 12
-
-#define DW_IC_TX_ABRT_7B_ADDR_NOACK (1UL << ABRT_7B_ADDR_NOACK)
-#define DW_IC_TX_ABRT_10ADDR1_NOACK (1UL << ABRT_10ADDR1_NOACK)
-#define DW_IC_TX_ABRT_10ADDR2_NOACK (1UL << ABRT_10ADDR2_NOACK)
-#define DW_IC_TX_ABRT_TXDATA_NOACK (1UL << ABRT_TXDATA_NOACK)
-#define DW_IC_TX_ABRT_GCALL_NOACK (1UL << ABRT_GCALL_NOACK)
-#define DW_IC_TX_ABRT_GCALL_READ (1UL << ABRT_GCALL_READ)
-#define DW_IC_TX_ABRT_SBYTE_ACKDET (1UL << ABRT_SBYTE_ACKDET)
-#define DW_IC_TX_ABRT_SBYTE_NORSTRT (1UL << ABRT_SBYTE_NORSTRT)
-#define DW_IC_TX_ABRT_10B_RD_NORSTRT (1UL << ABRT_10B_RD_NORSTRT)
-#define DW_IC_TX_ABRT_MASTER_DIS (1UL << ABRT_MASTER_DIS)
-#define DW_IC_TX_ARB_LOST (1UL << ARB_LOST)
-
-#define DW_IC_TX_ABRT_NOACK (DW_IC_TX_ABRT_7B_ADDR_NOACK | \
- DW_IC_TX_ABRT_10ADDR1_NOACK | \
- DW_IC_TX_ABRT_10ADDR2_NOACK | \
- DW_IC_TX_ABRT_TXDATA_NOACK | \
- DW_IC_TX_ABRT_GCALL_NOACK)
-
-static char *abort_sources[] = {
- [ABRT_7B_ADDR_NOACK] =
- "slave address not acknowledged (7bit mode)",
- [ABRT_10ADDR1_NOACK] =
- "first address byte not acknowledged (10bit mode)",
- [ABRT_10ADDR2_NOACK] =
- "second address byte not acknowledged (10bit mode)",
- [ABRT_TXDATA_NOACK] =
- "data not acknowledged",
- [ABRT_GCALL_NOACK] =
- "no acknowledgement for a general call",
- [ABRT_GCALL_READ] =
- "read after general call",
- [ABRT_SBYTE_ACKDET] =
- "start byte acknowledged",
- [ABRT_SBYTE_NORSTRT] =
- "trying to send start byte when restart is disabled",
- [ABRT_10B_RD_NORSTRT] =
- "trying to read when restart is disabled (10bit mode)",
- [ABRT_MASTER_DIS] =
- "trying to use disabled adapter",
- [ARB_LOST] =
- "lost arbitration",
-};
-
-static u32 dw_readl(struct dw_i2c_dev *dev, int offset)
-{
- u32 value;
-
- if (dev->accessor_flags & ACCESS_16BIT)
- value = readw_relaxed(dev->base + offset) |
- (readw_relaxed(dev->base + offset + 2) << 16);
- else
- value = readl_relaxed(dev->base + offset);
-
- if (dev->accessor_flags & ACCESS_SWAP)
- return swab32(value);
- else
- return value;
-}
-
-static void dw_writel(struct dw_i2c_dev *dev, u32 b, int offset)
-{
- if (dev->accessor_flags & ACCESS_SWAP)
- b = swab32(b);
-
- if (dev->accessor_flags & ACCESS_16BIT) {
- writew_relaxed((u16)b, dev->base + offset);
- writew_relaxed((u16)(b >> 16), dev->base + offset + 2);
- } else {
- writel_relaxed(b, dev->base + offset);
- }
-}
static void i2c_dw_configure_fifo_master(struct dw_i2c_dev *dev)
{
@@ -210,127 +39,12 @@ static void i2c_dw_configure_fifo_master(struct dw_i2c_dev *dev)
dw_writel(dev, dev->tx_fifo_depth / 2, DW_IC_TX_TL);
dw_writel(dev, 0, DW_IC_RX_TL);
- /* configure the i2c master */
+ /* configure the I2C master */
dw_writel(dev, dev->master_cfg, DW_IC_CON);
}
-static u32
-i2c_dw_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf, int cond, int offset)
-{
- /*
- * DesignWare I2C core doesn't seem to have solid strategy to meet
- * the tHD;STA timing spec. Configuring _HCNT based on tHIGH spec
- * will result in violation of the tHD;STA spec.
- */
- if (cond)
- /*
- * Conditional expression:
- *
- * IC_[FS]S_SCL_HCNT + (1+4+3) >= IC_CLK * tHIGH
- *
- * This is based on the DW manuals, and represents an ideal
- * configuration. The resulting I2C bus speed will be
- * faster than any of the others.
- *
- * If your hardware is free from tHD;STA issue, try this one.
- */
- return (ic_clk * tSYMBOL + 500000) / 1000000 - 8 + offset;
- else
- /*
- * Conditional expression:
- *
- * IC_[FS]S_SCL_HCNT + 3 >= IC_CLK * (tHD;STA + tf)
- *
- * This is just experimental rule; the tHD;STA period turned
- * out to be proportinal to (_HCNT + 3). With this setting,
- * we could meet both tHIGH and tHD;STA timing specs.
- *
- * If unsure, you'd better to take this alternative.
- *
- * The reason why we need to take into account "tf" here,
- * is the same as described in i2c_dw_scl_lcnt().
- */
- return (ic_clk * (tSYMBOL + tf) + 500000) / 1000000
- - 3 + offset;
-}
-
-static u32 i2c_dw_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf, int offset)
-{
- /*
- * Conditional expression:
- *
- * IC_[FS]S_SCL_LCNT + 1 >= IC_CLK * (tLOW + tf)
- *
- * DW I2C core starts counting the SCL CNTs for the LOW period
- * of the SCL clock (tLOW) as soon as it pulls the SCL line.
- * In order to meet the tLOW timing spec, we need to take into
- * account the fall time of SCL signal (tf). Default tf value
- * should be 0.3 us, for safety.
- */
- return ((ic_clk * (tLOW + tf) + 500000) / 1000000) - 1 + offset;
-}
-
-static void __i2c_dw_enable(struct dw_i2c_dev *dev, bool enable)
-{
- dw_writel(dev, enable, DW_IC_ENABLE);
-}
-
-static void __i2c_dw_enable_and_wait(struct dw_i2c_dev *dev, bool enable)
-{
- int timeout = 100;
-
- do {
- __i2c_dw_enable(dev, enable);
- if ((dw_readl(dev, DW_IC_ENABLE_STATUS) & 1) == enable)
- return;
-
- /*
- * Wait 10 times the signaling period of the highest I2C
- * transfer supported by the driver (for 400KHz this is
- * 25us) as described in the DesignWare I2C databook.
- */
- usleep_range(25, 250);
- } while (timeout--);
-
- dev_warn(dev->dev, "timeout in %sabling adapter\n",
- enable ? "en" : "dis");
-}
-
-static unsigned long i2c_dw_clk_rate(struct dw_i2c_dev *dev)
-{
- /*
- * Clock is not necessary if we got LCNT/HCNT values directly from
- * the platform code.
- */
- if (WARN_ON_ONCE(!dev->get_clk_rate_khz))
- return 0;
- return dev->get_clk_rate_khz(dev);
-}
-
-static int i2c_dw_acquire_lock(struct dw_i2c_dev *dev)
-{
- int ret;
-
- if (!dev->acquire_lock)
- return 0;
-
- ret = dev->acquire_lock(dev);
- if (!ret)
- return 0;
-
- dev_err(dev->dev, "couldn't acquire bus ownership\n");
-
- return ret;
-}
-
-static void i2c_dw_release_lock(struct dw_i2c_dev *dev)
-{
- if (dev->release_lock)
- dev->release_lock(dev);
-}
-
/**
- * i2c_dw_init() - initialize the designware i2c hardware
+ * i2c_dw_init() - Initialize the designware I2C master hardware
* @dev: device private data
*
* This functions configures and enables the I2C.
@@ -460,25 +174,6 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
}
EXPORT_SYMBOL_GPL(i2c_dw_init);
-/*
- * Waiting for bus not busy
- */
-static int i2c_dw_wait_bus_not_busy(struct dw_i2c_dev *dev)
-{
- int timeout = TIMEOUT;
-
- while (dw_readl(dev, DW_IC_STATUS) & DW_IC_STATUS_ACTIVITY) {
- if (timeout <= 0) {
- dev_warn(dev->dev, "timeout waiting for bus ready\n");
- return -ETIMEDOUT;
- }
- timeout--;
- usleep_range(1000, 1100);
- }
-
- return 0;
-}
-
static void i2c_dw_xfer_init(struct dw_i2c_dev *dev)
{
struct i2c_msg *msgs = dev->msgs;
@@ -548,7 +243,7 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev)
/*
* If target address has changed, we need to
* reprogram the target address in the i2c
- * adapter when we are done with this transfer
+ * adapter when we are done with this transfer.
*/
if (msgs[dev->msg_write_idx].addr != addr) {
dev_err(dev->dev,
@@ -713,29 +408,6 @@ i2c_dw_read(struct dw_i2c_dev *dev)
}
}
-static int i2c_dw_handle_tx_abort(struct dw_i2c_dev *dev)
-{
- unsigned long abort_source = dev->abort_source;
- int i;
-
- if (abort_source & DW_IC_TX_ABRT_NOACK) {
- for_each_set_bit(i, &abort_source, ARRAY_SIZE(abort_sources))
- dev_dbg(dev->dev,
- "%s: %s\n", __func__, abort_sources[i]);
- return -EREMOTEIO;
- }
-
- for_each_set_bit(i, &abort_source, ARRAY_SIZE(abort_sources))
- dev_err(dev->dev, "%s: %s\n", __func__, abort_sources[i]);
-
- if (abort_source & DW_IC_TX_ARB_LOST)
- return -EAGAIN;
- else if (abort_source & DW_IC_TX_ABRT_GCALL_READ)
- return -EINVAL; /* wrong msgs[] data */
- else
- return -EIO;
-}
-
/*
* Prepare controller for a transaction and call i2c_dw_xfer_msg
*/
@@ -823,15 +495,9 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
return ret;
}
-static u32 i2c_dw_func(struct i2c_adapter *adap)
-{
- struct dw_i2c_dev *dev = i2c_get_adapdata(adap);
- return dev->functionality;
-}
-
static struct i2c_algorithm i2c_dw_algo = {
- .master_xfer = i2c_dw_xfer,
- .functionality = i2c_dw_func,
+ .master_xfer = i2c_dw_xfer,
+ .functionality = i2c_dw_func,
};
static u32 i2c_dw_read_clear_intrbits(struct dw_i2c_dev *dev)
@@ -890,10 +556,10 @@ static u32 i2c_dw_read_clear_intrbits(struct dw_i2c_dev *dev)
}
/*
- * Interrupt service routine. This gets called whenever an I2C interrupt
+ * Interrupt service routine. This gets called whenever an I2C master interrupt
* occurs.
*/
-int i2c_dw_irq_handler_master(struct dw_i2c_dev *dev)
+static int i2c_dw_irq_handler_master(struct dw_i2c_dev *dev)
{
u32 stat;
@@ -994,7 +660,7 @@ int i2c_dw_probe(struct dw_i2c_dev *dev)
/*
* Test if dynamic TAR update is enabled in this controller by writing
* to IC_10BITADDR_MASTER field in IC_CON: when it is enabled this
- * field is read-only so it should not succeed
+ * field is read-only so it should not succeed.
*/
reg = dw_readl(dev, DW_IC_CON);
dw_writel(dev, reg ^ DW_IC_CON_10BITADDR_MASTER, DW_IC_CON);
@@ -1040,5 +706,5 @@ int i2c_dw_probe(struct dw_i2c_dev *dev)
}
EXPORT_SYMBOL_GPL(i2c_dw_probe);
-MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter core");
+MODULE_DESCRIPTION("Synopsys DesignWare I2C bus master adapter");
MODULE_LICENSE("GPL");
--
2.11.0
- Slave mode selected in platform module (devicetree support only)
- Check for ACPI - not supported in SLAVE mode:
- Changed the ifndef style to the use of ACPI_HANDLE that returns NULL
if the device was not enumerated from ACPI namespace.
Signed-off-by: Luis Oliveira <[email protected]>
---
Changes V4->V5: (Andy Shevchenko, Rob Herring, Mark Rutland)
- This is the patch that actually enable SLAVE mode in the platform
module by probing the DT nodes (Rob suggestion).
- Changed my device tree. Now I'm using: <reg | I2C_OWN_SLAVE_ADDRESS>
to identify a Slave.
- I have a new way of checking if ACPI is not enabled using the
ACPI_HANDLE and not ifdef.
drivers/i2c/busses/i2c-designware-platdrv.c | 70 +++++++++++++++++++++++++----
1 file changed, 62 insertions(+), 8 deletions(-)
diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
index 5cf4df63dbe8..ef75031f8a62 100644
--- a/drivers/i2c/busses/i2c-designware-platdrv.c
+++ b/drivers/i2c/busses/i2c-designware-platdrv.c
@@ -21,6 +21,7 @@
* ----------------------------------------------------------------------------
*
*/
+#include <dt-bindings/i2c/i2c.h>
#include <linux/acpi.h>
#include <linux/clk-provider.h>
#include <linux/clk.h>
@@ -143,11 +144,15 @@ static void i2c_dw_configure_master(struct platform_device *pdev)
{
struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
+ dev->functionality = I2C_FUNC_10BIT_ADDR | DW_IC_DEFAULT_FUNCTIONALITY;
+
dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
DW_IC_CON_RESTART_EN;
dev_dbg(&pdev->dev, "I am registed as a I2C Master!\n");
+ dev->mode = DW_IC_MASTER;
+
switch (dev->clk_freq) {
case 100000:
dev->master_cfg |= DW_IC_CON_SPEED_STD;
@@ -160,6 +165,32 @@ static void i2c_dw_configure_master(struct platform_device *pdev)
}
}
+static void i2c_dw_configure_slave(struct platform_device *pdev)
+{
+ struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
+
+ dev->functionality = I2C_FUNC_SLAVE | DW_IC_DEFAULT_FUNCTIONALITY;
+
+ dev->slave_cfg = DW_IC_CON_RX_FIFO_FULL_HLD_CTRL |
+ DW_IC_CON_RESTART_EN | DW_IC_CON_STOP_DET_IFADDRESSED |
+ DW_IC_CON_SPEED_FAST;
+
+ dev_dbg(&pdev->dev, "I am registed as a I2C Slave!\n");
+
+ dev->mode = DW_IC_SLAVE;
+
+ switch (dev->clk_freq) {
+ case 100000:
+ dev->slave_cfg |= DW_IC_CON_SPEED_STD;
+ break;
+ case 3400000:
+ dev->slave_cfg |= DW_IC_CON_SPEED_HIGH;
+ break;
+ default:
+ dev->slave_cfg |= DW_IC_CON_SPEED_FAST;
+ }
+}
+
static int i2c_dw_plat_prepare_clk(struct dw_i2c_dev *i_dev, bool prepare)
{
if (IS_ERR(i_dev->clk))
@@ -200,9 +231,11 @@ static int dw_i2c_plat_probe(struct platform_device *pdev)
struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
struct i2c_adapter *adap;
struct dw_i2c_dev *dev;
+ struct fwnode_handle *child;
u32 acpi_speed, ht = 0;
struct resource *mem;
int irq, r;
+ u32 reg;
irq = platform_get_irq(pdev, 0);
if (irq < 0)
@@ -264,9 +297,16 @@ static int dw_i2c_plat_probe(struct platform_device *pdev)
if (r)
return r;
- dev->functionality = I2C_FUNC_10BIT_ADDR | DW_IC_DEFAULT_FUNCTIONALITY;
-
- i2c_dw_configure_master(pdev);
+ if (ACPI_HANDLE(&pdev->dev) == NULL) {
+ device_for_each_child_node(&pdev->dev, child) {
+ fwnode_property_read_u32(child, "reg", ®);
+ if (reg & I2C_OWN_SLAVE_ADDRESS)
+ i2c_dw_configure_slave(pdev);
+ else
+ i2c_dw_configure_master(pdev);
+ }
+ } else
+ i2c_dw_configure_master(pdev);
dev->clk = devm_clk_get(&pdev->dev, NULL);
if (!i2c_dw_plat_prepare_clk(dev, true)) {
@@ -295,7 +335,11 @@ static int dw_i2c_plat_probe(struct platform_device *pdev)
pm_runtime_enable(&pdev->dev);
}
- r = i2c_dw_probe(dev);
+ if (dev->mode == DW_IC_SLAVE)
+ r = i2c_dw_probe_slave(dev);
+ else
+ r = i2c_dw_probe(dev);
+
if (r && !dev->pm_runtime_disabled)
pm_runtime_disable(&pdev->dev);
@@ -310,7 +354,10 @@ static int dw_i2c_plat_remove(struct platform_device *pdev)
i2c_del_adapter(&dev->adapter);
- i2c_dw_disable(dev);
+ if (dev->mode == DW_IC_SLAVE)
+ i2c_dw_disable_slave(dev);
+ else
+ i2c_dw_disable(dev);
pm_runtime_dont_use_autosuspend(&pdev->dev);
pm_runtime_put_sync(&pdev->dev);
@@ -350,7 +397,10 @@ static int dw_i2c_plat_suspend(struct device *dev)
struct platform_device *pdev = to_platform_device(dev);
struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev);
- i2c_dw_disable(i_dev);
+ if (i_dev->mode == DW_IC_SLAVE)
+ i2c_dw_disable_slave(i_dev);
+ else
+ i2c_dw_disable(i_dev);
i2c_dw_plat_prepare_clk(i_dev, false);
return 0;
@@ -363,8 +413,12 @@ static int dw_i2c_plat_resume(struct device *dev)
i2c_dw_plat_prepare_clk(i_dev, true);
- if (!i_dev->pm_runtime_disabled)
- i2c_dw_init(i_dev);
+ if (!i_dev->pm_runtime_disabled) {
+ if (i_dev->mode == DW_IC_SLAVE)
+ i2c_dw_init_slave(i_dev);
+ else
+ i2c_dw_init(i_dev);
+ }
return 0;
}
--
2.11.0
On Wed, 2016-12-28 at 14:43 +0000, Luis Oliveira wrote:
> - Factor out all _master() part of code from i2c-designware-core
> and i2c-designware-platdrv to separate functions.
> - Standardize all code related with MASTER mode.
> - I have to take off DW_IC_INTR_TX_EMPTY from DW_IC_INTR_DEFAULT_MASK
> because it is master specific.
>
> The purpose of this is to prepare the controller to have is I2C MASTER
> flow in a separate driver. To do this first all the
> functions/definitions related to the MASTER flow were identified.
Thanks for an update.
Some style related comments below (For the code related is up to you, my
tag still stands).
>
> Signed-off-by: Luis Oliveira <[email protected]>
> ---
> Changes V4->V5: (ACK by Andy)
When you get an Ack, or other tag (Reviewed-by, Tested-by, etc), and you
send new version, include this tag to your commit message (it applies to
all affected patches in your series).
It would be also good to have some high level changelog in the cover
letter, from this series I don't see, for example, which base you did
use (i2c-next? linux-next? v4.9? v4.10-rc1?).
> + dev_dbg(dev->dev,
> + "%s: enabled=%#x stat=%#x\n", __func__, enabled,
stat);
I hope you can fit format string on the first line. __func__ is
redundant when you are using debug printing (Dynamic Debug would include
it if asked for).
> +static void i2c_dw_configure_master(struct platform_device *pdev)
> +{
> + struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
By the way, does it make sense to pass struct dw_i2c_dev * as a
parameter of the function?
> +
> + dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE
> |
> + DW_IC_CON_RESTART_EN;
> +
> + dev_dbg(&pdev->dev, "I am registed as a I2C Master!\n");
> +
> + switch (dev->clk_freq) {
> + case 100000:
> + dev->master_cfg |= DW_IC_CON_SPEED_STD;
> + break;
> + case 3400000:
> + dev->master_cfg |= DW_IC_CON_SPEED_HIGH;
> + break;
> + default:
> + dev->master_cfg |= DW_IC_CON_SPEED_FAST;
> + }
> +}
> +
>
--
Andy Shevchenko <[email protected]>
Intel Finland Oy
On Wed, 2016-12-28 at 14:43 +0000, Luis Oliveira wrote:
> - Definitions were added
>
> SLAVE related definitions were added to the core of the controller.
>
Reviewed-by: Andy Shevchenko <[email protected]>
> Signed-off-by: Luis Oliveira <[email protected]>
> ---
> Changes V4->V5: (Andy Shevchenko)
> - This patch just introduces SLAVE definitions (as suggested in V4)
>
> drivers/i2c/busses/i2c-designware-core.h | 27
> +++++++++++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/drivers/i2c/busses/i2c-designware-core.h
> b/drivers/i2c/busses/i2c-designware-core.h
> index 8bba7a37c3ce..5080f1d2d2ec 100644
> --- a/drivers/i2c/busses/i2c-designware-core.h
> +++ b/drivers/i2c/busses/i2c-designware-core.h
> @@ -36,15 +36,20 @@
> #define DW_IC_CON_SPEED_FAST 0x4
> #define DW_IC_CON_SPEED_HIGH 0x6
> #define DW_IC_CON_SPEED_MASK 0x6
> +#define DW_IC_CON_10BITADDR_SLAVE 0x8
> #define DW_IC_CON_10BITADDR_MASTER 0x10
> #define DW_IC_CON_RESTART_EN 0x20
> #define DW_IC_CON_SLAVE_DISABLE 0x40
> +#define DW_IC_CON_STOP_DET_IFADDRESSED 0x80
> +#define DW_IC_CON_TX_EMPTY_CTRL 0x100
> +#define DW_IC_CON_RX_FIFO_FULL_HLD_CTRL 0x200
>
> /*
> * Registers offset
> */
> #define DW_IC_CON 0x0
> #define DW_IC_TAR 0x4
> +#define DW_IC_SAR 0x8
> #define DW_IC_DATA_CMD 0x10
> #define DW_IC_SS_SCL_HCNT 0x14
> #define DW_IC_SS_SCL_LCNT 0x18
> @@ -75,6 +80,7 @@
> #define DW_IC_SDA_HOLD 0x7c
> #define DW_IC_TX_ABRT_SOURCE 0x80
> #define DW_IC_ENABLE_STATUS 0x9c
> +#define DW_IC_CLR_RESTART_DET 0xa8
> #define DW_IC_COMP_PARAM_1 0xf4
> #define DW_IC_COMP_VERSION 0xf8
> #define DW_IC_SDA_HOLD_MIN_VERS 0x3131312A
> @@ -93,15 +99,22 @@
> #define DW_IC_INTR_STOP_DET 0x200
> #define DW_IC_INTR_START_DET 0x400
> #define DW_IC_INTR_GEN_CALL 0x800
> +#define DW_IC_INTR_RESTART_DET 0x1000
>
> #define DW_IC_INTR_DEFAULT_MASK (DW_IC_INTR_RX_FULL |
> \
> DW_IC_INTR_TX_ABRT | \
> DW_IC_INTR_STOP_DET)
> #define DW_IC_INTR_MASTER_MASK (DW_IC_INTR_DEFAULT_MAS
> K | \
> DW_IC_INTR_TX_EMPTY)
> +#define DW_IC_INTR_SLAVE_MASK (DW_IC_INTR_DEFAULT_MASK
> | \
> + DW_IC_INTR_RX_DONE | \
> + DW_IC_INTR_RX_UNDER | \
> + DW_IC_INTR_RD_REQ)
> +
> #define DW_IC_STATUS_ACTIVITY 0x1
> #define DW_IC_STATUS_TFE BIT(2)
> #define DW_IC_STATUS_MASTER_ACTIVITY BIT(5)
> +#define DW_IC_STATUS_SLAVE_ACTIVITY BIT(6)
>
> #define DW_IC_SDA_HOLD_RX_SHIFT 16
> #define DW_IC_SDA_HOLD_RX_MASK GENMASK(23,
> DW_IC_SDA_HOLD_RX_SHIFT)
> @@ -123,6 +136,12 @@
> #define TIMEOUT 20 /* ms */
>
> /*
> + * operation modes
> + */
> +#define DW_IC_MASTER 0
> +#define DW_IC_SLAVE 1
> +
> +/*
> * hardware abort codes from the DW_IC_TX_ABRT_SOURCE register
> *
> * only expected abort codes are listed here
> @@ -139,6 +158,9 @@
> #define ABRT_10B_RD_NORSTRT 10
> #define ABRT_MASTER_DIS 11
> #define ARB_LOST 12
> +#define ABRT_SLAVE_FLUSH_TXFIFO 13
> +#define ABRT_SLAVE_ARBLOST 14
> +#define ABRT_SLAVE_RD_INTX 15
>
> #define DW_IC_TX_ABRT_7B_ADDR_NOACK (1UL <<
> ABRT_7B_ADDR_NOACK)
> #define DW_IC_TX_ABRT_10ADDR1_NOACK (1UL <<
> ABRT_10ADDR1_NOACK)
> @@ -151,6 +173,9 @@
> #define DW_IC_TX_ABRT_10B_RD_NORSTRT (1UL <<
> ABRT_10B_RD_NORSTRT)
> #define DW_IC_TX_ABRT_MASTER_DIS (1UL << ABRT_MASTER_DIS)
> #define DW_IC_TX_ARB_LOST (1UL << ARB_LOST)
> +#define DW_IC_RX_ABRT_SLAVE_RD_INTX (1UL <<
> ABRT_SLAVE_RD_INTX)
> +#define DW_IC_RX_ABRT_SLAVE_ARBLOST (1UL <<
> ABRT_SLAVE_ARBLOST)
> +#define DW_IC_RX_ABRT_SLAVE_FLUSH_TXFIFO (1UL <<
> ABRT_SLAVE_FLUSH_TXFIFO)
>
> #define DW_IC_TX_ABRT_NOACK (DW_IC_TX_ABRT_7B_ADDR_NOA
> CK | \
> DW_IC_TX_ABRT_10ADDR1_NOACK
> | \
> @@ -206,6 +231,7 @@ struct dw_i2c_dev {
> void __iomem *base;
> struct completion cmd_complete;
> struct clk *clk;
> + struct i2c_client *slave;
> u32 (*get_clk_rate_khz) (struct
> dw_i2c_dev *dev);
> struct dw_pci_controller *controller;
> int cmd_err;
> @@ -225,6 +251,7 @@ struct dw_i2c_dev {
> struct i2c_adapter adapter;
> u32 functionality;
> u32 master_cfg;
> + u32 slave_cfg;
> unsigned int tx_fifo_depth;
> unsigned int rx_fifo_depth;
> int rx_outstanding;
--
Andy Shevchenko <[email protected]>
Intel Finland Oy
On 28-Dec-16 15:12, Andy Shevchenko wrote:
> On Wed, 2016-12-28 at 14:43 +0000, Luis Oliveira wrote:
>> - Factor out all _master() part of code from i2c-designware-core
>> and i2c-designware-platdrv to separate functions.
>> - Standardize all code related with MASTER mode.
>> - I have to take off DW_IC_INTR_TX_EMPTY from DW_IC_INTR_DEFAULT_MASK
>> because it is master specific.
>>
>> The purpose of this is to prepare the controller to have is I2C MASTER
>> flow in a separate driver. To do this first all the
>> functions/definitions related to the MASTER flow were identified.
>
> Thanks for an update.
> Some style related comments below (For the code related is up to you, my
> tag still stands).
>
>>
>> Signed-off-by: Luis Oliveira <[email protected]>
>> ---
>> Changes V4->V5: (ACK by Andy)
>
> When you get an Ack, or other tag (Reviewed-by, Tested-by, etc), and you
> send new version, include this tag to your commit message (it applies to
> all affected patches in your series).
>
Thank you. I didn't knew.
> It would be also good to have some high level changelog in the cover
> letter, from this series I don't see, for example, which base you did
> use (i2c-next? linux-next? v4.9? v4.10-rc1?).
>
>> + dev_dbg(dev->dev,
>> + "%s: enabled=%#x stat=%#x\n", __func__, enabled,
> stat);
>
> I hope you can fit format string on the first line. __func__ is
> redundant when you are using debug printing (Dynamic Debug would include
> it if asked for).
I will check that.
>
>> +static void i2c_dw_configure_master(struct platform_device *pdev)
>> +{
>> + struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
>
> By the way, does it make sense to pass struct dw_i2c_dev * as a
> parameter of the function?
>
Yes, by looking at it now I think I can pass just the struct dw_i2c_dev
to this function. And probably the same with the i2c_dw_configure_slave.
>> +
>> + dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE
>> |
>> + DW_IC_CON_RESTART_EN;
>> +
>> + dev_dbg(&pdev->dev, "I am registed as a I2C Master!\n");
>> +
>> + switch (dev->clk_freq) {
>> + case 100000:
>> + dev->master_cfg |= DW_IC_CON_SPEED_STD;
>> + break;
>> + case 3400000:
>> + dev->master_cfg |= DW_IC_CON_SPEED_HIGH;
>> + break;
>> + default:
>> + dev->master_cfg |= DW_IC_CON_SPEED_FAST;
>> + }
>> +}
>> +
>>
>
>
On Wed, 2016-12-28 at 14:43 +0000, Luis Oliveira wrote:
> - Changes in Kconfig to enable I2C_SLAVE support
> - Slave functions added to core library file
> - Slave abort sources added to common source file
> - New driver: i2c-designware-slave added
> - Changes in the Makefile to compile it all
>
> All the SLAVE flow is added but it is not enabled via platform
> driver.
> --- a/drivers/i2c/busses/i2c-designware-common.c
> +++ b/drivers/i2c/busses/i2c-designware-common.c
> @@ -30,6 +30,7 @@
> #include <linux/pm_runtime.h>
> #include <linux/delay.h>
> #include <linux/module.h>
> +
> #include "i2c-designware-core.h"
>
> static char *abort_sources[] = {
> @@ -42,7 +43,7 @@ static char *abort_sources[] = {
> [ABRT_TXDATA_NOACK] =
> "data not acknowledged",
> [ABRT_GCALL_NOACK] =
> - "no acknowledgement for a general call",
> + "no acknowledgment for a general call",
So, what's the point after your confirmation that both variants are
okay?
> +#include <linux/errno.h>
> +#include <linux/err.h>
> +#include <linux/i2c.h>
> +#include <linux/interrupt.h>
> +#include <linux/io.h>
> +#include <linux/pm_runtime.h>
> +#include <linux/delay.h>
> +#include <linux/module.h>
Alphabetical order?
> +int i2c_dw_init_slave(struct dw_i2c_dev *dev)
> +{
> + u32 sda_falling_time, scl_falling_time;
> + u32 reg, comp_param1;
> + u32 hcnt, lcnt;
> + int ret;
> +
> + ret = i2c_dw_acquire_lock(dev);
> + if (ret)
> + return ret;
> +
> + reg = dw_readl(dev, DW_IC_COMP_TYPE);
> + if (reg == ___constant_swab32(DW_IC_COMP_TYPE_VALUE)) {
> + /* Configure register endianness access. */
> + dev->accessor_flags |= ACCESS_SWAP;
> + } else if (reg == (DW_IC_COMP_TYPE_VALUE & 0x0000ffff)) {
> + /* Configure register access mode 16bit. */
> + dev->accessor_flags |= ACCESS_16BIT;
> + } else if (reg != DW_IC_COMP_TYPE_VALUE) {
> + dev_err(dev->dev,
> + "Unknown Synopsys component type: 0x%08x\n",
> reg);
Is it correct indentation?
> + i2c_dw_release_lock(dev);
> + return -ENODEV;
> + }
> +
> + comp_param1 = dw_readl(dev, DW_IC_COMP_PARAM_1);
> +
> + /* Disable the adapter. */
> + __i2c_dw_enable_and_wait(dev, false);
> +
> + /* Set standard and fast speed deviders for high/low periods.
> */
> + sda_falling_time = dev->sda_falling_time ?: 300; /* ns */
> + scl_falling_time = dev->scl_falling_time ?: 300; /* ns */
> +
> + /* Set SCL timing parameters for standard-mode. */
> + if (dev->ss_hcnt && dev->ss_lcnt) {
> + hcnt = dev->ss_hcnt;
> + lcnt = dev->ss_lcnt;
> + } else {
> + hcnt = i2c_dw_scl_hcnt(i2c_dw_clk_rate(dev),
> + 4000, /* tHD;STA =
> tHIGH = 4.0 us */
> + sda_falling_time,
> + 0, /* 0: DW default,
> 1: Ideal */
> + 0); /* No offset */
> + lcnt = i2c_dw_scl_lcnt(i2c_dw_clk_rate(dev),
> + 4700, /* tLOW = 4.7 us
> */
> + scl_falling_time,
> + 0); /* No offset */
> + }
> + dw_writel(dev, hcnt, DW_IC_SS_SCL_HCNT);
> + dw_writel(dev, lcnt, DW_IC_SS_SCL_LCNT);
> + dev_dbg(dev->dev, "Standard-mode HCNT:LCNT = %d:%d\n", hcnt,
> lcnt);
> +
> + /* Set SCL timing parameters for fast-mode or fast-mode plus.
> */
> + if ((dev->clk_freq == 1000000) && dev->fp_hcnt && dev-
> >fp_lcnt) {
> + hcnt = dev->fp_hcnt;
> + lcnt = dev->fp_lcnt;
> + } else if (dev->fs_hcnt && dev->fs_lcnt) {
> + hcnt = dev->fs_hcnt;
> + lcnt = dev->fs_lcnt;
> + } else {
> + hcnt = i2c_dw_scl_hcnt(i2c_dw_clk_rate(dev),
> + 600, /* tHD;STA =
> tHIGH = 0.6 us */
> + sda_falling_time,
> + 0, /* 0: DW default,
> 1: Ideal */
> + 0); /* No offset */
> + lcnt = i2c_dw_scl_lcnt(i2c_dw_clk_rate(dev),
> + 1300, /* tLOW = 1.3 us
> */
> + scl_falling_time,
> + 0); /* No offset */
> + }
> + dw_writel(dev, hcnt, DW_IC_FS_SCL_HCNT);
> + dw_writel(dev, lcnt, DW_IC_FS_SCL_LCNT);
> + dev_dbg(dev->dev, "Fast-mode HCNT:LCNT = %d:%d\n", hcnt,
> lcnt);
> +
> + if ((dev->slave_cfg & DW_IC_CON_SPEED_MASK) ==
> + DW_IC_CON_SPEED_HIGH) {
> + if ((comp_param1 &
> DW_IC_COMP_PARAM_1_SPEED_MODE_MASK)
> + != DW_IC_COMP_PARAM_1_SPEED_MODE_HIGH) {
> + dev_err(dev->dev, "High Speed not
> supported!\n");
> + dev->slave_cfg &= ~DW_IC_CON_SPEED_MASK;
> + dev->slave_cfg |= DW_IC_CON_SPEED_FAST;
> + } else if (dev->hs_hcnt && dev->hs_lcnt) {
> + hcnt = dev->hs_hcnt;
> + lcnt = dev->hs_lcnt;
> + dw_writel(dev, hcnt, DW_IC_HS_SCL_HCNT);
> + dw_writel(dev, lcnt, DW_IC_HS_SCL_LCNT);
> + dev_dbg(dev->dev, "HighSpeed-mode HCNT:LCNT =
> %d:%d\n",
> + hcnt, lcnt);
> + }
> + }
> +
> + /* Configure SDA Hold Time if required. */
> + reg = dw_readl(dev, DW_IC_COMP_VERSION);
> + if (reg >= DW_IC_SDA_HOLD_MIN_VERS) {
> + if (!dev->sda_hold_time) {
> + /* Keep previous hold time setting if no one
> set it. */
> + dev->sda_hold_time = dw_readl(dev,
> DW_IC_SDA_HOLD);
> + }
> + /*
> + * Workaround for avoiding TX arbitration lost in
> case I2C
> + * slave pulls SDA down "too quickly" after falling
> egde of
> + * SCL by enabling non-zero SDA RX hold.
> Specification says it
> + * extends incoming SDA low to high transition while
> SCL is
> + * high but it apprears to help also above issue.
> + */
> + if (!(dev->sda_hold_time & DW_IC_SDA_HOLD_RX_MASK))
> + dev->sda_hold_time |= 1 <<
> DW_IC_SDA_HOLD_RX_SHIFT;
> + dw_writel(dev, dev->sda_hold_time, DW_IC_SDA_HOLD);
> + } else {
> + dev_warn(dev->dev,
> + "Hardware too old to adjust SDA hold
> time.\n");
> + }
> +
> + i2c_dw_configure_fifo_slave(dev);
> + i2c_dw_release_lock(dev);
> +
> + return 0;
> +}
> +EXPORT_SYMBOL_GPL(i2c_dw_init_slave);
Can we introduce ops structure for those? (private callbacks)
You increase noise in namespace by several i2c_dw_*() functions.
Introduction of ops will keep everything private.
> +
> +int i2c_dw_reg_slave(struct i2c_client *slave)
> +{
> + struct dw_i2c_dev *dev = i2c_get_adapdata(slave->adapter);
> +
> + if (dev->slave)
> + return -EBUSY;
> + if (slave->flags & I2C_CLIENT_TEN)
> + return -EAFNOSUPPORT;
> + /*
> + * Set slave address in the IC_SAR register,
> + * the address to which the DW_apb_i2c responds.
> + */
Wrong indentation?
> +
> + __i2c_dw_enable(dev, false);
> + dw_writel(dev, slave->addr, DW_IC_SAR);
> + dev->slave = slave;
> +
> + __i2c_dw_enable(dev, true);
> +
> + dev->cmd_err = 0;
> + dev->msg_write_idx = 0;
> + dev->msg_read_idx = 0;
> + dev->msg_err = 0;
> + dev->status = STATUS_IDLE;
> + dev->abort_source = 0;
> + dev->rx_outstanding = 0;
> +
> + return 0;
> +}
> +
> +static int i2c_dw_unreg_slave(struct i2c_client *slave)
> +{
> + struct dw_i2c_dev *dev = i2c_get_adapdata(slave->adapter);
> +
> + i2c_dw_disable_int_slave(dev);
> + i2c_dw_disable_slave(dev);
> + dev->slave = NULL;
Extra spaces, remove.
> +
> + return 0;
> +}
>
> +static int i2c_dw_irq_handler_slave(struct dw_i2c_dev *dev)
> +{
> + u32 raw_stat, stat, enabled;
> + u8 val, slave_activity;
> +
> + stat = dw_readl(dev, DW_IC_INTR_STAT);
> + enabled = dw_readl(dev, DW_IC_ENABLE);
> + raw_stat = dw_readl(dev, DW_IC_RAW_INTR_STAT);
> + slave_activity = ((dw_readl(dev, DW_IC_STATUS) &
> + DW_IC_STATUS_SLAVE_ACTIVITY) >> 6);
> +
> + if (!enabled || !(raw_stat & ~DW_IC_INTR_ACTIVITY))
> + return 0;
> +
> + dev_dbg(dev->dev,
> + "%s: %#x SLAVE_ACTV=%#x : RAW_INTR_STAT=%#x :
> INTR_STAT=%#x\n",
> + __func__, enabled, slave_activity, raw_stat, stat);
__func__ is redundant.
> +
> + if (stat & DW_IC_INTR_RESTART_DET)
> + dw_readl(dev, DW_IC_CLR_RESTART_DET);
> + if (stat & DW_IC_INTR_START_DET)
> + dw_readl(dev, DW_IC_CLR_START_DET);
> + if (stat & DW_IC_INTR_ACTIVITY)
> + dw_readl(dev, DW_IC_CLR_ACTIVITY);
> + if (stat & DW_IC_INTR_RX_OVER)
> + dw_readl(dev, DW_IC_CLR_RX_OVER);
> + if ((stat & DW_IC_INTR_RX_FULL) && (stat &
> DW_IC_INTR_STOP_DET))
> + i2c_slave_event(dev->slave,
> I2C_SLAVE_WRITE_REQUESTED, &val);
> +
> + if (slave_activity) {
> + if (stat & DW_IC_INTR_RD_REQ) {
> + if (stat & DW_IC_INTR_RX_FULL) {
> + val = dw_readl(dev, DW_IC_DATA_CMD);
> + if (!i2c_slave_event(dev->slave,
> + I2C_SLAVE_WRITE_RECEIVED, &val)) {
> + dev_dbg(dev->dev, "Byte %X
> acked!",
> + val);
Perhaps dev_vdbg() ?
> + }
> + dw_readl(dev, DW_IC_CLR_RD_REQ);
> + stat =
> i2c_dw_read_clear_intrbits_slave(dev);
> + } else {
> + dw_readl(dev, DW_IC_CLR_RD_REQ);
> + dw_readl(dev, DW_IC_CLR_RX_UNDER);
> + stat =
> i2c_dw_read_clear_intrbits_slave(dev);
> + }
> + if (!i2c_slave_event(dev->slave,
> + I2C_SLAVE_READ_REQUESTED,
> &val))
> + dw_writel(dev, val, DW_IC_DATA_CMD);
> + }
> + }
> +
> + if (stat & DW_IC_INTR_RX_DONE) {
> + if (!i2c_slave_event(dev->slave,
> I2C_SLAVE_READ_PROCESSED,
> + &val))
> + dw_readl(dev, DW_IC_CLR_RX_DONE);
> +
> + i2c_slave_event(dev->slave, I2C_SLAVE_STOP, &val);
> + stat = i2c_dw_read_clear_intrbits_slave(dev);
> + return true;
Mistype of value. Should be 1?
> + }
> +
> + if (stat & DW_IC_INTR_RX_FULL) {
> + val = dw_readl(dev, DW_IC_DATA_CMD);
> + if (!i2c_slave_event(dev->slave,
> I2C_SLAVE_WRITE_RECEIVED,
> + &val))
> + dev_dbg(dev->dev, "Byte %X acked!", val);
dev_vdbg() ?
> + } else {
> + i2c_slave_event(dev->slave, I2C_SLAVE_STOP, &val);
> + stat = i2c_dw_read_clear_intrbits_slave(dev);
> + }
> +
> + if (stat & DW_IC_INTR_TX_OVER)
> + dw_readl(dev, DW_IC_CLR_TX_OVER);
> +
> + return 1;
> +}
> +
> +static irqreturn_t i2c_dw_isr_slave(int this_irq, void *dev_id)
> +{
> + struct dw_i2c_dev *dev = dev_id;
> + int ret;
> +
> + i2c_dw_read_clear_intrbits_slave(dev);
>
> + ret = i2c_dw_irq_handler_slave(dev);
> +
Swap these lines.
> + if (ret > 0)
> + complete(&dev->cmd_complete);
> +
> + return IRQ_RETVAL(ret);
> +}
> +
> +int i2c_dw_probe_slave(struct dw_i2c_dev *dev)
> +{
> + struct i2c_adapter *adap = &dev->adapter;
> + int ret;
> +
> + init_completion(&dev->cmd_complete);
> +
> + ret = i2c_dw_init_slave(dev);
> + if (ret)
> + return ret;
> +
>
> + ret = i2c_dw_acquire_lock(dev);
> + if (ret)
> + return ret;
I'm not sure you need this in slave code.
> +
> + i2c_dw_release_lock(dev);
> + snprintf(adap->name, sizeof(adap->name),
> + "Synopsys DesignWare I2C Slave adapter");
> + adap->retries = 3;
> + adap->algo = &i2c_dw_algo;
> + adap->dev.parent = dev->dev;
> + i2c_set_adapdata(adap, dev);
> +
> + ret = devm_request_irq(dev->dev, dev->irq, i2c_dw_isr_slave,
> + IRQF_SHARED, dev_name(dev->dev), dev);
> + if (ret) {
> + dev_err(dev->dev, "failure requesting irq %i: %d\n",
> + dev->irq, ret);
> + return ret;
> + }
> + /*
> + * Increment PM usage count during adapter registration in
> order to
> + * avoid possible spurious runtime suspend when adapter
> device is
> + * registered to the device core and immediate resume in case
> bus has
> + * registered I2C slaves that do I2C transfers in their
> probe.
> + */
> + pm_runtime_get_noresume(dev->dev);
Looks like you blindly copied this from master code. This is about slave
enumeration. How does it related to slave mode?
> + ret = i2c_add_numbered_adapter(adap);
> + if (ret)
> + dev_err(dev->dev, "failure adding adapter: %d\n",
> ret);
> + pm_runtime_put_noidle(dev->dev);
> +
> + return ret;
> +}
> +EXPORT_SYMBOL_GPL(i2c_dw_probe_slave);
--
Andy Shevchenko <[email protected]>
Intel Finland Oy
On Wed, 2016-12-28 at 14:43 +0000, Luis Oliveira wrote:
> - Slave mode selected in platform module (devicetree support only)
> - Check for ACPI - not supported in SLAVE mode:
> - Changed the ifndef style to the use of ACPI_HANDLE that returns
> NULL
> if the device was not enumerated from ACPI namespace.
I'm not sure what is wrong with ACPI?
> @@ -264,9 +297,16 @@ static int dw_i2c_plat_probe(struct
> platform_device *pdev)
> if (r)
> return r;
>
> - dev->functionality = I2C_FUNC_10BIT_ADDR |
> DW_IC_DEFAULT_FUNCTIONALITY;
> -
> - i2c_dw_configure_master(pdev);
> + if (ACPI_HANDLE(&pdev->dev) == NULL) {
I don't think you need this at all.
> + device_for_each_child_node(&pdev->dev, child) {
This is resource agnostic.
> + fwnode_property_read_u32(child, "reg", ®);
This is as well.
> + if (reg & I2C_OWN_SLAVE_ADDRESS)
> + i2c_dw_configure_slave(pdev);
> + else
> + i2c_dw_configure_master(pdev);
> + }
> + } else
> + i2c_dw_configure_master(pdev);
--
Andy Shevchenko <[email protected]>
Intel Finland Oy
On Wed, 2016-12-28 at 14:43 +0000, Luis Oliveira wrote:
> Replaced all the return variables 'r' in the existing
> code by 'ret' to make the code easier to read (and
> more standard).
I'm not sure it makes sense as a separate change.
>
> Signed-off-by: Luis Oliveira <[email protected]>
> ---
> Changes V4->V5: (Andy Shevchenko)
> - Replaced all the old code using "r" as return to "ret". For
> consistency
> purposes.
>
> drivers/i2c/busses/i2c-designware-master.c | 30 ++++++++++++++----
> -----------
> drivers/i2c/busses/i2c-designware-platdrv.c | 16 +++++++--------
> 2 files changed, 23 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-designware-master.c
> b/drivers/i2c/busses/i2c-designware-master.c
> index b55a7f4c5149..0d5aca6edb48 100644
> --- a/drivers/i2c/busses/i2c-designware-master.c
> +++ b/drivers/i2c/busses/i2c-designware-master.c
> @@ -644,18 +644,18 @@ EXPORT_SYMBOL_GPL(i2c_dw_read_comp_param);
> int i2c_dw_probe(struct dw_i2c_dev *dev)
> {
> struct i2c_adapter *adap = &dev->adapter;
> - int r;
> + int ret;
> u32 reg;
>
> init_completion(&dev->cmd_complete);
>
> - r = i2c_dw_init(dev);
> - if (r)
> - return r;
> + ret = i2c_dw_init(dev);
> + if (ret)
> + return ret;
>
> - r = i2c_dw_acquire_lock(dev);
> - if (r)
> - return r;
> + ret = i2c_dw_acquire_lock(dev);
> + if (ret)
> + return ret;
>
> /*
> * Test if dynamic TAR update is enabled in this controller
> by writing
> @@ -681,13 +681,13 @@ int i2c_dw_probe(struct dw_i2c_dev *dev)
> i2c_set_adapdata(adap, dev);
>
> i2c_dw_disable_int(dev);
> - r = devm_request_irq(dev->dev, dev->irq, i2c_dw_isr,
> + ret = devm_request_irq(dev->dev, dev->irq, i2c_dw_isr,
> IRQF_SHARED | IRQF_COND_SUSPEND,
> dev_name(dev->dev), dev);
> - if (r) {
> + if (ret) {
> dev_err(dev->dev, "failure requesting irq %i: %d\n",
> - dev->irq, r);
> - return r;
> + dev->irq, ret);
> + return ret;
> }
>
> /*
> @@ -697,12 +697,12 @@ int i2c_dw_probe(struct dw_i2c_dev *dev)
> * registered I2C slaves that do I2C transfers in their
> probe.
> */
> pm_runtime_get_noresume(dev->dev);
> - r = i2c_add_numbered_adapter(adap);
> - if (r)
> - dev_err(dev->dev, "failure adding adapter: %d\n", r);
> + ret = i2c_add_numbered_adapter(adap);
> + if (ret)
> + dev_err(dev->dev, "failure adding adapter: %d\n",
> ret);
> pm_runtime_put_noidle(dev->dev);
>
> - return r;
> + return ret;
> }
> EXPORT_SYMBOL_GPL(i2c_dw_probe);
>
> diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c
> b/drivers/i2c/busses/i2c-designware-platdrv.c
> index ef75031f8a62..785f4380c9a9 100644
> --- a/drivers/i2c/busses/i2c-designware-platdrv.c
> +++ b/drivers/i2c/busses/i2c-designware-platdrv.c
> @@ -234,7 +234,7 @@ static int dw_i2c_plat_probe(struct
> platform_device *pdev)
> struct fwnode_handle *child;
> u32 acpi_speed, ht = 0;
> struct resource *mem;
> - int irq, r;
> + int irq, ret;
> u32 reg;
>
> irq = platform_get_irq(pdev, 0);
> @@ -293,9 +293,9 @@ static int dw_i2c_plat_probe(struct
> platform_device *pdev)
> return -EINVAL;
> }
>
> - r = i2c_dw_eval_lock_support(dev);
> - if (r)
> - return r;
> + ret = i2c_dw_eval_lock_support(dev);
> + if (ret)
> + return ret;
>
> if (ACPI_HANDLE(&pdev->dev) == NULL) {
> device_for_each_child_node(&pdev->dev, child) {
> @@ -336,14 +336,14 @@ static int dw_i2c_plat_probe(struct
> platform_device *pdev)
> }
>
> if (dev->mode == DW_IC_SLAVE)
> - r = i2c_dw_probe_slave(dev);
> + ret = i2c_dw_probe_slave(dev);
> else
> - r = i2c_dw_probe(dev);
> + ret = i2c_dw_probe(dev);
>
> - if (r && !dev->pm_runtime_disabled)
> + if (ret && !dev->pm_runtime_disabled)
> pm_runtime_disable(&pdev->dev);
>
> - return r;
> + return ret;
> }
>
> static int dw_i2c_plat_remove(struct platform_device *pdev)
--
Andy Shevchenko <[email protected]>
Intel Finland Oy
On 28-Dec-16 15:44, Andy Shevchenko wrote:
> On Wed, 2016-12-28 at 14:43 +0000, Luis Oliveira wrote:
>> - Slave mode selected in platform module (devicetree support only)
>> - Check for ACPI - not supported in SLAVE mode:
>> - Changed the ifndef style to the use of ACPI_HANDLE that returns
>> NULL
>> if the device was not enumerated from ACPI namespace.
>
> I'm not sure what is wrong with ACPI?
I dont have a way to test it. Just that.
>
>> @@ -264,9 +297,16 @@ static int dw_i2c_plat_probe(struct
>> platform_device *pdev)
>> if (r)
>> return r;
>>
>> - dev->functionality = I2C_FUNC_10BIT_ADDR |
>> DW_IC_DEFAULT_FUNCTIONALITY;
>> -
>> - i2c_dw_configure_master(pdev);
>
>> + if (ACPI_HANDLE(&pdev->dev) == NULL) {
>
> I don't think you need this at all.
This is to avoid the use of the "ifdef" style I used before.
>
>> + device_for_each_child_node(&pdev->dev, child) {
>
> This is resource agnostic.
>
>> + fwnode_property_read_u32(child, "reg", ®);
>
> This is as well.
Are you suggesting I use of_ functions?
>
>> + if (reg & I2C_OWN_SLAVE_ADDRESS)
>> + i2c_dw_configure_slave(pdev);
>> + else
>> + i2c_dw_configure_master(pdev);
>> + }
>> + } else
>> + i2c_dw_configure_master(pdev);
>
>
On 28-Dec-16 15:36, Andy Shevchenko wrote:
> On Wed, 2016-12-28 at 14:43 +0000, Luis Oliveira wrote:
>> - Changes in Kconfig to enable I2C_SLAVE support
>> - Slave functions added to core library file
>> - Slave abort sources added to common source file
>> - New driver: i2c-designware-slave added
>> - Changes in the Makefile to compile it all
>>
>> All the SLAVE flow is added but it is not enabled via platform
>> driver.
>
>> --- a/drivers/i2c/busses/i2c-designware-common.c
>> +++ b/drivers/i2c/busses/i2c-designware-common.c
>> @@ -30,6 +30,7 @@
>> #include <linux/pm_runtime.h>
>> #include <linux/delay.h>
>> #include <linux/module.h>
>> +
>> #include "i2c-designware-core.h"
>>
>> static char *abort_sources[] = {
>> @@ -42,7 +43,7 @@ static char *abort_sources[] = {
>> [ABRT_TXDATA_NOACK] =
>> "data not acknowledged",
>> [ABRT_GCALL_NOACK] =
>> - "no acknowledgement for a general call",
>> + "no acknowledgment for a general call",
>
> So, what's the point after your confirmation that both variants are
> okay?
>
It shouldn't be changed. I must have skip revert it to the original
>
>> +#include <linux/errno.h>
>> +#include <linux/err.h>
>> +#include <linux/i2c.h>
>> +#include <linux/interrupt.h>
>> +#include <linux/io.h>
>> +#include <linux/pm_runtime.h>
>
>> +#include <linux/delay.h>
>> +#include <linux/module.h>
>
> Alphabetical order?
>
Also here.
>> +int i2c_dw_init_slave(struct dw_i2c_dev *dev)
>> +{
>> + u32 sda_falling_time, scl_falling_time;
>> + u32 reg, comp_param1;
>> + u32 hcnt, lcnt;
>> + int ret;
>> +
>> + ret = i2c_dw_acquire_lock(dev);
>> + if (ret)
>> + return ret;
>> +
>> + reg = dw_readl(dev, DW_IC_COMP_TYPE);
>> + if (reg == ___constant_swab32(DW_IC_COMP_TYPE_VALUE)) {
>> + /* Configure register endianness access. */
>> + dev->accessor_flags |= ACCESS_SWAP;
>> + } else if (reg == (DW_IC_COMP_TYPE_VALUE & 0x0000ffff)) {
>> + /* Configure register access mode 16bit. */
>> + dev->accessor_flags |= ACCESS_16BIT;
>> + } else if (reg != DW_IC_COMP_TYPE_VALUE) {
>
>> + dev_err(dev->dev,
>> + "Unknown Synopsys component type: 0x%08x\n",
>> reg);
>
> Is it correct indentation?
I will fix it.
>
>> + i2c_dw_release_lock(dev);
>> + return -ENODEV;
>> + }
>> +
>> + comp_param1 = dw_readl(dev, DW_IC_COMP_PARAM_1);
>> +
>> + /* Disable the adapter. */
>> + __i2c_dw_enable_and_wait(dev, false);
>> +
>> + /* Set standard and fast speed deviders for high/low periods.
>> */
>> + sda_falling_time = dev->sda_falling_time ?: 300; /* ns */
>> + scl_falling_time = dev->scl_falling_time ?: 300; /* ns */
>> +
>> + /* Set SCL timing parameters for standard-mode. */
>> + if (dev->ss_hcnt && dev->ss_lcnt) {
>> + hcnt = dev->ss_hcnt;
>> + lcnt = dev->ss_lcnt;
>> + } else {
>> + hcnt = i2c_dw_scl_hcnt(i2c_dw_clk_rate(dev),
>> + 4000, /* tHD;STA =
>> tHIGH = 4.0 us */
>> + sda_falling_time,
>> + 0, /* 0: DW default,
>> 1: Ideal */
>> + 0); /* No offset */
>> + lcnt = i2c_dw_scl_lcnt(i2c_dw_clk_rate(dev),
>> + 4700, /* tLOW = 4.7 us
>> */
>> + scl_falling_time,
>> + 0); /* No offset */
>> + }
>> + dw_writel(dev, hcnt, DW_IC_SS_SCL_HCNT);
>> + dw_writel(dev, lcnt, DW_IC_SS_SCL_LCNT);
>> + dev_dbg(dev->dev, "Standard-mode HCNT:LCNT = %d:%d\n", hcnt,
>> lcnt);
>> +
>> + /* Set SCL timing parameters for fast-mode or fast-mode plus.
>> */
>> + if ((dev->clk_freq == 1000000) && dev->fp_hcnt && dev-
>>> fp_lcnt) {
>> + hcnt = dev->fp_hcnt;
>> + lcnt = dev->fp_lcnt;
>> + } else if (dev->fs_hcnt && dev->fs_lcnt) {
>> + hcnt = dev->fs_hcnt;
>> + lcnt = dev->fs_lcnt;
>> + } else {
>> + hcnt = i2c_dw_scl_hcnt(i2c_dw_clk_rate(dev),
>> + 600, /* tHD;STA =
>> tHIGH = 0.6 us */
>> + sda_falling_time,
>> + 0, /* 0: DW default,
>> 1: Ideal */
>> + 0); /* No offset */
>> + lcnt = i2c_dw_scl_lcnt(i2c_dw_clk_rate(dev),
>> + 1300, /* tLOW = 1.3 us
>> */
>> + scl_falling_time,
>> + 0); /* No offset */
>> + }
>> + dw_writel(dev, hcnt, DW_IC_FS_SCL_HCNT);
>> + dw_writel(dev, lcnt, DW_IC_FS_SCL_LCNT);
>> + dev_dbg(dev->dev, "Fast-mode HCNT:LCNT = %d:%d\n", hcnt,
>> lcnt);
>> +
>> + if ((dev->slave_cfg & DW_IC_CON_SPEED_MASK) ==
>> + DW_IC_CON_SPEED_HIGH) {
>> + if ((comp_param1 &
>> DW_IC_COMP_PARAM_1_SPEED_MODE_MASK)
>> + != DW_IC_COMP_PARAM_1_SPEED_MODE_HIGH) {
>> + dev_err(dev->dev, "High Speed not
>> supported!\n");
>> + dev->slave_cfg &= ~DW_IC_CON_SPEED_MASK;
>> + dev->slave_cfg |= DW_IC_CON_SPEED_FAST;
>> + } else if (dev->hs_hcnt && dev->hs_lcnt) {
>> + hcnt = dev->hs_hcnt;
>> + lcnt = dev->hs_lcnt;
>> + dw_writel(dev, hcnt, DW_IC_HS_SCL_HCNT);
>> + dw_writel(dev, lcnt, DW_IC_HS_SCL_LCNT);
>> + dev_dbg(dev->dev, "HighSpeed-mode HCNT:LCNT =
>> %d:%d\n",
>> + hcnt, lcnt);
>> + }
>> + }
>> +
>> + /* Configure SDA Hold Time if required. */
>> + reg = dw_readl(dev, DW_IC_COMP_VERSION);
>> + if (reg >= DW_IC_SDA_HOLD_MIN_VERS) {
>> + if (!dev->sda_hold_time) {
>> + /* Keep previous hold time setting if no one
>> set it. */
>> + dev->sda_hold_time = dw_readl(dev,
>> DW_IC_SDA_HOLD);
>> + }
>> + /*
>> + * Workaround for avoiding TX arbitration lost in
>> case I2C
>> + * slave pulls SDA down "too quickly" after falling
>> egde of
>> + * SCL by enabling non-zero SDA RX hold.
>> Specification says it
>> + * extends incoming SDA low to high transition while
>> SCL is
>> + * high but it apprears to help also above issue.
>> + */
>> + if (!(dev->sda_hold_time & DW_IC_SDA_HOLD_RX_MASK))
>> + dev->sda_hold_time |= 1 <<
>> DW_IC_SDA_HOLD_RX_SHIFT;
>> + dw_writel(dev, dev->sda_hold_time, DW_IC_SDA_HOLD);
>> + } else {
>> + dev_warn(dev->dev,
>> + "Hardware too old to adjust SDA hold
>> time.\n");
>> + }
>> +
>> + i2c_dw_configure_fifo_slave(dev);
>> + i2c_dw_release_lock(dev);
>> +
>> + return 0;
>> +}
>> +EXPORT_SYMBOL_GPL(i2c_dw_init_slave);
>
> Can we introduce ops structure for those? (private callbacks)
>
I will check that.
> You increase noise in namespace by several i2c_dw_*() functions.
> Introduction of ops will keep everything private.
>
>
>> +
>> +int i2c_dw_reg_slave(struct i2c_client *slave)
>> +{
>> + struct dw_i2c_dev *dev = i2c_get_adapdata(slave->adapter);
>> +
>> + if (dev->slave)
>> + return -EBUSY;
>> + if (slave->flags & I2C_CLIENT_TEN)
>> + return -EAFNOSUPPORT;
>
>> + /*
>> + * Set slave address in the IC_SAR register,
>> + * the address to which the DW_apb_i2c responds.
>> + */
>
> Wrong indentation?
>
Yes, I will fix it.
>> +
>> + __i2c_dw_enable(dev, false);
>> + dw_writel(dev, slave->addr, DW_IC_SAR);
>> + dev->slave = slave;
>> +
>> + __i2c_dw_enable(dev, true);
>> +
>> + dev->cmd_err = 0;
>> + dev->msg_write_idx = 0;
>> + dev->msg_read_idx = 0;
>> + dev->msg_err = 0;
>> + dev->status = STATUS_IDLE;
>> + dev->abort_source = 0;
>> + dev->rx_outstanding = 0;
>> +
>> + return 0;
>> +}
>> +
>> +static int i2c_dw_unreg_slave(struct i2c_client *slave)
>> +{
>> + struct dw_i2c_dev *dev = i2c_get_adapdata(slave->adapter);
>> +
>> + i2c_dw_disable_int_slave(dev);
>> + i2c_dw_disable_slave(dev);
>
>> + dev->slave = NULL;
>
> Extra spaces, remove.
>
>> +
>> + return 0;
>> +}
>>
>
>> +static int i2c_dw_irq_handler_slave(struct dw_i2c_dev *dev)
>> +{
>> + u32 raw_stat, stat, enabled;
>> + u8 val, slave_activity;
>> +
>> + stat = dw_readl(dev, DW_IC_INTR_STAT);
>> + enabled = dw_readl(dev, DW_IC_ENABLE);
>> + raw_stat = dw_readl(dev, DW_IC_RAW_INTR_STAT);
>> + slave_activity = ((dw_readl(dev, DW_IC_STATUS) &
>> + DW_IC_STATUS_SLAVE_ACTIVITY) >> 6);
>> +
>> + if (!enabled || !(raw_stat & ~DW_IC_INTR_ACTIVITY))
>> + return 0;
>> +
>> + dev_dbg(dev->dev,
>> + "%s: %#x SLAVE_ACTV=%#x : RAW_INTR_STAT=%#x :
>> INTR_STAT=%#x\n",
>> + __func__, enabled, slave_activity, raw_stat, stat);
>
> __func__ is redundant.
>
>> +
>> + if (stat & DW_IC_INTR_RESTART_DET)
>> + dw_readl(dev, DW_IC_CLR_RESTART_DET);
>> + if (stat & DW_IC_INTR_START_DET)
>> + dw_readl(dev, DW_IC_CLR_START_DET);
>> + if (stat & DW_IC_INTR_ACTIVITY)
>> + dw_readl(dev, DW_IC_CLR_ACTIVITY);
>> + if (stat & DW_IC_INTR_RX_OVER)
>> + dw_readl(dev, DW_IC_CLR_RX_OVER);
>> + if ((stat & DW_IC_INTR_RX_FULL) && (stat &
>> DW_IC_INTR_STOP_DET))
>> + i2c_slave_event(dev->slave,
>> I2C_SLAVE_WRITE_REQUESTED, &val);
>> +
>> + if (slave_activity) {
>> + if (stat & DW_IC_INTR_RD_REQ) {
>> + if (stat & DW_IC_INTR_RX_FULL) {
>> + val = dw_readl(dev, DW_IC_DATA_CMD);
>> + if (!i2c_slave_event(dev->slave,
>> + I2C_SLAVE_WRITE_RECEIVED, &val)) {
>> + dev_dbg(dev->dev, "Byte %X
>> acked!",
>> + val);
>
> Perhaps dev_vdbg() ?
>
>> + }
>> + dw_readl(dev, DW_IC_CLR_RD_REQ);
>> + stat =
>> i2c_dw_read_clear_intrbits_slave(dev);
>> + } else {
>> + dw_readl(dev, DW_IC_CLR_RD_REQ);
>> + dw_readl(dev, DW_IC_CLR_RX_UNDER);
>> + stat =
>> i2c_dw_read_clear_intrbits_slave(dev);
>> + }
>> + if (!i2c_slave_event(dev->slave,
>> + I2C_SLAVE_READ_REQUESTED,
>> &val))
>> + dw_writel(dev, val, DW_IC_DATA_CMD);
>> + }
>> + }
>> +
>> + if (stat & DW_IC_INTR_RX_DONE) {
>> + if (!i2c_slave_event(dev->slave,
>> I2C_SLAVE_READ_PROCESSED,
>> + &val))
>> + dw_readl(dev, DW_IC_CLR_RX_DONE);
>> +
>> + i2c_slave_event(dev->slave, I2C_SLAVE_STOP, &val);
>> + stat = i2c_dw_read_clear_intrbits_slave(dev);
>
>> + return true;
>
> Mistype of value. Should be 1?
Yes:
i2c_slave_event(dev->slave,I2C_SLAVE_READ_PROCESSED) always returns 0 and
updates &val. I can not use "if" if you think its better.
>
>> + }
>> +
>> + if (stat & DW_IC_INTR_RX_FULL) {
>> + val = dw_readl(dev, DW_IC_DATA_CMD);
>> + if (!i2c_slave_event(dev->slave,
>> I2C_SLAVE_WRITE_RECEIVED,
>> + &val))
>> + dev_dbg(dev->dev, "Byte %X acked!", val);
>
> dev_vdbg() ?
>
>> + } else {
>> + i2c_slave_event(dev->slave, I2C_SLAVE_STOP, &val);
>> + stat = i2c_dw_read_clear_intrbits_slave(dev);
>> + }
>> +
>> + if (stat & DW_IC_INTR_TX_OVER)
>> + dw_readl(dev, DW_IC_CLR_TX_OVER);
>> +
>> + return 1;
>> +}
>> +
>> +static irqreturn_t i2c_dw_isr_slave(int this_irq, void *dev_id)
>> +{
>> + struct dw_i2c_dev *dev = dev_id;
>> + int ret;
>> +
>> + i2c_dw_read_clear_intrbits_slave(dev);
>>
>
>> + ret = i2c_dw_irq_handler_slave(dev);
>> +
>
> Swap these lines.
>
>> + if (ret > 0)
>> + complete(&dev->cmd_complete);
>> +
>> + return IRQ_RETVAL(ret);
>> +}
>
>
>> +
>> +int i2c_dw_probe_slave(struct dw_i2c_dev *dev)
>> +{
>> + struct i2c_adapter *adap = &dev->adapter;
>> + int ret;
>> +
>> + init_completion(&dev->cmd_complete);
>> +
>> + ret = i2c_dw_init_slave(dev);
>> + if (ret)
>> + return ret;
>> +
>>
>
>> + ret = i2c_dw_acquire_lock(dev);
>> + if (ret)
>> + return ret;
>
> I'm not sure you need this in slave code.
I will check that.
>
>> +
>> + i2c_dw_release_lock(dev);
>> + snprintf(adap->name, sizeof(adap->name),
>> + "Synopsys DesignWare I2C Slave adapter");
>> + adap->retries = 3;
>> + adap->algo = &i2c_dw_algo;
>> + adap->dev.parent = dev->dev;
>> + i2c_set_adapdata(adap, dev);
>> +
>> + ret = devm_request_irq(dev->dev, dev->irq, i2c_dw_isr_slave,
>> + IRQF_SHARED, dev_name(dev->dev), dev);
>> + if (ret) {
>> + dev_err(dev->dev, "failure requesting irq %i: %d\n",
>> + dev->irq, ret);
>> + return ret;
>> + }
>
>> + /*
>> + * Increment PM usage count during adapter registration in
>> order to
>> + * avoid possible spurious runtime suspend when adapter
>> device is
>> + * registered to the device core and immediate resume in case
>> bus has
>> + * registered I2C slaves that do I2C transfers in their
>> probe.
>> + */
>> + pm_runtime_get_noresume(dev->dev);
>
> Looks like you blindly copied this from master code. This is about slave
> enumeration. How does it related to slave mode?
Yes, huge mistake. Sorry
>
>> + ret = i2c_add_numbered_adapter(adap);
>> + if (ret)
>> + dev_err(dev->dev, "failure adding adapter: %d\n",
>> ret);
>> + pm_runtime_put_noidle(dev->dev);
>> +
>> + return ret;
>> +}
>> +EXPORT_SYMBOL_GPL(i2c_dw_probe_slave);
>
>
On Wed, 2016-12-28 at 15:53 +0000, Luis Oliveira wrote:
> On 28-Dec-16 15:44, Andy Shevchenko wrote:
> > On Wed, 2016-12-28 at 14:43 +0000, Luis Oliveira wrote:
> > > - Slave mode selected in platform module (devicetree support only)
> > > - Check for ACPI - not supported in SLAVE mode:
> > > - Changed the ifndef style to the use of ACPI_HANDLE that
> > > returns
> > > NULL
> > > if the device was not enumerated from ACPI namespace.
> >
> > I'm not sure what is wrong with ACPI?
>
> I dont have a way to test it. Just that.
Okay, can you provide an excerpt to see how it will look like in DTS?
> > > - dev->functionality = I2C_FUNC_10BIT_ADDR |
> > > DW_IC_DEFAULT_FUNCTIONALITY;
> > > -
> > > - i2c_dw_configure_master(pdev);
> > > + if (ACPI_HANDLE(&pdev->dev) == NULL) {
> >
> > I don't think you need this at all.
>
> This is to avoid the use of the "ifdef" style I used before.
My point is to drop it completely.
> >
> > > + device_for_each_child_node(&pdev->dev, child) {
> >
> > This is resource agnostic.
> >
> > > + fwnode_property_read_u32(child, "reg",
> > > ®);
> >
> > This is as well.
>
> Are you suggesting I use of_ functions?
Nope. See above.
--
Andy Shevchenko <[email protected]>
Intel Finland Oy
On 28-Dec-16 16:31, Andy Shevchenko wrote:
> On Wed, 2016-12-28 at 15:53 +0000, Luis Oliveira wrote:
>> On 28-Dec-16 15:44, Andy Shevchenko wrote:
>>> On Wed, 2016-12-28 at 14:43 +0000, Luis Oliveira wrote:
>>>> - Slave mode selected in platform module (devicetree support only)
>>>> - Check for ACPI - not supported in SLAVE mode:
>>>> - Changed the ifndef style to the use of ACPI_HANDLE that
>>>> returns
>>>> NULL
>>>> if the device was not enumerated from ACPI namespace.
>>>
>>> I'm not sure what is wrong with ACPI?
>>
>> I dont have a way to test it. Just that.
>
> Okay, can you provide an excerpt to see how it will look like in DTS?
Yes, it looks like this now:
i2c@0x2000 {
compatible = "snps,designware-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x2000 0x100>;
clock-frequency = <400000>;
clocks = <&i2cclk>;
interrupts = <0>;
eeprom@64 {
compatible = "linux,slave-24c02";
reg = <0x40000064>;
};
};
>
>
>>>> - dev->functionality = I2C_FUNC_10BIT_ADDR |
>>>> DW_IC_DEFAULT_FUNCTIONALITY;
>>>> -
>>>> - i2c_dw_configure_master(pdev);
>>>> + if (ACPI_HANDLE(&pdev->dev) == NULL) {
>>>
>>> I don't think you need this at all.
>>
>> This is to avoid the use of the "ifdef" style I used before.
>
> My point is to drop it completely.
>
>>>
>>>> + device_for_each_child_node(&pdev->dev, child) {
>>>
>>> This is resource agnostic.
>>>
>>>> + fwnode_property_read_u32(child, "reg",
>>>> ®);
>>>
>>> This is as well.
>>
>> Are you suggesting I use of_ functions?
>
> Nope. See above.
>
>
On 28-12-2016 16:41, Luis Oliveira wrote:
> On 28-Dec-16 16:31, Andy Shevchenko wrote:
>> On Wed, 2016-12-28 at 15:53 +0000, Luis Oliveira wrote:
>>> On 28-Dec-16 15:44, Andy Shevchenko wrote:
>>>> On Wed, 2016-12-28 at 14:43 +0000, Luis Oliveira wrote:
>>>>> - Slave mode selected in platform module (devicetree support only)
>>>>> - Check for ACPI - not supported in SLAVE mode:
>>>>> - Changed the ifndef style to the use of ACPI_HANDLE that
>>>>> returns
>>>>> NULL
>>>>> if the device was not enumerated from ACPI namespace.
>>>>
>>>> I'm not sure what is wrong with ACPI?
>>>
>>> I dont have a way to test it. Just that.
>>
>> Okay, can you provide an excerpt to see how it will look like in DTS?
>
> Yes, it looks like this now:
>
> i2c@0x2000 {
> compatible = "snps,designware-i2c";
> #address-cells = <1>;
> #size-cells = <0>;
> reg = <0x2000 0x100>;
> clock-frequency = <400000>;
> clocks = <&i2cclk>;
> interrupts = <0>;
>
> eeprom@64 {
> compatible = "linux,slave-24c02";
> reg = <0x40000064>;
> };
> };
Probably this can be included as example in the device tree binding document.
>>
>>>>> - dev->functionality = I2C_FUNC_10BIT_ADDR |
>>>>> DW_IC_DEFAULT_FUNCTIONALITY;
>>>>> -
>>>>> - i2c_dw_configure_master(pdev);
>>>>> + if (ACPI_HANDLE(&pdev->dev) == NULL) {
>>>>
>>>> I don't think you need this at all.
>>>
>>> This is to avoid the use of the "ifdef" style I used before.
>>
>> My point is to drop it completely.
>>
>>>>
>>>>> + device_for_each_child_node(&pdev->dev, child) {
>>>>
>>>> This is resource agnostic.
>>>>
>>>>> + fwnode_property_read_u32(child, "reg",
>>>>> ®);
>>>>
>>>> This is as well.
>>>
>>> Are you suggesting I use of_ functions?
>>
>> Nope. See above.
>>
>>
>
On Wed, 2016-12-28 at 16:41 +0000, Luis Oliveira wrote:
> On 28-Dec-16 16:31, Andy Shevchenko wrote:
> > On Wed, 2016-12-28 at 15:53 +0000, Luis Oliveira wrote:
> > > On 28-Dec-16 15:44, Andy Shevchenko wrote:
> > > > On Wed, 2016-12-28 at 14:43 +0000, Luis Oliveira wrote:
> > > > > - Slave mode selected in platform module (devicetree support
> > > > > only)
> > > > > - Check for ACPI - not supported in SLAVE mode:
> > > > > - Changed the ifndef style to the use of ACPI_HANDLE that
> > > > > returns
> > > > > NULL
> > > > > if the device was not enumerated from ACPI namespace.
> > > >
> > > > I'm not sure what is wrong with ACPI?
> > >
> > > I dont have a way to test it. Just that.
> >
> > Okay, can you provide an excerpt to see how it will look like in
> > DTS?
>
> Yes, it looks like this now:
>
> i2c@0x2000 {
> compatible = "snps,designware-i2c";
> #address-cells = <1>;
> #size-cells = <0>;
> reg = <0x2000 0x100>;
> clock-frequency = <400000>;
> clocks = <&i2cclk>;
> interrupts = <0>;
>
> eeprom@64 {
> compatible = "linux,slave-24c02";
> reg = <0x40000064>;
> };
> };
+1 to Carlos' comment.
> >
> > > > > - dev->functionality = I2C_FUNC_10BIT_ADDR |
> > > > > DW_IC_DEFAULT_FUNCTIONALITY;
> > > > > -
> > > > > - i2c_dw_configure_master(pdev);
> > > > > + if (ACPI_HANDLE(&pdev->dev) == NULL) {
> > > >
> > > > I don't think you need this at all.
> > >
> > > This is to avoid the use of the "ifdef" style I used before.
> >
> > My point is to drop it completely.
> >
> > > >
> > > > > + device_for_each_child_node(&pdev->dev, child)
> > > > > {
> > > >
> > > > This is resource agnostic.
> > > >
> > > > > + fwnode_property_read_u32(child,
> > > > > "reg",
> > > > > ®);
> > > >
> > > > This is as well.
> > >
> > > Are you suggesting I use of_ functions?
> >
> > Nope. See above.
So, ACPI has a property to support slave mode for I2CSerialBus() macro.
I would propose to create a helper function in i2c-core.c which will be
responsible for mode detection
... i2c_slave_mode_detect()
{
...
if (IS_BUILTIN(CONFIG_OF) && dev->of_node) {
... (use of_*() here) ...
} else if (IS_BUILTIN(CONFIG_ACPI) && ACPI_HANDLE(dev))
dev_dbg(..., "ACPI slave is not supported yet\n");
... to master ...
} else {
... default to master ...
}
}
EXPORT_...();
Make it as a separate patch.
--
Andy Shevchenko <[email protected]>
Intel Finland Oy
On 28-Dec-16 17:10, Andy Shevchenko wrote:
> On Wed, 2016-12-28 at 16:41 +0000, Luis Oliveira wrote:
>> On 28-Dec-16 16:31, Andy Shevchenko wrote:
>>> On Wed, 2016-12-28 at 15:53 +0000, Luis Oliveira wrote:
>>>> On 28-Dec-16 15:44, Andy Shevchenko wrote:
>>>>> On Wed, 2016-12-28 at 14:43 +0000, Luis Oliveira wrote:
>>>>>> - Slave mode selected in platform module (devicetree support
>>>>>> only)
>>>>>> - Check for ACPI - not supported in SLAVE mode:
>>>>>> - Changed the ifndef style to the use of ACPI_HANDLE that
>>>>>> returns
>>>>>> NULL
>>>>>> if the device was not enumerated from ACPI namespace.
>>>>>
>>>>> I'm not sure what is wrong with ACPI?
>>>>
>>>> I dont have a way to test it. Just that.
>>>
>>> Okay, can you provide an excerpt to see how it will look like in
>>> DTS?
>>
>> Yes, it looks like this now:
>>
>> i2c@0x2000 {
>> compatible = "snps,designware-i2c";
>> #address-cells = <1>;
>> #size-cells = <0>;
>> reg = <0x2000 0x100>;
>> clock-frequency = <400000>;
>> clocks = <&i2cclk>;
>> interrupts = <0>;
>>
>> eeprom@64 {
>> compatible = "linux,slave-24c02";
>> reg = <0x40000064>;
>> };
>> };
>
> +1 to Carlos' comment.
Agree, I'm on it.
>
>>>
>>>>>> - dev->functionality = I2C_FUNC_10BIT_ADDR |
>>>>>> DW_IC_DEFAULT_FUNCTIONALITY;
>>>>>> -
>>>>>> - i2c_dw_configure_master(pdev);
>>>>>> + if (ACPI_HANDLE(&pdev->dev) == NULL) {
>>>>>
>>>>> I don't think you need this at all.
>>>>
>>>> This is to avoid the use of the "ifdef" style I used before.
>>>
>>> My point is to drop it completely.
>>>
>>>>>
>>>>>> + device_for_each_child_node(&pdev->dev, child)
>>>>>> {
>>>>>
>>>>> This is resource agnostic.
>>>>>
>>>>>> + fwnode_property_read_u32(child,
>>>>>> "reg",
>>>>>> ®);
>>>>>
>>>>> This is as well.
>>>>
>>>> Are you suggesting I use of_ functions?
>>>
>>> Nope. See above.
>
> So, ACPI has a property to support slave mode for I2CSerialBus() macro.
>
> I would propose to create a helper function in i2c-core.c which will be
> responsible for mode detection
>
> ... i2c_slave_mode_detect()
> {
> ...
> if (IS_BUILTIN(CONFIG_OF) && dev->of_node) {
> ... (use of_*() here) ...
> } else if (IS_BUILTIN(CONFIG_ACPI) && ACPI_HANDLE(dev))
> dev_dbg(..., "ACPI slave is not supported yet\n");
> ... to master ...
> } else {
> ... default to master ...
> }
> }
> EXPORT_...();
>
> Make it as a separate patch.
>
Oh I see, yes it looks good. I will check it. Thanks
Hi Luis,
[auto build test ERROR on wsa/i2c/for-next]
[also build test ERROR on v4.10-rc1 next-20161224]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Luis-Oliveira/i2c-designware-Cleaning-and-comment-style-fixes/20161229-010120
base: https://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git i2c/for-next
config: i386-randconfig-c0-01010626 (attached as .config)
compiler: gcc-4.9 (Debian 4.9.4-2) 4.9.4
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
All errors (new ones prefixed by >>):
drivers/i2c/busses/i2c-designware-slave.c: In function 'i2c_dw_irq_handler_slave':
>> drivers/i2c/busses/i2c-designware-slave.c:293:3: error: implicit declaration of function 'i2c_slave_event' [-Werror=implicit-function-declaration]
i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_REQUESTED, &val);
^
>> drivers/i2c/busses/i2c-designware-slave.c:293:31: error: 'I2C_SLAVE_WRITE_REQUESTED' undeclared (first use in this function)
i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_REQUESTED, &val);
^
drivers/i2c/busses/i2c-designware-slave.c:293:31: note: each undeclared identifier is reported only once for each function it appears in
In file included from include/linux/err.h:4:0,
from drivers/i2c/busses/i2c-designware-slave.c:23:
>> drivers/i2c/busses/i2c-designware-slave.c:300:6: error: 'I2C_SLAVE_WRITE_RECEIVED' undeclared (first use in this function)
I2C_SLAVE_WRITE_RECEIVED, &val)) {
^
include/linux/compiler.h:149:30: note: in definition of macro '__trace_if'
if (__builtin_constant_p(!!(cond)) ? !!(cond) : \
^
drivers/i2c/busses/i2c-designware-slave.c:299:5: note: in expansion of macro 'if'
if (!i2c_slave_event(dev->slave,
^
>> drivers/i2c/busses/i2c-designware-slave.c:312:7: error: 'I2C_SLAVE_READ_REQUESTED' undeclared (first use in this function)
I2C_SLAVE_READ_REQUESTED, &val))
^
include/linux/compiler.h:149:30: note: in definition of macro '__trace_if'
if (__builtin_constant_p(!!(cond)) ? !!(cond) : \
^
drivers/i2c/busses/i2c-designware-slave.c:311:4: note: in expansion of macro 'if'
if (!i2c_slave_event(dev->slave,
^
>> drivers/i2c/busses/i2c-designware-slave.c:318:36: error: 'I2C_SLAVE_READ_PROCESSED' undeclared (first use in this function)
if (!i2c_slave_event(dev->slave, I2C_SLAVE_READ_PROCESSED,
^
include/linux/compiler.h:149:30: note: in definition of macro '__trace_if'
if (__builtin_constant_p(!!(cond)) ? !!(cond) : \
^
drivers/i2c/busses/i2c-designware-slave.c:318:3: note: in expansion of macro 'if'
if (!i2c_slave_event(dev->slave, I2C_SLAVE_READ_PROCESSED,
^
>> drivers/i2c/busses/i2c-designware-slave.c:322:31: error: 'I2C_SLAVE_STOP' undeclared (first use in this function)
i2c_slave_event(dev->slave, I2C_SLAVE_STOP, &val);
^
drivers/i2c/busses/i2c-designware-slave.c: At top level:
>> drivers/i2c/busses/i2c-designware-slave.c:359:2: error: unknown field 'reg_slave' specified in initializer
.reg_slave = i2c_dw_reg_slave,
^
drivers/i2c/busses/i2c-designware-slave.c:359:2: warning: excess elements in struct initializer
drivers/i2c/busses/i2c-designware-slave.c:359:2: warning: (near initialization for 'i2c_dw_algo')
>> drivers/i2c/busses/i2c-designware-slave.c:360:2: error: unknown field 'unreg_slave' specified in initializer
.unreg_slave = i2c_dw_unreg_slave,
^
drivers/i2c/busses/i2c-designware-slave.c:360:2: warning: excess elements in struct initializer
drivers/i2c/busses/i2c-designware-slave.c:360:2: warning: (near initialization for 'i2c_dw_algo')
cc1: some warnings being treated as errors
vim +/i2c_slave_event +293 drivers/i2c/busses/i2c-designware-slave.c
287 dw_readl(dev, DW_IC_CLR_START_DET);
288 if (stat & DW_IC_INTR_ACTIVITY)
289 dw_readl(dev, DW_IC_CLR_ACTIVITY);
290 if (stat & DW_IC_INTR_RX_OVER)
291 dw_readl(dev, DW_IC_CLR_RX_OVER);
292 if ((stat & DW_IC_INTR_RX_FULL) && (stat & DW_IC_INTR_STOP_DET))
> 293 i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_REQUESTED, &val);
294
295 if (slave_activity) {
296 if (stat & DW_IC_INTR_RD_REQ) {
297 if (stat & DW_IC_INTR_RX_FULL) {
298 val = dw_readl(dev, DW_IC_DATA_CMD);
299 if (!i2c_slave_event(dev->slave,
> 300 I2C_SLAVE_WRITE_RECEIVED, &val)) {
301 dev_dbg(dev->dev, "Byte %X acked!",
302 val);
303 }
304 dw_readl(dev, DW_IC_CLR_RD_REQ);
305 stat = i2c_dw_read_clear_intrbits_slave(dev);
306 } else {
307 dw_readl(dev, DW_IC_CLR_RD_REQ);
308 dw_readl(dev, DW_IC_CLR_RX_UNDER);
309 stat = i2c_dw_read_clear_intrbits_slave(dev);
310 }
311 if (!i2c_slave_event(dev->slave,
> 312 I2C_SLAVE_READ_REQUESTED, &val))
313 dw_writel(dev, val, DW_IC_DATA_CMD);
314 }
315 }
316
317 if (stat & DW_IC_INTR_RX_DONE) {
> 318 if (!i2c_slave_event(dev->slave, I2C_SLAVE_READ_PROCESSED,
319 &val))
320 dw_readl(dev, DW_IC_CLR_RX_DONE);
321
> 322 i2c_slave_event(dev->slave, I2C_SLAVE_STOP, &val);
323 stat = i2c_dw_read_clear_intrbits_slave(dev);
324 return true;
325 }
326
327 if (stat & DW_IC_INTR_RX_FULL) {
328 val = dw_readl(dev, DW_IC_DATA_CMD);
329 if (!i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_RECEIVED,
330 &val))
331 dev_dbg(dev->dev, "Byte %X acked!", val);
332 } else {
333 i2c_slave_event(dev->slave, I2C_SLAVE_STOP, &val);
334 stat = i2c_dw_read_clear_intrbits_slave(dev);
335 }
336
337 if (stat & DW_IC_INTR_TX_OVER)
338 dw_readl(dev, DW_IC_CLR_TX_OVER);
339
340 return 1;
341 }
342
343 static irqreturn_t i2c_dw_isr_slave(int this_irq, void *dev_id)
344 {
345 struct dw_i2c_dev *dev = dev_id;
346 int ret;
347
348 i2c_dw_read_clear_intrbits_slave(dev);
349 ret = i2c_dw_irq_handler_slave(dev);
350
351 if (ret > 0)
352 complete(&dev->cmd_complete);
353
354 return IRQ_RETVAL(ret);
355 }
356
357 static struct i2c_algorithm i2c_dw_algo = {
358 .functionality = i2c_dw_func,
> 359 .reg_slave = i2c_dw_reg_slave,
> 360 .unreg_slave = i2c_dw_unreg_slave,
361 };
362
363 void i2c_dw_disable_slave(struct dw_i2c_dev *dev)
---
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