The STM32F7 MCU family embeds two DWC2 USB OTG cores. One core is USB
OTG FS and the other is USB OTG HS. The USB FS core only works with its
internal phy whilst the USB HS core can work in HS with external ULPI phy
or in FS/LS with the on-chip FS phy.
Amelie Delaunay (7):
dt-bindings: usb: Document the STM32F7 DWC2 USB OTG HS core binding
usb: dwc2: add support for STM32F7 USB OTG HS
ARM: dts: stm32: Add USB HS support for STM32F746 MCU
ARM: dts: stm32: Enable USB HS on stm32746g-eval
ARM: dts: stm32: Enable USB HS on stm32f746-disco
ARM: dts: stm32: Add USB FS support for STM32F746 MCU
ARM: dts: stm32: Enable USB FS on stm32f746-disco
Documentation/devicetree/bindings/usb/dwc2.txt | 2 +
arch/arm/boot/dts/stm32746g-eval.dts | 16 ++++++
arch/arm/boot/dts/stm32f746-disco.dts | 30 ++++++++++
arch/arm/boot/dts/stm32f746.dtsi | 80 ++++++++++++++++++++++++++
drivers/usb/dwc2/params.c | 11 ++++
5 files changed, 139 insertions(+)
--
2.7.4
This patch adds binding documentation for DWC2 controller in HS mode found
on STMicroelectronics STM32F7 SoC.
Signed-off-by: Amelie Delaunay <[email protected]>
---
Documentation/devicetree/bindings/usb/dwc2.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt b/Documentation/devicetree/bindings/usb/dwc2.txt
index fcf199b..46da5f1 100644
--- a/Documentation/devicetree/bindings/usb/dwc2.txt
+++ b/Documentation/devicetree/bindings/usb/dwc2.txt
@@ -19,6 +19,8 @@ Required properties:
configured in FS mode;
- "st,stm32f4x9-hsotg": The DWC2 USB HS controller instance in STM32F4x9 SoCs
configured in HS mode;
+ - "st,stm32f7-hsotg": The DWC2 USB HS controller instance in STM32F7 SoCs
+ configured in HS mode;
- reg : Should contain 1 register range (address and length)
- interrupts : Should contain 1 interrupt
- clocks: clock provider specifier
--
2.7.4
This patch adds the USB pins and nodes for USB FS core on STM32F746 SoC.
Signed-off-by: Amelie Delaunay <[email protected]>
---
arch/arm/boot/dts/stm32f746.dtsi | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
index 5d0cc72..b605445 100644
--- a/arch/arm/boot/dts/stm32f746.dtsi
+++ b/arch/arm/boot/dts/stm32f746.dtsi
@@ -401,6 +401,28 @@
slew-rate = <2>;
};
};
+
+ usbotg_fs_pins_a: usbotg-fs@0 {
+ pins {
+ pinmux = <STM32F746_PA10_FUNC_OTG_FS_ID>,
+ <STM32F746_PA11_FUNC_OTG_FS_DM>,
+ <STM32F746_PA12_FUNC_OTG_FS_DP>;
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <2>;
+ };
+ };
+
+ usbotg_fs_pins_b: usbotg-fs@1 {
+ pins {
+ pinmux = <STM32F746_PB12_FUNC_OTG_HS_ID>,
+ <STM32F746_PB14_FUNC_OTG_HS_DM>,
+ <STM32F746_PB15_FUNC_OTG_HS_DP>;
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <2>;
+ };
+ };
};
crc: crc@40023000 {
@@ -429,6 +451,15 @@
clock-names = "otg";
status = "disabled";
};
+
+ usbotg_fs: usb@50000000 {
+ compatible = "st,stm32f4x9-fsotg";
+ reg = <0x50000000 0x40000>;
+ interrupts = <67>;
+ clocks = <&rcc 0 STM32F7_AHB2_CLOCK(OTGFS)>;
+ clock-names = "otg";
+ status = "disabled";
+ };
};
};
--
2.7.4
This patch enables USB HS on stm32f746-disco (Host mode).
Signed-off-by: Amelie Delaunay <[email protected]>
---
arch/arm/boot/dts/stm32f746-disco.dts | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f746-disco.dts b/arch/arm/boot/dts/stm32f746-disco.dts
index 18f6560..8f0c3d5 100644
--- a/arch/arm/boot/dts/stm32f746-disco.dts
+++ b/arch/arm/boot/dts/stm32f746-disco.dts
@@ -61,6 +61,12 @@
serial0 = &usart1;
};
+ usbotg_hs_phy: usb-phy {
+ #phy-cells = <0>;
+ compatible = "usb-nop-xceiv";
+ clocks = <&rcc 0 STM32F7_AHB1_CLOCK(OTGHSULPI)>;
+ clock-names = "main_clk";
+ };
};
&clk_hse {
@@ -72,3 +78,12 @@
pinctrl-names = "default";
status = "okay";
};
+
+&usbotg_hs {
+ dr_mode = "host";
+ phys = <&usbotg_hs_phy>;
+ phy-names = "usb2-phy";
+ pinctrl-0 = <&usbotg_hs_pins_b>;
+ pinctrl-names = "default";
+ status = "okay";
+};
--
2.7.4
This patch adds the USB pins and nodes for USB HS core on STM32F746 SoC.
Signed-off-by: Amelie Delaunay <[email protected]>
---
arch/arm/boot/dts/stm32f746.dtsi | 49 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
index 4506eb9..5d0cc72 100644
--- a/arch/arm/boot/dts/stm32f746.dtsi
+++ b/arch/arm/boot/dts/stm32f746.dtsi
@@ -361,6 +361,46 @@
bias-disable;
};
};
+
+ usbotg_hs_pins_a: usbotg-hs@0 {
+ pins {
+ pinmux = <STM32F746_PH4_FUNC_OTG_HS_ULPI_NXT>,
+ <STM32F746_PI11_FUNC_OTG_HS_ULPI_DIR>,
+ <STM32F746_PC0_FUNC_OTG_HS_ULPI_STP>,
+ <STM32F746_PA5_FUNC_OTG_HS_ULPI_CK>,
+ <STM32F746_PA3_FUNC_OTG_HS_ULPI_D0>,
+ <STM32F746_PB0_FUNC_OTG_HS_ULPI_D1>,
+ <STM32F746_PB1_FUNC_OTG_HS_ULPI_D2>,
+ <STM32F746_PB10_FUNC_OTG_HS_ULPI_D3>,
+ <STM32F746_PB11_FUNC_OTG_HS_ULPI_D4>,
+ <STM32F746_PB12_FUNC_OTG_HS_ULPI_D5>,
+ <STM32F746_PB13_FUNC_OTG_HS_ULPI_D6>,
+ <STM32F746_PB5_FUNC_OTG_HS_ULPI_D7>;
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <2>;
+ };
+ };
+
+ usbotg_hs_pins_b: usbotg-hs@1 {
+ pins {
+ pinmux = <STM32F746_PH4_FUNC_OTG_HS_ULPI_NXT>,
+ <STM32F746_PC2_FUNC_OTG_HS_ULPI_DIR>,
+ <STM32F746_PC0_FUNC_OTG_HS_ULPI_STP>,
+ <STM32F746_PA5_FUNC_OTG_HS_ULPI_CK>,
+ <STM32F746_PA3_FUNC_OTG_HS_ULPI_D0>,
+ <STM32F746_PB0_FUNC_OTG_HS_ULPI_D1>,
+ <STM32F746_PB1_FUNC_OTG_HS_ULPI_D2>,
+ <STM32F746_PB10_FUNC_OTG_HS_ULPI_D3>,
+ <STM32F746_PB11_FUNC_OTG_HS_ULPI_D4>,
+ <STM32F746_PB12_FUNC_OTG_HS_ULPI_D5>,
+ <STM32F746_PB13_FUNC_OTG_HS_ULPI_D6>,
+ <STM32F746_PB5_FUNC_OTG_HS_ULPI_D7>;
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <2>;
+ };
+ };
};
crc: crc@40023000 {
@@ -380,6 +420,15 @@
assigned-clocks = <&rcc 1 CLK_HSE_RTC>;
assigned-clock-rates = <1000000>;
};
+
+ usbotg_hs: usb@40040000 {
+ compatible = "st,stm32f7-hsotg";
+ reg = <0x40040000 0x40000>;
+ interrupts = <77>;
+ clocks = <&rcc 0 STM32F7_AHB1_CLOCK(OTGHS)>;
+ clock-names = "otg";
+ status = "disabled";
+ };
};
};
--
2.7.4
This patch enables USB HS on stm32746g-eval (Host mode).
Signed-off-by: Amelie Delaunay <[email protected]>
---
arch/arm/boot/dts/stm32746g-eval.dts | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/stm32746g-eval.dts b/arch/arm/boot/dts/stm32746g-eval.dts
index 69a9579..03ee797 100644
--- a/arch/arm/boot/dts/stm32746g-eval.dts
+++ b/arch/arm/boot/dts/stm32746g-eval.dts
@@ -83,6 +83,13 @@
gpios = <&gpioc 13 0>;
};
};
+
+ usbotg_hs_phy: usb-phy {
+ #phy-cells = <0>;
+ compatible = "usb-nop-xceiv";
+ clocks = <&rcc 0 STM32F7_AHB1_CLOCK(OTGHSULPI)>;
+ clock-names = "main_clk";
+ };
};
&clk_hse {
@@ -102,3 +109,12 @@
pinctrl-names = "default";
status = "okay";
};
+
+&usbotg_hs {
+ dr_mode = "host";
+ phys = <&usbotg_hs_phy>;
+ phy-names = "usb2-phy";
+ pinctrl-0 = <&usbotg_hs_pins_a>;
+ pinctrl-names = "default";
+ status = "okay";
+};
--
2.7.4
This patch enables USB FS on stm32f746-disco (Host mode) with 5V VBUS
enable.
Signed-off-by: Amelie Delaunay <[email protected]>
---
arch/arm/boot/dts/stm32f746-disco.dts | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f746-disco.dts b/arch/arm/boot/dts/stm32f746-disco.dts
index 8f0c3d5..eeb430c 100644
--- a/arch/arm/boot/dts/stm32f746-disco.dts
+++ b/arch/arm/boot/dts/stm32f746-disco.dts
@@ -67,6 +67,14 @@
clocks = <&rcc 0 STM32F7_AHB1_CLOCK(OTGHSULPI)>;
clock-names = "main_clk";
};
+
+ /* This turns on vbus for otg fs for host mode (dwc2) */
+ vcc5v_otg_fs: vcc5v-otg-fs-regulator {
+ compatible = "regulator-fixed";
+ gpio = <&gpiod 5 0>;
+ regulator-name = "vcc5_host1";
+ regulator-always-on;
+ };
};
&clk_hse {
@@ -87,3 +95,10 @@
pinctrl-names = "default";
status = "okay";
};
+
+&usbotg_fs {
+ dr_mode = "host";
+ pinctrl-0 = <&usbotg_fs_pins_a>;
+ pinctrl-names = "default";
+ status = "okay";
+};
--
2.7.4
This patch adds the dwc2_set_params function for STM32F7 USB OTG HS.
Signed-off-by: Amelie Delaunay <[email protected]>
---
drivers/usb/dwc2/params.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
index a3ffe97..d5b672d 100644
--- a/drivers/usb/dwc2/params.c
+++ b/drivers/usb/dwc2/params.c
@@ -136,6 +136,15 @@ static void dwc2_set_stm32f4x9_fsotg_params(struct dwc2_hsotg *hsotg)
p->activate_stm_fs_transceiver = true;
}
+static void dwc2_set_stm32f7_hsotg_params(struct dwc2_hsotg *hsotg)
+{
+ struct dwc2_core_params *p = &hsotg->params;
+
+ p->host_rx_fifo_size = 622;
+ p->host_nperio_tx_fifo_size = 128;
+ p->host_perio_tx_fifo_size = 256;
+}
+
const struct of_device_id dwc2_of_match_table[] = {
{ .compatible = "brcm,bcm2835-usb", .data = dwc2_set_bcm_params },
{ .compatible = "hisilicon,hi6220-usb", .data = dwc2_set_his_params },
@@ -154,6 +163,8 @@ const struct of_device_id dwc2_of_match_table[] = {
{ .compatible = "st,stm32f4x9-fsotg",
.data = dwc2_set_stm32f4x9_fsotg_params },
{ .compatible = "st,stm32f4x9-hsotg" },
+ { .compatible = "st,stm32f7-hsotg",
+ .data = dwc2_set_stm32f7_hsotg_params },
{},
};
MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
--
2.7.4
On Mon, Aug 28, 2017 at 04:20:12PM +0200, Amelie Delaunay wrote:
> This patch adds binding documentation for DWC2 controller in HS mode found
> on STMicroelectronics STM32F7 SoC.
>
> Signed-off-by: Amelie Delaunay <[email protected]>
> ---
> Documentation/devicetree/bindings/usb/dwc2.txt | 2 ++
> 1 file changed, 2 insertions(+)
Acked-by: Rob Herring <[email protected]>
Hi,
Gentle ping for driver review submitted on August 28th.
Thanks,
Amelie
On 08/28/2017 04:20 PM, Amelie Delaunay wrote:
> This patch adds the dwc2_set_params function for STM32F7 USB OTG HS.
>
> Signed-off-by: Amelie Delaunay <[email protected]>
> ---
> drivers/usb/dwc2/params.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
> index a3ffe97..d5b672d 100644
> --- a/drivers/usb/dwc2/params.c
> +++ b/drivers/usb/dwc2/params.c
> @@ -136,6 +136,15 @@ static void dwc2_set_stm32f4x9_fsotg_params(struct dwc2_hsotg *hsotg)
> p->activate_stm_fs_transceiver = true;
> }
>
> +static void dwc2_set_stm32f7_hsotg_params(struct dwc2_hsotg *hsotg)
> +{
> + struct dwc2_core_params *p = &hsotg->params;
> +
> + p->host_rx_fifo_size = 622;
> + p->host_nperio_tx_fifo_size = 128;
> + p->host_perio_tx_fifo_size = 256;
> +}
> +
> const struct of_device_id dwc2_of_match_table[] = {
> { .compatible = "brcm,bcm2835-usb", .data = dwc2_set_bcm_params },
> { .compatible = "hisilicon,hi6220-usb", .data = dwc2_set_his_params },
> @@ -154,6 +163,8 @@ const struct of_device_id dwc2_of_match_table[] = {
> { .compatible = "st,stm32f4x9-fsotg",
> .data = dwc2_set_stm32f4x9_fsotg_params },
> { .compatible = "st,stm32f4x9-hsotg" },
> + { .compatible = "st,stm32f7-hsotg",
> + .data = dwc2_set_stm32f7_hsotg_params },
> {},
> };
> MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
>
On 09/29/2017 07:22 AM, Amelie DELAUNAY wrote:
> Hi,
>
> Gentle ping for driver review submitted on August 28th.
>
> Thanks,
> Amelie
>
> On 08/28/2017 04:20 PM, Amelie Delaunay wrote:
>> This patch adds the dwc2_set_params function for STM32F7 USB OTG HS.
>>
>> Signed-off-by: Amelie Delaunay <[email protected]>
>> ---
>> drivers/usb/dwc2/params.c | 11 +++++++++++
>> 1 file changed, 11 insertions(+)
>>
>> diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
>> index a3ffe97..d5b672d 100644
>> --- a/drivers/usb/dwc2/params.c
>> +++ b/drivers/usb/dwc2/params.c
>> @@ -136,6 +136,15 @@ static void dwc2_set_stm32f4x9_fsotg_params(struct dwc2_hsotg *hsotg)
>> p->activate_stm_fs_transceiver = true;
>> }
>>
>> +static void dwc2_set_stm32f7_hsotg_params(struct dwc2_hsotg *hsotg)
>> +{
>> + struct dwc2_core_params *p = &hsotg->params;
>> +
>> + p->host_rx_fifo_size = 622;
>> + p->host_nperio_tx_fifo_size = 128;
>> + p->host_perio_tx_fifo_size = 256;
>> +}
>> +
>> const struct of_device_id dwc2_of_match_table[] = {
>> { .compatible = "brcm,bcm2835-usb", .data = dwc2_set_bcm_params },
>> { .compatible = "hisilicon,hi6220-usb", .data = dwc2_set_his_params },
>> @@ -154,6 +163,8 @@ const struct of_device_id dwc2_of_match_table[] = {
>> { .compatible = "st,stm32f4x9-fsotg",
>> .data = dwc2_set_stm32f4x9_fsotg_params },
>> { .compatible = "st,stm32f4x9-hsotg" },
>> + { .compatible = "st,stm32f7-hsotg",
>> + .data = dwc2_set_stm32f7_hsotg_params },
>> {},
>> };
>> MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
>>
Acked-by: John Youn <[email protected]>
John