From: Avadhut Naik <[email protected]>
This patchset adds support for amd64_edac module and temperature monitoring,
through k10temp driver, on AMD's Family 1Ah-based models.
The first patch adds the required PCI IDs for models 00h-1Fh and 20h.
The second patch adds the required support in k10temp driver for AMD's
Family 1Ah-based models.
The third patch adds support in amd64_edac module for models 00h-1Fh and
40h-4Fh.
Avadhut Naik (3):
x86/amd_nb: Add PCI IDs for AMD Family 1Ah-based models
hwmon: (k10temp) Add thermal support for AMD Family 1Ah-based models
EDAC/amd64: Add support for AMD Family 1Ah Models 00h-1Fh and 40h-4Fh
arch/x86/kernel/amd_nb.c | 8 ++++++++
drivers/edac/amd64_edac.c | 15 +++++++++++++++
drivers/hwmon/k10temp.c | 8 +++++++-
include/linux/pci_ids.h | 2 ++
4 files changed, 32 insertions(+), 1 deletion(-)
--
2.34.1
From: Avadhut Naik <[email protected]>
Add new PCI Device IDs, required to support AMD's new Family 1Ah-based
models 00h-1Fh and 20h.
Co-developed-by: Mario Limonciello <[email protected]>
Signed-off-by: Mario Limonciello <[email protected]>
Signed-off-by: Avadhut Naik <[email protected]>
---
arch/x86/kernel/amd_nb.c | 8 ++++++++
include/linux/pci_ids.h | 2 ++
2 files changed, 10 insertions(+)
diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
index 035a3db5330b..356de955e78d 100644
--- a/arch/x86/kernel/amd_nb.c
+++ b/arch/x86/kernel/amd_nb.c
@@ -24,6 +24,8 @@
#define PCI_DEVICE_ID_AMD_19H_M40H_ROOT 0x14b5
#define PCI_DEVICE_ID_AMD_19H_M60H_ROOT 0x14d8
#define PCI_DEVICE_ID_AMD_19H_M70H_ROOT 0x14e8
+#define PCI_DEVICE_ID_AMD_1AH_M00H_ROOT 0x153a
+#define PCI_DEVICE_ID_AMD_1AH_M20H_ROOT 0x1507
#define PCI_DEVICE_ID_AMD_MI200_ROOT 0x14bb
#define PCI_DEVICE_ID_AMD_17H_DF_F4 0x1464
@@ -39,6 +41,7 @@
#define PCI_DEVICE_ID_AMD_19H_M60H_DF_F4 0x14e4
#define PCI_DEVICE_ID_AMD_19H_M70H_DF_F4 0x14f4
#define PCI_DEVICE_ID_AMD_19H_M78H_DF_F4 0x12fc
+#define PCI_DEVICE_ID_AMD_1AH_M00H_DF_F4 0x12c4
#define PCI_DEVICE_ID_AMD_MI200_DF_F4 0x14d4
/* Protect the PCI config register pairs used for SMN. */
@@ -56,6 +59,8 @@ static const struct pci_device_id amd_root_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_ROOT) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M60H_ROOT) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M70H_ROOT) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M00H_ROOT) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M20H_ROOT) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI200_ROOT) },
{}
};
@@ -85,6 +90,8 @@ static const struct pci_device_id amd_nb_misc_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M60H_DF_F3) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M70H_DF_F3) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M78H_DF_F3) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M00H_DF_F3) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M20H_DF_F3) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI200_DF_F3) },
{}
};
@@ -106,6 +113,7 @@ static const struct pci_device_id amd_nb_link_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_DF_F4) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M50H_DF_F4) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F4) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M00H_DF_F4) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI200_DF_F4) },
{}
};
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index a99b1fcfc617..6947e148bf38 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -568,6 +568,8 @@
#define PCI_DEVICE_ID_AMD_19H_M60H_DF_F3 0x14e3
#define PCI_DEVICE_ID_AMD_19H_M70H_DF_F3 0x14f3
#define PCI_DEVICE_ID_AMD_19H_M78H_DF_F3 0x12fb
+#define PCI_DEVICE_ID_AMD_1AH_M00H_DF_F3 0x12c3
+#define PCI_DEVICE_ID_AMD_1AH_M20H_DF_F3 0x16fb
#define PCI_DEVICE_ID_AMD_MI200_DF_F3 0x14d3
#define PCI_DEVICE_ID_AMD_CNB17H_F3 0x1703
#define PCI_DEVICE_ID_AMD_LANCE 0x2000
--
2.34.1
From: Avadhut Naik <[email protected]>
Add the necessary support in the module for AMD's new Family 1Ah-based
models 00h-1Fh and 40h-4Fh.
Signed-off-by: Avadhut Naik <[email protected]>
---
drivers/edac/amd64_edac.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 597dae7692b1..e3b59c488ed1 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -4150,6 +4150,20 @@ static int per_family_init(struct amd64_pvt *pvt)
}
break;
+ case 0x1A:
+ switch (pvt->model) {
+ case 0x00 ... 0x1f:
+ pvt->ctl_name = "F1Ah";
+ pvt->max_mcs = 12;
+ pvt->flags.zn_regs_v2 = 1;
+ break;
+ case 0x40 ... 0x4f:
+ pvt->ctl_name = "F1Ah_M40h";
+ pvt->flags.zn_regs_v2 = 1;
+ break;
+ }
+ break;
+
default:
amd64_err("Unsupported family!\n");
return -ENODEV;
@@ -4344,6 +4358,7 @@ static const struct x86_cpu_id amd64_cpuids[] = {
X86_MATCH_VENDOR_FAM(AMD, 0x17, NULL),
X86_MATCH_VENDOR_FAM(HYGON, 0x18, NULL),
X86_MATCH_VENDOR_FAM(AMD, 0x19, NULL),
+ X86_MATCH_VENDOR_FAM(AMD, 0x1A, NULL),
{ }
};
MODULE_DEVICE_TABLE(x86cpu, amd64_cpuids);
--
2.34.1
From: Avadhut Naik <[email protected]>
Add thermal info support for AMD Family 1Ah-based models. Support is
provided on a per-socket granularity.
Co-developed-by: Mario Limonciello <[email protected]>
Signed-off-by: Mario Limonciello <[email protected]>
Signed-off-by: Avadhut Naik <[email protected]>
---
drivers/hwmon/k10temp.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c
index 7b177b9fbb09..c61837fbc315 100644
--- a/drivers/hwmon/k10temp.c
+++ b/drivers/hwmon/k10temp.c
@@ -65,7 +65,7 @@ static DEFINE_MUTEX(nb_smu_ind_mutex);
#define F15H_M60H_HARDWARE_TEMP_CTRL_OFFSET 0xd8200c64
#define F15H_M60H_REPORTED_TEMP_CTRL_OFFSET 0xd8200ca4
-/* Common for Zen CPU families (Family 17h and 18h and 19h) */
+/* Common for Zen CPU families (Family 17h and 18h and 19h and 1Ah) */
#define ZEN_REPORTED_TEMP_CTRL_BASE 0x00059800
#define ZEN_CCD_TEMP(offset, x) (ZEN_REPORTED_TEMP_CTRL_BASE + \
@@ -462,6 +462,10 @@ static int k10temp_probe(struct pci_dev *pdev, const struct pci_device_id *id)
k10temp_get_ccd_support(pdev, data, 12);
break;
}
+ } else if (boot_cpu_data.x86 == 0x1a) {
+ data->temp_adjust_mask = ZEN_CUR_TEMP_RANGE_SEL_MASK;
+ data->read_tempreg = read_tempreg_nb_zen;
+ data->is_zen = true;
} else {
data->read_htcreg = read_htcreg_pci;
data->read_tempreg = read_tempreg_pci;
@@ -508,6 +512,8 @@ static const struct pci_device_id k10temp_id_table[] = {
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M60H_DF_F3) },
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M70H_DF_F3) },
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M78H_DF_F3) },
+ { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_1AH_M00H_DF_F3) },
+ { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_1AH_M20H_DF_F3) },
{ PCI_VDEVICE(HYGON, PCI_DEVICE_ID_AMD_17H_DF_F3) },
{}
};
--
2.34.1
On 7/6/2023 1:13 PM, Avadhut Naik wrote:
> From: Avadhut Naik <[email protected]>
>
> Add the necessary support in the module for AMD's new Family 1Ah-based
> models 00h-1Fh and 40h-4Fh.
>
The first patch in this set adds PCI IDs for models starting at 20h. And
this patch adds support for models 40h-4Fh.
Can you please elaborate on the discrepancy?
Thanks,
Yazen
On 8/3/2023 7:25 PM, Yazen Ghannam wrote:
> On 7/6/2023 1:13 PM, Avadhut Naik wrote:
>> From: Avadhut Naik <[email protected]>
>>
>> Add the necessary support in the module for AMD's new Family 1Ah-based
>> models 00h-1Fh and 40h-4Fh.
>>
>
> The first patch in this set adds PCI IDs for models starting at 20h. And
> this patch adds support for models 40h-4Fh.
>
> Can you please elaborate on the discrepancy?
>
> Thanks,
> Yazen
>
Model 40h-4fh shares some of the same design as some other platforms.
The root port ID PCI_DEVICE_ID_AMD_19H_M60H_ROOT and DF_F3 ID
PCI_DEVICE_ID_AMD_19H_M60H_DF_F3 covers it.
On 8/4/2023 12:03 PM, Limonciello, Mario wrote:
>
>
> On 8/3/2023 7:25 PM, Yazen Ghannam wrote:
>> On 7/6/2023 1:13 PM, Avadhut Naik wrote:
>>> From: Avadhut Naik <[email protected]>
>>>
>>> Add the necessary support in the module for AMD's new Family 1Ah-based
>>> models 00h-1Fh and 40h-4Fh.
>>>
>>
>> The first patch in this set adds PCI IDs for models starting at 20h.
>> And this patch adds support for models 40h-4Fh.
>>
>> Can you please elaborate on the discrepancy?
>>
>> Thanks,
>> Yazen
>>
>
> Model 40h-4fh shares some of the same design as some other platforms.
>
> The root port ID PCI_DEVICE_ID_AMD_19H_M60H_ROOT and DF_F3 ID
> PCI_DEVICE_ID_AMD_19H_M60H_DF_F3 covers it.
That's fair. Can these details be included in the commit message?
Thanks,
Yazen
Hi,
On 8/7/2023 08:48, Yazen Ghannam wrote:
> On 8/4/2023 12:03 PM, Limonciello, Mario wrote:
>>
>>
>> On 8/3/2023 7:25 PM, Yazen Ghannam wrote:
>>> On 7/6/2023 1:13 PM, Avadhut Naik wrote:
>>>> From: Avadhut Naik <[email protected]>
>>>>
>>>> Add the necessary support in the module for AMD's new Family 1Ah-based
>>>> models 00h-1Fh and 40h-4Fh.
>>>>
>>>
>>> The first patch in this set adds PCI IDs for models starting at 20h. And this patch adds support for models 40h-4Fh.
>>>
>>> Can you please elaborate on the discrepancy?
>>>
>>> Thanks,
>>> Yazen
>>>
>>
>> Model 40h-4fh shares some of the same design as some other platforms.
>>
>> The root port ID PCI_DEVICE_ID_AMD_19H_M60H_ROOT and DF_F3 ID PCI_DEVICE_ID_AMD_19H_M60H_DF_F3 covers it.
>
> That's fair. Can these details be included in the commit message?
>
Sure thing! Will include these details in the commit message of the first patch where PCI IDs are being defined.
> Thanks,
> Yazen
--
Thanks,
Avadhut Naik