LinuxLists.cc - [PATCH v8 1/8] RISC-V: Enable CPU

2021-10-11 12:09:16

Subject: [PATCH v8 1/8] RISC-V: Enable CPU_IDLE drivers

We force select CPU_PM and provide asm/cpuidle.h so that we can
use CPU IDLE drivers for Linux RISC-V kernel.

Signed-off-by: Anup Patel <[email protected]>
---
arch/riscv/Kconfig | 7 +++++++
arch/riscv/configs/defconfig | 1 +
arch/riscv/configs/rv32_defconfig | 1 +
arch/riscv/include/asm/cpuidle.h | 24 ++++++++++++++++++++++++
arch/riscv/kernel/process.c | 3 ++-
5 files changed, 35 insertions(+), 1 deletion(-)
create mode 100644 arch/riscv/include/asm/cpuidle.h

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 8de2afb460f7..d02f1f5a2431 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -46,6 +46,7 @@ config RISCV
select CLONE_BACKWARDS
select CLINT_TIMER if !MMU
select COMMON_CLK
+ select CPU_PM if CPU_IDLE
select EDAC_SUPPORT
select GENERIC_ARCH_TOPOLOGY if SMP
select GENERIC_ATOMIC64 if !64BIT
@@ -564,5 +565,11 @@ source "kernel/power/Kconfig"

endmenu

+menu "CPU Power Management"
+
+source "drivers/cpuidle/Kconfig"
+
+endmenu
+
source "arch/riscv/kvm/Kconfig"
source "drivers/firmware/Kconfig"
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index be21f54e9b91..39b4c32e7997 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -20,6 +20,7 @@ CONFIG_SOC_SIFIVE=y
CONFIG_SOC_VIRT=y
CONFIG_SMP=y
CONFIG_HOTPLUG_CPU=y
+CONFIG_CPU_IDLE=y
CONFIG_VIRTUALIZATION=y
CONFIG_KVM=y
CONFIG_JUMP_LABEL=y
diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
index ad01f50c98f1..fed827c82a9e 100644
--- a/arch/riscv/configs/rv32_defconfig
+++ b/arch/riscv/configs/rv32_defconfig
@@ -20,6 +20,7 @@ CONFIG_SOC_VIRT=y
CONFIG_ARCH_RV32I=y
CONFIG_SMP=y
CONFIG_HOTPLUG_CPU=y
+CONFIG_CPU_IDLE=y
CONFIG_VIRTUALIZATION=y
CONFIG_KVM=y
CONFIG_JUMP_LABEL=y
diff --git a/arch/riscv/include/asm/cpuidle.h b/arch/riscv/include/asm/cpuidle.h
new file mode 100644
index 000000000000..71fdc607d4bc
--- /dev/null
+++ b/arch/riscv/include/asm/cpuidle.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Allwinner Ltd
+ * Copyright (C) 2021 Western Digital Corporation or its affiliates.
+ */
+
+#ifndef _ASM_RISCV_CPUIDLE_H
+#define _ASM_RISCV_CPUIDLE_H
+
+#include <asm/barrier.h>
+#include <asm/processor.h>
+
+static inline void cpu_do_idle(void)
+{
+ /*
+ * Add mb() here to ensure that all
+ * IO/MEM accesses are completed prior
+ * to entering WFI.
+ */
+ mb();
+ wait_for_interrupt();
+}
+
+#endif
diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c
index 03ac3aa611f5..504b496787aa 100644
--- a/arch/riscv/kernel/process.c
+++ b/arch/riscv/kernel/process.c
@@ -23,6 +23,7 @@
#include <asm/string.h>
#include <asm/switch_to.h>
#include <asm/thread_info.h>
+#include <asm/cpuidle.h>

register unsigned long gp_in_global __asm__("gp");

@@ -37,7 +38,7 @@ extern asmlinkage void ret_from_kernel_thread(void);

void arch_cpu_idle(void)
{
- wait_for_interrupt();
+ cpu_do_idle();
raw_local_irq_enable();
}

--
2.25.1

2021-10-11 22:09:16

by Heiko Stuebner

[permalink] [raw]

Subject: Re: [PATCH v8 1/8] RISC-V: Enable CPU_IDLE drivers

Hi Anup,

Am Montag, 11. Oktober 2021, 10:18:13 CEST schrieb Anup Patel:
> We force select CPU_PM and provide asm/cpuidle.h so that we can
> use CPU IDLE drivers for Linux RISC-V kernel.
>
> Signed-off-by: Anup Patel <[email protected]>
> ---
> arch/riscv/Kconfig | 7 +++++++
> arch/riscv/configs/defconfig | 1 +
> arch/riscv/configs/rv32_defconfig | 1 +
> arch/riscv/include/asm/cpuidle.h | 24 ++++++++++++++++++++++++
> arch/riscv/kernel/process.c | 3 ++-
> 5 files changed, 35 insertions(+), 1 deletion(-)
> create mode 100644 arch/riscv/include/asm/cpuidle.h
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 8de2afb460f7..d02f1f5a2431 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -46,6 +46,7 @@ config RISCV
> select CLONE_BACKWARDS
> select CLINT_TIMER if !MMU
> select COMMON_CLK
> + select CPU_PM if CPU_IDLE
> select EDAC_SUPPORT
> select GENERIC_ARCH_TOPOLOGY if SMP
> select GENERIC_ATOMIC64 if !64BIT
> @@ -564,5 +565,11 @@ source "kernel/power/Kconfig"
>
> endmenu
>
> +menu "CPU Power Management"
> +
> +source "drivers/cpuidle/Kconfig"
> +
> +endmenu
> +
> source "arch/riscv/kvm/Kconfig"
> source "drivers/firmware/Kconfig"
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index be21f54e9b91..39b4c32e7997 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -20,6 +20,7 @@ CONFIG_SOC_SIFIVE=y
> CONFIG_SOC_VIRT=y
> CONFIG_SMP=y
> CONFIG_HOTPLUG_CPU=y
> +CONFIG_CPU_IDLE=y
> CONFIG_VIRTUALIZATION=y
> CONFIG_KVM=y
> CONFIG_JUMP_LABEL=y

This doesn't apply.

In the history of your tree that you referenced in the cover-letter
I found "RISC-V: Enable KVM for RV64 and RV32"
with that nice "DO NOT UPSTREAM !!!!!" message in caps in it ;-)

This of course makes this not apply on the main riscv tree.

So you might want to base your series on top of a clean "for-next"
branch of Palmer's tree instead of collecting other stuff below it.

Same for rv32_defconfig below.

Heiko

> diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
> index ad01f50c98f1..fed827c82a9e 100644
> --- a/arch/riscv/configs/rv32_defconfig
> +++ b/arch/riscv/configs/rv32_defconfig
> @@ -20,6 +20,7 @@ CONFIG_SOC_VIRT=y
> CONFIG_ARCH_RV32I=y
> CONFIG_SMP=y
> CONFIG_HOTPLUG_CPU=y
> +CONFIG_CPU_IDLE=y
> CONFIG_VIRTUALIZATION=y
> CONFIG_KVM=y
> CONFIG_JUMP_LABEL=y
> diff --git a/arch/riscv/include/asm/cpuidle.h b/arch/riscv/include/asm/cpuidle.h
> new file mode 100644
> index 000000000000..71fdc607d4bc
> --- /dev/null
> +++ b/arch/riscv/include/asm/cpuidle.h
> @@ -0,0 +1,24 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (C) 2021 Allwinner Ltd
> + * Copyright (C) 2021 Western Digital Corporation or its affiliates.
> + */
> +
> +#ifndef _ASM_RISCV_CPUIDLE_H
> +#define _ASM_RISCV_CPUIDLE_H
> +
> +#include <asm/barrier.h>
> +#include <asm/processor.h>
> +
> +static inline void cpu_do_idle(void)
> +{
> + /*
> + * Add mb() here to ensure that all
> + * IO/MEM accesses are completed prior
> + * to entering WFI.
> + */
> + mb();
> + wait_for_interrupt();
> +}
> +
> +#endif
> diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c
> index 03ac3aa611f5..504b496787aa 100644
> --- a/arch/riscv/kernel/process.c
> +++ b/arch/riscv/kernel/process.c
> @@ -23,6 +23,7 @@
> #include <asm/string.h>
> #include <asm/switch_to.h>
> #include <asm/thread_info.h>
> +#include <asm/cpuidle.h>
>
> register unsigned long gp_in_global __asm__("gp");
>
> @@ -37,7 +38,7 @@ extern asmlinkage void ret_from_kernel_thread(void);
>
> void arch_cpu_idle(void)
> {
> - wait_for_interrupt();
> + cpu_do_idle();
> raw_local_irq_enable();
> }
>
>

2021-10-11 23:22:37

by Heiko Stuebner

[permalink] [raw]

Subject: Re: [PATCH v8 1/8] RISC-V: Enable CPU_IDLE drivers

2021-10-12 01:01:10

by Anup Patel

[permalink] [raw]

Subject: Re: [PATCH v8 1/8] RISC-V: Enable CPU_IDLE drivers

On Tue, Oct 12, 2021 at 3:34 AM Heiko Stübner <[email protected]> wrote:
>
> Hi Anup,
>
> Am Montag, 11. Oktober 2021, 10:18:13 CEST schrieb Anup Patel:
> > We force select CPU_PM and provide asm/cpuidle.h so that we can
> > use CPU IDLE drivers for Linux RISC-V kernel.
> >
> > Signed-off-by: Anup Patel <[email protected]>
> > ---
> > arch/riscv/Kconfig | 7 +++++++
> > arch/riscv/configs/defconfig | 1 +
> > arch/riscv/configs/rv32_defconfig | 1 +
> > arch/riscv/include/asm/cpuidle.h | 24 ++++++++++++++++++++++++
> > arch/riscv/kernel/process.c | 3 ++-
> > 5 files changed, 35 insertions(+), 1 deletion(-)
> > create mode 100644 arch/riscv/include/asm/cpuidle.h
> >
> > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> > index 8de2afb460f7..d02f1f5a2431 100644
> > --- a/arch/riscv/Kconfig
> > +++ b/arch/riscv/Kconfig
> > @@ -46,6 +46,7 @@ config RISCV
> > select CLONE_BACKWARDS
> > select CLINT_TIMER if !MMU
> > select COMMON_CLK
> > + select CPU_PM if CPU_IDLE
> > select EDAC_SUPPORT
> > select GENERIC_ARCH_TOPOLOGY if SMP
> > select GENERIC_ATOMIC64 if !64BIT
> > @@ -564,5 +565,11 @@ source "kernel/power/Kconfig"
> >
> > endmenu
> >
> > +menu "CPU Power Management"
> > +
> > +source "drivers/cpuidle/Kconfig"
> > +
> > +endmenu
> > +
> > source "arch/riscv/kvm/Kconfig"
> > source "drivers/firmware/Kconfig"
> > diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> > index be21f54e9b91..39b4c32e7997 100644
> > --- a/arch/riscv/configs/defconfig
> > +++ b/arch/riscv/configs/defconfig
> > @@ -20,6 +20,7 @@ CONFIG_SOC_SIFIVE=y
> > CONFIG_SOC_VIRT=y
> > CONFIG_SMP=y
> > CONFIG_HOTPLUG_CPU=y
> > +CONFIG_CPU_IDLE=y
> > CONFIG_VIRTUALIZATION=y
> > CONFIG_KVM=y
> > CONFIG_JUMP_LABEL=y
>
> This doesn't apply.
>
> In the history of your tree that you referenced in the cover-letter
> I found "RISC-V: Enable KVM for RV64 and RV32"
> with that nice "DO NOT UPSTREAM !!!!!" message in caps in it ;-)
>
> This of course makes this not apply on the main riscv tree.
>
> So you might want to base your series on top of a clean "for-next"
> branch of Palmer's tree instead of collecting other stuff below it.

I usually base everything on the most recent Linus release tag.

This time I accidentally rebased on my KVM RISC-V branch which
was merged recently.

I will anyway send v9.

Regards,
Anup

>
> Same for rv32_defconfig below.
>
>
> Heiko
>
>
> > diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
> > index ad01f50c98f1..fed827c82a9e 100644
> > --- a/arch/riscv/configs/rv32_defconfig
> > +++ b/arch/riscv/configs/rv32_defconfig
> > @@ -20,6 +20,7 @@ CONFIG_SOC_VIRT=y
> > CONFIG_ARCH_RV32I=y
> > CONFIG_SMP=y
> > CONFIG_HOTPLUG_CPU=y
> > +CONFIG_CPU_IDLE=y
> > CONFIG_VIRTUALIZATION=y
> > CONFIG_KVM=y
> > CONFIG_JUMP_LABEL=y
> > diff --git a/arch/riscv/include/asm/cpuidle.h b/arch/riscv/include/asm/cpuidle.h
> > new file mode 100644
> > index 000000000000..71fdc607d4bc
> > --- /dev/null
> > +++ b/arch/riscv/include/asm/cpuidle.h
> > @@ -0,0 +1,24 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +/*
> > + * Copyright (C) 2021 Allwinner Ltd
> > + * Copyright (C) 2021 Western Digital Corporation or its affiliates.
> > + */
> > +
> > +#ifndef _ASM_RISCV_CPUIDLE_H
> > +#define _ASM_RISCV_CPUIDLE_H
> > +
> > +#include <asm/barrier.h>
> > +#include <asm/processor.h>
> > +
> > +static inline void cpu_do_idle(void)
> > +{
> > + /*
> > + * Add mb() here to ensure that all
> > + * IO/MEM accesses are completed prior
> > + * to entering WFI.
> > + */
> > + mb();
> > + wait_for_interrupt();
> > +}
> > +
> > +#endif
> > diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c
> > index 03ac3aa611f5..504b496787aa 100644
> > --- a/arch/riscv/kernel/process.c
> > +++ b/arch/riscv/kernel/process.c
> > @@ -23,6 +23,7 @@
> > #include <asm/string.h>
> > #include <asm/switch_to.h>
> > #include <asm/thread_info.h>
> > +#include <asm/cpuidle.h>
> >
> > register unsigned long gp_in_global __asm__("gp");
> >
> > @@ -37,7 +38,7 @@ extern asmlinkage void ret_from_kernel_thread(void);
> >
> > void arch_cpu_idle(void)
> > {
> > - wait_for_interrupt();
> > + cpu_do_idle();
> > raw_local_irq_enable();
> > }
> >
> >
>
>
>
>

2021-10-12 01:03:10

by Anup Patel

[permalink] [raw]

Subject: Re: [PATCH v8 1/8] RISC-V: Enable CPU_IDLE drivers

On Tue, Oct 12, 2021 at 4:46 AM Heiko Stübner <[email protected]> wrote:
>
> Hi Anup,
>
> Am Montag, 11. Oktober 2021, 10:18:13 CEST schrieb Anup Patel:
> > We force select CPU_PM and provide asm/cpuidle.h so that we can
> > use CPU IDLE drivers for Linux RISC-V kernel.
> >
> > Signed-off-by: Anup Patel <[email protected]>
> > ---
> > arch/riscv/Kconfig | 7 +++++++
> > arch/riscv/configs/defconfig | 1 +
> > arch/riscv/configs/rv32_defconfig | 1 +
> > arch/riscv/include/asm/cpuidle.h | 24 ++++++++++++++++++++++++
> > arch/riscv/kernel/process.c | 3 ++-
> > 5 files changed, 35 insertions(+), 1 deletion(-)
> > create mode 100644 arch/riscv/include/asm/cpuidle.h
> >
> > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> > index 8de2afb460f7..d02f1f5a2431 100644
> > --- a/arch/riscv/Kconfig
> > +++ b/arch/riscv/Kconfig
> > @@ -46,6 +46,7 @@ config RISCV
> > select CLONE_BACKWARDS
> > select CLINT_TIMER if !MMU
> > select COMMON_CLK
> > + select CPU_PM if CPU_IDLE
> > select EDAC_SUPPORT
> > select GENERIC_ARCH_TOPOLOGY if SMP
> > select GENERIC_ATOMIC64 if !64BIT
> > @@ -564,5 +565,11 @@ source "kernel/power/Kconfig"
> >
> > endmenu
> >
> > +menu "CPU Power Management"
> > +
> > +source "drivers/cpuidle/Kconfig"
> > +
> > +endmenu
> > +
> > source "arch/riscv/kvm/Kconfig"
> > source "drivers/firmware/Kconfig"
>
> another issue, the "arch/riscv/kvm/Kconfig" line above comes from a
> commit that is not in the riscv-tree at all but in the kvm-tree [0],
> making this patch fail to apply onto riscv/for-next alone.
>
> If you have multiple independent patch series in flight, like shown in
> the github branch you references, it might be easier to base each on
> top of the relevant branch cleanly and after one gets applied rebase
> the other ones.

I know I have been doing that but this time accidently picked the wrong
branch to rebase upon.

Thanks for trying.

Regards,
Anup

>
> That way you're not dependent on the others going in first and also
> people can test patch series individually without too much hassle.
>
> Thanks
> Heiko
>
>
> [0] https://git.kernel.org/pub/scm/linux/kernel/git/kvms390/linux.git/commit/?h=next&id=99cdc6c18c2d815e940e81b9b477d469bdd41788
>
>