From: Jyri Sarha <[email protected]>
Add DSS node to k3-am65-main.dtsi with labels for board specific
support and syscon node for oldi-io-ctrl.
Signed-off-by: Jyri Sarha <[email protected]>
Signed-off-by: Tomi Valkeinen <[email protected]>
---
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 44 ++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index 11887c72f23a..7d1bc991708e 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -287,6 +287,11 @@
mux-reg-masks = <0x4080 0x3>, /* SERDES0 lane select */
<0x4090 0x3>; /* SERDES1 lane select */
};
+
+ dss_oldi_io_ctrl: dss_oldi_io_ctrl@41E0 {
+ compatible = "syscon";
+ reg = <0x0000041E0 0x14>;
+ };
};
dwc3_0: dwc3@4000000 {
@@ -746,4 +751,43 @@
};
};
};
+
+ dss: dss@04a00000 {
+ compatible = "ti,am65x-dss";
+ reg = <0x0 0x04a00000 0x0 0x1000>, /* common */
+ <0x0 0x04a02000 0x0 0x1000>, /* vidl1 */
+ <0x0 0x04a06000 0x0 0x1000>, /* vid */
+ <0x0 0x04a07000 0x0 0x1000>, /* ovr1 */
+ <0x0 0x04a08000 0x0 0x1000>, /* ovr2 */
+ <0x0 0x04a0a000 0x0 0x1000>, /* vp1 */
+ <0x0 0x04a0b000 0x0 0x1000>; /* vp2 */
+ reg-names = "common", "vidl1", "vid",
+ "ovr1", "ovr2", "vp1", "vp2";
+
+ ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>;
+
+ power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>;
+
+ clocks = <&k3_clks 67 1>,
+ <&k3_clks 216 1>,
+ <&k3_clks 67 2>;
+ clock-names = "fck", "vp1", "vp2";
+
+ /*
+ * Set vp2 clk (DPI_1_IN_CLK) mux to PLL4 via
+ * DIV1. See "Figure 12-3365. DSS Integration"
+ * in AM65x TRM for details.
+ */
+ assigned-clocks = <&k3_clks 67 2>;
+ assigned-clock-parents = <&k3_clks 67 5>;
+
+ interrupts = <GIC_SPI 166 IRQ_TYPE_EDGE_RISING>;
+
+ status = "disabled";
+
+ dss_ports: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
};
--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
The DSS related clock muxes are set via assigned-clocks in a way which
provides us:
VP0 - DisplayPort SST
VP1 - DPI0
VP2 - DSI
VP3 - DPI1
Signed-off-by: Tomi Valkeinen <[email protected]>
---
.../dts/ti/k3-j721e-common-proc-board.dts | 20 +++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
index 98e5e17e3ff7..6df823aaa37c 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
@@ -472,3 +472,23 @@
phy-mode = "rgmii-rxid";
phy-handle = <&phy0>;
};
+
+&dss {
+ /*
+ * These clock assignments are chosen to enable the following outputs:
+ *
+ * VP0 - DisplayPort SST
+ * VP1 - DPI0
+ * VP2 - DSI
+ * VP3 - DPI1
+ */
+
+ assigned-clocks = <&k3_clks 152 1>,
+ <&k3_clks 152 4>,
+ <&k3_clks 152 9>,
+ <&k3_clks 152 13>;
+ assigned-clock-parents = <&k3_clks 152 2>, /* PLL16_HSDIV0 */
+ <&k3_clks 152 6>, /* PLL19_HSDIV0 */
+ <&k3_clks 152 11>, /* PLL18_HSDIV0 */
+ <&k3_clks 152 18>; /* PLL23_HSDIV0 */
+};
--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
On 22/04/2020 12:15, Tomi Valkeinen wrote:
> From: Jyri Sarha <[email protected]>
>
> Add DSS node to k3-am65-main.dtsi with labels for board specific
> support and syscon node for oldi-io-ctrl.
>
> Signed-off-by: Jyri Sarha <[email protected]>
> Signed-off-by: Tomi Valkeinen <[email protected]>
> ---
> arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 44 ++++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
> index 11887c72f23a..7d1bc991708e 100644
> --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
> @@ -287,6 +287,11 @@
> mux-reg-masks = <0x4080 0x3>, /* SERDES0 lane select */
> <0x4090 0x3>; /* SERDES1 lane select */
> };
> +
> + dss_oldi_io_ctrl: dss_oldi_io_ctrl@41E0 {
> + compatible = "syscon";
> + reg = <0x0000041E0 0x14>;
> + };
> };
>
> dwc3_0: dwc3@4000000 {
> @@ -746,4 +751,43 @@
> };
> };
> };
> +
> + dss: dss@04a00000 {
> + compatible = "ti,am65x-dss";
> + reg = <0x0 0x04a00000 0x0 0x1000>, /* common */
> + <0x0 0x04a02000 0x0 0x1000>, /* vidl1 */
> + <0x0 0x04a06000 0x0 0x1000>, /* vid */
> + <0x0 0x04a07000 0x0 0x1000>, /* ovr1 */
> + <0x0 0x04a08000 0x0 0x1000>, /* ovr2 */
> + <0x0 0x04a0a000 0x0 0x1000>, /* vp1 */
> + <0x0 0x04a0b000 0x0 0x1000>; /* vp2 */
> + reg-names = "common", "vidl1", "vid",
> + "ovr1", "ovr2", "vp1", "vp2";
> +
> + ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>;
> +
> + power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>;
> +
> + clocks = <&k3_clks 67 1>,
> + <&k3_clks 216 1>,
> + <&k3_clks 67 2>;
> + clock-names = "fck", "vp1", "vp2";
> +
> + /*
> + * Set vp2 clk (DPI_1_IN_CLK) mux to PLL4 via
> + * DIV1. See "Figure 12-3365. DSS Integration"
> + * in AM65x TRM for details.
> + */
> + assigned-clocks = <&k3_clks 67 2>;
> + assigned-clock-parents = <&k3_clks 67 5>;
> +
> + interrupts = <GIC_SPI 166 IRQ_TYPE_EDGE_RISING>;
> +
> + status = "disabled";
Any reason why the node is disabled? Are you planning to enable it
somewhere later on, or is that left for the user to do?
-Tero
> +
> + dss_ports: ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> + };
> };
>
--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
On 27/04/2020 13:08, Tero Kristo wrote:
> On 22/04/2020 12:15, Tomi Valkeinen wrote:
>> From: Jyri Sarha <[email protected]>
>>
>> Add DSS node to k3-am65-main.dtsi with labels for board specific
>> support and syscon node for oldi-io-ctrl.
>>
>> Signed-off-by: Jyri Sarha <[email protected]>
>> Signed-off-by: Tomi Valkeinen <[email protected]>
>> ---
>> arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 44 ++++++++++++++++++++++++
>> 1 file changed, 44 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
>> index 11887c72f23a..7d1bc991708e 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
>> @@ -287,6 +287,11 @@
>> mux-reg-masks = <0x4080 0x3>, /* SERDES0 lane select */
>> <0x4090 0x3>; /* SERDES1 lane select */
>> };
>> +
>> + dss_oldi_io_ctrl: dss_oldi_io_ctrl@41E0 {
>> + compatible = "syscon";
>> + reg = <0x0000041E0 0x14>;
>> + };
>> };
>> dwc3_0: dwc3@4000000 {
>> @@ -746,4 +751,43 @@
>> };
>> };
>> };
>> +
>> + dss: dss@04a00000 {
>> + compatible = "ti,am65x-dss";
>> + reg = <0x0 0x04a00000 0x0 0x1000>, /* common */
>> + <0x0 0x04a02000 0x0 0x1000>, /* vidl1 */
>> + <0x0 0x04a06000 0x0 0x1000>, /* vid */
>> + <0x0 0x04a07000 0x0 0x1000>, /* ovr1 */
>> + <0x0 0x04a08000 0x0 0x1000>, /* ovr2 */
>> + <0x0 0x04a0a000 0x0 0x1000>, /* vp1 */
>> + <0x0 0x04a0b000 0x0 0x1000>; /* vp2 */
>> + reg-names = "common", "vidl1", "vid",
>> + "ovr1", "ovr2", "vp1", "vp2";
>> +
>> + ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>;
>> +
>> + power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>;
>> +
>> + clocks = <&k3_clks 67 1>,
>> + <&k3_clks 216 1>,
>> + <&k3_clks 67 2>;
>> + clock-names = "fck", "vp1", "vp2";
>> +
>> + /*
>> + * Set vp2 clk (DPI_1_IN_CLK) mux to PLL4 via
>> + * DIV1. See "Figure 12-3365. DSS Integration"
>> + * in AM65x TRM for details.
>> + */
>> + assigned-clocks = <&k3_clks 67 2>;
>> + assigned-clock-parents = <&k3_clks 67 5>;
>> +
>> + interrupts = <GIC_SPI 166 IRQ_TYPE_EDGE_RISING>;
>> +
>> + status = "disabled";
>
> Any reason why the node is disabled? Are you planning to enable it somewhere later on, or is that
> left for the user to do?
It's enabled in board DT files or DT overlays which add a display and the DT graph for the
connections. Having DSS driver probe without any displays is a waste of resources.
Tomi
--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki