This patch adds the Intel Cougar Point (PCH) SATA AHCI and RAID Controller DeviceIDs.
Signed-off-by: Seth Heasley <[email protected]>
--- linux-2.6.32.3/drivers/ata/ahci.c.orig 2010-01-06 15:07:45.000000000 -0800
+++ linux-2.6.32.3/drivers/ata/ahci.c 2010-01-07 13:55:23.000000000 -0800
@@ -560,6 +560,12 @@
{ PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */
{ PCI_VDEVICE(INTEL, 0x3b2c), board_ahci }, /* PCH RAID */
{ PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */
+ { PCI_VDEVICE(INTEL, 0x1c02), board_ahci }, /* CPT AHCI */
+ { PCI_VDEVICE(INTEL, 0x1c03), board_ahci }, /* CPT AHCI */
+ { PCI_VDEVICE(INTEL, 0x1c04), board_ahci }, /* CPT RAID */
+ { PCI_VDEVICE(INTEL, 0x1c05), board_ahci }, /* CPT RAID */
+ { PCI_VDEVICE(INTEL, 0x1c06), board_ahci }, /* CPT RAID */
+ { PCI_VDEVICE(INTEL, 0x1c07), board_ahci }, /* CPT RAID */
/* JMicron 360/1/3/5/6, match class to avoid IDE function */
{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
On 01/12/2010 07:00 PM, Seth Heasley wrote:
> This patch adds the Intel Cougar Point (PCH) SATA AHCI and RAID Controller DeviceIDs.
>
> Signed-off-by: Seth Heasley<[email protected]>
>
> --- linux-2.6.32.3/drivers/ata/ahci.c.orig 2010-01-06 15:07:45.000000000 -0800
> +++ linux-2.6.32.3/drivers/ata/ahci.c 2010-01-07 13:55:23.000000000 -0800
> @@ -560,6 +560,12 @@
> { PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */
> { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci }, /* PCH RAID */
> { PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */
> + { PCI_VDEVICE(INTEL, 0x1c02), board_ahci }, /* CPT AHCI */
> + { PCI_VDEVICE(INTEL, 0x1c03), board_ahci }, /* CPT AHCI */
> + { PCI_VDEVICE(INTEL, 0x1c04), board_ahci }, /* CPT RAID */
> + { PCI_VDEVICE(INTEL, 0x1c05), board_ahci }, /* CPT RAID */
> + { PCI_VDEVICE(INTEL, 0x1c06), board_ahci }, /* CPT RAID */
> + { PCI_VDEVICE(INTEL, 0x1c07), board_ahci }, /* CPT RAID */
>
> /* JMicron 360/1/3/5/6, match class to avoid IDE function */
> { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
The RAID mode entries would be needed if the device indicates RAID class
in that mode, but in plain AHCI mode it should indicate SATA AHCI class
which will get picked up by this catch-all so those entries shouldn't be
needed:
/* Generic, PCI class code for AHCI */
{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
PCI_CLASS_STORAGE_SATA_AHCI, 0xffffff, board_ahci },
Likely a lot of the existing specific PCI IDs could be removed from the
driver because of this (many likely predate the addition of the
class-based catch-all). The only reason to need a specific entry if the
device uses AHCI class is if it needs special handling or workarounds,
which isn't the case here.
On 01/12/2010 11:40 PM, Robert Hancock wrote:
> On 01/12/2010 07:00 PM, Seth Heasley wrote:
>> This patch adds the Intel Cougar Point (PCH) SATA AHCI and RAID
>> Controller DeviceIDs.
>>
>> Signed-off-by: Seth Heasley<[email protected]>
>>
>> --- linux-2.6.32.3/drivers/ata/ahci.c.orig 2010-01-06
>> 15:07:45.000000000 -0800
>> +++ linux-2.6.32.3/drivers/ata/ahci.c 2010-01-07 13:55:23.000000000 -0800
>> @@ -560,6 +560,12 @@
>> { PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */
>> { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci }, /* PCH RAID */
>> { PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */
>> + { PCI_VDEVICE(INTEL, 0x1c02), board_ahci }, /* CPT AHCI */
>> + { PCI_VDEVICE(INTEL, 0x1c03), board_ahci }, /* CPT AHCI */
>> + { PCI_VDEVICE(INTEL, 0x1c04), board_ahci }, /* CPT RAID */
>> + { PCI_VDEVICE(INTEL, 0x1c05), board_ahci }, /* CPT RAID */
>> + { PCI_VDEVICE(INTEL, 0x1c06), board_ahci }, /* CPT RAID */
>> + { PCI_VDEVICE(INTEL, 0x1c07), board_ahci }, /* CPT RAID */
>>
>> /* JMicron 360/1/3/5/6, match class to avoid IDE function */
>> { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
>
> The RAID mode entries would be needed if the device indicates RAID class
> in that mode, but in plain AHCI mode it should indicate SATA AHCI class
> which will get picked up by this catch-all so those entries shouldn't be
> needed:
>
> /* Generic, PCI class code for AHCI */
> { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
> PCI_CLASS_STORAGE_SATA_AHCI, 0xffffff, board_ahci },
>
> Likely a lot of the existing specific PCI IDs could be removed from the
> driver because of this (many likely predate the addition of the
> class-based catch-all). The only reason to need a specific entry if the
> device uses AHCI class is if it needs special handling or workarounds,
> which isn't the case here.
Well, two lines of thinking here:
* some of lines of Intel chips do not separate AHCI into a separate PCI
ID rather legacy IDE interface. When an AHCI interface exists and
AHCI/IDE share the same PCI ID, we default to using AHCI. Thus, some of
those PCI ID matches in ahci.c's PCI table may not get caught by the
generic PCI class match at the end of the table.
* the cost carrying redundant PCI IDs seems low, harmless, and
potentially helpful.
Comments welcome, though...
Jeff
Jeff Garzik wrote:
> On 01/12/2010 11:40 PM, Robert Hancock wrote:
>> On 01/12/2010 07:00 PM, Seth Heasley wrote:
>>> This patch adds the Intel Cougar Point (PCH) SATA AHCI and RAID
>>> Controller DeviceIDs.
>>>
>>> Signed-off-by: Seth Heasley<[email protected]>
>>>
>>> --- linux-2.6.32.3/drivers/ata/ahci.c.orig 2010-01-06
>>> 15:07:45.000000000 -0800
>>> +++ linux-2.6.32.3/drivers/ata/ahci.c 2010-01-07 13:55:23.000000000
>>> -0800
>>> @@ -560,6 +560,12 @@
>>> { PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */
>>> { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci }, /* PCH RAID */
>>> { PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */
>>> + { PCI_VDEVICE(INTEL, 0x1c02), board_ahci }, /* CPT AHCI */
>>> + { PCI_VDEVICE(INTEL, 0x1c03), board_ahci }, /* CPT AHCI */
>>> + { PCI_VDEVICE(INTEL, 0x1c04), board_ahci }, /* CPT RAID */
>>> + { PCI_VDEVICE(INTEL, 0x1c05), board_ahci }, /* CPT RAID */
>>> + { PCI_VDEVICE(INTEL, 0x1c06), board_ahci }, /* CPT RAID */
>>> + { PCI_VDEVICE(INTEL, 0x1c07), board_ahci }, /* CPT RAID */
>>>
>>> /* JMicron 360/1/3/5/6, match class to avoid IDE function */
>>> { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
>>
>> The RAID mode entries would be needed if the device indicates RAID class
>> in that mode, but in plain AHCI mode it should indicate SATA AHCI class
>> which will get picked up by this catch-all so those entries shouldn't be
>> needed:
>>
>> /* Generic, PCI class code for AHCI */
>> { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
>> PCI_CLASS_STORAGE_SATA_AHCI, 0xffffff, board_ahci },
>>
>> Likely a lot of the existing specific PCI IDs could be removed from the
>> driver because of this (many likely predate the addition of the
>> class-based catch-all). The only reason to need a specific entry if the
>> device uses AHCI class is if it needs special handling or workarounds,
>> which isn't the case here.
>
> Well, two lines of thinking here:
>
> * some of lines of Intel chips do not separate AHCI into a separate PCI
> ID rather legacy IDE interface. When an AHCI interface exists and
> AHCI/IDE share the same PCI ID, we default to using AHCI. Thus, some of
> those PCI ID matches in ahci.c's PCI table may not get caught by the
> generic PCI class match at the end of the table.
>
> * the cost carrying redundant PCI IDs seems low, harmless, and
> potentially helpful.
It is helpful for the specific device IDs to show up in "modinfo ahci" and
modules.pcimap.
David
>
> Comments welcome, though...
>
> Jeff
>
>
>
>
> --
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Jeff Garzik <[email protected]> writes:
> Well, two lines of thinking here:
>
> * some of lines of Intel chips do not separate AHCI into a separate
> PCI ID rather legacy IDE interface. When an AHCI interface exists and
> AHCI/IDE share the same PCI ID, we default to using AHCI. Thus, some
> of those PCI ID matches in ahci.c's PCI table may not get caught by
> the generic PCI class match at the end of the table.
>
> * the cost carrying redundant PCI IDs seems low, harmless, and
> potentially helpful.
Also people may use things like this:
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index a3241a1..0616bbb 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -561,9 +561,11 @@ static const struct pci_device_id ahci_pci_tbl[] = {
{ PCI_VDEVICE(INTEL, 0x3b2c), board_ahci }, /* PCH RAID */
{ PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */
+#ifdef DOESNT_WORK_FOR_ME
/* JMicron 360/1/3/5/6, match class to avoid IDE function */
{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
PCI_CLASS_STORAGE_SATA_AHCI, 0xffffff, board_ahci_ign_iferr },
+#endif
/* ATI */
{ PCI_VDEVICE(ATI, 0x4380), board_ahci_sb600 }, /* ATI SB600 */
@@ -667,9 +669,11 @@ static const struct pci_device_id ahci_pci_tbl[] = {
/* Promise */
{ PCI_VDEVICE(PROMISE, 0x3f20), board_ahci }, /* PDC42819 */
+#ifdef DOESNT_WORK_FOR_ME
/* Generic, PCI class code for AHCI */
{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
PCI_CLASS_STORAGE_SATA_AHCI, 0xffffff, board_ahci },
+#endif
{ } /* terminate list */
};
--
Krzysztof Halasa
>> * some of lines of Intel chips do not separate AHCI into a separate PCI
>> ID rather legacy IDE interface. When an AHCI interface exists and
>> AHCI/IDE share the same PCI ID, we default to using AHCI. Thus, some of
>> those PCI ID matches in ahci.c's PCI table may not get caught by the
>> generic PCI class match at the end of the table.
>>
>> * the cost carrying redundant PCI IDs seems low, harmless, and
>> potentially helpful.
>
>It is helpful for the specific device IDs to show up in "modinfo ahci" and
>modules.pcimap.
>
>David
This is the reason I was asked to start adding the AHCI DeviceIDs here.
-Seth
On 01/13/2010 10:15 AM, Krzysztof Halasa wrote:
> Jeff Garzik<[email protected]> writes:
>
>> Well, two lines of thinking here:
>>
>> * some of lines of Intel chips do not separate AHCI into a separate
>> PCI ID rather legacy IDE interface. When an AHCI interface exists and
>> AHCI/IDE share the same PCI ID, we default to using AHCI. Thus, some
>> of those PCI ID matches in ahci.c's PCI table may not get caught by
>> the generic PCI class match at the end of the table.
>>
>> * the cost carrying redundant PCI IDs seems low, harmless, and
>> potentially helpful.
>
> Also people may use things like this:
>
> diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
> index a3241a1..0616bbb 100644
> --- a/drivers/ata/ahci.c
> +++ b/drivers/ata/ahci.c
> @@ -561,9 +561,11 @@ static const struct pci_device_id ahci_pci_tbl[] = {
> { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci }, /* PCH RAID */
> { PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */
>
> +#ifdef DOESNT_WORK_FOR_ME
> /* JMicron 360/1/3/5/6, match class to avoid IDE function */
> { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
> PCI_CLASS_STORAGE_SATA_AHCI, 0xffffff, board_ahci_ign_iferr },
> +#endif
>
> /* ATI */
> { PCI_VDEVICE(ATI, 0x4380), board_ahci_sb600 }, /* ATI SB600 */
> @@ -667,9 +669,11 @@ static const struct pci_device_id ahci_pci_tbl[] = {
> /* Promise */
> { PCI_VDEVICE(PROMISE, 0x3f20), board_ahci }, /* PDC42819 */
>
> +#ifdef DOESNT_WORK_FOR_ME
> /* Generic, PCI class code for AHCI */
> { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
> PCI_CLASS_STORAGE_SATA_AHCI, 0xffffff, board_ahci },
> +#endif
>
I'm not sure I understand your point. Are there ahci problems with the
generic entries, that remain unresolved?
Jeff
Jeff Garzik <[email protected]> writes:
> I'm not sure I understand your point. Are there ahci problems with
> the generic entries, that remain unresolved?
It seems JMB363 on MSI Neo2 motherboard (P45 + ICH10R) still doesn't
work correctly, flooding the kernel logs. No SATA devices connected,
a CD-ROM connected to PATA (and it works fine). I've sent a report to
the IDE list some time ago, please let me know if you need more details
or testing etc.
JMB363 set in BIOS setup to non-RAID mode (it seems this means disabling
the JMB BIOS). Last tested with 2.6.32.1 x86-64 SMP. IRQ 16 is shared.
Currently the IRQ in PCI registers is 10 (JMB363 SATA is not handled),
I can enable and check again if needed.
02:00.0 SATA controller: JMicron Technologies, Inc. 20360/20363 Serial ATA Controller (rev 03) (prog-if 01 [AHCI 1.0])
Subsystem: Micro-Star International Co., Ltd. Device 7512
Control: I/O+ Mem+ BusMaster+ the_rest-
Status: Cap+ the_rest-
Latency: 0, Cache Line Size: 32 bytes
Interrupt: pin A routed to IRQ 10
Region 5: Memory at fe9fe000 (32-bit, non-prefetchable) [size=8K]
Capabilities: <access denied>
ahci 0000:02:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
ahci 0000:02:00.0: AHCI 0001.0000 32 slots 2 ports 3 Gbps 0x3 impl SATA mode
ahci 0000:02:00.0: flags: 64bit ncq pm led clo pmp pio slum part
ahci 0000:02:00.0: setting latency timer to 64
scsi6 : ahci
scsi7 : ahci
ata7: SATA max UDMA/133 abar m8192@0xfe9fe000 port 0xfe9fe100 irq 16
ata8: SATA max UDMA/133 abar m8192@0xfe9fe000 port 0xfe9fe180 irq 16
ata8: SATA link down (SStatus 0 SControl 300)
ata7: SATA link down (SStatus 0 SControl 300)
then every few seconds (ata8 only, nothing on ata7):
ata8: exception Emask 0x10 SAct 0x0 SErr 0x4040000 action 0xe frozen
ata8: irq_stat 0x00000040, connection status changed
ata8: SError: { CommWake DevExch }
ata8: hard resetting link
ata8: SATA link down (SStatus 0 SControl 300)
ata8: EH complete
ata8: exception Emask 0x10 SAct 0x0 SErr 0x4040000 action 0xe frozen
ata8: irq_stat 0x00000040, connection status changed
ata8: SError: { CommWake DevExch }
ata8: hard resetting link
ata8: SATA link down (SStatus 0 SControl 300)
ata8: EH complete
ata8: exception Emask 0x10 SAct 0x0 SErr 0x4060000 action 0xe frozen
ata8: irq_stat 0x00000040, connection status changed
ata8: SError: { PHYInt CommWake DevExch }
ata8: limiting SATA link speed to 1.5 Gbps
ata8: hard resetting link
ata8: SATA link down (SStatus 0 SControl 310)
ata8: EH complete
ata8: exception Emask 0x10 SAct 0x0 SErr 0x4040000 action 0xe frozen
ata8: irq_stat 0x00000040, connection status changed
ata8: SError: { CommWake DevExch }
ata8: limiting SATA link speed to 1.5 Gbps
ata8: hard resetting link
ata8: SATA link down (SStatus 0 SControl 310)
ata8: EH complete
ata8: exception Emask 0x10 SAct 0x0 SErr 0x4040000 action 0xe frozen
ata8: irq_stat 0x00000040, connection status changed
ata8: SError: { CommWake DevExch }
ata8: limiting SATA link speed to 1.5 Gbps
ata8: hard resetting link
ata8: SATA link down (SStatus 0 SControl 310)
ata8: EH complete
ata8: exception Emask 0x10 SAct 0x0 SErr 0x4040000 action 0xe frozen
ata8: irq_stat 0x00000040, connection status changed
ata8: SError: { CommWake DevExch }
ata8: limiting SATA link speed to 1.5 Gbps
ata8: hard resetting link
ata8: SATA link down (SStatus 0 SControl 310)
ata8: EH complete
ata8: exception Emask 0x10 SAct 0x0 SErr 0x4040000 action 0xe frozen
ata8: irq_stat 0x00000040, connection status changed
ata8: SError: { CommWake DevExch }
ata8: limiting SATA link speed to 1.5 Gbps
ata8: hard resetting link
ata8: SATA link down (SStatus 0 SControl 310)
ata8: EH complete
ata8: exception Emask 0x10 SAct 0x0 SErr 0x4060000 action 0xe frozen
ata8: irq_stat 0x00000040, connection status changed
ata8: SError: { PHYInt CommWake DevExch }
ata8: limiting SATA link speed to 1.5 Gbps
It seems it worked without the above few times (according to the logs),
though I can't repeat it even with the same kernel version.
Maybe setting the mode to RAID (= enabling the JMB BIOS) would fix it?
I can check if there is non-zero possibility.
I can't rule out a hw problem, though I think other people had similar
problems with this chip.
--
Krzysztof Halasa
On Wed, Jan 13, 2010 at 12:18 PM, Krzysztof Halasa <[email protected]> wrote:
> Jeff Garzik <[email protected]> writes:
>
>> I'm not sure I understand your point. ?Are there ahci problems with
>> the generic entries, that remain unresolved?
>
> It seems JMB363 on MSI Neo2 motherboard (P45 + ICH10R) still doesn't
> work correctly, flooding the kernel logs. No SATA devices connected,
> a CD-ROM connected to PATA (and it works fine). I've sent a report to
> the IDE ?list some time ago, please let me know if you need more details
> or testing etc.
>
> JMB363 set in BIOS setup to non-RAID mode (it seems this means disabling
> the JMB BIOS). Last tested with 2.6.32.1 x86-64 SMP. IRQ 16 is shared.
>
> Currently the IRQ in PCI registers is 10 (JMB363 SATA is not handled),
> I can enable and check again if needed.
>
> 02:00.0 SATA controller: JMicron Technologies, Inc. 20360/20363 Serial ATA Controller (rev 03) (prog-if 01 [AHCI 1.0])
> ? ? ? ?Subsystem: Micro-Star International Co., Ltd. Device 7512
> ? ? ? ?Control: I/O+ Mem+ BusMaster+ the_rest-
> ? ? ? ?Status: Cap+ the_rest-
> ? ? ? ?Latency: 0, Cache Line Size: 32 bytes
> ? ? ? ?Interrupt: pin A routed to IRQ 10
> ? ? ? ?Region 5: Memory at fe9fe000 (32-bit, non-prefetchable) [size=8K]
> ? ? ? ?Capabilities: <access denied>
>
> ahci 0000:02:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
> ahci 0000:02:00.0: AHCI 0001.0000 32 slots 2 ports 3 Gbps 0x3 impl SATA mode
> ahci 0000:02:00.0: flags: 64bit ncq pm led clo pmp pio slum part
> ahci 0000:02:00.0: setting latency timer to 64
> scsi6 : ahci
> scsi7 : ahci
> ata7: SATA max UDMA/133 abar m8192@0xfe9fe000 port 0xfe9fe100 irq 16
> ata8: SATA max UDMA/133 abar m8192@0xfe9fe000 port 0xfe9fe180 irq 16
> ata8: SATA link down (SStatus 0 SControl 300)
> ata7: SATA link down (SStatus 0 SControl 300)
>
> then every few seconds (ata8 only, nothing on ata7):
>
> ata8: exception Emask 0x10 SAct 0x0 SErr 0x4040000 action 0xe frozen
> ata8: irq_stat 0x00000040, connection status changed
> ata8: SError: { CommWake DevExch }
> ata8: hard resetting link
> ata8: SATA link down (SStatus 0 SControl 300)
> ata8: EH complete
That would seem like a board-specific problem, as I have an Asus
P7P55D PRO board with the same JMicron controller and I don't see any
such errors. The JMicron BIOS isn't enabled.
The behavior here is strange, the controller reports a connection
status change interrupt with CommWake which should indicate that some
device completed the handshake with the controller, but then the SATA
link shows down. I assume there's nothing plugged into the two JMicron
SATA ports?
On Wed, Jan 13, 2010 at 9:43 AM, Heasley, Seth <[email protected]> wrote:
>>> * some of lines of Intel chips do not separate AHCI into a separate PCI
>>> ID rather legacy IDE interface. ?When an AHCI interface exists and
>>> AHCI/IDE share the same PCI ID, we default to using AHCI. ?Thus, some of
>>> those PCI ID matches in ahci.c's PCI table may not get caught by the
>>> generic PCI class match at the end of the table.
>>>
>>> * the cost carrying redundant PCI IDs seems low, harmless, and
>>> potentially helpful.
>>
>>It is helpful for the specific device IDs to show up in "modinfo ahci" and
>>modules.pcimap.
>>
>>David
>
> This is the reason I was asked to start adding the AHCI DeviceIDs here.
I'm not sure why exactly that is useful - or at least why it's useful
enough to be worth the effort of patching the kernel for every new
AHCI controller that gets released..
I looked at what the Windows msahci driver is doing, they're not
listing any specific device IDs at all, they're just using the class
code matching only. (Of course, they don't have to worry about devices
in RAID mode, as those have to use vendor-specific drivers..)
On Wed, Jan 13, 2010 at 5:11 AM, Jeff Garzik <[email protected]> wrote:
>> Likely a lot of the existing specific PCI IDs could be removed from the
>> driver because of this (many likely predate the addition of the
>> class-based catch-all). The only reason to need a specific entry if the
>> device uses AHCI class is if it needs special handling or workarounds,
>> which isn't the case here.
>
> Well, two lines of thinking here:
>
> * some of lines of Intel chips do not separate AHCI into a separate PCI ID
> rather legacy IDE interface. ?When an AHCI interface exists and AHCI/IDE
> share the same PCI ID, we default to using AHCI. ?Thus, some of those PCI ID
> matches in ahci.c's PCI table may not get caught by the generic PCI class
> match at the end of the table.
Well, ata_piix does have a couple of entries that are listed in ahci
as well, for ICH6 device IDs 0x2652 and 0x2653. For 0x2653 ata_piix
checks the class code to make sure it's IDE, but for the 0x2652 entry,
and in both cases in ahci, the class code isn't checked. Deleting the
specific entries from ahci for those controllers would seemingly
actually improve the situation, since then ahci wouldn't try and
attach to those devices when they indicate IDE class. ata_piix should
also should be checking for IDE class on 0x2652 as well.
On Wed, Jan 13, 2010 at 6:11 PM, Robert Hancock <[email protected]> wrote:
> On Wed, Jan 13, 2010 at 5:11 AM, Jeff Garzik <[email protected]> wrote:
>>> Likely a lot of the existing specific PCI IDs could be removed from the
>>> driver because of this (many likely predate the addition of the
>>> class-based catch-all). The only reason to need a specific entry if the
>>> device uses AHCI class is if it needs special handling or workarounds,
>>> which isn't the case here.
>>
>> Well, two lines of thinking here:
>>
>> * some of lines of Intel chips do not separate AHCI into a separate PCI ID
>> rather legacy IDE interface. ?When an AHCI interface exists and AHCI/IDE
>> share the same PCI ID, we default to using AHCI. ?Thus, some of those PCI ID
>> matches in ahci.c's PCI table may not get caught by the generic PCI class
>> match at the end of the table.
>
> Well, ata_piix does have a couple of entries that are listed in ahci
> as well, for ICH6 device IDs 0x2652 and 0x2653. For 0x2653 ata_piix
> checks the class code to make sure it's IDE, but for the 0x2652 entry,
> and in both cases in ahci, the class code isn't checked. Deleting the
> specific entries from ahci for those controllers would seemingly
> actually improve the situation, since then ahci wouldn't try and
> attach to those devices when they indicate IDE class. ata_piix should
> also should be checking for IDE class on 0x2652 as well.
Hmm, it seems like it's a bit more complicated than that. For ICH6R
(0x2652), ata_piix attaches to it regardless of mode intentionally, it
has specific logic to disable AHCI on the controller since it can be
used in either mode. That seems a bit questionable. Having the same
device being handled by different enabled drivers and depending on
link or module load order to decide which one loads is fragile and
prone to errors. I'd be in favor of removing the ICH6R support from
ata_piix entirely and saying that you should be using ahci for that
device. Maybe when ahci was immature there was a benefit to allowing
ata_piix to run it, but I doubt that's true today.
Robert Hancock <[email protected]> writes:
> The behavior here is strange, the controller reports a connection
> status change interrupt with CommWake which should indicate that some
> device completed the handshake with the controller, but then the SATA
> link shows down. I assume there's nothing plugged into the two JMicron
> SATA ports?
Precisely nothing. Only the PATA is connected.
--
Krzysztof Halasa
Robert Hancock <[email protected]> writes:
> Well, ata_piix does have a couple of entries that are listed in ahci
> as well, for ICH6 device IDs 0x2652 and 0x2653. For 0x2653 ata_piix
> checks the class code to make sure it's IDE, but for the 0x2652 entry,
> and in both cases in ahci, the class code isn't checked. Deleting the
> specific entries from ahci for those controllers would seemingly
> actually improve the situation, since then ahci wouldn't try and
> attach to those devices when they indicate IDE class. ata_piix should
> also should be checking for IDE class on 0x2652 as well.
Interestingly the ICH6* datasheet says:
2651 is plain ICH6 (not RAID/AHCI capable)
2652 is ICH6R
2553 is ICH6-M
The subclass code is:
for plain ICH6: 01 (IDE controller)
for ICH6R: 04 (RAID controller)
for ICH6-M: 01 (IDE) or 06 (SATA=AHCI)
I think later chips change their subclass depending on
IDE/AHCI/RAID BIOS setting, wasn't it the ICH6R case as well?
Not checking the subclass for ICH6-M in ahci driver may be a bug,
unless ahci can handle the chip in BIOS-set IDE mode. Not checking
ICH6R code (or checking only for RAID) seems right, though.
--
Krzysztof Halasa
On Wed, 13 Jan 2010, Robert Hancock wrote:
> Hmm, it seems like it's a bit more complicated than that. For ICH6R
> (0x2652), ata_piix attaches to it regardless of mode intentionally, it
> has specific logic to disable AHCI on the controller since it can be
> used in either mode. That seems a bit questionable. Having the same
> device being handled by different enabled drivers and depending on
> link or module load order to decide which one loads is fragile and
> prone to errors. I'd be in favor of removing the ICH6R support from
> ata_piix entirely and saying that you should be using ahci for that
> device. Maybe when ahci was immature there was a benefit to allowing
> ata_piix to run it, but I doubt that's true today.
Maybe it is the silicon AHCI in ICH6R that is immature, and one is much
better of using it in IDE mode?
--
"One disk to rule them all, One disk to find them. One disk to bring
them all and in the darkness grind them. In the Land of Redmond
where the shadows lie." -- The Silicon Valley Tarot
Henrique Holschuh
On Thu, Jan 14, 2010 at 8:40 AM, Krzysztof Halasa <[email protected]> wrote:
> Robert Hancock <[email protected]> writes:
>
>> The behavior here is strange, the controller reports a connection
>> status change interrupt with CommWake which should indicate that some
>> device completed the handshake with the controller, but then the SATA
>> link shows down. I assume there's nothing plugged into the two JMicron
>> SATA ports?
>
> Precisely nothing. Only the PATA is connected.
It would be interesting to see what happens if you actually plug
something into that port that's having the issues, and see what
happens. I'm kind of inclined to suspect it's a hardware fault, though
it would likely require a report from someone else with the same or
similar board model to confirm that..
On Thu, Jan 14, 2010 at 2:11 PM, Henrique de Moraes Holschuh
<[email protected]> wrote:
> On Wed, 13 Jan 2010, Robert Hancock wrote:
>> Hmm, it seems like it's a bit more complicated than that. For ICH6R
>> (0x2652), ata_piix attaches to it regardless of mode intentionally, it
>> has specific logic to disable AHCI on the controller since it can be
>> used in either mode. That seems a bit questionable. Having the same
>> device being handled by different enabled drivers and depending on
>> link or module load order to decide which one loads is fragile and
>> prone to errors. I'd be in favor of removing the ICH6R support from
>> ata_piix entirely and saying that you should be using ahci for that
>> device. Maybe when ahci was immature there was a benefit to allowing
>> ata_piix to run it, but I doubt that's true today.
>
> Maybe it is the silicon AHCI in ICH6R that is immature, and one is much
> better of using it in IDE mode?
That seems unlikely, since the Intel-provided Matrix Storage drivers
for that controller on Windows will be using AHCI mode..
On 01/15/2010 09:15 AM, Robert Hancock wrote:
> On Thu, Jan 14, 2010 at 2:11 PM, Henrique de Moraes Holschuh
> <[email protected]> wrote:
>> On Wed, 13 Jan 2010, Robert Hancock wrote:
>>> Hmm, it seems like it's a bit more complicated than that. For ICH6R
>>> (0x2652), ata_piix attaches to it regardless of mode intentionally, it
>>> has specific logic to disable AHCI on the controller since it can be
>>> used in either mode. That seems a bit questionable. Having the same
>>> device being handled by different enabled drivers and depending on
>>> link or module load order to decide which one loads is fragile and
>>> prone to errors. I'd be in favor of removing the ICH6R support from
>>> ata_piix entirely and saying that you should be using ahci for that
>>> device. Maybe when ahci was immature there was a benefit to allowing
>>> ata_piix to run it, but I doubt that's true today.
>>
>> Maybe it is the silicon AHCI in ICH6R that is immature, and one is much
>> better of using it in IDE mode?
>
> That seems unlikely, since the Intel-provided Matrix Storage drivers
> for that controller on Windows will be using AHCI mode..
Oh, some ich6 ahcis are very not very mature. I have a ich6 which can
do ATA in ahci mode fine but craps out on ATAPI (it ends up spitting
out garbage FISes on the wire). It works fine in piix mode.
ich6 is a dying strange beast.
Thanks.
--
tejun
On 01/12/2010 08:00 PM, Seth Heasley wrote:
> This patch adds the Intel Cougar Point (PCH) SATA AHCI and RAID Controller DeviceIDs.
>
> Signed-off-by: Seth Heasley<[email protected]>
>
> --- linux-2.6.32.3/drivers/ata/ahci.c.orig 2010-01-06 15:07:45.000000000 -0800
> +++ linux-2.6.32.3/drivers/ata/ahci.c 2010-01-07 13:55:23.000000000 -0800
> @@ -560,6 +560,12 @@
> { PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */
> { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci }, /* PCH RAID */
> { PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */
> + { PCI_VDEVICE(INTEL, 0x1c02), board_ahci }, /* CPT AHCI */
> + { PCI_VDEVICE(INTEL, 0x1c03), board_ahci }, /* CPT AHCI */
> + { PCI_VDEVICE(INTEL, 0x1c04), board_ahci }, /* CPT RAID */
> + { PCI_VDEVICE(INTEL, 0x1c05), board_ahci }, /* CPT RAID */
> + { PCI_VDEVICE(INTEL, 0x1c06), board_ahci }, /* CPT RAID */
> + { PCI_VDEVICE(INTEL, 0x1c07), board_ahci }, /* CPT RAID */
applied this, and the ata_piix patch
Robert Hancock <[email protected]> writes:
> It would be interesting to see what happens if you actually plug
> something into that port that's having the issues, and see what
> happens. I'm kind of inclined to suspect it's a hardware fault, though
> it would likely require a report from someone else with the same or
> similar board model to confirm that..
2.6.32.3 with the patch disabling JMB363 and "catch all AHCI" applied.
Nothing connected to SATA, only PATA in use.
I understand the following doesn't set the AHCI_HFLAG_IGN_IRQ_IF_ERR
and thus doesn't ignore PORT_IRQ_IF_ERR, but the latter doesn't seem to
be set.
# echo -n 197b 2363 > new_id
ahci 0000:02:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
ahci 0000:02:00.0: AHCI 0001.0000 32 slots 2 ports 3 Gbps 0x3 impl SATA mode
ahci 0000:02:00.0: flags: 64bit ncq pm led clo pmp pio slum part
ahci 0000:02:00.0: setting latency timer to 64
scsi9 : ahci
scsi10 : ahci
ata9: SATA max UDMA/133 abar m8192@0xfe9fe000 port 0xfe9fe100 irq 16
ata10: SATA max UDMA/133 abar m8192@0xfe9fe000 port 0xfe9fe180 irq 16
ata10: SATA link down (SStatus 0 SControl 300)
ata9: SATA link down (SStatus 0 SControl 300)
ata10: exception Emask 0x10 SAct 0x0 SErr 0x4040000 action 0xe frozen
ata10: irq_stat 0x00000040, connection status changed
ata10: SError: { CommWake DevExch }
ata10: hard resetting link
ata10: SATA link down (SStatus 0 SControl 300)
ata10: EH complete
ata10: exception Emask 0x10 SAct 0x0 SErr 0x4040000 action 0xe frozen
ata10: irq_stat 0x00000040, connection status changed
ata10: SError: { CommWake DevExch }
ata10: limiting SATA link speed to 1.5 Gbps
ata10: hard resetting link
ata10: SATA link down (SStatus 0 SControl 310)
ata10: EH complete
...
sometimes the two lines become:
ata10: exception Emask 0x10 SAct 0x0 SErr 0x4060000 action 0xe frozen
ata10: SError: { PHYInt CommWake DevExch }
Now plugging something into the mb connector (1.5 Gbps device, the same
which my VT6421A-based miniPCI card doesn't like):
ata10: exception Emask 0x10 SAct 0x0 SErr 0x4050000 action 0xe frozen
ata10: irq_stat 0x00400040, connection status changed
ata10: SError: { PHYRdyChg CommWake DevExch }
ata10: hard resetting link
ata10: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
ata10.00: ATA-7: Kingston SSDNow V Series 64GB, B090428a, max UDMA/100
ata10.00: 125045424 sectors, multi 1: LBA
ata10.00: configured for UDMA/100
ata10: EH complete
scsi 10:0:0:0: Direct-Access ATA Kingston SSDNow B090 PQ: 0 ANSI: 5
sd 10:0:0:0: Attached scsi generic sg8 type 0
sd 10:0:0:0: [sdh] 125045424 512-byte logical blocks: (64.0 GB/59.6 GiB)
sd 10:0:0:0: [sdh] Write Protect is off
sd 10:0:0:0: [sdh] Mode Sense: 00 3a 00 00
sd 10:0:0:0: [sdh] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
sd 10:0:0:0: [sdh] Attached SCSI disk
Absolutely no problems with fs access, expected linear transfer speed
etc.
Well, let's unplug it. Power down first:
ata10: exception Emask 0x10 SAct 0x0 SErr 0x990000 action 0xe frozen
ata10: irq_stat 0x00400000, PHY RDY changed
ata10: SError: { PHYRdyChg 10B8B Dispar LinkSeq }
ata10: hard resetting link
ata10: SATA link down (SStatus 0 SControl 300)
ata10: hard resetting link
ata10: SATA link down (SStatus 0 SControl 300)
ata10: limiting SATA link speed to 1.5 Gbps
ata10: hard resetting link
ata10: SATA link down (SStatus 0 SControl 310)
ata10.00: disabled
ata10: EH complete
ata10.00: detaching (SCSI 10:0:0:0)
sd 10:0:0:0: [sdh] Stopping disk
sd 10:0:0:0: [sdh] START_STOP FAILED
sd 10:0:0:0: [sdh] Result: hostbyte=DID_BAD_TARGET driverbyte=DRIVER_OK
Seems stable at this point, no additional messages.
Then removing the plug from (unpowered) SSD - IRQs start appearing again
every few seconds. Mostly:
ata10: exception Emask 0x10 SAct 0x0 SErr 0x4000000 action 0xe frozen
ata10: irq_stat 0x00000040, connection status changed
ata10: SError: { DevExch }
ata10: limiting SATA link speed to 1.5 Gbps
ata10: hard resetting link
ata10: SATA link down (SStatus 0 SControl 310)
ata10: EH complete
sometimes SErr 0x4060000 and 0x4040000
Fine, so let's connect it again (device still not powered):
Messages stopped.
Disconnected again, messages started, reconnected, stopped.
Am I to use the SSD as a passive SATA terminator?
Any further ideas welcome :-)
--
Krzysztof Halasa
On Fri, Jan 15, 2010 at 3:43 PM, Krzysztof Halasa <[email protected]> wrote:
> Robert Hancock <[email protected]> writes:
>
>> It would be interesting to see what happens if you actually plug
>> something into that port that's having the issues, and see what
>> happens. I'm kind of inclined to suspect it's a hardware fault, though
>> it would likely require a report from someone else with the same or
>> similar board model to confirm that..
>
> 2.6.32.3 with the patch disabling JMB363 and "catch all AHCI" applied.
> Nothing connected to SATA, only PATA in use.
>
> I understand the following doesn't set the AHCI_HFLAG_IGN_IRQ_IF_ERR
> and thus doesn't ignore PORT_IRQ_IF_ERR, but the latter doesn't seem to
> be set.
>
> # echo -n 197b 2363 > new_id
>
> ahci 0000:02:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
> ahci 0000:02:00.0: AHCI 0001.0000 32 slots 2 ports 3 Gbps 0x3 impl SATA mode
> ahci 0000:02:00.0: flags: 64bit ncq pm led clo pmp pio slum part
> ahci 0000:02:00.0: setting latency timer to 64
> scsi9 : ahci
> scsi10 : ahci
> ata9: SATA max UDMA/133 abar m8192@0xfe9fe000 port 0xfe9fe100 irq 16
> ata10: SATA max UDMA/133 abar m8192@0xfe9fe000 port 0xfe9fe180 irq 16
> ata10: SATA link down (SStatus 0 SControl 300)
> ata9: SATA link down (SStatus 0 SControl 300)
>
> ata10: exception Emask 0x10 SAct 0x0 SErr 0x4040000 action 0xe frozen
> ata10: irq_stat 0x00000040, connection status changed
> ata10: SError: { CommWake DevExch }
> ata10: hard resetting link
> ata10: SATA link down (SStatus 0 SControl 300)
> ata10: EH complete
> ata10: exception Emask 0x10 SAct 0x0 SErr 0x4040000 action 0xe frozen
> ata10: irq_stat 0x00000040, connection status changed
> ata10: SError: { CommWake DevExch }
> ata10: limiting SATA link speed to 1.5 Gbps
> ata10: hard resetting link
> ata10: SATA link down (SStatus 0 SControl 310)
> ata10: EH complete
> ...
>
> sometimes the two lines become:
>
> ata10: exception Emask 0x10 SAct 0x0 SErr 0x4060000 action 0xe frozen
> ata10: SError: { PHYInt CommWake DevExch }
>
> Now plugging something into the mb connector (1.5 Gbps device, the same
> which my VT6421A-based miniPCI card doesn't like):
>
> ata10: exception Emask 0x10 SAct 0x0 SErr 0x4050000 action 0xe frozen
> ata10: irq_stat 0x00400040, connection status changed
> ata10: SError: { PHYRdyChg CommWake DevExch }
> ata10: hard resetting link
> ata10: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
> ata10.00: ATA-7: Kingston SSDNow V Series 64GB, B090428a, max UDMA/100
> ata10.00: 125045424 sectors, multi 1: LBA
> ata10.00: configured for UDMA/100
> ata10: EH complete
> scsi 10:0:0:0: Direct-Access ? ? ATA ? ? ?Kingston SSDNow ?B090 PQ: 0 ANSI: 5
> sd 10:0:0:0: Attached scsi generic sg8 type 0
> sd 10:0:0:0: [sdh] 125045424 512-byte logical blocks: (64.0 GB/59.6 GiB)
> sd 10:0:0:0: [sdh] Write Protect is off
> sd 10:0:0:0: [sdh] Mode Sense: 00 3a 00 00
> sd 10:0:0:0: [sdh] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
> sd 10:0:0:0: [sdh] Attached SCSI disk
>
> Absolutely no problems with fs access, expected linear transfer speed
> etc.
>
> Well, let's unplug it. Power down first:
>
> ata10: exception Emask 0x10 SAct 0x0 SErr 0x990000 action 0xe frozen
> ata10: irq_stat 0x00400000, PHY RDY changed
> ata10: SError: { PHYRdyChg 10B8B Dispar LinkSeq }
> ata10: hard resetting link
> ata10: SATA link down (SStatus 0 SControl 300)
> ata10: hard resetting link
> ata10: SATA link down (SStatus 0 SControl 300)
> ata10: limiting SATA link speed to 1.5 Gbps
> ata10: hard resetting link
> ata10: SATA link down (SStatus 0 SControl 310)
> ata10.00: disabled
> ata10: EH complete
> ata10.00: detaching (SCSI 10:0:0:0)
> sd 10:0:0:0: [sdh] Stopping disk
> sd 10:0:0:0: [sdh] START_STOP FAILED
> sd 10:0:0:0: [sdh] Result: hostbyte=DID_BAD_TARGET driverbyte=DRIVER_OK
>
> Seems stable at this point, no additional messages.
>
> Then removing the plug from (unpowered) SSD - IRQs start appearing again
> every few seconds. Mostly:
>
> ata10: exception Emask 0x10 SAct 0x0 SErr 0x4000000 action 0xe frozen
> ata10: irq_stat 0x00000040, connection status changed
> ata10: SError: { DevExch }
> ata10: limiting SATA link speed to 1.5 Gbps
> ata10: hard resetting link
> ata10: SATA link down (SStatus 0 SControl 310)
> ata10: EH complete
>
> sometimes SErr 0x4060000 and 0x4040000
>
> Fine, so let's connect it again (device still not powered):
> Messages stopped.
>
> Disconnected again, messages started, reconnected, stopped.
>
> Am I to use the SSD as a passive SATA terminator?
>
> Any further ideas welcome :-)
Hmm.. From those test results I really suspect some kind of hardware
fault. Could be a defective motherboard - I don't know if that chip
needs any terminating resistors on the motherboard for the SATA signal
lines or something, if so, could be they weren't installed properly..
On Thu, 14 Jan 2010, Robert Hancock wrote:
> > Maybe it is the silicon AHCI in ICH6R that is immature, and one is much
> > better of using it in IDE mode?
>
> That seems unlikely, since the Intel-provided Matrix Storage drivers
> for that controller on Windows will be using AHCI mode..
That doesn't say much.
If the change doesn't risk switching unaware users from IDE mode to AHCI, it
is not a problem. But if it does, why risk it? It is not like anyone that
wants hotplug and has an ICH6-R/M system won't have figured it out by now
how to get it to use AHCI, these are NOT new systems.
AHCI in ICH6R or ICH6M is not always an advantage. You don't want it on
ICH6-M in a laptop if it is not going to use the hotplug, for example. In
AHCI mode, the chip draws more power.
--
"One disk to rule them all, One disk to find them. One disk to bring
them all and in the darkness grind them. In the Land of Redmond
where the shadows lie." -- The Silicon Valley Tarot
Henrique Holschuh
On Fri, Jan 15, 2010 at 9:02 PM, Henrique de Moraes Holschuh
<[email protected]> wrote:
> On Thu, 14 Jan 2010, Robert Hancock wrote:
>> > Maybe it is the silicon AHCI in ICH6R that is immature, and one is much
>> > better of using it in IDE mode?
>>
>> That seems unlikely, since the Intel-provided Matrix Storage drivers
>> for that controller on Windows will be using AHCI mode..
>
> That doesn't say much.
>
> If the change doesn't risk switching unaware users from IDE mode to AHCI, it
> is not a problem. ?But if it does, why risk it? ?It is not like anyone that
> wants hotplug and has an ICH6-R/M system won't have figured it out by now
> how to get it to use AHCI, these are NOT new systems.
>
> AHCI in ICH6R or ICH6M is not always an advantage. ?You don't want it on
> ICH6-M in a laptop if it is not going to use the hotplug, for example. ?In
> AHCI mode, the chip draws more power.
Well, the ICH6M seems to be stuck in whatever mode the user and/or
BIOS designer has stuck it in,so nothing would change with it, only
with the ICH6R which is not a mobile chipset. I'm not sure about using
more power in the controller in AHCI mode, but in IDE mode, you can't
use SATA link power saving, which is likely just as significant.
Robert Hancock <[email protected]> writes:
> Hmm.. From those test results I really suspect some kind of hardware
> fault. Could be a defective motherboard - I don't know if that chip
> needs any terminating resistors on the motherboard for the SATA signal
> lines or something, if so, could be they weren't installed properly..
Unfortunately I can't find a JMB363 datasheet on the net, but there is
a certain mb (p965t-a) schematic available.
It seems JMB363 doesn't need terminators on SATA RX/TX lines, there is
capacitative coupling only (10 nF in each line).
The port in question (SATA#2) on my mb (P45 Neo2) uses pins 56 (RXP)
57 (RXN) and 60 (TXN) 61 (TXP). No visible irregularity, the traces look
like they should, go straigt to the capacitors, and then to 0R R-packs
and to the connector. It looks exactly the same for both ports. There is
no short circuit past the capacitors (from the connector side). I'd say
quite low probability that there is something wrong with these signals.
It seems the chip uses extra 12k resistors for SATA (p965t-a calls the
pins SJ_REXT[12]), pin 44 for port#1 and 55 for port#2. Both look sane.
I will check the suspected connections with the machine powered off
later.
The RX and TX trace pairs go next to each other for up to 10 mm, could
that be a problem at these frequencies? If so it would show up on
all/many such boards certainly? Can't find any report.
OTOH other people have similar problems with other boards: e.g.
ASUS P5KC: http://ubuntuforums.org/showthread.php?t=766217
https://bugs.launchpad.net/ubuntu/+source/linux/+bug/377633
(unknown boards)
https://archlinux-fr.org/doku.php?id=securisation:logcheck
http://forum.ubuntu-fr.org/viewtopic.php?pid=2739616
http://ubuntu-ky.ubuntuforums.org/showthread.php?p=7243061
The last one claims:
this started after an upgrade to ubuntu 9.04 and is stll here after re-installing
ubuntu 8.10.
this was fixed by re-installing ubuntu 8.10 only using the kernal,
2.6.27-7-generic.
I don't know if JMB36x is involved in this case, and how reliable the
info is.
Investigating as time permits.
--
Krzysztof Halasa