Move common USB-related properties and nodes (e.g. PHY's
orientation-switch, generic endpoint connections) to the SoC file. If
the board has different needs, it has to override these generic
usecases.
Signed-off-by: Dmitry Baryshkov <[email protected]>
---
Dmitry Baryshkov (12):
arm64: dts: qcom: sm8150: move USB graph to the SoC dtsi
arm64: dts: qcom: sm8350: move USB graph to the SoC dtsi
arm64: dts: qcom: sm8450: move USB graph to the SoC dtsi
arm64: dts: qcom: sm8550: move USB graph to the SoC dtsi
arm64: dts: qcom: sm8650: move USB graph to the SoC dtsi
arm64: dts: qcom: sm8350: move PHY's orientation-switch to SoC dtsi
arm64: dts: qcom: sm8450: move PHY's orientation-switch to SoC dtsi
arm64: dts: qcom: sm8550: move PHY's orientation-switch to SoC dtsi
arm64: dts: qcom: sm8650: move PHY's orientation-switch to SoC dtsi
arm64: dts: qcom: sm8650-mtp: connect USB-C SS port to QMP PHY
arm64: dts: qcom: delete wrong usb-role-switch properties
arm64: dts: qcom: x1e80100: drop wrong usb-role-switch properties
.../boot/dts/qcom/msm8953-motorola-potter.dts | 1 +
arch/arm64/boot/dts/qcom/msm8953-xiaomi-daisy.dts | 1 +
arch/arm64/boot/dts/qcom/msm8953-xiaomi-mido.dts | 1 +
arch/arm64/boot/dts/qcom/msm8953-xiaomi-tissot.dts | 1 +
arch/arm64/boot/dts/qcom/msm8953-xiaomi-vince.dts | 1 +
arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 1 +
arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 1 -
arch/arm64/boot/dts/qcom/sdm450-motorola-ali.dts | 1 +
arch/arm64/boot/dts/qcom/sdm632-motorola-ocean.dts | 1 +
.../arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts | 1 +
arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 1 +
arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts | 1 +
arch/arm64/boot/dts/qcom/sm8150-hdk.dts | 13 -----------
arch/arm64/boot/dts/qcom/sm8150.dtsi | 4 ++++
arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 ++
arch/arm64/boot/dts/qcom/sm8350-hdk.dts | 27 +++-------------------
arch/arm64/boot/dts/qcom/sm8350.dtsi | 13 +++++++++++
arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 27 +++-------------------
arch/arm64/boot/dts/qcom/sm8450.dtsi | 13 +++++++++++
arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 15 ------------
arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 15 ------------
arch/arm64/boot/dts/qcom/sm8550-qrd.dts | 15 ------------
.../dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 9 --------
arch/arm64/boot/dts/qcom/sm8550.dtsi | 6 +++++
arch/arm64/boot/dts/qcom/sm8650-mtp.dts | 10 ++++----
arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 15 ------------
arch/arm64/boot/dts/qcom/sm8650.dtsi | 6 +++++
arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 3 ---
arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 3 ---
29 files changed, 66 insertions(+), 142 deletions(-)
---
base-commit: dee9d87bf6c3cb70771fbc057d507bc6bd24a604
change-id: 20240425-usb-link-dtsi-33f511287192
Best regards,
--
Dmitry Baryshkov <[email protected]>
Move the graph connection between USB host, USB SS PHY and DP port to
the SoC dtsi file. They are linked in hardware in this way.
Signed-off-by: Dmitry Baryshkov <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8150-hdk.dts | 13 -------------
arch/arm64/boot/dts/qcom/sm8150.dtsi | 4 ++++
2 files changed, 4 insertions(+), 13 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8150-hdk.dts b/arch/arm64/boot/dts/qcom/sm8150-hdk.dts
index e9b9abc18746..bac08f00b303 100644
--- a/arch/arm64/boot/dts/qcom/sm8150-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8150-hdk.dts
@@ -470,7 +470,6 @@ &mdss_dp {
&mdss_dp_out {
data-lanes = <0 1>;
- remote-endpoint = <&usb_1_qmpphy_dp_in>;
};
&mdss_dsi0 {
@@ -676,18 +675,10 @@ &usb_1_qmpphy {
orientation-switch;
};
-&usb_1_qmpphy_dp_in {
- remote-endpoint = <&mdss_dp_out>;
-};
-
&usb_1_qmpphy_out {
remote-endpoint = <&pm8150b_typec_mux_in>;
};
-&usb_1_qmpphy_usb_ss_in {
- remote-endpoint = <&usb_1_dwc3_ss>;
-};
-
&usb_2_qmpphy {
status = "okay";
vdda-phy-supply = <&vreg_l3c_1p2>;
@@ -711,10 +702,6 @@ &usb_1_dwc3_hs {
remote-endpoint = <&pm8150b_hs_in>;
};
-&usb_1_dwc3_ss {
- remote-endpoint = <&usb_1_qmpphy_usb_ss_in>;
-};
-
&usb_2_dwc3 {
dr_mode = "host";
};
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index ff22e4346660..cb878b7305c2 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -3507,6 +3507,7 @@ port@1 {
reg = <1>;
usb_1_qmpphy_usb_ss_in: endpoint {
+ remote-endpoint = <&usb_1_dwc3_ss>;
};
};
@@ -3514,6 +3515,7 @@ port@2 {
reg = <2>;
usb_1_qmpphy_dp_in: endpoint {
+ remote-endpoint = <&mdss_dp_out>;
};
};
};
@@ -3672,6 +3674,7 @@ port@1 {
reg = <1>;
usb_1_dwc3_ss: endpoint {
+ remote-endpoint = <&usb_1_qmpphy_usb_ss_in>;
};
};
};
@@ -3894,6 +3897,7 @@ port@1 {
reg = <1>;
mdss_dp_out: endpoint {
+ remote-endpoint = <&usb_1_qmpphy_dp_in>;
};
};
};
--
2.39.2
Move the graph connection between USB host, USB SS PHY and DP port to
the SoC dtsi file. They are linked in hardware in this way.
Signed-off-by: Dmitry Baryshkov <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8350-hdk.dts | 25 +++----------------------
arch/arm64/boot/dts/qcom/sm8350.dtsi | 11 +++++++++++
2 files changed, 14 insertions(+), 22 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
index 4c25ab2f5670..81e5577cccb7 100644
--- a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
@@ -486,17 +486,10 @@ &mdss {
&mdss_dp {
status = "okay";
+};
- ports {
- port@1 {
- reg = <1>;
-
- mdss_dp0_out: endpoint {
- data-lanes = <0 1>;
- remote-endpoint = <&usb_1_qmpphy_dp_in>;
- };
- };
- };
+&mdss_dp_out {
+ data-lanes = <0 1>;
};
&mpss {
@@ -864,10 +857,6 @@ &usb_1_dwc3_hs {
remote-endpoint = <&pmic_glink_hs_in>;
};
-&usb_1_dwc3_ss {
- remote-endpoint = <&usb_1_qmpphy_usb_ss_in>;
-};
-
&usb_1_hsphy {
status = "okay";
@@ -885,18 +874,10 @@ &usb_1_qmpphy {
orientation-switch;
};
-&usb_1_qmpphy_dp_in {
- remote-endpoint = <&mdss_dp0_out>;
-};
-
&usb_1_qmpphy_out {
remote-endpoint = <&pmic_glink_ss_in>;
};
-&usb_1_qmpphy_usb_ss_in {
- remote-endpoint = <&usb_1_dwc3_ss>;
-};
-
&usb_2 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index f7c4700f00c3..24c42f285163 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -2273,6 +2273,7 @@ port@1 {
reg = <1>;
usb_1_qmpphy_usb_ss_in: endpoint {
+ remote-endpoint = <&usb_1_dwc3_ss>;
};
};
@@ -2280,6 +2281,7 @@ port@2 {
reg = <2>;
usb_1_qmpphy_dp_in: endpoint {
+ remote-endpoint = <&mdss_dp_out>;
};
};
};
@@ -2405,6 +2407,7 @@ port@1 {
reg = <1>;
usb_1_dwc3_ss: endpoint {
+ remote-endpoint = <&usb_1_qmpphy_usb_ss_in>;
};
};
};
@@ -2626,6 +2629,14 @@ mdss_dp_in: endpoint {
remote-endpoint = <&dpu_intf0_out>;
};
};
+
+ port@1 {
+ reg = <1>;
+
+ mdss_dp_out: endpoint {
+ remote-endpoint = <&usb_1_qmpphy_dp_in>;
+ };
+ };
};
dp_opp_table: opp-table {
--
2.39.2
Move the graph connection between USB host, USB SS PHY and DP port to
the SoC dtsi file. They are linked in hardware in this way.
Signed-off-by: Dmitry Baryshkov <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 25 +++----------------------
arch/arm64/boot/dts/qcom/sm8450.dtsi | 11 +++++++++++
2 files changed, 14 insertions(+), 22 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
index 3be46b56c723..9926294e4f84 100644
--- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
@@ -674,17 +674,10 @@ &mdss_dsi0_phy {
&mdss_dp0 {
status = "okay";
+};
- ports {
- port@1 {
- reg = <1>;
-
- mdss_dp0_out: endpoint {
- data-lanes = <0 1>;
- remote-endpoint = <&usb_1_qmpphy_dp_in>;
- };
- };
- };
+&mdss_dp0_out {
+ data-lanes = <0 1>;
};
&pcie0 {
@@ -1114,10 +1107,6 @@ &usb_1_dwc3_hs {
remote-endpoint = <&pmic_glink_hs_in>;
};
-&usb_1_dwc3_ss {
- remote-endpoint = <&usb_1_qmpphy_usb_ss_in>;
-};
-
&usb_1_hsphy {
status = "okay";
@@ -1135,18 +1124,10 @@ &usb_1_qmpphy {
orientation-switch;
};
-&usb_1_qmpphy_dp_in {
- remote-endpoint = <&mdss_dp0_out>;
-};
-
&usb_1_qmpphy_out {
remote-endpoint = <&pmic_glink_ss_in>;
};
-&usb_1_qmpphy_usb_ss_in {
- remote-endpoint = <&usb_1_dwc3_ss>;
-};
-
&vamacro {
pinctrl-0 = <&dmic01_default>, <&dmic23_default>;
pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 616461fcbab9..d138b90bb280 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -2321,6 +2321,7 @@ port@1 {
reg = <1>;
usb_1_qmpphy_usb_ss_in: endpoint {
+ remote-endpoint = <&usb_1_dwc3_ss>;
};
};
@@ -2328,6 +2329,7 @@ port@2 {
reg = <2>;
usb_1_qmpphy_dp_in: endpoint {
+ remote-endpoint = <&mdss_dp0_out>;
};
};
};
@@ -3119,6 +3121,14 @@ mdss_dp0_in: endpoint {
remote-endpoint = <&dpu_intf0_out>;
};
};
+
+ port@1 {
+ reg = <1>;
+
+ mdss_dp0_out: endpoint {
+ remote-endpoint = <&usb_1_qmpphy_dp_in>;
+ };
+ };
};
dp_opp_table: opp-table {
@@ -4584,6 +4594,7 @@ port@1 {
reg = <1>;
usb_1_dwc3_ss: endpoint {
+ remote-endpoint = <&usb_1_qmpphy_usb_ss_in>;
};
};
};
--
2.39.2
Move the graph connection between USB host, USB SS PHY and DP port to
the SoC dtsi file. They are linked in hardware in this way.
Signed-off-by: Dmitry Baryshkov <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 13 -------------
arch/arm64/boot/dts/qcom/sm8650.dtsi | 4 ++++
2 files changed, 4 insertions(+), 13 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
index 4e94f7fe4d2d..65ee00db5622 100644
--- a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
+++ b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
@@ -832,7 +832,6 @@ &mdss_dp0 {
&mdss_dp0_out {
data-lanes = <0 1>;
- remote-endpoint = <&usb_dp_qmpphy_dp_in>;
};
&pcie_1_phy_aux_clk {
@@ -1211,10 +1210,6 @@ &usb_1_dwc3_hs {
remote-endpoint = <&pmic_glink_hs_in>;
};
-&usb_1_dwc3_ss {
- remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
-};
-
&usb_1_hsphy {
vdd-supply = <&vreg_l1i_0p88>;
vdda12-supply = <&vreg_l3i_1p2>;
@@ -1233,18 +1228,10 @@ &usb_dp_qmpphy {
status = "okay";
};
-&usb_dp_qmpphy_dp_in {
- remote-endpoint = <&mdss_dp0_out>;
-};
-
&usb_dp_qmpphy_out {
remote-endpoint = <&redriver_ss_in>;
};
-&usb_dp_qmpphy_usb_ss_in {
- remote-endpoint = <&usb_1_dwc3_ss>;
-};
-
&xo_board {
clock-frequency = <76800000>;
};
diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index 8e0c1841f748..4624ea4906d9 100644
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -3675,6 +3675,7 @@ port@1 {
reg = <1>;
mdss_dp0_out: endpoint {
+ remote-endpoint = <&usb_dp_qmpphy_dp_in>;
};
};
};
@@ -3767,6 +3768,7 @@ port@1 {
reg = <1>;
usb_dp_qmpphy_usb_ss_in: endpoint {
+ remote-endpoint = <&usb_1_dwc3_ss>;
};
};
@@ -3774,6 +3776,7 @@ port@2 {
reg = <2>;
usb_dp_qmpphy_dp_in: endpoint {
+ remote-endpoint = <&mdss_dp0_out>;
};
};
};
@@ -3864,6 +3867,7 @@ port@1 {
reg = <1>;
usb_1_dwc3_ss: endpoint {
+ remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
};
};
};
--
2.39.2
The orientation-switch of the USB+DP QMP PHY is not a property of the
board, it is a design property of the QMP PHY itself. Move the property
from board DTS to SoC DTSI.
Signed-off-by: Dmitry Baryshkov <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 2 --
arch/arm64/boot/dts/qcom/sm8650.dtsi | 2 ++
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
index 65ee00db5622..f93de21a26ad 100644
--- a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
+++ b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
@@ -1223,8 +1223,6 @@ &usb_dp_qmpphy {
vdda-phy-supply = <&vreg_l3i_1p2>;
vdda-pll-supply = <&vreg_l3g_0p91>;
- orientation-switch;
-
status = "okay";
};
diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index 4624ea4906d9..9dd66c28c588 100644
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -3751,6 +3751,8 @@ usb_dp_qmpphy: phy@88e8000 {
#clock-cells = <1>;
#phy-cells = <1>;
+ orientation-switch;
+
status = "disabled";
ports {
--
2.39.2
On 29/04/2024 14:43, Dmitry Baryshkov wrote:
> The orientation-switch of the USB+DP QMP PHY is not a property of the
> board, it is a design property of the QMP PHY itself. Move the property
> from board DTS to SoC DTSI.
>
> Signed-off-by: Dmitry Baryshkov <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 2 --
> arch/arm64/boot/dts/qcom/sm8650.dtsi | 2 ++
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
> index 65ee00db5622..f93de21a26ad 100644
> --- a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
> @@ -1223,8 +1223,6 @@ &usb_dp_qmpphy {
> vdda-phy-supply = <&vreg_l3i_1p2>;
> vdda-pll-supply = <&vreg_l3g_0p91>;
>
> - orientation-switch;
> -
> status = "okay";
> };
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> index 4624ea4906d9..9dd66c28c588 100644
> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> @@ -3751,6 +3751,8 @@ usb_dp_qmpphy: phy@88e8000 {
> #clock-cells = <1>;
> #phy-cells = <1>;
>
> + orientation-switch;
> +
> status = "disabled";
>
> ports {
>
Reviewed-by: Neil Armstrong <[email protected]>
On 29/04/2024 14:43, Dmitry Baryshkov wrote:
> Move the graph connection between USB host, USB SS PHY and DP port to
> the SoC dtsi file. They are linked in hardware in this way.
>
> Signed-off-by: Dmitry Baryshkov <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 25 +++----------------------
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 11 +++++++++++
> 2 files changed, 14 insertions(+), 22 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
> index 3be46b56c723..9926294e4f84 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
> @@ -674,17 +674,10 @@ &mdss_dsi0_phy {
>
> &mdss_dp0 {
> status = "okay";
> +};
>
> - ports {
> - port@1 {
> - reg = <1>;
> -
> - mdss_dp0_out: endpoint {
> - data-lanes = <0 1>;
> - remote-endpoint = <&usb_1_qmpphy_dp_in>;
> - };
> - };
> - };
> +&mdss_dp0_out {
> + data-lanes = <0 1>;
> };
>
> &pcie0 {
> @@ -1114,10 +1107,6 @@ &usb_1_dwc3_hs {
> remote-endpoint = <&pmic_glink_hs_in>;
> };
>
> -&usb_1_dwc3_ss {
> - remote-endpoint = <&usb_1_qmpphy_usb_ss_in>;
> -};
> -
> &usb_1_hsphy {
> status = "okay";
>
> @@ -1135,18 +1124,10 @@ &usb_1_qmpphy {
> orientation-switch;
> };
>
> -&usb_1_qmpphy_dp_in {
> - remote-endpoint = <&mdss_dp0_out>;
> -};
> -
> &usb_1_qmpphy_out {
> remote-endpoint = <&pmic_glink_ss_in>;
> };
>
> -&usb_1_qmpphy_usb_ss_in {
> - remote-endpoint = <&usb_1_dwc3_ss>;
> -};
> -
> &vamacro {
> pinctrl-0 = <&dmic01_default>, <&dmic23_default>;
> pinctrl-names = "default";
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index 616461fcbab9..d138b90bb280 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -2321,6 +2321,7 @@ port@1 {
> reg = <1>;
>
> usb_1_qmpphy_usb_ss_in: endpoint {
> + remote-endpoint = <&usb_1_dwc3_ss>;
> };
> };
>
> @@ -2328,6 +2329,7 @@ port@2 {
> reg = <2>;
>
> usb_1_qmpphy_dp_in: endpoint {
> + remote-endpoint = <&mdss_dp0_out>;
> };
> };
> };
> @@ -3119,6 +3121,14 @@ mdss_dp0_in: endpoint {
> remote-endpoint = <&dpu_intf0_out>;
> };
> };
> +
> + port@1 {
> + reg = <1>;
> +
> + mdss_dp0_out: endpoint {
> + remote-endpoint = <&usb_1_qmpphy_dp_in>;
> + };
> + };
> };
>
> dp_opp_table: opp-table {
> @@ -4584,6 +4594,7 @@ port@1 {
> reg = <1>;
>
> usb_1_dwc3_ss: endpoint {
> + remote-endpoint = <&usb_1_qmpphy_usb_ss_in>;
> };
> };
> };
>
Reviewed-by: Neil Armstrong <[email protected]>
The orientation-switch of the USB+DP QMP PHY is not a property of the
board, it is a design property of the QMP PHY itself. Move the property
from board DTS to SoC DTSI.
Signed-off-by: Dmitry Baryshkov <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 2 --
arch/arm64/boot/dts/qcom/sm8450.dtsi | 2 ++
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
index 9926294e4f84..71dc06db7736 100644
--- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
@@ -1120,8 +1120,6 @@ &usb_1_qmpphy {
vdda-phy-supply = <&vreg_l6b_1p2>;
vdda-pll-supply = <&vreg_l1b_0p91>;
-
- orientation-switch;
};
&usb_1_qmpphy_out {
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index d138b90bb280..3494d5076368 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -2304,6 +2304,8 @@ usb_1_qmpphy: phy@88e8000 {
#clock-cells = <1>;
#phy-cells = <1>;
+ orientation-switch;
+
status = "disabled";
ports {
--
2.39.2
On 29/04/2024 14:43, Dmitry Baryshkov wrote:
> Move the graph connection between USB host, USB SS PHY and DP port to
> the SoC dtsi file. They are linked in hardware in this way.
>
> Signed-off-by: Dmitry Baryshkov <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 13 -------------
> arch/arm64/boot/dts/qcom/sm8650.dtsi | 4 ++++
> 2 files changed, 4 insertions(+), 13 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
> index 4e94f7fe4d2d..65ee00db5622 100644
> --- a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
> @@ -832,7 +832,6 @@ &mdss_dp0 {
>
> &mdss_dp0_out {
> data-lanes = <0 1>;
> - remote-endpoint = <&usb_dp_qmpphy_dp_in>;
> };
>
> &pcie_1_phy_aux_clk {
> @@ -1211,10 +1210,6 @@ &usb_1_dwc3_hs {
> remote-endpoint = <&pmic_glink_hs_in>;
> };
>
> -&usb_1_dwc3_ss {
> - remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
> -};
> -
> &usb_1_hsphy {
> vdd-supply = <&vreg_l1i_0p88>;
> vdda12-supply = <&vreg_l3i_1p2>;
> @@ -1233,18 +1228,10 @@ &usb_dp_qmpphy {
> status = "okay";
> };
>
> -&usb_dp_qmpphy_dp_in {
> - remote-endpoint = <&mdss_dp0_out>;
> -};
> -
> &usb_dp_qmpphy_out {
> remote-endpoint = <&redriver_ss_in>;
> };
>
> -&usb_dp_qmpphy_usb_ss_in {
> - remote-endpoint = <&usb_1_dwc3_ss>;
> -};
> -
> &xo_board {
> clock-frequency = <76800000>;
> };
> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> index 8e0c1841f748..4624ea4906d9 100644
> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> @@ -3675,6 +3675,7 @@ port@1 {
> reg = <1>;
>
> mdss_dp0_out: endpoint {
> + remote-endpoint = <&usb_dp_qmpphy_dp_in>;
> };
> };
> };
> @@ -3767,6 +3768,7 @@ port@1 {
> reg = <1>;
>
> usb_dp_qmpphy_usb_ss_in: endpoint {
> + remote-endpoint = <&usb_1_dwc3_ss>;
> };
> };
>
> @@ -3774,6 +3776,7 @@ port@2 {
> reg = <2>;
>
> usb_dp_qmpphy_dp_in: endpoint {
> + remote-endpoint = <&mdss_dp0_out>;
> };
> };
> };
> @@ -3864,6 +3867,7 @@ port@1 {
> reg = <1>;
>
> usb_1_dwc3_ss: endpoint {
> + remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
> };
> };
> };
>
Reviewed-by: Neil Armstrong <[email protected]>
The usb-role-switch property doesn't make sense for the USB hosts which
are fixed to the host USB data mode. Delete usb-role-switch property
from these hosts.
Signed-off-by: Dmitry Baryshkov <[email protected]>
---
arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 3 ---
arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 3 ---
2 files changed, 6 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
index c5c2895b37c7..7e4a13969d25 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
@@ -849,7 +849,6 @@ &usb_1_ss0 {
&usb_1_ss0_dwc3 {
dr_mode = "host";
- usb-role-switch;
};
&usb_1_ss1_hsphy {
@@ -871,7 +870,6 @@ &usb_1_ss1 {
&usb_1_ss1_dwc3 {
dr_mode = "host";
- usb-role-switch;
};
&usb_1_ss2_hsphy {
@@ -893,5 +891,4 @@ &usb_1_ss2 {
&usb_1_ss2_dwc3 {
dr_mode = "host";
- usb-role-switch;
};
diff --git a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
index 2061fbe7b75a..1aebfa5f958d 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
@@ -545,7 +545,6 @@ &usb_1_ss0 {
&usb_1_ss0_dwc3 {
dr_mode = "host";
- usb-role-switch;
};
&usb_1_ss1_hsphy {
@@ -567,7 +566,6 @@ &usb_1_ss1 {
&usb_1_ss1_dwc3 {
dr_mode = "host";
- usb-role-switch;
};
&usb_1_ss2_hsphy {
@@ -589,5 +587,4 @@ &usb_1_ss2 {
&usb_1_ss2_dwc3 {
dr_mode = "host";
- usb-role-switch;
};
--
2.39.2
The usb-role-switch property doesn't make sense for the USB hosts which
are fixed to either host or peripheral USB data mode. Delete
usb-role-switch property being present in SoC dtsi.
Signed-off-by: Dmitry Baryshkov <[email protected]>
---
arch/arm64/boot/dts/qcom/msm8953-motorola-potter.dts | 1 +
arch/arm64/boot/dts/qcom/msm8953-xiaomi-daisy.dts | 1 +
arch/arm64/boot/dts/qcom/msm8953-xiaomi-mido.dts | 1 +
arch/arm64/boot/dts/qcom/msm8953-xiaomi-tissot.dts | 1 +
arch/arm64/boot/dts/qcom/msm8953-xiaomi-vince.dts | 1 +
arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 1 +
arch/arm64/boot/dts/qcom/sdm450-motorola-ali.dts | 1 +
arch/arm64/boot/dts/qcom/sdm632-motorola-ocean.dts | 1 +
arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts | 1 +
arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 1 +
arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts | 1 +
11 files changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8953-motorola-potter.dts b/arch/arm64/boot/dts/qcom/msm8953-motorola-potter.dts
index 711d84dad9d7..2edf804eb7c9 100644
--- a/arch/arm64/boot/dts/qcom/msm8953-motorola-potter.dts
+++ b/arch/arm64/boot/dts/qcom/msm8953-motorola-potter.dts
@@ -301,5 +301,6 @@ &usb3 {
};
&usb3_dwc3 {
+ /delete-property/ usb-role-switch;
dr_mode = "peripheral";
};
diff --git a/arch/arm64/boot/dts/qcom/msm8953-xiaomi-daisy.dts b/arch/arm64/boot/dts/qcom/msm8953-xiaomi-daisy.dts
index a5957e79b818..336b916729e4 100644
--- a/arch/arm64/boot/dts/qcom/msm8953-xiaomi-daisy.dts
+++ b/arch/arm64/boot/dts/qcom/msm8953-xiaomi-daisy.dts
@@ -321,5 +321,6 @@ &usb3 {
};
&usb3_dwc3 {
+ /delete-property/ usb-role-switch;
dr_mode = "peripheral";
};
diff --git a/arch/arm64/boot/dts/qcom/msm8953-xiaomi-mido.dts b/arch/arm64/boot/dts/qcom/msm8953-xiaomi-mido.dts
index 6b9245cd8b0c..bdf1bfc79c56 100644
--- a/arch/arm64/boot/dts/qcom/msm8953-xiaomi-mido.dts
+++ b/arch/arm64/boot/dts/qcom/msm8953-xiaomi-mido.dts
@@ -326,5 +326,6 @@ &usb3 {
};
&usb3_dwc3 {
+ /delete-property/ usb-role-switch;
dr_mode = "peripheral";
};
diff --git a/arch/arm64/boot/dts/qcom/msm8953-xiaomi-tissot.dts b/arch/arm64/boot/dts/qcom/msm8953-xiaomi-tissot.dts
index 9ac4f507e321..fccb9c4360ca 100644
--- a/arch/arm64/boot/dts/qcom/msm8953-xiaomi-tissot.dts
+++ b/arch/arm64/boot/dts/qcom/msm8953-xiaomi-tissot.dts
@@ -322,5 +322,6 @@ &usb3 {
};
&usb3_dwc3 {
+ /delete-property/ usb-role-switch;
dr_mode = "peripheral";
};
diff --git a/arch/arm64/boot/dts/qcom/msm8953-xiaomi-vince.dts b/arch/arm64/boot/dts/qcom/msm8953-xiaomi-vince.dts
index b0588f30f8f1..d46325e79917 100644
--- a/arch/arm64/boot/dts/qcom/msm8953-xiaomi-vince.dts
+++ b/arch/arm64/boot/dts/qcom/msm8953-xiaomi-vince.dts
@@ -357,5 +357,6 @@ &usb3 {
};
&usb3_dwc3 {
+ /delete-property/ usb-role-switch;
dr_mode = "peripheral";
};
diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
index 47ca2d000341..27de7cf31c83 100644
--- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
+++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
@@ -667,6 +667,7 @@ &usb_1 {
};
&usb_1_dwc3 {
+ /delete-property/ usb-role-switch;
dr_mode = "peripheral";
};
diff --git a/arch/arm64/boot/dts/qcom/sdm450-motorola-ali.dts b/arch/arm64/boot/dts/qcom/sdm450-motorola-ali.dts
index e27f3c5d5bba..a288d52fb6d7 100644
--- a/arch/arm64/boot/dts/qcom/sdm450-motorola-ali.dts
+++ b/arch/arm64/boot/dts/qcom/sdm450-motorola-ali.dts
@@ -248,5 +248,6 @@ &usb3 {
};
&usb3_dwc3 {
+ /delete-property/ usb-role-switch;
dr_mode = "peripheral";
};
diff --git a/arch/arm64/boot/dts/qcom/sdm632-motorola-ocean.dts b/arch/arm64/boot/dts/qcom/sdm632-motorola-ocean.dts
index c82d6e628d2c..2f55db0c8ce3 100644
--- a/arch/arm64/boot/dts/qcom/sdm632-motorola-ocean.dts
+++ b/arch/arm64/boot/dts/qcom/sdm632-motorola-ocean.dts
@@ -287,5 +287,6 @@ &usb3 {
};
&usb3_dwc3 {
+ /delete-property/ usb-role-switch;
dr_mode = "peripheral";
};
diff --git a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
index 2c7a12983dae..9153a5a55ed9 100644
--- a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
+++ b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
@@ -240,6 +240,7 @@ &usb {
};
&usb_dwc3 {
+ /delete-property/ usb-role-switch;
maximum-speed = "high-speed";
dr_mode = "peripheral";
diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts
index 98eb072fa912..4a30024aa48f 100644
--- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts
+++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts
@@ -234,6 +234,7 @@ &usb {
};
&usb_dwc3 {
+ /delete-property/ usb-role-switch;
maximum-speed = "high-speed";
dr_mode = "peripheral";
};
diff --git a/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts b/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts
index 54da053a8042..9d78bb3f7190 100644
--- a/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts
+++ b/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts
@@ -359,6 +359,7 @@ &usb {
};
&usb_dwc3 {
+ /delete-property/ usb-role-switch;
maximum-speed = "high-speed";
dr_mode = "peripheral";
--
2.39.2
Move the graph connection between USB host, USB SS PHY and DP port to
the SoC dtsi file. They are linked in hardware in this way.
Signed-off-by: Dmitry Baryshkov <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 13 -------------
arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 13 -------------
arch/arm64/boot/dts/qcom/sm8550-qrd.dts | 13 -------------
arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 8 --------
arch/arm64/boot/dts/qcom/sm8550.dtsi | 4 ++++
5 files changed, 4 insertions(+), 47 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8550-hdk.dts b/arch/arm64/boot/dts/qcom/sm8550-hdk.dts
index 12d60a0ee095..f786d9114936 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-hdk.dts
@@ -940,7 +940,6 @@ &mdss_dp0 {
};
&mdss_dp0_out {
- remote-endpoint = <&usb_dp_qmpphy_dp_in>;
data-lanes = <0 1>;
};
@@ -1267,10 +1266,6 @@ &usb_1_dwc3_hs {
remote-endpoint = <&pmic_glink_hs_in>;
};
-&usb_1_dwc3_ss {
- remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
-};
-
&usb_1_hsphy {
vdd-supply = <&vreg_l1e_0p88>;
vdda12-supply = <&vreg_l3e_1p2>;
@@ -1289,18 +1284,10 @@ &usb_dp_qmpphy {
status = "okay";
};
-&usb_dp_qmpphy_dp_in {
- remote-endpoint = <&mdss_dp0_out>;
-};
-
&usb_dp_qmpphy_out {
remote-endpoint = <&pmic_glink_ss_in>;
};
-&usb_dp_qmpphy_usb_ss_in {
- remote-endpoint = <&usb_1_dwc3_ss>;
-};
-
&xo_board {
clock-frequency = <76800000>;
};
diff --git a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
index 3d4ad5aac70f..56800ab903a1 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
@@ -736,7 +736,6 @@ &mdss_dp0 {
&mdss_dp0_out {
data-lanes = <0 1>;
- remote-endpoint = <&usb_dp_qmpphy_dp_in>;
};
&pcie_1_phy_aux_clk {
@@ -960,10 +959,6 @@ &usb_1_dwc3_hs {
remote-endpoint = <&pmic_glink_hs_in>;
};
-&usb_1_dwc3_ss {
- remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
-};
-
&usb_1_hsphy {
vdd-supply = <&vreg_l1e_0p88>;
vdda12-supply = <&vreg_l3e_1p2>;
@@ -982,18 +977,10 @@ &usb_dp_qmpphy {
status = "okay";
};
-&usb_dp_qmpphy_dp_in {
- remote-endpoint = <&mdss_dp0_out>;
-};
-
&usb_dp_qmpphy_out {
remote-endpoint = <&pmic_glink_ss_in>;
};
-&usb_dp_qmpphy_usb_ss_in {
- remote-endpoint = <&usb_1_dwc3_ss>;
-};
-
&xo_board {
clock-frequency = <76800000>;
};
diff --git a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
index 92f015017418..d0b373da39d4 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
@@ -807,7 +807,6 @@ &mdss_dp0 {
&mdss_dp0_out {
data-lanes = <0 1>;
- remote-endpoint = <&usb_dp_qmpphy_dp_in>;
};
&pcie_1_phy_aux_clk {
@@ -1144,10 +1143,6 @@ &usb_1_dwc3_hs {
remote-endpoint = <&pmic_glink_hs_in>;
};
-&usb_1_dwc3_ss {
- remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
-};
-
&usb_1_hsphy {
vdd-supply = <&vreg_l1e_0p88>;
vdda12-supply = <&vreg_l3e_1p2>;
@@ -1166,18 +1161,10 @@ &usb_dp_qmpphy {
status = "okay";
};
-&usb_dp_qmpphy_dp_in {
- remote-endpoint = <&mdss_dp0_out>;
-};
-
&usb_dp_qmpphy_out {
remote-endpoint = <&redriver_ss_in>;
};
-&usb_dp_qmpphy_usb_ss_in {
- remote-endpoint = <&usb_1_dwc3_ss>;
-};
-
&xo_board {
clock-frequency = <76800000>;
};
diff --git a/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts b/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts
index 85e0d3d66e16..7a8d5c34e9e6 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts
@@ -746,10 +746,6 @@ &usb_1_dwc3_hs {
remote-endpoint = <&pmic_glink_hs_in>;
};
-&usb_1_dwc3_ss {
- remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
-};
-
&usb_1_hsphy {
vdd-supply = <&pm8550vs_2_l1>;
vdda12-supply = <&pm8550vs_2_l3>;
@@ -770,10 +766,6 @@ &usb_dp_qmpphy_out {
remote-endpoint = <&pmic_glink_ss_in>;
};
-&usb_dp_qmpphy_usb_ss_in {
- remote-endpoint = <&usb_1_dwc3_ss>;
-};
-
&xo_board {
clock-frequency = <76800000>;
};
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index bc5aeb05ffc3..3ada5a30ecb7 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -2910,6 +2910,7 @@ mdss_dp0_in: endpoint {
port@1 {
reg = <1>;
mdss_dp0_out: endpoint {
+ remote-endpoint = <&usb_dp_qmpphy_dp_in>;
};
};
};
@@ -3186,6 +3187,7 @@ port@1 {
reg = <1>;
usb_dp_qmpphy_usb_ss_in: endpoint {
+ remote-endpoint = <&usb_1_dwc3_ss>;
};
};
@@ -3193,6 +3195,7 @@ port@2 {
reg = <2>;
usb_dp_qmpphy_dp_in: endpoint {
+ remote-endpoint = <&mdss_dp0_out>;
};
};
};
@@ -3280,6 +3283,7 @@ port@1 {
reg = <1>;
usb_1_dwc3_ss: endpoint {
+ remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
};
};
};
--
2.39.2
The orientation-switch of the USB+DP QMP PHY is not a property of the
board, it is a design property of the QMP PHY itself. Move the property
from board DTS to SoC DTSI.
Signed-off-by: Dmitry Baryshkov <[email protected]>
---
arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 1 -
arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 ++
arch/arm64/boot/dts/qcom/sm8350-hdk.dts | 2 --
arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 ++
4 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
index 44239d1e57e9..c52357214de5 100644
--- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
+++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
@@ -1373,7 +1373,6 @@ &usb_1_qmpphy {
vdda-phy-supply = <&vreg_l9a_1p2>;
vdda-pll-supply = <&vreg_l18a_0p92>;
- orientation-switch;
};
&usb_1_qmpphy_out {
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index d6c8c6c2eced..5580843e27b6 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -3936,6 +3936,8 @@ usb_1_qmpphy: phy@88e8000 {
#clock-cells = <1>;
#phy-cells = <1>;
+ orientation-switch;
+
ports {
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
index 81e5577cccb7..895adce59e75 100644
--- a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
@@ -870,8 +870,6 @@ &usb_1_qmpphy {
vdda-phy-supply = <&vreg_l6b_1p2>;
vdda-pll-supply = <&vreg_l1b_0p88>;
-
- orientation-switch;
};
&usb_1_qmpphy_out {
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index 24c42f285163..d67c19a59d5a 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -2256,6 +2256,8 @@ usb_1_qmpphy: phy@88e8000 {
#clock-cells = <1>;
#phy-cells = <1>;
+ orientation-switch;
+
status = "disabled";
ports {
--
2.39.2
The orientation-switch of the USB+DP QMP PHY is not a property of the
board, it is a design property of the QMP PHY itself. Move the property
from board DTS to SoC DTSI.
Signed-off-by: Dmitry Baryshkov <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 2 --
arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 2 --
arch/arm64/boot/dts/qcom/sm8550-qrd.dts | 2 --
arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 -
arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 ++
5 files changed, 2 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8550-hdk.dts b/arch/arm64/boot/dts/qcom/sm8550-hdk.dts
index f786d9114936..98934e4a81b2 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-hdk.dts
@@ -1279,8 +1279,6 @@ &usb_dp_qmpphy {
vdda-phy-supply = <&vreg_l3e_1p2>;
vdda-pll-supply = <&vreg_l3f_0p88>;
- orientation-switch;
-
status = "okay";
};
diff --git a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
index 56800ab903a1..d3fd00176233 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
@@ -972,8 +972,6 @@ &usb_dp_qmpphy {
vdda-phy-supply = <&vreg_l3e_1p2>;
vdda-pll-supply = <&vreg_l3f_0p91>;
- orientation-switch;
-
status = "okay";
};
diff --git a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
index d0b373da39d4..1d487c42a39b 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
@@ -1156,8 +1156,6 @@ &usb_dp_qmpphy {
vdda-phy-supply = <&vreg_l3e_1p2>;
vdda-pll-supply = <&vreg_l3f_0p88>;
- orientation-switch;
-
status = "okay";
};
diff --git a/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts b/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts
index 7a8d5c34e9e6..92a88fb05609 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts
@@ -757,7 +757,6 @@ &usb_1_hsphy {
&usb_dp_qmpphy {
vdda-phy-supply = <&pm8550vs_2_l3>;
vdda-pll-supply = <&pm8550ve_l3>;
- orientation-switch;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index 3ada5a30ecb7..9980504f66db 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -3170,6 +3170,8 @@ usb_dp_qmpphy: phy@88e8000 {
#clock-cells = <1>;
#phy-cells = <1>;
+ orientation-switch;
+
status = "disabled";
ports {
--
2.39.2
The lanes from the USB-C SS port are connected to the combo USB+DP QMP
PHY rather than the SS port of the USB controller. Move the connection
endpoint to the QMP PHY out port.
Signed-off-by: Dmitry Baryshkov <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8650-mtp.dts | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8650-mtp.dts b/arch/arm64/boot/dts/qcom/sm8650-mtp.dts
index d04ceaa73c2b..819f6eadba07 100644
--- a/arch/arm64/boot/dts/qcom/sm8650-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8650-mtp.dts
@@ -59,7 +59,7 @@ port@1 {
reg = <1>;
pmic_glink_ss_in: endpoint {
- remote-endpoint = <&usb_1_dwc3_ss>;
+ remote-endpoint = <&usb_dp_qmpphy_out>;
};
};
};
@@ -853,10 +853,6 @@ &usb_1_dwc3_hs {
remote-endpoint = <&pmic_glink_hs_in>;
};
-&usb_1_dwc3_ss {
- remote-endpoint = <&pmic_glink_ss_in>;
-};
-
&usb_1_hsphy {
vdd-supply = <&vreg_l1i_0p88>;
vdda12-supply = <&vreg_l3i_1p2>;
@@ -873,6 +869,10 @@ &usb_dp_qmpphy {
status = "okay";
};
+&usb_dp_qmpphy_out {
+ remote-endpoint = <&pmic_glink_ss_in>;
+};
+
&xo_board {
clock-frequency = <76800000>;
};
--
2.39.2
On 29/04/2024 14:43, Dmitry Baryshkov wrote:
> The lanes from the USB-C SS port are connected to the combo USB+DP QMP
> PHY rather than the SS port of the USB controller. Move the connection
> endpoint to the QMP PHY out port.
>
> Signed-off-by: Dmitry Baryshkov <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/sm8650-mtp.dts | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8650-mtp.dts b/arch/arm64/boot/dts/qcom/sm8650-mtp.dts
> index d04ceaa73c2b..819f6eadba07 100644
> --- a/arch/arm64/boot/dts/qcom/sm8650-mtp.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8650-mtp.dts
> @@ -59,7 +59,7 @@ port@1 {
> reg = <1>;
>
> pmic_glink_ss_in: endpoint {
> - remote-endpoint = <&usb_1_dwc3_ss>;
> + remote-endpoint = <&usb_dp_qmpphy_out>;
> };
> };
> };
> @@ -853,10 +853,6 @@ &usb_1_dwc3_hs {
> remote-endpoint = <&pmic_glink_hs_in>;
> };
>
> -&usb_1_dwc3_ss {
> - remote-endpoint = <&pmic_glink_ss_in>;
> -};
> -
> &usb_1_hsphy {
> vdd-supply = <&vreg_l1i_0p88>;
> vdda12-supply = <&vreg_l3i_1p2>;
> @@ -873,6 +869,10 @@ &usb_dp_qmpphy {
> status = "okay";
> };
>
> +&usb_dp_qmpphy_out {
> + remote-endpoint = <&pmic_glink_ss_in>;
> +};
> +
> &xo_board {
> clock-frequency = <76800000>;
> };
>
Reviewed-by: Neil Armstrong <[email protected]>
On 29/04/2024 14:43, Dmitry Baryshkov wrote:
> Move the graph connection between USB host, USB SS PHY and DP port to
> the SoC dtsi file. They are linked in hardware in this way.
>
> Signed-off-by: Dmitry Baryshkov <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 13 -------------
> arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 13 -------------
> arch/arm64/boot/dts/qcom/sm8550-qrd.dts | 13 -------------
> arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 8 --------
> arch/arm64/boot/dts/qcom/sm8550.dtsi | 4 ++++
> 5 files changed, 4 insertions(+), 47 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8550-hdk.dts b/arch/arm64/boot/dts/qcom/sm8550-hdk.dts
> index 12d60a0ee095..f786d9114936 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550-hdk.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8550-hdk.dts
> @@ -940,7 +940,6 @@ &mdss_dp0 {
> };
>
> &mdss_dp0_out {
> - remote-endpoint = <&usb_dp_qmpphy_dp_in>;
> data-lanes = <0 1>;
> };
>
> @@ -1267,10 +1266,6 @@ &usb_1_dwc3_hs {
> remote-endpoint = <&pmic_glink_hs_in>;
> };
>
> -&usb_1_dwc3_ss {
> - remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
> -};
> -
> &usb_1_hsphy {
> vdd-supply = <&vreg_l1e_0p88>;
> vdda12-supply = <&vreg_l3e_1p2>;
> @@ -1289,18 +1284,10 @@ &usb_dp_qmpphy {
> status = "okay";
> };
>
> -&usb_dp_qmpphy_dp_in {
> - remote-endpoint = <&mdss_dp0_out>;
> -};
> -
> &usb_dp_qmpphy_out {
> remote-endpoint = <&pmic_glink_ss_in>;
> };
>
> -&usb_dp_qmpphy_usb_ss_in {
> - remote-endpoint = <&usb_1_dwc3_ss>;
> -};
> -
> &xo_board {
> clock-frequency = <76800000>;
> };
> diff --git a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
> index 3d4ad5aac70f..56800ab903a1 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
> @@ -736,7 +736,6 @@ &mdss_dp0 {
>
> &mdss_dp0_out {
> data-lanes = <0 1>;
> - remote-endpoint = <&usb_dp_qmpphy_dp_in>;
> };
>
> &pcie_1_phy_aux_clk {
> @@ -960,10 +959,6 @@ &usb_1_dwc3_hs {
> remote-endpoint = <&pmic_glink_hs_in>;
> };
>
> -&usb_1_dwc3_ss {
> - remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
> -};
> -
> &usb_1_hsphy {
> vdd-supply = <&vreg_l1e_0p88>;
> vdda12-supply = <&vreg_l3e_1p2>;
> @@ -982,18 +977,10 @@ &usb_dp_qmpphy {
> status = "okay";
> };
>
> -&usb_dp_qmpphy_dp_in {
> - remote-endpoint = <&mdss_dp0_out>;
> -};
> -
> &usb_dp_qmpphy_out {
> remote-endpoint = <&pmic_glink_ss_in>;
> };
>
> -&usb_dp_qmpphy_usb_ss_in {
> - remote-endpoint = <&usb_1_dwc3_ss>;
> -};
> -
> &xo_board {
> clock-frequency = <76800000>;
> };
> diff --git a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
> index 92f015017418..d0b373da39d4 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
> @@ -807,7 +807,6 @@ &mdss_dp0 {
>
> &mdss_dp0_out {
> data-lanes = <0 1>;
> - remote-endpoint = <&usb_dp_qmpphy_dp_in>;
> };
>
> &pcie_1_phy_aux_clk {
> @@ -1144,10 +1143,6 @@ &usb_1_dwc3_hs {
> remote-endpoint = <&pmic_glink_hs_in>;
> };
>
> -&usb_1_dwc3_ss {
> - remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
> -};
> -
> &usb_1_hsphy {
> vdd-supply = <&vreg_l1e_0p88>;
> vdda12-supply = <&vreg_l3e_1p2>;
> @@ -1166,18 +1161,10 @@ &usb_dp_qmpphy {
> status = "okay";
> };
>
> -&usb_dp_qmpphy_dp_in {
> - remote-endpoint = <&mdss_dp0_out>;
> -};
> -
> &usb_dp_qmpphy_out {
> remote-endpoint = <&redriver_ss_in>;
> };
>
> -&usb_dp_qmpphy_usb_ss_in {
> - remote-endpoint = <&usb_1_dwc3_ss>;
> -};
> -
> &xo_board {
> clock-frequency = <76800000>;
> };
> diff --git a/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts b/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts
> index 85e0d3d66e16..7a8d5c34e9e6 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts
> @@ -746,10 +746,6 @@ &usb_1_dwc3_hs {
> remote-endpoint = <&pmic_glink_hs_in>;
> };
>
> -&usb_1_dwc3_ss {
> - remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
> -};
> -
> &usb_1_hsphy {
> vdd-supply = <&pm8550vs_2_l1>;
> vdda12-supply = <&pm8550vs_2_l3>;
> @@ -770,10 +766,6 @@ &usb_dp_qmpphy_out {
> remote-endpoint = <&pmic_glink_ss_in>;
> };
>
> -&usb_dp_qmpphy_usb_ss_in {
> - remote-endpoint = <&usb_1_dwc3_ss>;
> -};
> -
> &xo_board {
> clock-frequency = <76800000>;
> };
> diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> index bc5aeb05ffc3..3ada5a30ecb7 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> @@ -2910,6 +2910,7 @@ mdss_dp0_in: endpoint {
> port@1 {
> reg = <1>;
> mdss_dp0_out: endpoint {
> + remote-endpoint = <&usb_dp_qmpphy_dp_in>;
> };
> };
> };
> @@ -3186,6 +3187,7 @@ port@1 {
> reg = <1>;
>
> usb_dp_qmpphy_usb_ss_in: endpoint {
> + remote-endpoint = <&usb_1_dwc3_ss>;
> };
> };
>
> @@ -3193,6 +3195,7 @@ port@2 {
> reg = <2>;
>
> usb_dp_qmpphy_dp_in: endpoint {
> + remote-endpoint = <&mdss_dp0_out>;
> };
> };
> };
> @@ -3280,6 +3283,7 @@ port@1 {
> reg = <1>;
>
> usb_1_dwc3_ss: endpoint {
> + remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
> };
> };
> };
>
Reviewed-by: Neil Armstrong <[email protected]>
On 29.04.2024 2:43 PM, Dmitry Baryshkov wrote:
> The usb-role-switch property doesn't make sense for the USB hosts which
> are fixed to either host or peripheral USB data mode. Delete
> usb-role-switch property being present in SoC dtsi.
>
> Signed-off-by: Dmitry Baryshkov <[email protected]>
> ---
I'm more than sure all of these devices are physically capapable of
doing both modes, but the infra to switch modes / provide VBUS as
host was / is not hooked up or present yet
Konrad
On 29.04.2024 2:43 PM, Dmitry Baryshkov wrote:
> Move the graph connection between USB host, USB SS PHY and DP port to
> the SoC dtsi file. They are linked in hardware in this way.
>
> Signed-off-by: Dmitry Baryshkov <[email protected]>
> ---
Reviewed-by: Konrad Dybcio <[email protected]>
Konrad
On 29.04.2024 2:43 PM, Dmitry Baryshkov wrote:
> Move the graph connection between USB host, USB SS PHY and DP port to
> the SoC dtsi file. They are linked in hardware in this way.
>
> Signed-off-by: Dmitry Baryshkov <[email protected]>
> ---
Reviewed-by: Konrad Dybcio <[email protected]>
Konrad
On 29.04.2024 2:43 PM, Dmitry Baryshkov wrote:
> Move the graph connection between USB host, USB SS PHY and DP port to
> the SoC dtsi file. They are linked in hardware in this way.
>
> Signed-off-by: Dmitry Baryshkov <[email protected]>
> ---
Reviewed-by: Konrad Dybcio <[email protected]>
Konrad
On 29.04.2024 2:43 PM, Dmitry Baryshkov wrote:
> The orientation-switch of the USB+DP QMP PHY is not a property of the
> board, it is a design property of the QMP PHY itself. Move the property
> from board DTS to SoC DTSI.
>
> Signed-off-by: Dmitry Baryshkov <[email protected]>
> ---
Reviewed-by: Konrad Dybcio <[email protected]>
Konrad
On 29.04.2024 2:43 PM, Dmitry Baryshkov wrote:
> Move the graph connection between USB host, USB SS PHY and DP port to
> the SoC dtsi file. They are linked in hardware in this way.
>
> Signed-off-by: Dmitry Baryshkov <[email protected]>
> ---
Reviewed-by: Konrad Dybcio <[email protected]>
Konrad
On 29.04.2024 2:43 PM, Dmitry Baryshkov wrote:
> Move the graph connection between USB host, USB SS PHY and DP port to
> the SoC dtsi file. They are linked in hardware in this way.
>
> Signed-off-by: Dmitry Baryshkov <[email protected]>
> ---
Reviewed-by: Konrad Dybcio <[email protected]>
Konrad
On 29.04.2024 2:43 PM, Dmitry Baryshkov wrote:
> The orientation-switch of the USB+DP QMP PHY is not a property of the
> board, it is a design property of the QMP PHY itself. Move the property
> from board DTS to SoC DTSI.
>
> Signed-off-by: Dmitry Baryshkov <[email protected]>
> ---
Reviewed-by: Konrad Dybcio <[email protected]>
Konrad
On 29.04.2024 2:43 PM, Dmitry Baryshkov wrote:
> The lanes from the USB-C SS port are connected to the combo USB+DP QMP
> PHY rather than the SS port of the USB controller. Move the connection
> endpoint to the QMP PHY out port.
>
> Signed-off-by: Dmitry Baryshkov <[email protected]>
> ---
Reviewed-by: Konrad Dybcio <[email protected]>
Konrad
On 29.04.2024 2:43 PM, Dmitry Baryshkov wrote:
> The orientation-switch of the USB+DP QMP PHY is not a property of the
> board, it is a design property of the QMP PHY itself. Move the property
> from board DTS to SoC DTSI.
>
> Signed-off-by: Dmitry Baryshkov <[email protected]>
> ---
Reviewed-by: Konrad Dybcio <[email protected]>
Konrad
On 29.04.2024 2:43 PM, Dmitry Baryshkov wrote:
> The orientation-switch of the USB+DP QMP PHY is not a property of the
> board, it is a design property of the QMP PHY itself. Move the property
> from board DTS to SoC DTSI.
>
> Signed-off-by: Dmitry Baryshkov <[email protected]>
> ---
Reviewed-by: Konrad Dybcio <[email protected]>
Konrad
On Tue, 30 Apr 2024 at 12:34, Konrad Dybcio <[email protected]> wrote:
>
> On 29.04.2024 2:43 PM, Dmitry Baryshkov wrote:
> > The usb-role-switch property doesn't make sense for the USB hosts which
> > are fixed to either host or peripheral USB data mode. Delete
> > usb-role-switch property being present in SoC dtsi.
> >
> > Signed-off-by: Dmitry Baryshkov <[email protected]>
> > ---
>
> I'm more than sure all of these devices are physically capapable of
> doing both modes, but the infra to switch modes / provide VBUS as
> host was / is not hooked up or present yet
Yes. So it makes sense to add the usb-role-switch property if/when the
board gains dr_mode = 'otg' support.
--
With best wishes
Dmitry
On Mon, 29 Apr 2024 15:43:37 +0300, Dmitry Baryshkov wrote:
> Move common USB-related properties and nodes (e.g. PHY's
> orientation-switch, generic endpoint connections) to the SoC file. If
> the board has different needs, it has to override these generic
> usecases.
>
>
Applied, thanks!
[01/12] arm64: dts: qcom: sm8150: move USB graph to the SoC dtsi
commit: 4b699d2d569483760a18eeec1d80f691d635550e
[02/12] arm64: dts: qcom: sm8350: move USB graph to the SoC dtsi
commit: 18eac39beb32cec920aaa29aaa15084cde6e366b
[03/12] arm64: dts: qcom: sm8450: move USB graph to the SoC dtsi
commit: a84f3627f9d9765853b244f0cf50d3cafd1f0957
[04/12] arm64: dts: qcom: sm8550: move USB graph to the SoC dtsi
commit: 2f212acedbbfe7119219935c8c670c3323f07186
[05/12] arm64: dts: qcom: sm8650: move USB graph to the SoC dtsi
commit: 65931e59e0399129d845452c945b8017ad0570df
[06/12] arm64: dts: qcom: sm8350: move PHY's orientation-switch to SoC dtsi
commit: 4f35b0fe2673655148d528982386d9ba5113d537
[07/12] arm64: dts: qcom: sm8450: move PHY's orientation-switch to SoC dtsi
commit: 1a1322c8a698c8ccafed5379ae8c97dbf8480698
[08/12] arm64: dts: qcom: sm8550: move PHY's orientation-switch to SoC dtsi
commit: d02c0027ea20f67a8dcf023786eb993abee2179e
[09/12] arm64: dts: qcom: sm8650: move PHY's orientation-switch to SoC dtsi
commit: fbb22a182267c8de4056bd531caae1d5a32bb40c
[10/12] arm64: dts: qcom: sm8650-mtp: connect USB-C SS port to QMP PHY
commit: c2f1d0c08fc11ad45d5980ffb1ba3a0a78cc8318
[11/12] arm64: dts: qcom: delete wrong usb-role-switch properties
commit: dad66630a083263b513448426523a3b52a959c79
[12/12] arm64: dts: qcom: x1e80100: drop wrong usb-role-switch properties
commit: 7c0922fc894ffff393ba57c4c20fc034e3a4917f
Best regards,
--
Bjorn Andersson <[email protected]>