2023-01-05 10:39:04

by Alice Guo (OSS)

[permalink] [raw]
Subject: [PATCH v1 0/4] add i.MX93 TMU support

From: Alice Guo <[email protected]>

Alice Guo (3):
dt-bindings: thermal: qoriq-thermal: Add compatible for i.MX93
thermal: qoriq: add i.MX93 TMU support
arm64: dts: imx93: Add CPU thermal zone

Pankit Garg (1):
qoriq_thermal: No need to program site adjustment register

.../bindings/thermal/qoriq-thermal.yaml | 1 +
arch/arm64/boot/dts/freescale/imx93.dtsi | 48 +++++++++++++++
drivers/thermal/qoriq_thermal.c | 59 ++++++++++++++++---
3 files changed, 100 insertions(+), 8 deletions(-)

--
2.17.1


2023-01-05 11:02:38

by Alice Guo (OSS)

[permalink] [raw]
Subject: [PATCH v1 3/4] qoriq_thermal: No need to program site adjustment register

From: Pankit Garg <[email protected]>

No need to program site adjustment register, as programming
these registers do not give accurate value and also these
registers are not mentioned in Reference Manual.

Signed-off-by: Pankit Garg <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
---
drivers/thermal/qoriq_thermal.c | 7 +------
1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/drivers/thermal/qoriq_thermal.c b/drivers/thermal/qoriq_thermal.c
index 18030bd68687..24ef446414cc 100644
--- a/drivers/thermal/qoriq_thermal.c
+++ b/drivers/thermal/qoriq_thermal.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
//
// Copyright 2016 Freescale Semiconductor, Inc.
+// Copyright 2022 NXP

#include <linux/clk.h>
#include <linux/err.h>
@@ -245,8 +246,6 @@ static int imx93_tmu_calibration(struct device *dev,

static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
{
- int i;
-
/* Disable interrupt, using polling instead */
regmap_write(data->regmap, REGS_TIER, TIER_DISABLE);

@@ -257,13 +256,9 @@ static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
} else if (data->ver == TMU_VER93) {
regmap_write(data->regmap, REGS_V2_TMTMIR, TMTMIR_DEFAULT);
regmap_write(data->regmap, REGS_V2_TEUMR(0), TEUMR0_V21);
- for (i = 0; i < SITES_MAX; i++)
- regmap_write(data->regmap, REGS_V2_TMSAR(i), TMSARA_V2);
} else {
regmap_write(data->regmap, REGS_V2_TMTMIR, TMTMIR_DEFAULT);
regmap_write(data->regmap, REGS_V2_TEUMR(0), TEUMR0_V2);
- for (i = 0; i < SITES_MAX; i++)
- regmap_write(data->regmap, REGS_V2_TMSAR(i), TMSARA_V2);
}

/* Disable monitoring */
--
2.17.1

2023-01-05 11:05:16

by Alice Guo (OSS)

[permalink] [raw]
Subject: [PATCH v1 4/4] arm64: dts: imx93: Add CPU thermal zone

From: Alice Guo <[email protected]>

Add CPU thermal zone and attach it to the TMU which monitors the CPU
temperature.

Signed-off-by: Alice Guo <[email protected]>
Reviewed-by: Jacky Bai <[email protected]>
Reviewed-by: Ye Li <[email protected]>
Signed-off-by: Dong Aisheng <[email protected]>
---
arch/arm64/boot/dts/freescale/imx93.dtsi | 48 ++++++++++++++++++++++++
1 file changed, 48 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
index 6808321ed809..60306f3c5e7f 100644
--- a/arch/arm64/boot/dts/freescale/imx93.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/fsl,imx93-power.h>
+#include <dt-bindings/thermal/thermal.h>

#include "imx93-pinfunc.h"

@@ -116,6 +117,38 @@
interrupt-parent = <&gic>;
};

+ thermal-zones {
+ cpu-thermal {
+ polling-delay-passive = <250>;
+ polling-delay = <2000>;
+
+ thermal-sensors = <&tmu 0>;
+
+ trips {
+ cpu_alert: cpu-alert {
+ temperature = <80000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_crit: cpu-crit {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert>;
+ cooling-device =
+ <&A55_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&A55_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+ };
+
soc@0 {
compatible = "simple-bus";
#address-cells = <1>;
@@ -280,6 +313,21 @@
compatible = "fsl,imx93-anatop", "syscon";
reg = <0x44480000 0x10000>;
};
+
+ tmu: tmu@44482000 {
+ compatible = "fsl,imx93-tmu";
+ reg = <0x44482000 0x1000>;
+ clocks = <&clk IMX93_CLK_TMC_GATE>;
+ little-endian;
+ fsl,tmu-calibration = <0x0000000e 0x800000da
+ 0x00000029 0x800000e9
+ 0x00000056 0x80000102
+ 0x000000a2 0x8000012a
+ 0x00000116 0x80000166
+ 0x00000195 0x800001a7
+ 0x000001b2 0x800001b6>;
+ #thermal-sensor-cells = <1>;
+ };
};

aips2: bus@42000000 {
--
2.17.1

2023-01-05 11:13:54

by Alice Guo (OSS)

[permalink] [raw]
Subject: [PATCH v1 2/4] thermal: qoriq: add i.MX93 TMU support

From: Alice Guo <[email protected]>

The procedure to program the calibration table of i.MX93 TMU:
1. disable monitoring mode
2. configure TCMCFG
3. write TTCFGR with TTCFGR[CAL_PT] = n
4. write TSCFGR with the sensor value of the calibration point n
5. write TTRCRn associated with the calibration point n
Need to repeat steps 3—5 for all calibration points from the calibration
table provided by the TMU device node.

When TRITSR[V] = 1 and TRITSR[TP5] = 1, need to add 0.5K to
TRITSR[TEMP].

IPBRR0s of lx2160ardb, lx2162aqds and i.MX93 have the same value
0x01900201 so that use the compatible to determine whether the current
TMU belongs to i.MX93 or not.

Signed-off-by: Alice Guo <[email protected]>
Reviewed-by: Jacky Bai <[email protected]>
Reviewed-by: Ye Li <[email protected]>
Acked-by: Jason Liu <[email protected]>
---
drivers/thermal/qoriq_thermal.c | 56 ++++++++++++++++++++++++++++++---
1 file changed, 52 insertions(+), 4 deletions(-)

diff --git a/drivers/thermal/qoriq_thermal.c b/drivers/thermal/qoriq_thermal.c
index d111e218f362..18030bd68687 100644
--- a/drivers/thermal/qoriq_thermal.c
+++ b/drivers/thermal/qoriq_thermal.c
@@ -24,9 +24,11 @@
#define TMTMIR_DEFAULT 0x0000000f
#define TIER_DISABLE 0x0
#define TEUMR0_V2 0x51009c00
+#define TEUMR0_V21 0x55010c00
#define TMSARA_V2 0xe
#define TMU_VER1 0x1
#define TMU_VER2 0x2
+#define TMU_VER93 0x3

#define REGS_TMR 0x000 /* Mode Register */
#define TMR_DISABLE 0x0
@@ -52,6 +54,7 @@
* Site Register
*/
#define TRITSR_V BIT(31)
+#define TRITSR_TP5 BIT(9)
#define REGS_V2_TMSAR(n) (0x304 + 16 * (n)) /* TMU monitoring
* site adjustment register
*/
@@ -114,10 +117,16 @@ static int tmu_get_temp(struct thermal_zone_device *tz, int *temp)
10 * USEC_PER_MSEC))
return -ENODATA;

- if (qdata->ver == TMU_VER1)
+ if (qdata->ver == TMU_VER1) {
*temp = (val & GENMASK(7, 0)) * MILLIDEGREE_PER_DEGREE;
- else
+ } else if (qdata->ver == TMU_VER93) {
+ if (val & TRITSR_TP5)
+ *temp = milli_kelvin_to_millicelsius((val & GENMASK(8, 0)) * MILLIDEGREE_PER_DEGREE + 500);
+ else
+ *temp = kelvin_to_millicelsius(val & GENMASK(8, 0));
+ } else {
*temp = kelvin_to_millicelsius(val & GENMASK(8, 0));
+ }

return 0;
}
@@ -207,6 +216,33 @@ static int qoriq_tmu_calibration(struct device *dev,
return 0;
}

+static int imx93_tmu_calibration(struct device *dev,
+ struct qoriq_tmu_data *data)
+{
+ const u32 *calibration = NULL;
+ u32 cal_pt = 0;
+ u32 val = 0;
+ unsigned int len = 0;
+ unsigned int i = 0;
+
+ calibration = of_get_property(dev->of_node, "fsl,tmu-calibration", &len);
+ if (calibration == NULL || len / 8 > 16 || len % 8) {
+ dev_err(dev, "invalid tmu calibration\n");
+ return -ENODEV;
+ }
+
+ for (i = 0; i < len; i += 0x8, calibration += 2) {
+ cal_pt = i / 8;
+ regmap_write(data->regmap, REGS_TTCFGR, cal_pt);
+ val = of_read_number(calibration, 1);
+ regmap_write(data->regmap, REGS_TSCFGR, val);
+ val = of_read_number(calibration + 1, 1);
+ regmap_write(data->regmap, REGS_TTRnCR(cal_pt), val);
+ }
+
+ return 0;
+}
+
static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
{
int i;
@@ -218,6 +254,11 @@ static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)

if (data->ver == TMU_VER1) {
regmap_write(data->regmap, REGS_TMTMIR, TMTMIR_DEFAULT);
+ } else if (data->ver == TMU_VER93) {
+ regmap_write(data->regmap, REGS_V2_TMTMIR, TMTMIR_DEFAULT);
+ regmap_write(data->regmap, REGS_V2_TEUMR(0), TEUMR0_V21);
+ for (i = 0; i < SITES_MAX; i++)
+ regmap_write(data->regmap, REGS_V2_TMSAR(i), TMSARA_V2);
} else {
regmap_write(data->regmap, REGS_V2_TMTMIR, TMTMIR_DEFAULT);
regmap_write(data->regmap, REGS_V2_TEUMR(0), TEUMR0_V2);
@@ -231,7 +272,7 @@ static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)

static const struct regmap_range qoriq_yes_ranges[] = {
regmap_reg_range(REGS_TMR, REGS_TSCFGR),
- regmap_reg_range(REGS_TTRnCR(0), REGS_TTRnCR(3)),
+ regmap_reg_range(REGS_TTRnCR(0), REGS_TTRnCR(15)),
regmap_reg_range(REGS_V2_TEUMR(0), REGS_V2_TEUMR(2)),
regmap_reg_range(REGS_V2_TMSAR(0), REGS_V2_TMSAR(15)),
regmap_reg_range(REGS_IPBRR(0), REGS_IPBRR(1)),
@@ -319,9 +360,15 @@ static int qoriq_tmu_probe(struct platform_device *pdev)
}
data->ver = (ver >> 8) & 0xff;

+ if (of_find_compatible_node(NULL, NULL, "fsl,imx93-tmu"))
+ data->ver = TMU_VER93;
+
qoriq_tmu_init_device(data); /* TMU initialization */

- ret = qoriq_tmu_calibration(dev, data); /* TMU calibration */
+ if (data->ver == TMU_VER93)
+ ret = imx93_tmu_calibration(dev, data);
+ else
+ ret = qoriq_tmu_calibration(dev, data); /* TMU calibration */
if (ret < 0)
return ret;

@@ -369,6 +416,7 @@ static SIMPLE_DEV_PM_OPS(qoriq_tmu_pm_ops,
static const struct of_device_id qoriq_tmu_match[] = {
{ .compatible = "fsl,qoriq-tmu", },
{ .compatible = "fsl,imx8mq-tmu", },
+ { .compatible = "fsl,imx93-tmu", },
{},
};
MODULE_DEVICE_TABLE(of, qoriq_tmu_match);
--
2.17.1

2023-01-06 13:18:17

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH v1 4/4] arm64: dts: imx93: Add CPU thermal zone

On 05/01/2023 11:17, Alice Guo (OSS) wrote:
> From: Alice Guo <[email protected]>
>
> Add CPU thermal zone and attach it to the TMU which monitors the CPU
> temperature.
>
> Signed-off-by: Alice Guo <[email protected]>
> Reviewed-by: Jacky Bai <[email protected]>
> Reviewed-by: Ye Li <[email protected]>
> Signed-off-by: Dong Aisheng <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/imx93.dtsi | 48 ++++++++++++++++++++++++
> 1 file changed, 48 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
> index 6808321ed809..60306f3c5e7f 100644
> --- a/arch/arm64/boot/dts/freescale/imx93.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
> @@ -8,6 +8,7 @@
> #include <dt-bindings/input/input.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/power/fsl,imx93-power.h>
> +#include <dt-bindings/thermal/thermal.h>
>
> #include "imx93-pinfunc.h"
>
> @@ -116,6 +117,38 @@
> interrupt-parent = <&gic>;
> };
>
> + thermal-zones {
> + cpu-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <2000>;
> +
> + thermal-sensors = <&tmu 0>;
> +
> + trips {
> + cpu_alert: cpu-alert {
> + temperature = <80000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> +
> + cpu_crit: cpu-crit {
> + temperature = <90000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };

Wrong indentation.

Best regards,
Krzysztof

2023-01-31 06:04:43

by Alice Guo (OSS)

[permalink] [raw]
Subject: RE: [PATCH v1 2/4] thermal: qoriq: add i.MX93 TMU support

Kindly ping...

Best Regards,
Alice Guo

> -----Original Message-----
> From: linux-arm-kernel <[email protected]> On
> Behalf Of Alice Guo (OSS)
> Sent: Thursday, January 5, 2023 6:18 PM
> To: [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; [email protected]
> Cc: [email protected]; [email protected];
> [email protected]; [email protected]; dl-linux-imx
> <[email protected]>
> Subject: [PATCH v1 2/4] thermal: qoriq: add i.MX93 TMU support
>
> From: Alice Guo <[email protected]>
>
> The procedure to program the calibration table of i.MX93 TMU:
> 1. disable monitoring mode
> 2. configure TCMCFG
> 3. write TTCFGR with TTCFGR[CAL_PT] = n
> 4. write TSCFGR with the sensor value of the calibration point n 5. write
> TTRCRn associated with the calibration point n Need to repeat steps 3—5 for all
> calibration points from the calibration table provided by the TMU device node.
>
> When TRITSR[V] = 1 and TRITSR[TP5] = 1, need to add 0.5K to TRITSR[TEMP].
>
> IPBRR0s of lx2160ardb, lx2162aqds and i.MX93 have the same value
> 0x01900201 so that use the compatible to determine whether the current
> TMU belongs to i.MX93 or not.
>
> Signed-off-by: Alice Guo <[email protected]>
> Reviewed-by: Jacky Bai <[email protected]>
> Reviewed-by: Ye Li <[email protected]>
> Acked-by: Jason Liu <[email protected]>
> ---
> drivers/thermal/qoriq_thermal.c | 56
> ++++++++++++++++++++++++++++++---
> 1 file changed, 52 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/thermal/qoriq_thermal.c b/drivers/thermal/qoriq_thermal.c
> index d111e218f362..18030bd68687 100644
> --- a/drivers/thermal/qoriq_thermal.c
> +++ b/drivers/thermal/qoriq_thermal.c
> @@ -24,9 +24,11 @@
> #define TMTMIR_DEFAULT 0x0000000f
> #define TIER_DISABLE 0x0
> #define TEUMR0_V2 0x51009c00
> +#define TEUMR0_V21 0x55010c00
> #define TMSARA_V2 0xe
> #define TMU_VER1 0x1
> #define TMU_VER2 0x2
> +#define TMU_VER93 0x3
>
> #define REGS_TMR 0x000 /* Mode Register */
> #define TMR_DISABLE 0x0
> @@ -52,6 +54,7 @@
> * Site Register
> */
> #define TRITSR_V BIT(31)
> +#define TRITSR_TP5 BIT(9)
> #define REGS_V2_TMSAR(n) (0x304 + 16 * (n)) /* TMU monitoring
> * site adjustment register
> */
> @@ -114,10 +117,16 @@ static int tmu_get_temp(struct
> thermal_zone_device *tz, int *temp)
> 10 * USEC_PER_MSEC))
> return -ENODATA;
>
> - if (qdata->ver == TMU_VER1)
> + if (qdata->ver == TMU_VER1) {
> *temp = (val & GENMASK(7, 0)) * MILLIDEGREE_PER_DEGREE;
> - else
> + } else if (qdata->ver == TMU_VER93) {
> + if (val & TRITSR_TP5)
> + *temp = milli_kelvin_to_millicelsius((val & GENMASK(8, 0)) *
> MILLIDEGREE_PER_DEGREE + 500);
> + else
> + *temp = kelvin_to_millicelsius(val & GENMASK(8, 0));
> + } else {
> *temp = kelvin_to_millicelsius(val & GENMASK(8, 0));
> + }
>
> return 0;
> }
> @@ -207,6 +216,33 @@ static int qoriq_tmu_calibration(struct device *dev,
> return 0;
> }
>
> +static int imx93_tmu_calibration(struct device *dev,
> + struct qoriq_tmu_data *data)
> +{
> + const u32 *calibration = NULL;
> + u32 cal_pt = 0;
> + u32 val = 0;
> + unsigned int len = 0;
> + unsigned int i = 0;
> +
> + calibration = of_get_property(dev->of_node, "fsl,tmu-calibration", &len);
> + if (calibration == NULL || len / 8 > 16 || len % 8) {
> + dev_err(dev, "invalid tmu calibration\n");
> + return -ENODEV;
> + }
> +
> + for (i = 0; i < len; i += 0x8, calibration += 2) {
> + cal_pt = i / 8;
> + regmap_write(data->regmap, REGS_TTCFGR, cal_pt);
> + val = of_read_number(calibration, 1);
> + regmap_write(data->regmap, REGS_TSCFGR, val);
> + val = of_read_number(calibration + 1, 1);
> + regmap_write(data->regmap, REGS_TTRnCR(cal_pt), val);
> + }
> +
> + return 0;
> +}
> +
> static void qoriq_tmu_init_device(struct qoriq_tmu_data *data) {
> int i;
> @@ -218,6 +254,11 @@ static void qoriq_tmu_init_device(struct
> qoriq_tmu_data *data)
>
> if (data->ver == TMU_VER1) {
> regmap_write(data->regmap, REGS_TMTMIR, TMTMIR_DEFAULT);
> + } else if (data->ver == TMU_VER93) {
> + regmap_write(data->regmap, REGS_V2_TMTMIR,
> TMTMIR_DEFAULT);
> + regmap_write(data->regmap, REGS_V2_TEUMR(0), TEUMR0_V21);
> + for (i = 0; i < SITES_MAX; i++)
> + regmap_write(data->regmap, REGS_V2_TMSAR(i), TMSARA_V2);
> } else {
> regmap_write(data->regmap, REGS_V2_TMTMIR,
> TMTMIR_DEFAULT);
> regmap_write(data->regmap, REGS_V2_TEUMR(0), TEUMR0_V2);
> @@ -231,7 +272,7 @@ static void qoriq_tmu_init_device(struct
> qoriq_tmu_data *data)
>
> static const struct regmap_range qoriq_yes_ranges[] = {
> regmap_reg_range(REGS_TMR, REGS_TSCFGR),
> - regmap_reg_range(REGS_TTRnCR(0), REGS_TTRnCR(3)),
> + regmap_reg_range(REGS_TTRnCR(0), REGS_TTRnCR(15)),
> regmap_reg_range(REGS_V2_TEUMR(0), REGS_V2_TEUMR(2)),
> regmap_reg_range(REGS_V2_TMSAR(0), REGS_V2_TMSAR(15)),
> regmap_reg_range(REGS_IPBRR(0), REGS_IPBRR(1)), @@ -319,9 +360,15
> @@ static int qoriq_tmu_probe(struct platform_device *pdev)
> }
> data->ver = (ver >> 8) & 0xff;
>
> + if (of_find_compatible_node(NULL, NULL, "fsl,imx93-tmu"))
> + data->ver = TMU_VER93;
> +
> qoriq_tmu_init_device(data); /* TMU initialization */
>
> - ret = qoriq_tmu_calibration(dev, data); /* TMU calibration */
> + if (data->ver == TMU_VER93)
> + ret = imx93_tmu_calibration(dev, data);
> + else
> + ret = qoriq_tmu_calibration(dev, data); /* TMU calibration */
> if (ret < 0)
> return ret;
>
> @@ -369,6 +416,7 @@ static SIMPLE_DEV_PM_OPS(qoriq_tmu_pm_ops,
> static const struct of_device_id qoriq_tmu_match[] = {
> { .compatible = "fsl,qoriq-tmu", },
> { .compatible = "fsl,imx8mq-tmu", },
> + { .compatible = "fsl,imx93-tmu", },
> {},
> };
> MODULE_DEVICE_TABLE(of, qoriq_tmu_match);
> --
> 2.17.1
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> [email protected]
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

2023-02-10 13:48:53

by Daniel Lezcano

[permalink] [raw]
Subject: Re: [PATCH v1 2/4] thermal: qoriq: add i.MX93 TMU support

On 05/01/2023 11:17, Alice Guo (OSS) wrote:
> From: Alice Guo <[email protected]>
>
> The procedure to program the calibration table of i.MX93 TMU:
> 1. disable monitoring mode
> 2. configure TCMCFG
> 3. write TTCFGR with TTCFGR[CAL_PT] = n
> 4. write TSCFGR with the sensor value of the calibration point n
> 5. write TTRCRn associated with the calibration point n
> Need to repeat steps 3—5 for all calibration points from the calibration
> table provided by the TMU device node.
>
> When TRITSR[V] = 1 and TRITSR[TP5] = 1, need to add 0.5K to
> TRITSR[TEMP].
>
> IPBRR0s of lx2160ardb, lx2162aqds and i.MX93 have the same value
> 0x01900201 so that use the compatible to determine whether the current
> TMU belongs to i.MX93 or not.
>
> Signed-off-by: Alice Guo <[email protected]>
> Reviewed-by: Jacky Bai <[email protected]>
> Reviewed-by: Ye Li <[email protected]>
> Acked-by: Jason Liu <[email protected]>
> ---

[ ... ]

> @@ -369,6 +416,7 @@ static SIMPLE_DEV_PM_OPS(qoriq_tmu_pm_ops,
> static const struct of_device_id qoriq_tmu_match[] = {
> { .compatible = "fsl,qoriq-tmu", },
> { .compatible = "fsl,imx8mq-tmu", },
> + { .compatible = "fsl,imx93-tmu", },
> {},

Now that you have more than 2, I suggest the pass a ops structure to
.data, so you can call them directly instead of checking the TMU version
in the calibration, the initialization and get the temperature.

> };
> MODULE_DEVICE_TABLE(of, qoriq_tmu_match);

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2023-03-10 08:20:13

by Alexander Stein

[permalink] [raw]
Subject: Re: [PATCH v1 2/4] thermal: qoriq: add i.MX93 TMU support

Hi,

Am Donnerstag, 5. Januar 2023, 11:17:46 CET schrieb Alice Guo (OSS):
> From: Alice Guo <[email protected]>
>
> The procedure to program the calibration table of i.MX93 TMU:
> 1. disable monitoring mode
> 2. configure TCMCFG
> 3. write TTCFGR with TTCFGR[CAL_PT] = n
> 4. write TSCFGR with the sensor value of the calibration point n
> 5. write TTRCRn associated with the calibration point n
> Need to repeat steps 3—5 for all calibration points from the calibration
> table provided by the TMU device node.
>
> When TRITSR[V] = 1 and TRITSR[TP5] = 1, need to add 0.5K to
> TRITSR[TEMP].
>
> IPBRR0s of lx2160ardb, lx2162aqds and i.MX93 have the same value
> 0x01900201 so that use the compatible to determine whether the current
> TMU belongs to i.MX93 or not.
>
> Signed-off-by: Alice Guo <[email protected]>
> Reviewed-by: Jacky Bai <[email protected]>
> Reviewed-by: Ye Li <[email protected]>
> Acked-by: Jason Liu <[email protected]>
> ---
> drivers/thermal/qoriq_thermal.c | 56 ++++++++++++++++++++++++++++++---
> 1 file changed, 52 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/thermal/qoriq_thermal.c
> b/drivers/thermal/qoriq_thermal.c index d111e218f362..18030bd68687 100644
> --- a/drivers/thermal/qoriq_thermal.c
> +++ b/drivers/thermal/qoriq_thermal.c
> @@ -24,9 +24,11 @@
> #define TMTMIR_DEFAULT 0x0000000f
> #define TIER_DISABLE 0x0
> #define TEUMR0_V2 0x51009c00
> +#define TEUMR0_V21 0x55010c00
> #define TMSARA_V2 0xe
> #define TMU_VER1 0x1
> #define TMU_VER2 0x2
> +#define TMU_VER93 0x3
>
> #define REGS_TMR 0x000 /* Mode Register */
> #define TMR_DISABLE 0x0
> @@ -52,6 +54,7 @@
> * Site Register
> */
> #define TRITSR_V BIT(31)
> +#define TRITSR_TP5 BIT(9)
> #define REGS_V2_TMSAR(n) (0x304 + 16 * (n)) /* TMU monitoring
> * site adjustment
register
> */
> @@ -114,10 +117,16 @@ static int tmu_get_temp(struct thermal_zone_device
> *tz, int *temp) 10 * USEC_PER_MSEC))
> return -ENODATA;
>
> - if (qdata->ver == TMU_VER1)
> + if (qdata->ver == TMU_VER1) {
> *temp = (val & GENMASK(7, 0)) * MILLIDEGREE_PER_DEGREE;
> - else
> + } else if (qdata->ver == TMU_VER93) {
> + if (val & TRITSR_TP5)
> + *temp = milli_kelvin_to_millicelsius((val &
GENMASK(8, 0)) *
> MILLIDEGREE_PER_DEGREE + 500); + else
> + *temp = kelvin_to_millicelsius(val & GENMASK(8,
0));
> + } else {
> *temp = kelvin_to_millicelsius(val & GENMASK(8, 0));
> + }
>
> return 0;
> }
> @@ -207,6 +216,33 @@ static int qoriq_tmu_calibration(struct device *dev,
> return 0;
> }
>
> +static int imx93_tmu_calibration(struct device *dev,
> + struct qoriq_tmu_data *data)
> +{
> + const u32 *calibration = NULL;

This should be __be32 instead of u32.

> + u32 cal_pt = 0;
> + u32 val = 0;
> + unsigned int len = 0;
> + unsigned int i = 0;
> +
> + calibration = of_get_property(dev->of_node, "fsl,tmu-calibration",
&len);
> + if (calibration == NULL || len / 8 > 16 || len % 8) {
> + dev_err(dev, "invalid tmu calibration\n");
> + return -ENODEV;
> + }
> +
> + for (i = 0; i < len; i += 0x8, calibration += 2) {
> + cal_pt = i / 8;
> + regmap_write(data->regmap, REGS_TTCFGR, cal_pt);
> + val = of_read_number(calibration, 1);

of_read_number is actually expecting a __be32.

Best regards,
Alexander

> + regmap_write(data->regmap, REGS_TSCFGR, val);
> + val = of_read_number(calibration + 1, 1);
> + regmap_write(data->regmap, REGS_TTRnCR(cal_pt), val);
> + }
> +
> + return 0;
> +}
> +
> static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
> {
> int i;
> @@ -218,6 +254,11 @@ static void qoriq_tmu_init_device(struct qoriq_tmu_data
> *data)
>
> if (data->ver == TMU_VER1) {
> regmap_write(data->regmap, REGS_TMTMIR, TMTMIR_DEFAULT);
> + } else if (data->ver == TMU_VER93) {
> + regmap_write(data->regmap, REGS_V2_TMTMIR,
TMTMIR_DEFAULT);
> + regmap_write(data->regmap, REGS_V2_TEUMR(0), TEUMR0_V21);
> + for (i = 0; i < SITES_MAX; i++)
> + regmap_write(data->regmap, REGS_V2_TMSAR(i),
TMSARA_V2);
> } else {
> regmap_write(data->regmap, REGS_V2_TMTMIR,
TMTMIR_DEFAULT);
> regmap_write(data->regmap, REGS_V2_TEUMR(0), TEUMR0_V2);
> @@ -231,7 +272,7 @@ static void qoriq_tmu_init_device(struct qoriq_tmu_data
> *data)
>
> static const struct regmap_range qoriq_yes_ranges[] = {
> regmap_reg_range(REGS_TMR, REGS_TSCFGR),
> - regmap_reg_range(REGS_TTRnCR(0), REGS_TTRnCR(3)),
> + regmap_reg_range(REGS_TTRnCR(0), REGS_TTRnCR(15)),
> regmap_reg_range(REGS_V2_TEUMR(0), REGS_V2_TEUMR(2)),
> regmap_reg_range(REGS_V2_TMSAR(0), REGS_V2_TMSAR(15)),
> regmap_reg_range(REGS_IPBRR(0), REGS_IPBRR(1)),
> @@ -319,9 +360,15 @@ static int qoriq_tmu_probe(struct platform_device
> *pdev) }
> data->ver = (ver >> 8) & 0xff;
>
> + if (of_find_compatible_node(NULL, NULL, "fsl,imx93-tmu"))
> + data->ver = TMU_VER93;
> +
> qoriq_tmu_init_device(data); /* TMU initialization */
>
> - ret = qoriq_tmu_calibration(dev, data); /* TMU calibration */
> + if (data->ver == TMU_VER93)
> + ret = imx93_tmu_calibration(dev, data);
> + else
> + ret = qoriq_tmu_calibration(dev, data); /* TMU
calibration */
> if (ret < 0)
> return ret;
>
> @@ -369,6 +416,7 @@ static SIMPLE_DEV_PM_OPS(qoriq_tmu_pm_ops,
> static const struct of_device_id qoriq_tmu_match[] = {
> { .compatible = "fsl,qoriq-tmu", },
> { .compatible = "fsl,imx8mq-tmu", },
> + { .compatible = "fsl,imx93-tmu", },
> {},
> };
> MODULE_DEVICE_TABLE(of, qoriq_tmu_match);


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Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/



2023-03-10 08:20:25

by Alexander Stein

[permalink] [raw]
Subject: Re: [PATCH v1 4/4] arm64: dts: imx93: Add CPU thermal zone

Hi,

Am Donnerstag, 5. Januar 2023, 11:17:48 CET schrieb Alice Guo (OSS):
> From: Alice Guo <[email protected]>
>
> Add CPU thermal zone and attach it to the TMU which monitors the CPU
> temperature.
>
> Signed-off-by: Alice Guo <[email protected]>
> Reviewed-by: Jacky Bai <[email protected]>
> Reviewed-by: Ye Li <[email protected]>
> Signed-off-by: Dong Aisheng <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/imx93.dtsi | 48 ++++++++++++++++++++++++
> 1 file changed, 48 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi
> b/arch/arm64/boot/dts/freescale/imx93.dtsi index 6808321ed809..60306f3c5e7f
> 100644
> --- a/arch/arm64/boot/dts/freescale/imx93.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
> @@ -8,6 +8,7 @@
> #include <dt-bindings/input/input.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/power/fsl,imx93-power.h>
> +#include <dt-bindings/thermal/thermal.h>
>
> #include "imx93-pinfunc.h"
>
> @@ -116,6 +117,38 @@
> interrupt-parent = <&gic>;
> };
>
> + thermal-zones {
> + cpu-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <2000>;
> +
> + thermal-sensors = <&tmu 0>;
> +
> + trips {
> + cpu_alert: cpu-alert {
> + temperature = <80000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> +
> + cpu_crit: cpu-crit {
> + temperature = <90000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };

This brace needs an additional indent.

Best regards,
Alexander

> +
> + cooling-maps {
> + map0 {
> + trip = <&cpu_alert>;
> + cooling-device =
> + <&A55_0
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&A55_1
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> + };
> + };
> + };
> + };
> +
> soc@0 {
> compatible = "simple-bus";
> #address-cells = <1>;
> @@ -280,6 +313,21 @@
> compatible = "fsl,imx93-anatop",
"syscon";
> reg = <0x44480000 0x10000>;
> };
> +
> + tmu: tmu@44482000 {
> + compatible = "fsl,imx93-tmu";
> + reg = <0x44482000 0x1000>;
> + clocks = <&clk IMX93_CLK_TMC_GATE>;
> + little-endian;
> + fsl,tmu-calibration = <0x0000000e
0x800000da
> + 0x00000029
0x800000e9
> + 0x00000056
0x80000102
> + 0x000000a2
0x8000012a
> + 0x00000116
0x80000166
> + 0x00000195
0x800001a7
> + 0x000001b2
0x800001b6>;
> + #thermal-sensor-cells = <1>;
> + };
> };
>
> aips2: bus@42000000 {


--
TQ-Systems GmbH | M?hlstra?e 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht M?nchen, HRB 105018
Gesch?ftsf?hrer: Detlef Schneider, R?diger Stahl, Stefan Schneider
http://www.tq-group.com/



2023-03-10 09:15:28

by Alexander Stein

[permalink] [raw]
Subject: Re: [PATCH v1 0/4] add i.MX93 TMU support

Am Donnerstag, 5. Januar 2023, 11:17:44 CET schrieb Alice Guo (OSS):
> From: Alice Guo <[email protected]>
>
> Alice Guo (3):
> dt-bindings: thermal: qoriq-thermal: Add compatible for i.MX93
> thermal: qoriq: add i.MX93 TMU support
> arm64: dts: imx93: Add CPU thermal zone
>
> Pankit Garg (1):
> qoriq_thermal: No need to program site adjustment register
>
> .../bindings/thermal/qoriq-thermal.yaml | 1 +
> arch/arm64/boot/dts/freescale/imx93.dtsi | 48 +++++++++++++++
> drivers/thermal/qoriq_thermal.c | 59 ++++++++++++++++---
> 3 files changed, 100 insertions(+), 8 deletions(-)

Additional to the small review points:
Tested-by: Alexander Stein <[email protected]>
on TQMa93xxLA+MBa93xxCA.

--
TQ-Systems GmbH | M?hlstra?e 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht M?nchen, HRB 105018
Gesch?ftsf?hrer: Detlef Schneider, R?diger Stahl, Stefan Schneider
http://www.tq-group.com/