Recent Qualcomm PMIC's devices are accessed over SPMI bus.
Every PMIC has several "sub-function" devices inside.
First three patches are adding device nodes to PM8841, PM8941 and PMA8084 PMIC's.
Next two are introducing PM8916 PMIC chip with its device nodes.
Sixth add restart device node for MSM8916 chip.
And the last one add initial GPIO definitions for APQ8016 SBC board.
All compatible drivers are already merged or will soon be merged,
hopefully in the 4.1 merge window. This is why checkpatch will complain about
"appears un-documented". checkpatch will also complain about
"line over 80 characters", but I hope that in this case this is in favor
in readability.
Patches are created top of Kumar's kernel tree and tags/qcom-dt-for-4.1 [1].
Any comments are welcome.
Regards,
Ivan
[1] https://lkml.org/lkml/2015/3/27/599
Ivan T. Ivanov (7):
ARM: dts: qcom: Add PM8841 functions device nodes
ARM: dts: qcom: Add PM8941 functions device nodes
ARM: dts: qcom: Add PMA8084 functions device nodes
arm64: dts: qcom: Add SPMI PMIC Arbiter node for MSM8916
arm64: dts: qcom: Add 8x16 chipset SPMI PMIC's nodes
arm64: dts: qcom: Add MSM8916 restart device node
arm64: dts: qcom: Add initial set of PMIC and SoC pins for APQ8016 SBC
board
arch/arm/boot/dts/qcom-pm8841.dtsi | 14 ++++
arch/arm/boot/dts/qcom-pm8941.dtsi | 98 ++++++++++++++++++++++
arch/arm/boot/dts/qcom-pma8084.dtsi | 70 ++++++++++++++++
.../arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi | 30 +++++++
arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi | 21 +++++
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 3 +
arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi | 1 +
arch/arm64/boot/dts/qcom/msm8916.dtsi | 25 +++++-
arch/arm64/boot/dts/qcom/pm8916.dtsi | 93 ++++++++++++++++++++
9 files changed, 354 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi
create mode 100644 arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi
create mode 100644 arch/arm64/boot/dts/qcom/pm8916.dtsi
--
1.9.1
Add configuration nodes for multi purpose pins and
thermal sensor devices. Thermal sensor will report
PMIC die temperature.
Signed-off-by: Ivan T. Ivanov <[email protected]>
---
arch/arm/boot/dts/qcom-pm8841.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-pm8841.dtsi b/arch/arm/boot/dts/qcom-pm8841.dtsi
index 73813cc..5c109bd 100644
--- a/arch/arm/boot/dts/qcom-pm8841.dtsi
+++ b/arch/arm/boot/dts/qcom-pm8841.dtsi
@@ -7,6 +7,20 @@
reg = <0x4 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
+
+ pm8841_mpps: mpps@a000 {
+ compatible = "qcom,pm8841-mpp";
+ reg = <0xa000 0x400>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupts = <4 0xa0 0 0>, <4 0xa1 0 0>, <4 0xa2 0 0>, <4 0xa3 0 0>;
+ };
+
+ temp-alarm@2400 {
+ compatible = "qcom,spmi-temp-alarm";
+ reg = <0x2400 0x100>;
+ interrupts = <4 0x24 0 IRQ_TYPE_EDGE_RISING>;
+ };
};
usid5: pm8841@5 {
--
1.9.1
Add configuration nodes for following devices:
* GPIO block, with 36 pins
* MPP block, with 8 pins
* Current ADC (IADC)
* Volatage ADC (VADC), with multiple inputs
* Thermal sensor device, which is using on chip VADC
channel report PMIC die temperature
* Power key device, which is responsible for clean system
reboot or shutdown
* White LED device
* RTC device
Signed-off-by: Ivan T. Ivanov <[email protected]>
---
arch/arm/boot/dts/qcom-pm8941.dtsi | 98 ++++++++++++++++++++++++++++++++++++++
1 file changed, 98 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-pm8941.dtsi b/arch/arm/boot/dts/qcom-pm8941.dtsi
index 24c5088..23a9268 100644
--- a/arch/arm/boot/dts/qcom-pm8941.dtsi
+++ b/arch/arm/boot/dts/qcom-pm8941.dtsi
@@ -1,3 +1,5 @@
+#include <dt-bindings/iio/qcom,spmi-vadc.h>
+#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
&spmi_bus {
@@ -7,6 +9,89 @@
reg = <0x0 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
+
+ rtc@6000 {
+ compatible = "qcom,pm8941-rtc";
+ reg = <0x6000 0x100>,
+ <0x6100 0x100>;
+ reg-names = "rtc", "alarm";
+ interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
+ };
+
+ pwrkey@800 {
+ compatible = "qcom,pm8941-pwrkey";
+ reg = <0x800 0x100>;
+ interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
+ debounce = <15625>;
+ bias-pull-up;
+ };
+
+ pm8941_gpios: gpios@c000 {
+ compatible = "qcom,pm8941-gpio";
+ reg = <0xc000 0x2400>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupts = <0 0xc0 0 0>, <0 0xc1 0 0>, <0 0xc2 0 0>, <0 0xc3 0 0>,
+ <0 0xc4 0 0>, <0 0xc5 0 0>, <0 0xc6 0 0>, <0 0xc7 0 0>,
+ <0 0xc8 0 0>, <0 0xc9 0 0>, <0 0xca 0 0>, <0 0xcb 0 0>,
+ <0 0xcc 0 0>, <0 0xcd 0 0>, <0 0xce 0 0>, <0 0xcf 0 0>,
+ <0 0xd0 0 0>, <0 0xd1 0 0>, <0 0xd2 0 0>, <0 0xd3 0 0>,
+ <0 0xd4 0 0>, <0 0xd5 0 0>, <0 0xd6 0 0>, <0 0xd7 0 0>,
+ <0 0xd8 0 0>, <0 0xd9 0 0>, <0 0xda 0 0>, <0 0xdb 0 0>,
+ <0 0xdc 0 0>, <0 0xdd 0 0>, <0 0xde 0 0>, <0 0xdf 0 0>,
+ <0 0xe0 0 0>, <0 0xe1 0 0>, <0 0xe2 0 0>, <0 0xe3 0 0>;
+ };
+
+ pm8941_mpps: mpps@a000 {
+ compatible = "qcom,pm8941-mpp";
+ reg = <0xa000 0x800>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupts = <0 0xa0 0 0>, <0 0xa1 0 0>, <0 0xa2 0 0>, <0 0xa3 0 0>,
+ <0 0xa4 0 0>, <0 0xa5 0 0>, <0 0xa6 0 0>, <0 0xa7 0 0>;
+ };
+
+ pm8941_temp: temp-alarm@2400 {
+ compatible = "qcom,spmi-temp-alarm";
+ reg = <0x2400 0x100>;
+ interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>;
+ io-channels = <&pm8941_vadc VADC_DIE_TEMP>;
+ io-channel-names = "thermal";
+ #thermal-sensor-cells = <0>;
+ };
+
+ pm8941_vadc: vadc@3100 {
+ compatible = "qcom,spmi-vadc";
+ reg = <0x3100 0x100>;
+ interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #io-channel-cells = <1>;
+
+ die_temp {
+ reg = <VADC_DIE_TEMP>;
+ };
+ ref_625mv {
+ reg = <VADC_REF_625MV>;
+ };
+ ref_1250v {
+ reg = <VADC_REF_1250MV>;
+ };
+ ref_gnd {
+ reg = <VADC_GND_REF>;
+ };
+ ref_vdd {
+ reg = <VADC_VDD_VADC>;
+ };
+ };
+
+ pm8941_iadc: iadc@3600 {
+ compatible = "qcom,pm8941-iadc", "qcom,spmi-iadc";
+ reg = <0x3600 0x100>,
+ <0x12f1 0x1>;
+ interrupts = <0x0 0x36 0x0 IRQ_TYPE_EDGE_RISING>;
+ qcom,external-resistor-micro-ohms = <10000>;
+ };
};
usid1: pm8941@1 {
@@ -14,5 +99,18 @@
reg = <0x1 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
+
+ wled@d800 {
+ compatible = "qcom,pm8941-wled";
+ reg = <0xd800 0x100>;
+ label = "backlight";
+
+ qcom,cs-out;
+ qcom,current-limit = <20>;
+ qcom,current-boost-limit = <805>;
+ qcom,switching-freq = <1600>;
+ qcom,ovp = <29>;
+ qcom,num-strings = <2>;
+ };
};
};
--
1.9.1
* GPIO block, with 22 pins
* MPP block, with 8 pins
* Volatage ADC (VADC), with multiple inputs
* Thermal sensor device, which is using on chip VADC
channel report PMIC die temperature.
* RTC device
Signed-off-by: Ivan T. Ivanov <[email protected]>
---
arch/arm/boot/dts/qcom-pma8084.dtsi | 70 +++++++++++++++++++++++++++++++++++++
1 file changed, 70 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-pma8084.dtsi b/arch/arm/boot/dts/qcom-pma8084.dtsi
index a5a4fe6..9092c2e 100644
--- a/arch/arm/boot/dts/qcom-pma8084.dtsi
+++ b/arch/arm/boot/dts/qcom-pma8084.dtsi
@@ -1,3 +1,5 @@
+#include <dt-bindings/iio/qcom,spmi-vadc.h>
+#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
&spmi_bus {
@@ -7,6 +9,74 @@
reg = <0x0 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
+
+ rtc@6000 {
+ compatible = "qcom,pm8941-rtc";
+ reg = <0x6000 0x100>,
+ <0x6100 0x100>;
+ reg-names = "rtc", "alarm";
+ interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
+ };
+
+ pma8084_gpios: gpios@c000 {
+ compatible = "qcom,pma8084-gpio";
+ reg = <0xc000 0x1600>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupts = <0 0xc0 0 0>, <0 0xc1 0 0>, <0 0xc2 0 0>, <0 0xc3 0 0>,
+ <0 0xc4 0 0>, <0 0xc5 0 0>, <0 0xc6 0 0>, <0 0xc7 0 0>,
+ <0 0xc8 0 0>, <0 0xc9 0 0>, <0 0xca 0 0>, <0 0xcb 0 0>,
+ <0 0xcc 0 0>, <0 0xcd 0 0>, <0 0xce 0 0>, <0 0xcf 0 0>,
+ <0 0xd0 0 0>, <0 0xd1 0 0>, <0 0xd2 0 0>, <0 0xd3 0 0>,
+ <0 0xd4 0 0>, <0 0xd5 0 0>;
+ };
+
+ pma8084_mpps: mpps@a000 {
+ compatible = "qcom,pma8084-mpp";
+ reg = <0xa000 0x800>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupts = <0 0xa0 0 0>, <0 0xa1 0 0>, <0 0xa2 0 0>, <0 0xa3 0 0>,
+ <0 0xa4 0 0>, <0 0xa5 0 0>, <0 0xa6 0 0>, <0 0xa7 0 0>;
+ };
+
+ pma8084_temp: temp-alarm@2400 {
+ compatible = "qcom,spmi-temp-alarm";
+ reg = <0x2400 0x100>;
+ interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>;
+ #thermal-sensor-cells = <0>;
+ io-channels = <&pma8084_vadc VADC_DIE_TEMP>;
+ io-channel-names = "thermal";
+ };
+
+ pma8084_vadc: vadc@3100 {
+ compatible = "qcom,spmi-vadc";
+ reg = <0x3100 0x100>;
+ interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #io-channel-cells = <1>;
+ io-channel-ranges;
+
+ die_temp {
+ reg = <VADC_DIE_TEMP>;
+ };
+ ref_625mv {
+ reg = <VADC_REF_625MV>;
+ };
+ ref_1250v {
+ reg = <VADC_REF_1250MV>;
+ };
+ ref_buf_625mv {
+ reg = <VADC_SPARE1>;
+ };
+ ref_gnd {
+ reg = <VADC_GND_REF>;
+ };
+ ref_vdd {
+ reg = <VADC_VDD_VADC>;
+ };
+ };
};
usid1: pma8084@1 {
--
1.9.1
Add SPMI PMIC Arbiter configuration nodes for MSM8916.
Signed-off-by: Ivan T. Ivanov <[email protected]>
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index f212b83..02a4916 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -192,5 +192,23 @@
status = "disabled";
};
};
+
+ spmi_bus: spmi@200f000 {
+ compatible = "qcom,spmi-pmic-arb";
+ reg = <0x200f000 0x1000>,
+ <0x2400000 0x400000>,
+ <0x2c00000 0x400000>,
+ <0x3800000 0x200000>,
+ <0x200a000 0x2100>;
+ reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
+ interrupt-names = "periph_irq";
+ interrupts = <0 190 0>;
+ qcom,ee = <0>;
+ qcom,channel = <0>;
+ #address-cells = <2>;
+ #size-cells = <0>;
+ interrupt-controller;
+ #interrupt-cells = <4>;
+ };
};
};
--
1.9.1
PM9816 has 2 SPMI devices per physical package. Add PMIC configuration
nodes including sub-function device nodes and include them in boards,
which are using 8x16 based chipset.
PM9816 sub-function devices include:
* GPIO block, with 4 pins
* MPP block, with 4 pins
* Volatage ADC (VADC), with multiple inputs
* Thermal sensor device, which is using on chip VADC
channel report PMIC die temperature.
* Power key device, which is responsible for clean system
reboot or shutdown
* RTC device
Signed-off-by: Ivan T. Ivanov <[email protected]>
---
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 1 +
arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi | 1 +
arch/arm64/boot/dts/qcom/pm8916.dtsi | 93 +++++++++++++++++++++++++++++++
3 files changed, 95 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/pm8916.dtsi
diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
index 703a4f1..58f0055f 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
@@ -12,6 +12,7 @@
*/
#include "msm8916.dtsi"
+#include "pm8916.dtsi"
/ {
aliases {
diff --git a/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi b/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi
index bea871b..a1aa0b2 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi
@@ -12,6 +12,7 @@
*/
#include "msm8916.dtsi"
+#include "pm8916.dtsi"
/ {
aliases {
diff --git a/arch/arm64/boot/dts/qcom/pm8916.dtsi b/arch/arm64/boot/dts/qcom/pm8916.dtsi
new file mode 100644
index 0000000..2a5ad2c
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/pm8916.dtsi
@@ -0,0 +1,93 @@
+#include <dt-bindings/iio/qcom,spmi-vadc.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/spmi/spmi.h>
+
+&spmi_bus {
+
+ usid0: pm8916@0 {
+ compatible ="qcom,spmi-pmic";
+ reg = <0x0 SPMI_USID>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rtc@6000 {
+ compatible = "qcom,pm8941-rtc";
+ reg = <0x6000 0x6100>;
+ reg-names = "rtc", "alarm";
+ interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
+ };
+
+ pwrkey@800 {
+ compatible = "qcom,pm8941-pwrkey";
+ reg = <0x800>;
+ interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
+ debounce = <15625>;
+ bias-pull-up;
+ };
+
+ pm8916_gpios: gpios@c000 {
+ compatible = "qcom,pm8916-gpio";
+ reg = <0xc000 0x400>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupts = <0 0xc0 0 0>, <0 0xc1 0 0>, <0 0xc2 0 0>, <0 0xc3 0 0>;
+ };
+
+ pm8916_mpps: mpps@a000 {
+ compatible = "qcom,pm8916-mpp";
+ reg = <0xa000 0x400>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupts = <0 0xa0 0 0>, <0 0xa1 0 0>, <0 0xa2 0 0>, <0 0xa3 0 0>;
+ };
+
+ pm8916_temp: temp-alarm@2400 {
+ compatible = "qcom,spmi-temp-alarm";
+ reg = <0x2400 0x100>;
+ interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>;
+ io-channels = <&pm8916_vadc VADC_DIE_TEMP>;
+ io-channel-names = "thermal";
+ #thermal-sensor-cells = <0>;
+ };
+
+ pm8916_vadc: vadc@3100 {
+ compatible = "qcom,spmi-vadc";
+ reg = <0x3100 0x100>;
+ interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #io-channel-cells = <1>;
+
+ usb_in {
+ reg = <VADC_USBIN>;
+ qcom,pre-scaling = <1 10>;
+ };
+ vph_pwr {
+ reg = <VADC_VSYS>;
+ qcom,pre-scaling = <1 3>;
+ };
+ die_temp {
+ reg = <VADC_DIE_TEMP>;
+ };
+ ref_625mv {
+ reg = <VADC_REF_625MV>;
+ };
+ ref_1250v {
+ reg = <VADC_REF_1250MV>;
+ };
+ ref_gnd {
+ reg = <VADC_GND_REF>;
+ };
+ ref_vdd {
+ reg = <VADC_VDD_VADC>;
+ };
+ };
+ };
+
+ usid1: pm8916@1 {
+ compatible ="qcom,spmi-pmic";
+ reg = <0x1 SPMI_USID>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+};
--
1.9.1
Add the restart node so we can reboot the device.
Signed-off-by: Ivan T. Ivanov <[email protected]>
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 02a4916..c95592d 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -77,6 +77,11 @@
ranges = <0 0 0 0xffffffff>;
compatible = "simple-bus";
+ restart@4ab000 {
+ compatible = "qcom,pshold";
+ reg = <0x4ab000 0x4>;
+ };
+
pinctrl@1000000 {
compatible = "qcom,msm8916-pinctrl";
reg = <0x1000000 0x300000>;
--
1.9.1
Add initial device configuration nodes for APQ8016 and PM8916 GPIO's.
Signed-off-by: Ivan T. Ivanov <[email protected]>
---
.../arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi | 30 ++++++++++++++++++++++
arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi | 21 +++++++++++++++
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 2 ++
arch/arm64/boot/dts/qcom/msm8916.dtsi | 2 +-
4 files changed, 54 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi
create mode 100644 arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi
diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi
new file mode 100644
index 0000000..535532b
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi
@@ -0,0 +1,30 @@
+#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
+
+&pm8916_gpios {
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pm8916_gpios_default>;
+
+ pm8916_gpios_default: default {
+ usb_hub_reset_pm {
+ pins = "gpio1";
+ function = PMIC_GPIO_FUNC_NORMAL;
+ output-low;
+ };
+ usb_sw_sel_pm {
+ pins = "gpio2";
+ function = PMIC_GPIO_FUNC_NORMAL;
+ input-disable;
+ };
+ usr_led_3_ctrl {
+ pins = "gpio3";
+ function = PMIC_GPIO_FUNC_NORMAL;
+ output-low;
+ };
+ usr_led_4_ctrl {
+ pins = "gpio4";
+ function = PMIC_GPIO_FUNC_NORMAL;
+ output-low;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi
new file mode 100644
index 0000000..5f7023f
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi
@@ -0,0 +1,21 @@
+
+#include <dt-bindings/gpio/gpio.h>
+
+&msmgpio {
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&soc_gpios_default>;
+
+ soc_gpios_default: default {
+ usr_led_1_ctrl_default: usr_led_1_ctrl_default {
+ pins = "gpio21";
+ function = "gpio";
+ output-low;
+ };
+ usr_led_2_ctrl_default: usr_led_2_ctrl_default {
+ pins = "gpio120";
+ function = "gpio";
+ output-low;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
index 58f0055f..98abece 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
@@ -13,6 +13,8 @@
#include "msm8916.dtsi"
#include "pm8916.dtsi"
+#include "apq8016-sbc-soc-pins.dtsi"
+#include "apq8016-sbc-pmic-pins.dtsi"
/ {
aliases {
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index c95592d..4951fcc 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -82,7 +82,7 @@
reg = <0x4ab000 0x4>;
};
- pinctrl@1000000 {
+ msmgpio: pinctrl@1000000 {
compatible = "qcom,msm8916-pinctrl";
reg = <0x1000000 0x300000>;
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
--
1.9.1
On Apr 1, 2015, at 10:05 AM, Ivan T. Ivanov <[email protected]> wrote:
> Add configuration nodes for multi purpose pins and
> thermal sensor devices. Thermal sensor will report
> PMIC die temperature.
>
> Signed-off-by: Ivan T. Ivanov <[email protected]>
> ---
> arch/arm/boot/dts/qcom-pm8841.dtsi | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-pm8841.dtsi b/arch/arm/boot/dts/qcom-pm8841.dtsi
> index 73813cc..5c109bd 100644
> --- a/arch/arm/boot/dts/qcom-pm8841.dtsi
> +++ b/arch/arm/boot/dts/qcom-pm8841.dtsi
> @@ -7,6 +7,20 @@
> reg = <0x4 SPMI_USID>;
> #address-cells = <1>;
> #size-cells = <0>;
> +
> + pm8841_mpps: mpps@a000 {
> + compatible = "qcom,pm8841-mpp";
> + reg = <0xa000 0x400>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + interrupts = <4 0xa0 0 0>, <4 0xa1 0 0>, <4 0xa2 0 0>, <4 0xa3 0 0>;
What?s the interrupt parent here with 4 cells? Can we cleanup the last cell to use proper define for level/edge etc.
> + };
> +
> + temp-alarm@2400 {
> + compatible = "qcom,spmi-temp-alarm";
> + reg = <0x2400 0x100>;
> + interrupts = <4 0x24 0 IRQ_TYPE_EDGE_RISING>;
> + };
> };
>
> usid5: pm8841@5 {
> --
> 1.9.1
>
--
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
On Apr 1, 2015, at 10:05 AM, Ivan T. Ivanov <[email protected]> wrote:
> Add configuration nodes for following devices:
>
> * GPIO block, with 36 pins
> * MPP block, with 8 pins
> * Current ADC (IADC)
> * Volatage ADC (VADC), with multiple inputs
> * Thermal sensor device, which is using on chip VADC
> channel report PMIC die temperature
> * Power key device, which is responsible for clean system
> reboot or shutdown
> * White LED device
> * RTC device
>
> Signed-off-by: Ivan T. Ivanov <[email protected]>
> ---
> arch/arm/boot/dts/qcom-pm8941.dtsi | 98 ++++++++++++++++++++++++++++++++++++++
> 1 file changed, 98 insertions(+)
please cleanup level/edge cell values to use defines
- k
--
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
On Apr 1, 2015, at 10:05 AM, Ivan T. Ivanov <[email protected]> wrote:
> Add SPMI PMIC Arbiter configuration nodes for MSM8916.
>
> Signed-off-by: Ivan T. Ivanov <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/msm8916.dtsi | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> index f212b83..02a4916 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> @@ -192,5 +192,23 @@
> status = "disabled";
> };
> };
> +
> + spmi_bus: spmi@200f000 {
> + compatible = "qcom,spmi-pmic-arb";
> + reg = <0x200f000 0x1000>,
> + <0x2400000 0x400000>,
> + <0x2c00000 0x400000>,
> + <0x3800000 0x200000>,
> + <0x200a000 0x2100>;
> + reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
> + interrupt-names = "periph_irq";
> + interrupts = <0 190 0>;
please cleanup level/edge cell values to use defines
> + qcom,ee = <0>;
> + qcom,channel = <0>;
> + #address-cells = <2>;
> + #size-cells = <0>;
> + interrupt-controller;
> + #interrupt-cells = <4>;
> + };
> };
> };
> --
> 1.9.1
>
--
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
On Apr 1, 2015, at 10:05 AM, Ivan T. Ivanov <[email protected]> wrote:
> PM9816 has 2 SPMI devices per physical package. Add PMIC configuration
> nodes including sub-function device nodes and include them in boards,
> which are using 8x16 based chipset.
>
> PM9816 sub-function devices include:
>
> * GPIO block, with 4 pins
> * MPP block, with 4 pins
> * Volatage ADC (VADC), with multiple inputs
> * Thermal sensor device, which is using on chip VADC
> channel report PMIC die temperature.
> * Power key device, which is responsible for clean system
> reboot or shutdown
> * RTC device
>
> Signed-off-by: Ivan T. Ivanov <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 1 +
> arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi | 1 +
> arch/arm64/boot/dts/qcom/pm8916.dtsi | 93 +++++++++++++++++++++++++++++++
> 3 files changed, 95 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/pm8916.dtsi
>
> diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
> index 703a4f1..58f0055f 100644
> --- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
> +++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
> @@ -12,6 +12,7 @@
> */
>
> #include "msm8916.dtsi"
> +#include "pm8916.dtsi"
>
> / {
> aliases {
> diff --git a/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi b/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi
> index bea871b..a1aa0b2 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi
> @@ -12,6 +12,7 @@
> */
>
> #include "msm8916.dtsi"
> +#include "pm8916.dtsi"
>
> / {
> aliases {
> diff --git a/arch/arm64/boot/dts/qcom/pm8916.dtsi b/arch/arm64/boot/dts/qcom/pm8916.dtsi
> new file mode 100644
> index 0000000..2a5ad2c
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/pm8916.dtsi
> @@ -0,0 +1,93 @@
> +#include <dt-bindings/iio/qcom,spmi-vadc.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/spmi/spmi.h>
> +
> +&spmi_bus {
> +
> + usid0: pm8916@0 {
> + compatible ="qcom,spmi-pmic";
> + reg = <0x0 SPMI_USID>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + rtc@6000 {
> + compatible = "qcom,pm8941-rtc";
> + reg = <0x6000 0x6100>;
> + reg-names = "rtc", "alarm";
> + interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
> + };
> +
> + pwrkey@800 {
> + compatible = "qcom,pm8941-pwrkey";
> + reg = <0x800>;
> + interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
> + debounce = <15625>;
> + bias-pull-up;
> + };
> +
> + pm8916_gpios: gpios@c000 {
> + compatible = "qcom,pm8916-gpio";
> + reg = <0xc000 0x400>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + interrupts = <0 0xc0 0 0>, <0 0xc1 0 0>, <0 0xc2 0 0>, <0 0xc3 0 0>;
please cleanup level/edge cell values to use defines
> + };
> +
> + pm8916_mpps: mpps@a000 {
> + compatible = "qcom,pm8916-mpp";
> + reg = <0xa000 0x400>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + interrupts = <0 0xa0 0 0>, <0 0xa1 0 0>, <0 0xa2 0 0>, <0 0xa3 0 0>;
please cleanup level/edge cell values to use defines
> + };
> +
> + pm8916_temp: temp-alarm@2400 {
> + compatible = "qcom,spmi-temp-alarm";
> + reg = <0x2400 0x100>;
> + interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>;
> + io-channels = <&pm8916_vadc VADC_DIE_TEMP>;
> + io-channel-names = "thermal";
> + #thermal-sensor-cells = <0>;
> + };
> +
> + pm8916_vadc: vadc@3100 {
> + compatible = "qcom,spmi-vadc";
> + reg = <0x3100 0x100>;
> + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + #io-channel-cells = <1>;
> +
> + usb_in {
> + reg = <VADC_USBIN>;
> + qcom,pre-scaling = <1 10>;
> + };
> + vph_pwr {
> + reg = <VADC_VSYS>;
> + qcom,pre-scaling = <1 3>;
> + };
> + die_temp {
> + reg = <VADC_DIE_TEMP>;
> + };
> + ref_625mv {
> + reg = <VADC_REF_625MV>;
> + };
> + ref_1250v {
> + reg = <VADC_REF_1250MV>;
> + };
> + ref_gnd {
> + reg = <VADC_GND_REF>;
> + };
> + ref_vdd {
> + reg = <VADC_VDD_VADC>;
> + };
> + };
> + };
> +
> + usid1: pm8916@1 {
> + compatible ="qcom,spmi-pmic?;
fix whitespace after ?='
> + reg = <0x1 SPMI_USID>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +};
> --
> 1.9.1
>
--
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
On Wed, 2015-04-01 at 14:54 -0500, Kumar Gala wrote:
> On Apr 1, 2015, at 10:05 AM, Ivan T. Ivanov [email protected]> wrote:
>
> > Add configuration nodes for multi purpose pins and
> > thermal sensor devices. Thermal sensor will report
> > PMIC die temperature.
> >
> > Signed-off-by: Ivan T. Ivanov [email protected]>
> > ---
> > arch/arm/boot/dts/qcom-pm8841.dtsi | 14 ++++++++++++++
> > 1 file changed, 14 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/qcom-pm8841.dtsi b/arch/arm/boot/dts/qcom-pm8841.dtsi
> > index 73813cc..5c109bd 100644
> > --- a/arch/arm/boot/dts/qcom-pm8841.dtsi
> > +++ b/arch/arm/boot/dts/qcom-pm8841.dtsi
> > @@ -7,6 +7,20 @@
> > reg = <0x4 SPMI_USID>;
> > #address-cells = <1>;
> > #size-cells = <0>;
> > +
> > + pm8841_mpps: mpps@a000 {
> > + compatible = "qcom,pm8841-mpp";
> > + reg = <0xa000 0x400>;
> > + gpio-controller;
> > + #gpio-cells = <2>;
> > + interrupts = <4 0xa0 0 0>, <4 0xa1 0 0>, <4 0xa2 0 0>, <4 0xa3 0 0>;
>
> What’s the interrupt parent here with 4 cells?
SPMI PMIC Arbiter controller.
Ivan