Allwinner A64 has display engine pipeline like other Allwinner SOC's A83T/H3/H5.
A64 behaviour similar to Allwinner A83T where
Mixer0 => TCON0 => LVDS/RGB/MIPI-DSI
Mixer1 => TCON1 => HDMI
as per Display System Block Diagram from Allwinner_A64_User_Manual_V1.1.pdf
This is third patch-set followed with previous RFC[1], first and second
series[2][3] and merely concentrated on HDMI pipeline through TCON1 and
rest will add eventually.
This series fixed previous version comments
- Rebasing on linux-next
- sqash all pipeline components in one patch
- Enable all pipeline components in board dts
- about documenting fallback compatibles
- adding new compatible for mixer1
Log:
[ 1.450984] Jagan: sun8i_mixer_probe
[ 1.464981] sun4i-drm display-engine: bound 1200000.mixer (ops sun8i_mixer_ops)
[ 1.472572] sun4i-drm display-engine: bound 1c0d000.lcd-controller (ops sun4i_tcon_ops)
[ 1.480676] sun8i-dw-hdmi 1ee0000.hdmi: Linked as a consumer to regulator.10
[ 1.488738] sun8i-dw-hdmi 1ee0000.hdmi: Detected HDMI TX controller v1.32a with HDCP (sun8i_dw_hdmi_phy)
[ 1.498879] sun8i-dw-hdmi 1ee0000.hdmi: registered DesignWare HDMI I2C bus driver
[ 1.507372] sun4i-drm display-engine: bound 1ee0000.hdmi (ops sun8i_dw_hdmi_ops)
[ 1.514778] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[ 1.521398] [drm] No driver support for vblank timestamp query.
[ 1.684611] random: fast init done
[ 2.011575] Console: switching to colour frame buffer device 180x56
[ 2.049858] sun4i-drm display-engine: fb0: DRM emulated frame buffer device
[ 2.057268] [drm] Initialized sun4i-drm 1.0.0 20150629 for display-engine on minor 0
Note:
Pine64 boards are unable to get edid by default like other A64 boards,
but forcing 'video=HDMI-A-1:1920x1080@60D' kernel command line can
create edid with display on penel
[3] https://lkml.org/lkml/2018/5/18/461
[2] https://lkml.org/lkml/2018/4/30/288
[1] https://lkml.org/lkml/2018/4/24/547
Icenowy Zheng (1):
drm: sun4i: add support for HVCC regulator for DWC HDMI glue
Jagan Teki (17):
clk: sunxi-ng: a64: Add minimal rate for video PLLs
drm/sun4i: Add support for A64 mixer1
dt-bindings: display: Add compatible for A64 DE2 tcon1 blocks
drm/sun4i: Add support for A64 display engine
dt-bindings: display: Add compatible for A64 HDMI
dt-bindings: clock: sun50i-a64-ccu: Add PLL_VIDEO[0-1] macros
arm64: dts: allwinner: a64: Add tcon1 HDMI pipeline
clk: sunxi-ng: Enable DE2_CCU for SUN8I and SUN50I
arm64: defconfig: Enable CONFIG_DRM_SUN4I
drm/sun4i: Enable DE2 Mixer for SUN8I and SUN50I
drm/sun4i: Enable DesignWare HDMI for SUN50I
arm64: dts: allwinner: a64: bananapi-m64: Enable HDMI output
arm64: dts: allwinner: a64: nanopi-a64: Enable HDMI output
arm64: dts: allwinner: a64: orangepi-win: Enable HDMI output
arm64: dts: allwinner: a64: a64-olinuxino: Enable HDMI output
arm64: dts: allwinner: a64: pine64: Enable HDMI output
arm64: dts: allwinner: a64: sopine: Enable HDMI output
.../bindings/display/sunxi/sun4i-drm.txt | 4 +
.../dts/allwinner/sun50i-a64-bananapi-m64.dts | 34 ++++++
.../dts/allwinner/sun50i-a64-nanopi-a64.dts | 34 ++++++
.../dts/allwinner/sun50i-a64-olinuxino.dts | 34 ++++++
.../dts/allwinner/sun50i-a64-orangepi-win.dts | 34 ++++++
.../boot/dts/allwinner/sun50i-a64-pine64.dts | 34 ++++++
.../allwinner/sun50i-a64-sopine-baseboard.dts | 34 ++++++
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 110 ++++++++++++++++++
arch/arm64/configs/defconfig | 1 +
drivers/clk/sunxi-ng/Kconfig | 2 +
drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 46 ++++----
drivers/gpu/drm/sun4i/Kconfig | 3 +-
drivers/gpu/drm/sun4i/sun4i_drv.c | 1 +
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 14 +++
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 2 +
drivers/gpu/drm/sun4i/sun8i_mixer.c | 12 ++
include/dt-bindings/clock/sun50i-a64-ccu.h | 2 +
17 files changed, 378 insertions(+), 23 deletions(-)
--
2.17.1
According to documentation and experience with other similar SoCs, video
PLLs don't work stable if their output frequency is set below 192 MHz.
Because of that, set minimal rate to both A64 video PLLs to 192 MHz.
Signed-off-by: Jagan Teki <[email protected]>
---
Changes for v3:
- none
Changes for v2:
- New patch
drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 46 ++++++++++++++-------------
1 file changed, 24 insertions(+), 22 deletions(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
index ee9c12cf3f08..d0e30192f0cf 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
@@ -64,17 +64,18 @@ static SUNXI_CCU_NM_WITH_GATE_LOCK(pll_audio_base_clk, "pll-audio-base",
BIT(28), /* lock */
CLK_SET_RATE_UNGATE);
-static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_video0_clk, "pll-video0",
- "osc24M", 0x010,
- 8, 7, /* N */
- 0, 4, /* M */
- BIT(24), /* frac enable */
- BIT(25), /* frac select */
- 270000000, /* frac rate 0 */
- 297000000, /* frac rate 1 */
- BIT(31), /* gate */
- BIT(28), /* lock */
- CLK_SET_RATE_UNGATE);
+static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN(pll_video0_clk, "pll-video0",
+ "osc24M", 0x010,
+ 192000000, /* Minimum rate */
+ 8, 7, /* N */
+ 0, 4, /* M */
+ BIT(24), /* frac enable */
+ BIT(25), /* frac select */
+ 270000000, /* frac rate 0 */
+ 297000000, /* frac rate 1 */
+ BIT(31), /* gate */
+ BIT(28), /* lock */
+ CLK_SET_RATE_UNGATE);
static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve",
"osc24M", 0x018,
@@ -125,17 +126,18 @@ static struct ccu_nk pll_periph1_clk = {
},
};
-static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_video1_clk, "pll-video1",
- "osc24M", 0x030,
- 8, 7, /* N */
- 0, 4, /* M */
- BIT(24), /* frac enable */
- BIT(25), /* frac select */
- 270000000, /* frac rate 0 */
- 297000000, /* frac rate 1 */
- BIT(31), /* gate */
- BIT(28), /* lock */
- CLK_SET_RATE_UNGATE);
+static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN(pll_video1_clk, "pll-video1",
+ "osc24M", 0x030,
+ 192000000, /* Minimum rate */
+ 8, 7, /* N */
+ 0, 4, /* M */
+ BIT(24), /* frac enable */
+ BIT(25), /* frac select */
+ 270000000, /* frac rate 0 */
+ 297000000, /* frac rate 1 */
+ BIT(31), /* gate */
+ BIT(28), /* lock */
+ CLK_SET_RATE_UNGATE);
static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_gpu_clk, "pll-gpu",
"osc24M", 0x038,
--
2.17.1
Mixers in Allwinner have similar capabilities as others SoCs with DE2.
Mixer1 has 1 VI and 1 UI planes and supports HW scaling on all
planes.
Signed-off-by: Jagan Teki <[email protected]>
---
Changes for v3:
- none
Changes for v2:
- New patch
drivers/gpu/drm/sun4i/sun8i_mixer.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c
index f76a5576c0e6..756280194f94 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
@@ -578,6 +578,14 @@ static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = {
.mod_rate = 150000000,
};
+static const struct sun8i_mixer_cfg sun50i_a64_mixer1_cfg = {
+ .ccsc = 1,
+ .mod_rate = 297000000,
+ .scaler_mask = 0x3,
+ .ui_num = 1,
+ .vi_num = 1,
+};
+
static const struct of_device_id sun8i_mixer_of_table[] = {
{
.compatible = "allwinner,sun8i-a83t-de2-mixer-0",
@@ -603,6 +611,10 @@ static const struct of_device_id sun8i_mixer_of_table[] = {
.compatible = "allwinner,sun8i-v3s-de2-mixer",
.data = &sun8i_v3s_mixer_cfg,
},
+ {
+ .compatible = "allwinner,sun50i-a64-de2-mixer-1",
+ .data = &sun50i_a64_mixer1_cfg,
+ },
{ }
};
MODULE_DEVICE_TABLE(of, sun8i_mixer_of_table);
--
2.17.1
Display Engine(DE2) in Allwinner A64 has two mixers and tcons.
The routing for mixer0 is through tcon0 and connected to
LVDS/RGB/MIPI-DSI controller.
The routing for mixer1 is through tcon1 and connected to HDMI.
Signed-off-by: Jagan Teki <[email protected]>
---
Changes for v3, v2:
- none
drivers/gpu/drm/sun4i/sun4i_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c
index 03ffbcc98dd0..30a39946f747 100644
--- a/drivers/gpu/drm/sun4i/sun4i_drv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
@@ -421,6 +421,7 @@ static const struct of_device_id sun4i_drv_of_table[] = {
{ .compatible = "allwinner,sun8i-r40-display-engine" },
{ .compatible = "allwinner,sun8i-v3s-display-engine" },
{ .compatible = "allwinner,sun9i-a80-display-engine" },
+ { .compatible = "allwinner,sun50i-a64-display-engine" },
{ }
};
MODULE_DEVICE_TABLE(of, sun4i_drv_of_table);
--
2.17.1
HDMI on Allwinner A64 has similar like H3/H5/A83T.
Add compatible a64 and update A83T compatible as fallback.
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
Changes for v3:
- collect Rob r-w-b tag
Changes for v2:
- Add fallback compatible
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index 3594378fbe72..10b3c77833c2 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -78,6 +78,7 @@ Required properties:
- compatible: value must be one of:
* "allwinner,sun8i-a83t-dw-hdmi"
+ * "allwinner,sun50i-a64-dw-hdmi", "allwinner,sun8i-a83t-dw-hdmi"
- reg: base address and size of memory-mapped region
- reg-io-width: See dw_hdmi.txt. Shall be 1.
- interrupts: HDMI interrupt number
--
2.17.1
Allwinner A64 has two clock parents PLL_VIDEO0 and PLL_VIDEO1.
Include these macros on dt-bindings so-that the same can be
used while defining CCU clock phadles.
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
Changes for v3:
- collect Rob r-w-b tag
Changes for v2:
- new patch
include/dt-bindings/clock/sun50i-a64-ccu.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/dt-bindings/clock/sun50i-a64-ccu.h b/include/dt-bindings/clock/sun50i-a64-ccu.h
index d66432c6e675..d1d7d5b7d06a 100644
--- a/include/dt-bindings/clock/sun50i-a64-ccu.h
+++ b/include/dt-bindings/clock/sun50i-a64-ccu.h
@@ -43,7 +43,9 @@
#ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_
#define _DT_BINDINGS_CLK_SUN50I_A64_H_
+#define CLK_PLL_VIDEO0 7
#define CLK_PLL_PERIPH0 11
+#define CLK_PLL_VIDEO1 15
#define CLK_BUS_MIPI_DSI 28
#define CLK_BUS_CE 29
--
2.17.1
HDMI on Allwinner A64 similar behaviour like H3 with
PHY of two clock parents (pll-0, pll-1) connected via
second mixer and tcon.
Add all require entries needed for HDMI to function.
Note, that Figure 3-3.Module Clock Diagram also showing
HDMI connected via TCON0 with PLL_VIDEO0. this can be add
it in future once we have mixer0 pipeline.
Signed-off-by: Jagan Teki <[email protected]>
---
Changes for v3:
- Squash all pipeline components in one patch
- Add status for mixer1 and tcon1
Changes for v2:
- Change compatibles and other based on previous patch changes
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 110 ++++++++++++++++++
1 file changed, 110 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 840753432ea5..572569d8b577 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -112,6 +112,12 @@
};
};
+ de: display-engine {
+ compatible = "allwinner,sun50i-a64-display-engine";
+ allwinner,pipelines = <&mixer1>;
+ status = "disabled";
+ };
+
osc24M: osc24M_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
@@ -196,6 +202,30 @@
};
};
+ mixer1: mixer@1200000 {
+ compatible = "allwinner,sun50i-a64-de2-mixer-1";
+ reg = <0x01200000 0x100000>;
+ clocks = <&display_clocks CLK_BUS_MIXER1>,
+ <&display_clocks CLK_MIXER1>;
+ clock-names = "bus",
+ "mod";
+ resets = <&display_clocks RST_WB>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mixer1_out: port@1 {
+ reg = <1>;
+
+ mixer1_out_tcon1: endpoint {
+ remote-endpoint = <&tcon1_in_mixer1>;
+ };
+ };
+ };
+ };
+
syscon: syscon@1c00000 {
compatible = "allwinner,sun50i-a64-system-control";
reg = <0x01c00000 0x1000>;
@@ -228,6 +258,42 @@
#dma-cells = <1>;
};
+ tcon1: lcd-controller@1c0d000 {
+ compatible = "allwinner,sun50i-a64-tcon-tv",
+ "allwinner,sun8i-a83t-tcon-tv";
+ reg = <0x01c0d000 0x1000>;
+ interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_TCON1>, <&ccu CLK_TCON1>;
+ clock-names = "ahb", "tcon-ch1";
+ resets = <&ccu RST_BUS_TCON1>;
+ reset-names = "lcd";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tcon1_in: port@0 {
+ reg = <0>;
+
+ tcon1_in_mixer1: endpoint {
+ remote-endpoint = <&mixer1_out_tcon1>;
+ };
+ };
+
+ tcon1_out: port@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ tcon1_out_hdmi: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&hdmi_in_tcon1>;
+ };
+ };
+ };
+ };
+
mmc0: mmc@1c0f000 {
compatible = "allwinner,sun50i-a64-mmc";
reg = <0x01c0f000 0x1000>;
@@ -688,6 +754,50 @@
status = "disabled";
};
+ hdmi: hdmi@1ee0000 {
+ compatible = "allwinner,sun50i-a64-dw-hdmi",
+ "allwinner,sun8i-a83t-dw-hdmi";
+ reg = <0x01ee0000 0x10000>;
+ reg-io-width = <1>;
+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
+ <&ccu CLK_HDMI>;
+ clock-names = "iahb", "isfr", "tmds";
+ resets = <&ccu RST_BUS_HDMI1>;
+ reset-names = "ctrl";
+ phys = <&hdmi_phy>;
+ phy-names = "hdmi-phy";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hdmi_in: port@0 {
+ reg = <0>;
+
+ hdmi_in_tcon1: endpoint {
+ remote-endpoint = <&tcon1_out_hdmi>;
+ };
+ };
+
+ hdmi_out: port@1 {
+ reg = <1>;
+ };
+ };
+ };
+
+ hdmi_phy: hdmi-phy@1ef0000 {
+ compatible = "allwinner,sun50i-a64-hdmi-phy";
+ reg = <0x01ef0000 0x10000>;
+ clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
+ <&ccu CLK_PLL_VIDEO0>, <&ccu CLK_PLL_VIDEO1>;
+ clock-names = "bus", "mod", "pll-0", "pll-1";
+ resets = <&ccu RST_BUS_HDMI0>;
+ reset-names = "phy";
+ #phy-cells = <0>;
+ };
+
rtc: rtc@1f00000 {
compatible = "allwinner,sun6i-a31-rtc";
reg = <0x01f00000 0x54>;
--
2.17.1
Allwinner A64 has DE2 pipeline with tcon0 and tcon1 block
which is similar Allwinner A83T.
This patch adds dt-binding documentation for A64 DE2 tcon1 blocks.
Mixer1 has different configuration for A64 so use separate compatible
but tcon1 has similar behaviour with A83T so add fallback compatible.
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
Changes for v3:
- collect Rob r-w-b tag
Changes for v2:
- Add fallback compatible for tcon1
- Add separate compatible for mixer1
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index f8773ecb7525..3594378fbe72 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -151,6 +151,7 @@ Required properties:
* allwinner,sun8i-v3s-tcon
* allwinner,sun9i-a80-tcon-lcd
* allwinner,sun9i-a80-tcon-tv
+ * "allwinner,sun50i-a64-tcon-tv", "allwinner,sun8i-a83t-tcon-tv"
- reg: base address and size of memory-mapped region
- interrupts: interrupt associated to this IP
- clocks: phandles to the clocks feeding the TCON.
@@ -370,6 +371,7 @@ Required properties:
* allwinner,sun8i-a83t-de2-mixer-1
* allwinner,sun8i-h3-de2-mixer-0
* allwinner,sun8i-v3s-de2-mixer
+ * allwinner,sun50i-a64-de2-mixer-1"
- reg: base address and size of the memory-mapped region.
- clocks: phandles to the clocks feeding the mixer
* bus: the mixer interface clock
@@ -403,6 +405,7 @@ Required properties:
* allwinner,sun8i-r40-display-engine
* allwinner,sun8i-v3s-display-engine
* allwinner,sun9i-a80-display-engine
+ * allwinner,sun50i-a64-display-engine
- allwinner,pipelines: list of phandle to the display engine
frontends (DE 1.0) or mixers (DE 2.0) available.
--
2.17.1
Allwinner SoC like SUN8I and SUN50I are now using DE2 Mixer
so enable them as default.
Signed-off-by: Jagan Teki <[email protected]>
---
Changes for v3:
- none
Changes for v2:
- Enable for SUN8I
drivers/gpu/drm/sun4i/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/Kconfig b/drivers/gpu/drm/sun4i/Kconfig
index c2c042287c19..cfa8b96273fb 100644
--- a/drivers/gpu/drm/sun4i/Kconfig
+++ b/drivers/gpu/drm/sun4i/Kconfig
@@ -61,7 +61,7 @@ config DRM_SUN8I_DW_HDMI
config DRM_SUN8I_MIXER
tristate "Support for Allwinner Display Engine 2.0 Mixer"
- default MACH_SUN8I
+ default MACH_SUN8I || (ARM64 && ARCH_SUNXI)
help
Choose this option if you have an Allwinner SoC with the
Allwinner Display Engine 2.0, which has a mixer to do some
--
2.17.1
Allwinner SUN50I are now using DesignWare HDMI so enable
them as default. This can build DRM_SUN8I_DW_HDMI as module
since DRM in arm64 has module.
Making this as defult to SUN8I, may cause an issue while
loading since arm32 DRM built as static.
Signed-off-by: Jagan Teki <[email protected]>
---
Changes for v3:
- skip SUN8I enablement, since it built statically for arm32
Changes for v2:
- Enable for SUN8I
drivers/gpu/drm/sun4i/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/sun4i/Kconfig b/drivers/gpu/drm/sun4i/Kconfig
index cfa8b96273fb..5d0c450db148 100644
--- a/drivers/gpu/drm/sun4i/Kconfig
+++ b/drivers/gpu/drm/sun4i/Kconfig
@@ -52,6 +52,7 @@ config DRM_SUN6I_DSI
config DRM_SUN8I_DW_HDMI
tristate "Support for Allwinner version of DesignWare HDMI"
+ default ARM64 && ARCH_SUNXI
depends on DRM_SUN4I
select DRM_DW_HDMI
help
--
2.17.1
From: Icenowy Zheng <[email protected]>
Allwinner SoCs with DWC HDMI controller have a "HVCC" power pin for the
HDMI part, and on some boards it's connected to a dedicated regulator
rather than the main 3.3v.
Add support for optional HVCC regulator. For boards that doesn't use a
dedicated regulator to power it, the default dummy regulator is used.
Signed-off-by: Icenowy Zheng <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
---
Changes for v3, v2:
- none
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 14 ++++++++++++++
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 2 ++
2 files changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
index 31875b636434..68623a6ac44e 100644
--- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
+++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
@@ -113,6 +113,12 @@ static int sun8i_dw_hdmi_bind(struct device *dev, struct device *master,
if (encoder->possible_crtcs == 0)
return -EPROBE_DEFER;
+ hdmi->vcc_hdmi = devm_regulator_get(dev, "hvcc");
+ if (IS_ERR(hdmi->vcc_hdmi)) {
+ dev_err(dev, "Could not get HDMI power supply\n");
+ return PTR_ERR(hdmi->vcc_hdmi);
+ }
+
hdmi->rst_ctrl = devm_reset_control_get(dev, "ctrl");
if (IS_ERR(hdmi->rst_ctrl)) {
dev_err(dev, "Could not get ctrl reset control\n");
@@ -131,6 +137,12 @@ static int sun8i_dw_hdmi_bind(struct device *dev, struct device *master,
return ret;
}
+ ret = regulator_enable(hdmi->vcc_hdmi);
+ if (ret) {
+ dev_err(dev, "Cannot enable HDMI power supply\n");
+ goto err_disable_vcc;
+ }
+
ret = clk_prepare_enable(hdmi->clk_tmds);
if (ret) {
dev_err(dev, "Could not enable tmds clock\n");
@@ -183,6 +195,8 @@ static int sun8i_dw_hdmi_bind(struct device *dev, struct device *master,
clk_disable_unprepare(hdmi->clk_tmds);
err_assert_ctrl_reset:
reset_control_assert(hdmi->rst_ctrl);
+err_disable_vcc:
+ regulator_disable(hdmi->vcc_hdmi);
return ret;
}
diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
index aadbe0a10b0c..af34c498295e 100644
--- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
+++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
@@ -10,6 +10,7 @@
#include <drm/drm_encoder.h>
#include <linux/clk.h>
#include <linux/regmap.h>
+#include <linux/regulator/consumer.h>
#include <linux/reset.h>
#define SUN8I_HDMI_PHY_DBG_CTRL_REG 0x0000
@@ -176,6 +177,7 @@ struct sun8i_dw_hdmi {
struct drm_encoder encoder;
struct sun8i_hdmi_phy *phy;
struct dw_hdmi_plat_data plat_data;
+ struct regulator *vcc_hdmi;
struct reset_control *rst_ctrl;
};
--
2.17.1
Allwinner SoC like SUN8I and SUN50I has DE2 CCU so enable them
as default.
Signed-off-by: Jagan Teki <[email protected]>
---
Changes for v3:
- none
Changes for v2:
- Enable for MACH_SUN8I
drivers/clk/sunxi-ng/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/clk/sunxi-ng/Kconfig b/drivers/clk/sunxi-ng/Kconfig
index 826674d090fd..e20182aa9748 100644
--- a/drivers/clk/sunxi-ng/Kconfig
+++ b/drivers/clk/sunxi-ng/Kconfig
@@ -63,6 +63,8 @@ config SUN8I_V3S_CCU
config SUN8I_DE2_CCU
bool "Support for the Allwinner SoCs DE2 CCU"
+ default MACH_SUN8I || (ARM64 && ARCH_SUNXI)
+ depends on DRM_SUN4I && (MACH_SUN8I || (ARM64 && ARCH_SUNXI))
config SUN8I_R40_CCU
bool "Support for the Allwinner R40 CCU"
--
2.17.1
Enable all necessary HDMI pipeline nodes with HDMI out
connector on Bananpi-m64 board.
Signed-off-by: Jagan Teki <[email protected]>
---
Changes for v3:
- Enable all pipeline components
Changes for v2:
- none
.../dts/allwinner/sun50i-a64-bananapi-m64.dts | 34 +++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
index 094cfed13df9..7adba2c8f6e5 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
@@ -60,6 +60,17 @@
stdout-path = "serial0:115200n8";
};
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
@@ -86,6 +97,10 @@
};
};
+&de {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -103,6 +118,17 @@
status = "okay";
};
+&hdmi {
+ hvcc-supply = <®_dldo1>;
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
@@ -120,6 +146,10 @@
};
};
+&mixer1 {
+ status = "okay";
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
@@ -300,6 +330,10 @@
vcc-hdmi-supply = <®_dldo1>;
};
+&tcon1 {
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
--
2.17.1
Enable DRM Support for Allwinner Display Engine, built as a module.
Signed-off-by: Jagan Teki <[email protected]>
---
Changes for v3, v2:
- none
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index c192a42c2ba3..7c362b0ea27c 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -425,6 +425,7 @@ CONFIG_DRM_EXYNOS_DSI=y
CONFIG_DRM_EXYNOS_HDMI=y
CONFIG_DRM_EXYNOS_MIC=y
CONFIG_DRM_ROCKCHIP=m
+CONFIG_DRM_SUN4I=m
CONFIG_ROCKCHIP_ANALOGIX_DP=y
CONFIG_ROCKCHIP_CDN_DP=y
CONFIG_ROCKCHIP_DW_HDMI=y
--
2.17.1
Enable all necessary HDMI pipeline nodes with HDMI out
connector on Orangepi-win board.
Signed-off-by: Jagan Teki <[email protected]>
---
Changes for v3:
- Enable all pipeline components
Changes for v2:
- none
.../dts/allwinner/sun50i-a64-orangepi-win.dts | 34 +++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
index 1221764f5719..5bd80b116039 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
@@ -57,12 +57,42 @@
chosen {
stdout-path = "serial0:115200n8";
};
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+};
+
+&de {
+ status = "okay";
};
&ehci1 {
status = "okay";
};
+&hdmi {
+ hvcc-supply = <®_dldo1>;
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&mixer1 {
+ status = "okay";
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
@@ -195,6 +225,10 @@
vcc-hdmi-supply = <®_dldo1>;
};
+&tcon1 {
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
--
2.17.1
Enable all necessary HDMI pipeline nodes with HDMI out
connector on pine64 board.
Signed-off-by: Jagan Teki <[email protected]>
---
Changes for v3:
- Enable all pipeline components
Changes for v2:
- none
.../boot/dts/allwinner/sun50i-a64-pine64.dts | 34 +++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index 1b9b92e541d2..4d1553f7d2a9 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -62,6 +62,21 @@
chosen {
stdout-path = "serial0:115200n8";
};
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+};
+
+&de {
+ status = "okay";
};
&ehci0 {
@@ -82,6 +97,17 @@
};
+&hdmi {
+ hvcc-supply = <®_dldo1>;
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
@@ -99,6 +125,10 @@
};
};
+&mixer1 {
+ status = "okay";
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
@@ -238,6 +268,10 @@
status = "disabled";
};
+&tcon1 {
+ status = "okay";
+};
+
/* On Exp and Euler connectors */
&uart0 {
pinctrl-names = "default";
--
2.17.1
Enable all necessary HDMI pipeline nodes with HDMI out
connector on nanopi-a64 board.
Signed-off-by: Jagan Teki <[email protected]>
---
Changes for v3:
- Enable all pipeline components
Changes for v2:
- none
.../dts/allwinner/sun50i-a64-nanopi-a64.dts | 34 +++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
index 98dbff19f5cc..5395069bf541 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
@@ -57,6 +57,21 @@
chosen {
stdout-path = "serial0:115200n8";
};
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+};
+
+&de {
+ status = "okay";
};
&ehci0 {
@@ -67,6 +82,17 @@
status = "okay";
};
+&hdmi {
+ hvcc-supply = <®_dldo1>;
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
/* i2c1 connected with gpio headers like pine64, bananapi */
&i2c1 {
pinctrl-names = "default";
@@ -78,6 +104,10 @@
bias-pull-up;
};
+&mixer1 {
+ status = "okay";
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
@@ -199,6 +229,10 @@
vcc-hdmi-supply = <®_dldo1>;
};
+&tcon1 {
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
--
2.17.1
Enable all necessary HDMI pipeline nodes with HDMI out
connector on a64-olinuxino board.
Signed-off-by: Jagan Teki <[email protected]>
---
Changes for v3:
- Enable all pipeline components
Changes for v2:
- none
.../dts/allwinner/sun50i-a64-olinuxino.dts | 34 +++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
index 3f531393eaee..0292149ee40a 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
@@ -58,12 +58,42 @@
stdout-path = "serial0:115200n8";
};
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
};
};
+&de {
+ status = "okay";
+};
+
+&hdmi {
+ hvcc-supply = <®_dldo1>;
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&mixer1 {
+ status = "okay";
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
@@ -218,6 +248,10 @@
vcc-hdmi-supply = <®_dldo1>;
};
+&tcon1 {
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
--
2.17.1
Enable all necessary HDMI pipeline nodes with HDMI out
connector on sopine board.
Signed-off-by: Jagan Teki <[email protected]>
---
Changes for v3:
- Enable all pipeline components
Changes for v2:
- none
.../allwinner/sun50i-a64-sopine-baseboard.dts | 34 +++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index c21f2331add6..050e0ff92145 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -61,6 +61,17 @@
stdout-path = "serial0:115200n8";
};
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
reg_vcc1v8: vcc1v8 {
compatible = "regulator-fixed";
regulator-name = "vcc1v8";
@@ -69,6 +80,10 @@
};
};
+&de {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -86,6 +101,17 @@
status = "okay";
};
+&hdmi {
+ hvcc-supply = <®_dldo1>;
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
@@ -93,6 +119,10 @@
};
};
+&mixer1 {
+ status = "okay";
+};
+
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;
@@ -138,6 +168,10 @@
vcc-hdmi-supply = <®_dldo1>;
};
+&tcon1 {
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
--
2.17.1
On Wed, Jul 18, 2018 at 6:54 PM, Jagan Teki <[email protected]> wrote:
> Allwinner A64 has display engine pipeline like other Allwinner SOC's A83T/H3/H5.
>
> A64 behaviour similar to Allwinner A83T where
> Mixer0 => TCON0 => LVDS/RGB/MIPI-DSI
> Mixer1 => TCON1 => HDMI
> as per Display System Block Diagram from Allwinner_A64_User_Manual_V1.1.pdf
>
> This is third patch-set followed with previous RFC[1], first and second
> series[2][3] and merely concentrated on HDMI pipeline through TCON1 and
> rest will add eventually.
>
> This series fixed previous version comments
> - Rebasing on linux-next
> - sqash all pipeline components in one patch
> - Enable all pipeline components in board dts
> - about documenting fallback compatibles
> - adding new compatible for mixer1
>
> Log:
> [ 1.450984] Jagan: sun8i_mixer_probe
> [ 1.464981] sun4i-drm display-engine: bound 1200000.mixer (ops sun8i_mixer_ops)
> [ 1.472572] sun4i-drm display-engine: bound 1c0d000.lcd-controller (ops sun4i_tcon_ops)
> [ 1.480676] sun8i-dw-hdmi 1ee0000.hdmi: Linked as a consumer to regulator.10
> [ 1.488738] sun8i-dw-hdmi 1ee0000.hdmi: Detected HDMI TX controller v1.32a with HDCP (sun8i_dw_hdmi_phy)
> [ 1.498879] sun8i-dw-hdmi 1ee0000.hdmi: registered DesignWare HDMI I2C bus driver
> [ 1.507372] sun4i-drm display-engine: bound 1ee0000.hdmi (ops sun8i_dw_hdmi_ops)
> [ 1.514778] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
> [ 1.521398] [drm] No driver support for vblank timestamp query.
> [ 1.684611] random: fast init done
> [ 2.011575] Console: switching to colour frame buffer device 180x56
> [ 2.049858] sun4i-drm display-engine: fb0: DRM emulated frame buffer device
> [ 2.057268] [drm] Initialized sun4i-drm 1.0.0 20150629 for display-engine on minor 0
>
> Note:
> Pine64 boards are unable to get edid by default like other A64 boards,
> but forcing 'video=HDMI-A-1:1920x1080@60D' kernel command line can
> create edid with display on penel
>
> [3] https://lkml.org/lkml/2018/5/18/461
> [2] https://lkml.org/lkml/2018/4/30/288
> [1] https://lkml.org/lkml/2018/4/24/547
>
> Icenowy Zheng (1):
> drm: sun4i: add support for HVCC regulator for DWC HDMI glue
>
> Jagan Teki (17):
> clk: sunxi-ng: a64: Add minimal rate for video PLLs
> drm/sun4i: Add support for A64 mixer1
> dt-bindings: display: Add compatible for A64 DE2 tcon1 blocks
> drm/sun4i: Add support for A64 display engine
> dt-bindings: display: Add compatible for A64 HDMI
> dt-bindings: clock: sun50i-a64-ccu: Add PLL_VIDEO[0-1] macros
> arm64: dts: allwinner: a64: Add tcon1 HDMI pipeline
> clk: sunxi-ng: Enable DE2_CCU for SUN8I and SUN50I
> arm64: defconfig: Enable CONFIG_DRM_SUN4I
> drm/sun4i: Enable DE2 Mixer for SUN8I and SUN50I
> drm/sun4i: Enable DesignWare HDMI for SUN50I
> arm64: dts: allwinner: a64: bananapi-m64: Enable HDMI output
> arm64: dts: allwinner: a64: nanopi-a64: Enable HDMI output
> arm64: dts: allwinner: a64: orangepi-win: Enable HDMI output
> arm64: dts: allwinner: a64: a64-olinuxino: Enable HDMI output
> arm64: dts: allwinner: a64: pine64: Enable HDMI output
> arm64: dts: allwinner: a64: sopine: Enable HDMI output
Please squash all the patches enabling HDMI on some board into one,
and write an informative commit message. See commit 8b1447aed5f4
("ARM: dts: sun6i: Enable HDMI support on some A31/A31s devices")
for such an example.
ChenYu
>
> .../bindings/display/sunxi/sun4i-drm.txt | 4 +
> .../dts/allwinner/sun50i-a64-bananapi-m64.dts | 34 ++++++
> .../dts/allwinner/sun50i-a64-nanopi-a64.dts | 34 ++++++
> .../dts/allwinner/sun50i-a64-olinuxino.dts | 34 ++++++
> .../dts/allwinner/sun50i-a64-orangepi-win.dts | 34 ++++++
> .../boot/dts/allwinner/sun50i-a64-pine64.dts | 34 ++++++
> .../allwinner/sun50i-a64-sopine-baseboard.dts | 34 ++++++
> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 110 ++++++++++++++++++
> arch/arm64/configs/defconfig | 1 +
> drivers/clk/sunxi-ng/Kconfig | 2 +
> drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 46 ++++----
> drivers/gpu/drm/sun4i/Kconfig | 3 +-
> drivers/gpu/drm/sun4i/sun4i_drv.c | 1 +
> drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 14 +++
> drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 2 +
> drivers/gpu/drm/sun4i/sun8i_mixer.c | 12 ++
> include/dt-bindings/clock/sun50i-a64-ccu.h | 2 +
> 17 files changed, 378 insertions(+), 23 deletions(-)
>
> --
> 2.17.1
>
On Wed, Jul 18, 2018 at 04:24:40PM +0530, Jagan Teki wrote:
> Allwinner A64 has display engine pipeline like other Allwinner SOC's A83T/H3/H5.
>
> A64 behaviour similar to Allwinner A83T where
> Mixer0 => TCON0 => LVDS/RGB/MIPI-DSI
> Mixer1 => TCON1 => HDMI
> as per Display System Block Diagram from Allwinner_A64_User_Manual_V1.1.pdf
>
> This is third patch-set followed with previous RFC[1], first and second
> series[2][3] and merely concentrated on HDMI pipeline through TCON1 and
> rest will add eventually.
>
> This series fixed previous version comments
> - Rebasing on linux-next
> - sqash all pipeline components in one patch
> - Enable all pipeline components in board dts
> - about documenting fallback compatibles
> - adding new compatible for mixer1
You still haven't figured out the SRAM parts. We asked you to fix this
in the v1 and the v2 already, and we're not going to merge this
without those bits figured out properly.
> Log:
> [ 1.450984] Jagan: sun8i_mixer_probe
> [ 1.464981] sun4i-drm display-engine: bound 1200000.mixer (ops sun8i_mixer_ops)
> [ 1.472572] sun4i-drm display-engine: bound 1c0d000.lcd-controller (ops sun4i_tcon_ops)
> [ 1.480676] sun8i-dw-hdmi 1ee0000.hdmi: Linked as a consumer to regulator.10
> [ 1.488738] sun8i-dw-hdmi 1ee0000.hdmi: Detected HDMI TX controller v1.32a with HDCP (sun8i_dw_hdmi_phy)
> [ 1.498879] sun8i-dw-hdmi 1ee0000.hdmi: registered DesignWare HDMI I2C bus driver
> [ 1.507372] sun4i-drm display-engine: bound 1ee0000.hdmi (ops sun8i_dw_hdmi_ops)
> [ 1.514778] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
> [ 1.521398] [drm] No driver support for vblank timestamp query.
> [ 1.684611] random: fast init done
> [ 2.011575] Console: switching to colour frame buffer device 180x56
> [ 2.049858] sun4i-drm display-engine: fb0: DRM emulated frame buffer device
> [ 2.057268] [drm] Initialized sun4i-drm 1.0.0 20150629 for display-engine on minor 0
>
> Note:
> Pine64 boards are unable to get edid by default like other A64 boards,
> but forcing 'video=HDMI-A-1:1920x1080@60D' kernel command line can
> create edid with display on penel
Then that needs to be figured out before it's enabled, instead of
having a hack that barely works.
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
于 2018年7月18日 GMT+08:00 下午6:54:47, Jagan Teki <[email protected]> 写到:
>HDMI on Allwinner A64 similar behaviour like H3 with
>PHY of two clock parents (pll-0, pll-1) connected via
>second mixer and tcon.
>
>Add all require entries needed for HDMI to function.
>
>Note, that Figure 3-3.Module Clock Diagram also showing
>HDMI connected via TCON0 with PLL_VIDEO0. this can be add
>it in future once we have mixer0 pipeline.
>
>Signed-off-by: Jagan Teki <[email protected]>
>---
>Changes for v3:
>- Squash all pipeline components in one patch
>- Add status for mixer1 and tcon1
>Changes for v2:
>- Change compatibles and other based on previous patch changes
>
> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 110 ++++++++++++++++++
> 1 file changed, 110 insertions(+)
>
>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>index 840753432ea5..572569d8b577 100644
>--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>@@ -112,6 +112,12 @@
> };
> };
>
>+ de: display-engine {
>+ compatible = "allwinner,sun50i-a64-display-engine";
>+ allwinner,pipelines = <&mixer1>;
>+ status = "disabled";
>+ };
>+
> osc24M: osc24M_clk {
> #clock-cells = <0>;
> compatible = "fixed-clock";
>@@ -196,6 +202,30 @@
> };
> };
>
>+ mixer1: mixer@1200000 {
>+ compatible = "allwinner,sun50i-a64-de2-mixer-1";
>+ reg = <0x01200000 0x100000>;
>+ clocks = <&display_clocks CLK_BUS_MIXER1>,
>+ <&display_clocks CLK_MIXER1>;
>+ clock-names = "bus",
>+ "mod";
>+ resets = <&display_clocks RST_WB>;
>+ status = "disabled";
>+
>+ ports {
>+ #address-cells = <1>;
>+ #size-cells = <0>;
>+
>+ mixer1_out: port@1 {
>+ reg = <1>;
>+
>+ mixer1_out_tcon1: endpoint {
>+ remote-endpoint = <&tcon1_in_mixer1>;
>+ };
>+ };
>+ };
>+ };
>+
It should be subnode of DE2 bus to get the SRAM access
managed by that driver.
> syscon: syscon@1c00000 {
> compatible = "allwinner,sun50i-a64-system-control";
> reg = <0x01c00000 0x1000>;
>@@ -228,6 +258,42 @@
> #dma-cells = <1>;
> };
>
>+ tcon1: lcd-controller@1c0d000 {
>+ compatible = "allwinner,sun50i-a64-tcon-tv",
>+ "allwinner,sun8i-a83t-tcon-tv";
>+ reg = <0x01c0d000 0x1000>;
>+ interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
>+ clocks = <&ccu CLK_BUS_TCON1>, <&ccu CLK_TCON1>;
>+ clock-names = "ahb", "tcon-ch1";
>+ resets = <&ccu RST_BUS_TCON1>;
>+ reset-names = "lcd";
>+ status = "disabled";
>+
>+ ports {
>+ #address-cells = <1>;
>+ #size-cells = <0>;
>+
>+ tcon1_in: port@0 {
>+ reg = <0>;
>+
>+ tcon1_in_mixer1: endpoint {
>+ remote-endpoint = <&mixer1_out_tcon1>;
>+ };
>+ };
>+
>+ tcon1_out: port@1 {
>+ #address-cells = <1>;
>+ #size-cells = <0>;
>+ reg = <1>;
>+
>+ tcon1_out_hdmi: endpoint@1 {
>+ reg = <1>;
>+ remote-endpoint = <&hdmi_in_tcon1>;
>+ };
>+ };
>+ };
>+ };
>+
> mmc0: mmc@1c0f000 {
> compatible = "allwinner,sun50i-a64-mmc";
> reg = <0x01c0f000 0x1000>;
>@@ -688,6 +754,50 @@
> status = "disabled";
> };
>
>+ hdmi: hdmi@1ee0000 {
>+ compatible = "allwinner,sun50i-a64-dw-hdmi",
>+ "allwinner,sun8i-a83t-dw-hdmi";
>+ reg = <0x01ee0000 0x10000>;
>+ reg-io-width = <1>;
>+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
>+ clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
>+ <&ccu CLK_HDMI>;
>+ clock-names = "iahb", "isfr", "tmds";
>+ resets = <&ccu RST_BUS_HDMI1>;
>+ reset-names = "ctrl";
>+ phys = <&hdmi_phy>;
>+ phy-names = "hdmi-phy";
>+ status = "disabled";
>+
>+ ports {
>+ #address-cells = <1>;
>+ #size-cells = <0>;
>+
>+ hdmi_in: port@0 {
>+ reg = <0>;
>+
>+ hdmi_in_tcon1: endpoint {
>+ remote-endpoint = <&tcon1_out_hdmi>;
>+ };
>+ };
>+
>+ hdmi_out: port@1 {
>+ reg = <1>;
>+ };
>+ };
>+ };
>+
>+ hdmi_phy: hdmi-phy@1ef0000 {
>+ compatible = "allwinner,sun50i-a64-hdmi-phy";
>+ reg = <0x01ef0000 0x10000>;
>+ clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
>+ <&ccu CLK_PLL_VIDEO0>, <&ccu CLK_PLL_VIDEO1>;
>+ clock-names = "bus", "mod", "pll-0", "pll-1";
>+ resets = <&ccu RST_BUS_HDMI0>;
>+ reset-names = "phy";
>+ #phy-cells = <0>;
>+ };
>+
> rtc: rtc@1f00000 {
> compatible = "allwinner,sun6i-a31-rtc";
> reg = <0x01f00000 0x54>;
On Wed, Jul 18, 2018 at 6:14 PM, Maxime Ripard
<[email protected]> wrote:
> On Wed, Jul 18, 2018 at 04:24:40PM +0530, Jagan Teki wrote:
>> Allwinner A64 has display engine pipeline like other Allwinner SOC's A83T/H3/H5.
>>
>> A64 behaviour similar to Allwinner A83T where
>> Mixer0 => TCON0 => LVDS/RGB/MIPI-DSI
>> Mixer1 => TCON1 => HDMI
>> as per Display System Block Diagram from Allwinner_A64_User_Manual_V1.1.pdf
>>
>> This is third patch-set followed with previous RFC[1], first and second
>> series[2][3] and merely concentrated on HDMI pipeline through TCON1 and
>> rest will add eventually.
>>
>> This series fixed previous version comments
>> - Rebasing on linux-next
>> - sqash all pipeline components in one patch
>> - Enable all pipeline components in board dts
>> - about documenting fallback compatibles
>> - adding new compatible for mixer1
>
> You still haven't figured out the SRAM parts. We asked you to fix this
> in the v1 and the v2 already, and we're not going to merge this
> without those bits figured out properly.
Sorry I'm not sure what I'm trying to do on SRAM here because the last
mail, I have waited for Icenowy changes about simple_fb with sram_c on
ccu node and those are merged. can you elaborate please.
>
>> Log:
>> [ 1.450984] Jagan: sun8i_mixer_probe
>> [ 1.464981] sun4i-drm display-engine: bound 1200000.mixer (ops sun8i_mixer_ops)
>> [ 1.472572] sun4i-drm display-engine: bound 1c0d000.lcd-controller (ops sun4i_tcon_ops)
>> [ 1.480676] sun8i-dw-hdmi 1ee0000.hdmi: Linked as a consumer to regulator.10
>> [ 1.488738] sun8i-dw-hdmi 1ee0000.hdmi: Detected HDMI TX controller v1.32a with HDCP (sun8i_dw_hdmi_phy)
>> [ 1.498879] sun8i-dw-hdmi 1ee0000.hdmi: registered DesignWare HDMI I2C bus driver
>> [ 1.507372] sun4i-drm display-engine: bound 1ee0000.hdmi (ops sun8i_dw_hdmi_ops)
>> [ 1.514778] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
>> [ 1.521398] [drm] No driver support for vblank timestamp query.
>> [ 1.684611] random: fast init done
>> [ 2.011575] Console: switching to colour frame buffer device 180x56
>> [ 2.049858] sun4i-drm display-engine: fb0: DRM emulated frame buffer device
>> [ 2.057268] [drm] Initialized sun4i-drm 1.0.0 20150629 for display-engine on minor 0
>>
>> Note:
>> Pine64 boards are unable to get edid by default like other A64 boards,
>> but forcing 'video=HDMI-A-1:1920x1080@60D' kernel command line can
>> create edid with display on penel
>
> Then that needs to be figured out before it's enabled, instead of
> having a hack that barely works.
Any suggestion to work.
在 2018-07-18三的 18:26 +0530，Jagan Teki写道：
> On Wed, Jul 18, 2018 at 6:14 PM, Maxime Ripard
> <[email protected]> wrote:
> > On Wed, Jul 18, 2018 at 04:24:40PM +0530, Jagan Teki wrote:
> > > Allwinner A64 has display engine pipeline like other Allwinner
> > > SOC's A83T/H3/H5.
> > >
> > > A64 behaviour similar to Allwinner A83T where
> > > Mixer0 => TCON0 => LVDS/RGB/MIPI-DSI
> > > Mixer1 => TCON1 => HDMI
> > > as per Display System Block Diagram from
> > > Allwinner_A64_User_Manual_V1.1.pdf
> > >
> > > This is third patch-set followed with previous RFC[1], first and
> > > second
> > > series[2][3] and merely concentrated on HDMI pipeline through
> > > TCON1 and
> > > rest will add eventually.
> > >
> > > This series fixed previous version comments
> > > - Rebasing on linux-next
> > > - sqash all pipeline components in one patch
> > > - Enable all pipeline components in board dts
> > > - about documenting fallback compatibles
> > > - adding new compatible for mixer1
> >
> > You still haven't figured out the SRAM parts. We asked you to fix
> > this
> > in the v1 and the v2 already, and we're not going to merge this
> > without those bits figured out properly.
>
> Sorry I'm not sure what I'm trying to do on SRAM here because the
> last
> mail, I have waited for Icenowy changes about simple_fb with sram_c
> on
> ccu node and those are merged. can you elaborate please.
Would you mind me advance the patchset a bit and send a PATCH v3.1?
I won't finally take the maintainership of the patchset.
>
> >
> > > Log:
> > > [ 1.450984] Jagan: sun8i_mixer_probe
> > > [ 1.464981] sun4i-drm display-engine: bound 1200000.mixer (ops
> > > sun8i_mixer_ops)
> > > [ 1.472572] sun4i-drm display-engine: bound 1c0d000.lcd-
> > > controller (ops sun4i_tcon_ops)
> > > [ 1.480676] sun8i-dw-hdmi 1ee0000.hdmi: Linked as a consumer
> > > to regulator.10
> > > [ 1.488738] sun8i-dw-hdmi 1ee0000.hdmi: Detected HDMI TX
> > > controller v1.32a with HDCP (sun8i_dw_hdmi_phy)
> > > [ 1.498879] sun8i-dw-hdmi 1ee0000.hdmi: registered DesignWare
> > > HDMI I2C bus driver
> > > [ 1.507372] sun4i-drm display-engine: bound 1ee0000.hdmi (ops
> > > sun8i_dw_hdmi_ops)
> > > [ 1.514778] [drm] Supports vblank timestamp caching Rev 2
> > > (21.10.2013).
> > > [ 1.521398] [drm] No driver support for vblank timestamp
> > > query.
> > > [ 1.684611] random: fast init done
> > > [ 2.011575] Console: switching to colour frame buffer device
> > > 180x56
> > > [ 2.049858] sun4i-drm display-engine: fb0: DRM emulated frame
> > > buffer device
> > > [ 2.057268] [drm] Initialized sun4i-drm 1.0.0 20150629 for
> > > display-engine on minor 0
> > >
> > > Note:
> > > Pine64 boards are unable to get edid by default like other A64
> > > boards,
> > > but forcing 'video=HDMI-A-1:1920x1080@60D' kernel command line
> > > can
> > > create edid with display on penel
> >
> > Then that needs to be figured out before it's enabled, instead of
> > having a hack that barely works.
>
> Any suggestion to work.