LinuxLists.cc - [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

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Subject: Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

On 03/07/2018 06:08 AM, Ganapatrao Kulkarni wrote:
> There is MIDR change on ThunderX2 B0, adding an entry to mapfile
> to enable JSON events for B0.
>
> Signed-off-by: Ganapatrao Kulkarni <[email protected]>
> ---
> tools/perf/pmu-events/arch/arm64/mapfile.csv | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv b/tools/perf/pmu-events/arch/arm64/mapfile.csv
> index e61c9ca..93c5d14 100644
> --- a/tools/perf/pmu-events/arch/arm64/mapfile.csv
> +++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv
> @@ -13,4 +13,5 @@
> #
> #Family-model,Version,Filename,EventType
> 0x00000000420f5160,v1,cavium,core
> +0x00000000430f0af0,v1,cavium,core
> 0x00000000410fd03[[:xdigit:]],v1,cortex-a53,core
>

Hi,
Like the cortex-a53 the last digit '0' of the match for the MIDR should be replaced with [[:xdigit:]] to allow for possible future revisions of chip:

0x00000000430f0af[[:xdigit:]],v1,cavium,core

-Will Cohen

2018-03-07 14:41:19

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Subject: Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

Em Wed, Mar 07, 2018 at 09:32:05AM -0500, William Cohen escreveu:
> On 03/07/2018 06:08 AM, Ganapatrao Kulkarni wrote:
> > There is MIDR change on ThunderX2 B0, adding an entry to mapfile
> > to enable JSON events for B0.
> >
> > Signed-off-by: Ganapatrao Kulkarni <[email protected]>

Ganapatrao, can you please take this in consideration and if agreeing
send a v2 patch?

With that I can add an Acked-by: wcohen, Right?

- Arnaldo
> > ---
> > tools/perf/pmu-events/arch/arm64/mapfile.csv | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv b/tools/perf/pmu-events/arch/arm64/mapfile.csv
> > index e61c9ca..93c5d14 100644
> > --- a/tools/perf/pmu-events/arch/arm64/mapfile.csv
> > +++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv
> > @@ -13,4 +13,5 @@
> > #
> > #Family-model,Version,Filename,EventType
> > 0x00000000420f5160,v1,cavium,core
> > +0x00000000430f0af0,v1,cavium,core
> > 0x00000000410fd03[[:xdigit:]],v1,cortex-a53,core
> >
>
> Hi,
> Like the cortex-a53 the last digit '0' of the match for the MIDR should be replaced with [[:xdigit:]] to allow for possible future revisions of chip:
>
> 0x00000000430f0af[[:xdigit:]],v1,cavium,core
>
>
> -Will Cohen

2018-03-07 15:28:10

by John Garry

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Subject: Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

On 07/03/2018 14:38, Arnaldo Carvalho de Melo wrote:
> Em Wed, Mar 07, 2018 at 09:32:05AM -0500, William Cohen escreveu:
>> On 03/07/2018 06:08 AM, Ganapatrao Kulkarni wrote:
>>> There is MIDR change on ThunderX2 B0, adding an entry to mapfile
>>> to enable JSON events for B0.
>>>
>>> Signed-off-by: Ganapatrao Kulkarni <[email protected]>
>
> Ganapatrao, can you please take this in consideration and if agreeing
> send a v2 patch?
>
> With that I can add an Acked-by: wcohen, Right?
>

JFYI, This patch conflicts with "[PATCH v2 00/11] perf events patches
for improved ARM64 support". I was planning on sending a v3 quite soon.

> - Arnaldo
>>> ---
>>> tools/perf/pmu-events/arch/arm64/mapfile.csv | 1 +
>>> 1 file changed, 1 insertion(+)
>>>
>>> diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv b/tools/perf/pmu-events/arch/arm64/mapfile.csv
>>> index e61c9ca..93c5d14 100644
>>> --- a/tools/perf/pmu-events/arch/arm64/mapfile.csv
>>> +++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv
>>> @@ -13,4 +13,5 @@
>>> #
>>> #Family-model,Version,Filename,EventType
>>> 0x00000000420f5160,v1,cavium,core
>>> +0x00000000430f0af0,v1,cavium,core
>>> 0x00000000410fd03[[:xdigit:]],v1,cortex-a53,core
>>>
>>
>> Hi,
>> Like the cortex-a53 the last digit '0' of the match for the MIDR should be replaced with [[:xdigit:]] to allow for possible future revisions of chip:
>>
>> 0x00000000430f0af[[:xdigit:]],v1,cavium,core
>>
>>
>> -Will Cohen
>
> .

Thanks,
John

>

2018-03-07 15:38:34

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Subject: Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

On 03/07/2018 10:25 AM, John Garry wrote:
> On 07/03/2018 14:38, Arnaldo Carvalho de Melo wrote:
>> Em Wed, Mar 07, 2018 at 09:32:05AM -0500, William Cohen escreveu:
>>> On 03/07/2018 06:08 AM, Ganapatrao Kulkarni wrote:
>>>> There is MIDR change on ThunderX2 B0, adding an entry to mapfile
>>>> to enable JSON events for B0.
>>>>
>>>> Signed-off-by: Ganapatrao Kulkarni <[email protected]>
>>
>> Ganapatrao, can you please take this in consideration and if agreeing
>> send a v2 patch?
>>
>> With that I can add an Acked-by: wcohen, Right?

With that change I would ack it. -Will

>>
>
> JFYI, This patch conflicts with "[PATCH v2 00/11] perf events patches for improved ARM64 support". I was planning on sending a v3 quite soon.
>
>> - Arnaldo
>>>> ---
>>>> ?tools/perf/pmu-events/arch/arm64/mapfile.csv | 1 +
>>>> ?1 file changed, 1 insertion(+)
>>>>
>>>> diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv b/tools/perf/pmu-events/arch/arm64/mapfile.csv
>>>> index e61c9ca..93c5d14 100644
>>>> --- a/tools/perf/pmu-events/arch/arm64/mapfile.csv
>>>> +++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv
>>>> @@ -13,4 +13,5 @@
>>>> ?#
>>>> ?#Family-model,Version,Filename,EventType
>>>> ?0x00000000420f5160,v1,cavium,core
>>>> +0x00000000430f0af0,v1,cavium,core
>>>> ?0x00000000410fd03[[:xdigit:]],v1,cortex-a53,core
>>>>
>>>
>>> Hi,
>>> Like the cortex-a53 the last digit '0' of the match for the MIDR should be replaced with [[:xdigit:]] to allow for possible future revisions of chip:
>>>
>>> 0x00000000430f0af[[:xdigit:]],v1,cavium,core
>>>
>>>
>>> -Will Cohen
>>
>> .
>
> Thanks,
> John
>
>>
>
>

2018-03-07 17:37:30

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Subject: Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

Hi Will Cohen,

On Wed, Mar 7, 2018 at 8:08 PM, Arnaldo Carvalho de Melo
<[email protected]> wrote:
> Em Wed, Mar 07, 2018 at 09:32:05AM -0500, William Cohen escreveu:
>> On 03/07/2018 06:08 AM, Ganapatrao Kulkarni wrote:
>> > There is MIDR change on ThunderX2 B0, adding an entry to mapfile
>> > to enable JSON events for B0.
>> >
>> > Signed-off-by: Ganapatrao Kulkarni <[email protected]>
>
> Ganapatrao, can you please take this in consideration and if agreeing
> send a v2 patch?
>
> With that I can add an Acked-by: wcohen, Right?
>
> - Arnaldo
>> > ---
>> > tools/perf/pmu-events/arch/arm64/mapfile.csv | 1 +
>> > 1 file changed, 1 insertion(+)
>> >
>> > diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv b/tools/perf/pmu-events/arch/arm64/mapfile.csv
>> > index e61c9ca..93c5d14 100644
>> > --- a/tools/perf/pmu-events/arch/arm64/mapfile.csv
>> > +++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv
>> > @@ -13,4 +13,5 @@
>> > #
>> > #Family-model,Version,Filename,EventType
>> > 0x00000000420f5160,v1,cavium,core
>> > +0x00000000430f0af0,v1,cavium,core
>> > 0x00000000410fd03[[:xdigit:]],v1,cortex-a53,core
>> >
>>
>> Hi,
>> Like the cortex-a53 the last digit '0' of the match for the MIDR should be replaced with [[:xdigit:]] to allow for possible future revisions of chip:

for arm64 implementation, bits 3:0(Revision) and bits 23:20(Variant)
are ignored/dont-care.

>>
>> 0x00000000430f0af[[:xdigit:]],v1,cavium,core
>>
>>
>> -Will Cohen
>

thanks
Ganapat
> _______________________________________________
> linux-arm-kernel mailing list
> [email protected]
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

2018-03-07 18:33:29

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Subject: Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

On 03/07/2018 12:35 PM, Ganapatrao Kulkarni wrote:
> Hi Will Cohen,
>
> On Wed, Mar 7, 2018 at 8:08 PM, Arnaldo Carvalho de Melo
> <[email protected]> wrote:
>> Em Wed, Mar 07, 2018 at 09:32:05AM -0500, William Cohen escreveu:
>>> On 03/07/2018 06:08 AM, Ganapatrao Kulkarni wrote:
>>>> There is MIDR change on ThunderX2 B0, adding an entry to mapfile
>>>> to enable JSON events for B0.
>>>>
>>>> Signed-off-by: Ganapatrao Kulkarni <[email protected]>
>>
>> Ganapatrao, can you please take this in consideration and if agreeing
>> send a v2 patch?
>>
>> With that I can add an Acked-by: wcohen, Right?
>>
>> - Arnaldo
>>>> ---
>>>> tools/perf/pmu-events/arch/arm64/mapfile.csv | 1 +
>>>> 1 file changed, 1 insertion(+)
>>>>
>>>> diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv b/tools/perf/pmu-events/arch/arm64/mapfile.csv
>>>> index e61c9ca..93c5d14 100644
>>>> --- a/tools/perf/pmu-events/arch/arm64/mapfile.csv
>>>> +++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv
>>>> @@ -13,4 +13,5 @@
>>>> #
>>>> #Family-model,Version,Filename,EventType
>>>> 0x00000000420f5160,v1,cavium,core
>>>> +0x00000000430f0af0,v1,cavium,core
>>>> 0x00000000410fd03[[:xdigit:]],v1,cortex-a53,core
>>>>
>>>
>>> Hi,
>>> Like the cortex-a53 the last digit '0' of the match for the MIDR should be replaced with [[:xdigit:]] to allow for possible future revisions of chip:
>
> for arm64 implementation, bits 3:0(Revision) and bits 23:20(Variant)
> are ignored/dont-care.

Thanks for pointing that out. See the code masking out those bits in linux/toos/perf/arch/util/header.c. For the ppc64 it just copies the equivalent of the MIDR including the revision bits. Thus, the need for regular expression matching to avoid having to create a new entry for each revision.

-Will

>
>>>
>>> 0x00000000430f0af[[:xdigit:]],v1,cavium,core
>>>
>>>
>>> -Will Cohen
>>
>
> thanks
> Ganapat
>> _______________________________________________
>> linux-arm-kernel mailing list
>> [email protected]
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

2018-03-08 04:16:30

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Subject: Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

On Thu, Mar 8, 2018 at 12:01 AM, William Cohen <[email protected]> wrote:
> On 03/07/2018 12:35 PM, Ganapatrao Kulkarni wrote:
>> Hi Will Cohen,
>>
>> On Wed, Mar 7, 2018 at 8:08 PM, Arnaldo Carvalho de Melo
>> <[email protected]> wrote:
>>> Em Wed, Mar 07, 2018 at 09:32:05AM -0500, William Cohen escreveu:
>>>> On 03/07/2018 06:08 AM, Ganapatrao Kulkarni wrote:
>>>>> There is MIDR change on ThunderX2 B0, adding an entry to mapfile
>>>>> to enable JSON events for B0.
>>>>>
>>>>> Signed-off-by: Ganapatrao Kulkarni <[email protected]>
>>>
>>> Ganapatrao, can you please take this in consideration and if agreeing
>>> send a v2 patch?
>>>
>>> With that I can add an Acked-by: wcohen, Right?
>>>
>>> - Arnaldo
>>>>> ---
>>>>> tools/perf/pmu-events/arch/arm64/mapfile.csv | 1 +
>>>>> 1 file changed, 1 insertion(+)
>>>>>
>>>>> diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv b/tools/perf/pmu-events/arch/arm64/mapfile.csv
>>>>> index e61c9ca..93c5d14 100644
>>>>> --- a/tools/perf/pmu-events/arch/arm64/mapfile.csv
>>>>> +++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv
>>>>> @@ -13,4 +13,5 @@
>>>>> #
>>>>> #Family-model,Version,Filename,EventType
>>>>> 0x00000000420f5160,v1,cavium,core
>>>>> +0x00000000430f0af0,v1,cavium,core
>>>>> 0x00000000410fd03[[:xdigit:]],v1,cortex-a53,core
>>>>>
>>>>
>>>> Hi,
>>>> Like the cortex-a53 the last digit '0' of the match for the MIDR should be replaced with [[:xdigit:]] to allow for possible future revisions of chip:
>>
>> for arm64 implementation, bits 3:0(Revision) and bits 23:20(Variant)
>> are ignored/dont-care.
>
> Thanks for pointing that out. See the code masking out those bits in linux/toos/perf/arch/util/header.c. For the ppc64 it just copies the equivalent of the MIDR including the revision bits. Thus, the need for regular expression matching to avoid having to create a new entry for each revision.

It is same for arm64 too, there is no need to add an entry for every
revision change, need to add when part number changes.
This patch is not intended to add entry for revision change, the fact
of the matter is that, there is complete MIDR change (vulcan to
thunderx2) in B0.
as per current arm64
implementation(.tools/perf/arch/arm64/util/header.c), it is not
required to have any dontcare marking in mapfile for revision/variant
bits.

thanks
Ganapat

>
> -Will
>
>>
>>>>
>>>> 0x00000000430f0af[[:xdigit:]],v1,cavium,core
>>>>
>>>>
>>>> -Will Cohen
>>>
>>
>> thanks
>> Ganapat
>>> _______________________________________________
>>> linux-arm-kernel mailing list
>>> [email protected]
>>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>

2018-03-09 14:29:05

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Subject: Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

Hi Arnaldo,

can you please pull-in this patch?

On Thu, Mar 8, 2018 at 9:44 AM, Ganapatrao Kulkarni <[email protected]> wrote:
> On Thu, Mar 8, 2018 at 12:01 AM, William Cohen <[email protected]> wrote:
>> On 03/07/2018 12:35 PM, Ganapatrao Kulkarni wrote:
>>> Hi Will Cohen,
>>>
>>> On Wed, Mar 7, 2018 at 8:08 PM, Arnaldo Carvalho de Melo
>>> <[email protected]> wrote:
>>>> Em Wed, Mar 07, 2018 at 09:32:05AM -0500, William Cohen escreveu:
>>>>> On 03/07/2018 06:08 AM, Ganapatrao Kulkarni wrote:
>>>>>> There is MIDR change on ThunderX2 B0, adding an entry to mapfile
>>>>>> to enable JSON events for B0.
>>>>>>
>>>>>> Signed-off-by: Ganapatrao Kulkarni <[email protected]>
>>>>
>>>> Ganapatrao, can you please take this in consideration and if agreeing
>>>> send a v2 patch?
>>>>
>>>> With that I can add an Acked-by: wcohen, Right?
>>>>
>>>> - Arnaldo
>>>>>> ---
>>>>>> tools/perf/pmu-events/arch/arm64/mapfile.csv | 1 +
>>>>>> 1 file changed, 1 insertion(+)
>>>>>>
>>>>>> diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv b/tools/perf/pmu-events/arch/arm64/mapfile.csv
>>>>>> index e61c9ca..93c5d14 100644
>>>>>> --- a/tools/perf/pmu-events/arch/arm64/mapfile.csv
>>>>>> +++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv
>>>>>> @@ -13,4 +13,5 @@
>>>>>> #
>>>>>> #Family-model,Version,Filename,EventType
>>>>>> 0x00000000420f5160,v1,cavium,core
>>>>>> +0x00000000430f0af0,v1,cavium,core
>>>>>> 0x00000000410fd03[[:xdigit:]],v1,cortex-a53,core
>>>>>>
>>>>>
>>>>> Hi,
>>>>> Like the cortex-a53 the last digit '0' of the match for the MIDR should be replaced with [[:xdigit:]] to allow for possible future revisions of chip:
>>>
>>> for arm64 implementation, bits 3:0(Revision) and bits 23:20(Variant)
>>> are ignored/dont-care.
>>
>> Thanks for pointing that out. See the code masking out those bits in linux/toos/perf/arch/util/header.c. For the ppc64 it just copies the equivalent of the MIDR including the revision bits. Thus, the need for regular expression matching to avoid having to create a new entry for each revision.
>
> It is same for arm64 too, there is no need to add an entry for every
> revision change, need to add when part number changes.
> This patch is not intended to add entry for revision change, the fact
> of the matter is that, there is complete MIDR change (vulcan to
> thunderx2) in B0.
> as per current arm64
> implementation(.tools/perf/arch/arm64/util/header.c), it is not
> required to have any dontcare marking in mapfile for revision/variant
> bits.
>
> thanks
> Ganapat
>
>>
>> -Will
>>
>>>
>>>>>
>>>>> 0x00000000430f0af[[:xdigit:]],v1,cavium,core
>>>>>
>>>>>
>>>>> -Will Cohen
>>>>
>>>
>>> thanks
>>> Ganapat
>>>> _______________________________________________
>>>> linux-arm-kernel mailing list
>>>> [email protected]
>>>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>>

thanks
Ganapat

2018-03-09 14:35:52

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Subject: Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

Em Fri, Mar 09, 2018 at 07:57:04PM +0530, Ganapatrao Kulkarni escreveu:
> Hi Arnaldo,
>
> can you please pull-in this patch?

So everybody is Ok with this? Can I have some Acked-by: from subject
matter experts?

- Arnaldo

> On Thu, Mar 8, 2018 at 9:44 AM, Ganapatrao Kulkarni <[email protected]> wrote:
> > On Thu, Mar 8, 2018 at 12:01 AM, William Cohen <[email protected]> wrote:
> >> On 03/07/2018 12:35 PM, Ganapatrao Kulkarni wrote:
> >>> Hi Will Cohen,
> >>>
> >>> On Wed, Mar 7, 2018 at 8:08 PM, Arnaldo Carvalho de Melo
> >>> <[email protected]> wrote:
> >>>> Em Wed, Mar 07, 2018 at 09:32:05AM -0500, William Cohen escreveu:
> >>>>> On 03/07/2018 06:08 AM, Ganapatrao Kulkarni wrote:
> >>>>>> There is MIDR change on ThunderX2 B0, adding an entry to mapfile
> >>>>>> to enable JSON events for B0.
> >>>>>>
> >>>>>> Signed-off-by: Ganapatrao Kulkarni <[email protected]>
> >>>>
> >>>> Ganapatrao, can you please take this in consideration and if agreeing
> >>>> send a v2 patch?
> >>>>
> >>>> With that I can add an Acked-by: wcohen, Right?
> >>>>
> >>>> - Arnaldo
> >>>>>> ---
> >>>>>> tools/perf/pmu-events/arch/arm64/mapfile.csv | 1 +
> >>>>>> 1 file changed, 1 insertion(+)
> >>>>>>
> >>>>>> diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv b/tools/perf/pmu-events/arch/arm64/mapfile.csv
> >>>>>> index e61c9ca..93c5d14 100644
> >>>>>> --- a/tools/perf/pmu-events/arch/arm64/mapfile.csv
> >>>>>> +++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv
> >>>>>> @@ -13,4 +13,5 @@
> >>>>>> #
> >>>>>> #Family-model,Version,Filename,EventType
> >>>>>> 0x00000000420f5160,v1,cavium,core
> >>>>>> +0x00000000430f0af0,v1,cavium,core
> >>>>>> 0x00000000410fd03[[:xdigit:]],v1,cortex-a53,core
> >>>>>>
> >>>>>
> >>>>> Hi,
> >>>>> Like the cortex-a53 the last digit '0' of the match for the MIDR should be replaced with [[:xdigit:]] to allow for possible future revisions of chip:
> >>>
> >>> for arm64 implementation, bits 3:0(Revision) and bits 23:20(Variant)
> >>> are ignored/dont-care.
> >>
> >> Thanks for pointing that out. See the code masking out those bits in linux/toos/perf/arch/util/header.c. For the ppc64 it just copies the equivalent of the MIDR including the revision bits. Thus, the need for regular expression matching to avoid having to create a new entry for each revision.
> >
> > It is same for arm64 too, there is no need to add an entry for every
> > revision change, need to add when part number changes.
> > This patch is not intended to add entry for revision change, the fact
> > of the matter is that, there is complete MIDR change (vulcan to
> > thunderx2) in B0.
> > as per current arm64
> > implementation(.tools/perf/arch/arm64/util/header.c), it is not
> > required to have any dontcare marking in mapfile for revision/variant
> > bits.
> >
> > thanks
> > Ganapat
> >
> >>
> >> -Will
> >>
> >>>
> >>>>>
> >>>>> 0x00000000430f0af[[:xdigit:]],v1,cavium,core
> >>>>>
> >>>>>
> >>>>> -Will Cohen
> >>>>
> >>>
> >>> thanks
> >>> Ganapat
> >>>> _______________________________________________
> >>>> linux-arm-kernel mailing list
> >>>> [email protected]
> >>>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> >>
>
> thanks
> Ganapat

2018-03-09 15:59:31

by Will Deacon

[permalink] [raw]

Subject: Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

On Fri, Mar 09, 2018 at 11:34:15AM -0300, Arnaldo Carvalho de Melo wrote:
> Em Fri, Mar 09, 2018 at 07:57:04PM +0530, Ganapatrao Kulkarni escreveu:
> > Hi Arnaldo,
> >
> > can you please pull-in this patch?
>
> So everybody is Ok with this? Can I have some Acked-by: from subject
> matter experts?

The original patch looks fine to me:

Acked-by: Will Deacon <[email protected]>

Will

2018-03-09 17:29:32

[permalink] [raw]

Subject: Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

2018-03-09 17:34:48

[permalink] [raw]

Subject: Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

Em Fri, Mar 09, 2018 at 03:58:09PM +0000, Will Deacon escreveu:
> On Fri, Mar 09, 2018 at 11:34:15AM -0300, Arnaldo Carvalho de Melo wrote:
> > Em Fri, Mar 09, 2018 at 07:57:04PM +0530, Ganapatrao Kulkarni escreveu:
> > > Hi Arnaldo,
> > >
> > > can you please pull-in this patch?
> >
> > So everybody is Ok with this? Can I have some Acked-by: from subject
> > matter experts?
>
> The original patch looks fine to me:
>
> Acked-by: Will Deacon <[email protected]>

Ok, so, as John mentioned in another message in his thread, this
conflicts with a series he sent and that Ganapatrao acked and I already
applied, I looked at it and think this patch should turn into the patch
at the end of this message, which I'm applying with the commit log
message in the original patch in this thread, Ack?

- Arnaldo

diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv b/tools/perf/pmu-events/arch/arm64/mapfile.csv
index 8f11aeb003a9..624e8cae6e86 100644
--- a/tools/perf/pmu-events/arch/arm64/mapfile.csv
+++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv
@@ -13,5 +13,5 @@
#
#Family-model,Version,Filename,EventType
0x00000000410fd03[[:xdigit:]],v1,arm/cortex-a53,core
-0x00000000420f5160,v1,cavium/thunderx2,core
+0x00000000430f0af0,v1,cavium/thunderx2,core
0x00000000480fd010,v1,hisilicon/hip08,core

2018-03-09 17:47:19

[permalink] [raw]

Subject: Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

Hi Arnaldo,

On Fri, Mar 9, 2018 at 11:03 PM, Arnaldo Carvalho de Melo
<[email protected]> wrote:
> Em Fri, Mar 09, 2018 at 03:58:09PM +0000, Will Deacon escreveu:
>> On Fri, Mar 09, 2018 at 11:34:15AM -0300, Arnaldo Carvalho de Melo wrote:
>> > Em Fri, Mar 09, 2018 at 07:57:04PM +0530, Ganapatrao Kulkarni escreveu:
>> > > Hi Arnaldo,
>> > >
>> > > can you please pull-in this patch?
>> >
>> > So everybody is Ok with this? Can I have some Acked-by: from subject
>> > matter experts?
>>
>> The original patch looks fine to me:
>>
>> Acked-by: Will Deacon <[email protected]>
>
> Ok, so, as John mentioned in another message in his thread, this
> conflicts with a series he sent and that Ganapatrao acked and I already
> applied, I looked at it and think this patch should turn into the patch
> at the end of this message, which I'm applying with the commit log
> message in the original patch in this thread, Ack?

>
> - Arnaldo
>
> diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv b/tools/perf/pmu-events/arch/arm64/mapfile.csv
> index 8f11aeb003a9..624e8cae6e86 100644
> --- a/tools/perf/pmu-events/arch/arm64/mapfile.csv
> +++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv
> @@ -13,5 +13,5 @@
> #
> #Family-model,Version,Filename,EventType
> 0x00000000410fd03[[:xdigit:]],v1,arm/cortex-a53,core
> -0x00000000420f5160,v1,cavium/thunderx2,core
> +0x00000000430f0af0,v1,cavium/thunderx2,core
> 0x00000000480fd010,v1,hisilicon/hip08,core

please do not delete existing entry, add additional entry.
> +0x00000000430f0af0,v1,cavium/thunderx2,core

thanks
Ganapat

2018-03-09 18:02:02

[permalink] [raw]

Subject: Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

Em Fri, Mar 09, 2018 at 11:15:16PM +0530, Ganapatrao Kulkarni escreveu:
> Hi Arnaldo,
>
> On Fri, Mar 9, 2018 at 11:03 PM, Arnaldo Carvalho de Melo
> <[email protected]> wrote:
> > Em Fri, Mar 09, 2018 at 03:58:09PM +0000, Will Deacon escreveu:
> >> On Fri, Mar 09, 2018 at 11:34:15AM -0300, Arnaldo Carvalho de Melo wrote:
> >> > Em Fri, Mar 09, 2018 at 07:57:04PM +0530, Ganapatrao Kulkarni escreveu:
> >> > > Hi Arnaldo,
> >> > >
> >> > > can you please pull-in this patch?
> >> >
> >> > So everybody is Ok with this? Can I have some Acked-by: from subject
> >> > matter experts?
> >>
> >> The original patch looks fine to me:
> >>
> >> Acked-by: Will Deacon <[email protected]>
> >
> > Ok, so, as John mentioned in another message in his thread, this
> > conflicts with a series he sent and that Ganapatrao acked and I already
> > applied, I looked at it and think this patch should turn into the patch
> > at the end of this message, which I'm applying with the commit log
> > message in the original patch in this thread, Ack?
>
> >
> > - Arnaldo
> >
> > diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv b/tools/perf/pmu-events/arch/arm64/mapfile.csv
> > index 8f11aeb003a9..624e8cae6e86 100644
> > --- a/tools/perf/pmu-events/arch/arm64/mapfile.csv
> > +++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv
> > @@ -13,5 +13,5 @@
> > #
> > #Family-model,Version,Filename,EventType
> > 0x00000000410fd03[[:xdigit:]],v1,arm/cortex-a53,core
> > -0x00000000420f5160,v1,cavium/thunderx2,core
> > +0x00000000430f0af0,v1,cavium/thunderx2,core
> > 0x00000000480fd010,v1,hisilicon/hip08,core
>
> please do not delete existing entry, add additional entry.
> > +0x00000000430f0af0,v1,cavium/thunderx2,core

Ok, my bad, I think my eyes are failing me, I swear I saw them in the
original patch, which is not the case...

Ok, will add, together with Will's Acked-by

Thanks,

- Arnaldo

2018-03-09 18:04:07

[permalink] [raw]

Subject: Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

Em Fri, Mar 09, 2018 at 03:00:40PM -0300, Arnaldo Carvalho de Melo escreveu:
> Em Fri, Mar 09, 2018 at 11:15:16PM +0530, Ganapatrao Kulkarni escreveu:
> > On Fri, Mar 9, 2018 at 11:03 PM, Arnaldo Carvalho de Melo
> > > +++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv
> > > @@ -13,5 +13,5 @@
> > > #
> > > #Family-model,Version,Filename,EventType
> > > 0x00000000410fd03[[:xdigit:]],v1,arm/cortex-a53,core
> > > -0x00000000420f5160,v1,cavium/thunderx2,core
> > > +0x00000000430f0af0,v1,cavium/thunderx2,core
> > > 0x00000000480fd010,v1,hisilicon/hip08,core

> > please do not delete existing entry, add additional entry.
> > > +0x00000000430f0af0,v1,cavium/thunderx2,core

> Ok, my bad, I think my eyes are failing me, I swear I saw them in the
> original patch, which is not the case...

> Ok, will add, together with Will's Acked-by

So this is how it ended up:

commit 9245299469de2e02d9c3cb167c0e52f75f1cc180
Author: Ganapatrao Kulkarni <[email protected]>
Date: Wed Mar 7 16:38:03 2018 +0530

perf vendor events arm64: Enable JSON events for ThunderX2 B0

There is MIDR change on ThunderX2 B0, adding an entry to mapfile to
enable JSON events for B0.

Signed-off-by: Ganapatrao Kulkarni <[email protected]>
Acked-by: Will Deacon <[email protected]>
Cc: Alexander Shishkin <[email protected]>
Cc: Ganapatrao Kulkarni <[email protected]>
Cc: Jayachandran C <[email protected]>
Cc: Jiri Olsa <[email protected]>
Cc: John Garry <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Peter Zijlstra <[email protected]>
Cc: Robert Richter <[email protected]>
Cc: William Cohen <[email protected]>
Cc: [email protected]
Link: http://lkml.kernel.org/r/[email protected]
[ Fixup wrt recent patchset by John Garry ]
Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>

diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv b/tools/perf/pmu-events/arch/arm64/mapfile.csv
index 8f11aeb003a9..f03e26ecb658 100644
--- a/tools/perf/pmu-events/arch/arm64/mapfile.csv
+++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv
@@ -14,4 +14,5 @@
#Family-model,Version,Filename,EventType
0x00000000410fd03[[:xdigit:]],v1,arm/cortex-a53,core
0x00000000420f5160,v1,cavium/thunderx2,core
+0x00000000430f0af0,v1,cavium/thunderx2,core
0x00000000480fd010,v1,hisilicon/hip08,core

2018-03-09 18:08:34

[permalink] [raw]

Subject: Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

On Fri, Mar 9, 2018 at 11:32 PM, Arnaldo Carvalho de Melo
<[email protected]> wrote:
> Em Fri, Mar 09, 2018 at 03:00:40PM -0300, Arnaldo Carvalho de Melo escreveu:
>> Em Fri, Mar 09, 2018 at 11:15:16PM +0530, Ganapatrao Kulkarni escreveu:
>> > On Fri, Mar 9, 2018 at 11:03 PM, Arnaldo Carvalho de Melo
>> > > +++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv
>> > > @@ -13,5 +13,5 @@
>> > > #
>> > > #Family-model,Version,Filename,EventType
>> > > 0x00000000410fd03[[:xdigit:]],v1,arm/cortex-a53,core
>> > > -0x00000000420f5160,v1,cavium/thunderx2,core
>> > > +0x00000000430f0af0,v1,cavium/thunderx2,core
>> > > 0x00000000480fd010,v1,hisilicon/hip08,core
>
>> > please do not delete existing entry, add additional entry.
>> > > +0x00000000430f0af0,v1,cavium/thunderx2,core
>
>> Ok, my bad, I think my eyes are failing me, I swear I saw them in the
>> original patch, which is not the case...
>
>> Ok, will add, together with Will's Acked-by
>
> So this is how it ended up:
>
>
> commit 9245299469de2e02d9c3cb167c0e52f75f1cc180
> Author: Ganapatrao Kulkarni <[email protected]>
> Date: Wed Mar 7 16:38:03 2018 +0530
>
> perf vendor events arm64: Enable JSON events for ThunderX2 B0
>
> There is MIDR change on ThunderX2 B0, adding an entry to mapfile to
> enable JSON events for B0.
>
> Signed-off-by: Ganapatrao Kulkarni <[email protected]>
> Acked-by: Will Deacon <[email protected]>
> Cc: Alexander Shishkin <[email protected]>
> Cc: Ganapatrao Kulkarni <[email protected]>
> Cc: Jayachandran C <[email protected]>
> Cc: Jiri Olsa <[email protected]>
> Cc: John Garry <[email protected]>
> Cc: Mark Rutland <[email protected]>
> Cc: Peter Zijlstra <[email protected]>
> Cc: Robert Richter <[email protected]>
> Cc: William Cohen <[email protected]>
> Cc: [email protected]
> Link: http://lkml.kernel.org/r/[email protected]
> [ Fixup wrt recent patchset by John Garry ]
> Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
>
> diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv b/tools/perf/pmu-events/arch/arm64/mapfile.csv
> index 8f11aeb003a9..f03e26ecb658 100644
> --- a/tools/perf/pmu-events/arch/arm64/mapfile.csv
> +++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv
> @@ -14,4 +14,5 @@
> #Family-model,Version,Filename,EventType
> 0x00000000410fd03[[:xdigit:]],v1,arm/cortex-a53,core
> 0x00000000420f5160,v1,cavium/thunderx2,core
> +0x00000000430f0af0,v1,cavium/thunderx2,core
> 0x00000000480fd010,v1,hisilicon/hip08,core

thanks for help Arnaldo!

thanks
ganapat

2018-03-15 15:55:52

by tip-bot for Vasyl Gomonovych

[permalink] [raw]

Subject: Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

On 03/07/2018 11:14 PM, Ganapatrao Kulkarni wrote:
> On Thu, Mar 8, 2018 at 12:01 AM, William Cohen <[email protected]> wrote:
>> On 03/07/2018 12:35 PM, Ganapatrao Kulkarni wrote:
>>> Hi Will Cohen,
>>>
>>> On Wed, Mar 7, 2018 at 8:08 PM, Arnaldo Carvalho de Melo
>>> <[email protected]> wrote:
>>>> Em Wed, Mar 07, 2018 at 09:32:05AM -0500, William Cohen escreveu:
>>>>> On 03/07/2018 06:08 AM, Ganapatrao Kulkarni wrote:
>>>>>> There is MIDR change on ThunderX2 B0, adding an entry to mapfile
>>>>>> to enable JSON events for B0.
>>>>>>
>>>>>> Signed-off-by: Ganapatrao Kulkarni <[email protected]>
>>>>
>>>> Ganapatrao, can you please take this in consideration and if agreeing
>>>> send a v2 patch?
>>>>
>>>> With that I can add an Acked-by: wcohen, Right?
>>>>
>>>> - Arnaldo
>>>>>> ---
>>>>>> tools/perf/pmu-events/arch/arm64/mapfile.csv | 1 +
>>>>>> 1 file changed, 1 insertion(+)
>>>>>>
>>>>>> diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv b/tools/perf/pmu-events/arch/arm64/mapfile.csv
>>>>>> index e61c9ca..93c5d14 100644
>>>>>> --- a/tools/perf/pmu-events/arch/arm64/mapfile.csv
>>>>>> +++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv
>>>>>> @@ -13,4 +13,5 @@
>>>>>> #
>>>>>> #Family-model,Version,Filename,EventType
>>>>>> 0x00000000420f5160,v1,cavium,core
>>>>>> +0x00000000430f0af0,v1,cavium,core
>>>>>> 0x00000000410fd03[[:xdigit:]],v1,cortex-a53,core
>>>>>>
>>>>>
>>>>> Hi,
>>>>> Like the cortex-a53 the last digit '0' of the match for the MIDR should be replaced with [[:xdigit:]] to allow for possible future revisions of chip:
>>>
>>> for arm64 implementation, bits 3:0(Revision) and bits 23:20(Variant)
>>> are ignored/dont-care.
>>
>> Thanks for pointing that out. See the code masking out those bits in linux/toos/perf/arch/util/header.c. For the ppc64 it just copies the equivalent of the MIDR including the revision bits. Thus, the need for regular expression matching to avoid having to create a new entry for each revision.
>
> It is same for arm64 too, there is no need to add an entry for every
> revision change, need to add when part number changes.
> This patch is not intended to add entry for revision change, the fact
> of the matter is that, there is complete MIDR change (vulcan to
> thunderx2) in B0.
> as per current arm64
> implementation(.tools/perf/arch/arm64/util/header.c), it is not
> required to have any dontcare marking in mapfile for revision/variant
> bits.
>
> thanks
> Ganapat

Hi Ganapat,

Would it make more sense to pass the MIDR value unmodified and then use regular expressions in mapfile.csv to match the values? If an event on a particular processor revision is broken or unusable it can be excluded from the list of events with a corrected list of events. There certainly have been errata listing events that do not work on specific revisions of armv8 processor implementations.

-Will

2018-03-15 16:51:07

by John Garry

[permalink] [raw]

Subject: Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

On 15/03/2018 15:53, William Cohen wrote:
> On 03/07/2018 11:14 PM, Ganapatrao Kulkarni wrote:
>> On Thu, Mar 8, 2018 at 12:01 AM, William Cohen <[email protected]> wrote:
>>> On 03/07/2018 12:35 PM, Ganapatrao Kulkarni wrote:
>>>> Hi Will Cohen,
>>>>
>>>> On Wed, Mar 7, 2018 at 8:08 PM, Arnaldo Carvalho de Melo
>>>> <[email protected]> wrote:
>>>>> Em Wed, Mar 07, 2018 at 09:32:05AM -0500, William Cohen escreveu:
>>>>>> On 03/07/2018 06:08 AM, Ganapatrao Kulkarni wrote:
>>>>>>> There is MIDR change on ThunderX2 B0, adding an entry to mapfile
>>>>>>> to enable JSON events for B0.
>>>>>>>
>>>>>>> Signed-off-by: Ganapatrao Kulkarni <[email protected]>
>>>>>
>>>>> Ganapatrao, can you please take this in consideration and if agreeing
>>>>> send a v2 patch?
>>>>>
>>>>> With that I can add an Acked-by: wcohen, Right?
>>>>>
>>>>> - Arnaldo
>>>>>>> ---
>>>>>>> tools/perf/pmu-events/arch/arm64/mapfile.csv | 1 +
>>>>>>> 1 file changed, 1 insertion(+)
>>>>>>>
>>>>>>> diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv b/tools/perf/pmu-events/arch/arm64/mapfile.csv
>>>>>>> index e61c9ca..93c5d14 100644
>>>>>>> --- a/tools/perf/pmu-events/arch/arm64/mapfile.csv
>>>>>>> +++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv
>>>>>>> @@ -13,4 +13,5 @@
>>>>>>> #
>>>>>>> #Family-model,Version,Filename,EventType
>>>>>>> 0x00000000420f5160,v1,cavium,core
>>>>>>> +0x00000000430f0af0,v1,cavium,core
>>>>>>> 0x00000000410fd03[[:xdigit:]],v1,cortex-a53,core
>>>>>>>
>>>>>>
>>>>>> Hi,
>>>>>> Like the cortex-a53 the last digit '0' of the match for the MIDR should be replaced with [[:xdigit:]] to allow for possible future revisions of chip:
>>>>
>>>> for arm64 implementation, bits 3:0(Revision) and bits 23:20(Variant)
>>>> are ignored/dont-care.
>>>
>>> Thanks for pointing that out. See the code masking out those bits in linux/toos/perf/arch/util/header.c. For the ppc64 it just copies the equivalent of the MIDR including the revision bits. Thus, the need for regular expression matching to avoid having to create a new entry for each revision.
>>
>> It is same for arm64 too, there is no need to add an entry for every
>> revision change, need to add when part number changes.
>> This patch is not intended to add entry for revision change, the fact
>> of the matter is that, there is complete MIDR change (vulcan to
>> thunderx2) in B0.
>> as per current arm64
>> implementation(.tools/perf/arch/arm64/util/header.c), it is not
>> required to have any dontcare marking in mapfile for revision/variant
>> bits.
>>
>> thanks
>> Ganapat
>
> Hi Ganapat,
>
> Would it make more sense to pass the MIDR value unmodified and then use regular expressions in mapfile.csv to match the values? If an event on a particular processor revision is broken or unusable it can be excluded from the list of events with a corrected list of events. There certainly have been errata listing events that do not work on specific revisions of armv8 processor implementations.
>

Then there are vendors who do not always properly implemenent MIDR or
IIDRs (people who live in glass houses...).

Btw, topic originally discussed here:
https://lkml.org/lkml/2017/5/2/113

Thanks,
John

> -Will
>
>
> .
>

2018-03-20 06:29:57

[permalink] [raw]

Subject: [tip:perf/core] perf vendor events arm64: Enable JSON events for ThunderX2 B0

Commit-ID: a8685f088819d21cd5aea5de4c184de427c3625d
Gitweb: https://git.kernel.org/tip/a8685f088819d21cd5aea5de4c184de427c3625d
Author: Ganapatrao Kulkarni <[email protected]>
AuthorDate: Wed, 7 Mar 2018 16:38:03 +0530
Committer: Arnaldo Carvalho de Melo <[email protected]>
CommitDate: Fri, 16 Mar 2018 13:55:41 -0300

perf vendor events arm64: Enable JSON events for ThunderX2 B0

There is MIDR change on ThunderX2 B0, adding an entry to mapfile to
enable JSON events for B0.

Signed-off-by: Ganapatrao Kulkarni <[email protected]>
Acked-by: Will Deacon <[email protected]>
Cc: Alexander Shishkin <[email protected]>
Cc: Ganapatrao Kulkarni <[email protected]>
Cc: Jayachandran C <[email protected]>
Cc: Jiri Olsa <[email protected]>
Cc: John Garry <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Peter Zijlstra <[email protected]>
Cc: Robert Richter <[email protected]>
Cc: William Cohen <[email protected]>
Cc: [email protected]
Link: http://lkml.kernel.org/r/[email protected]
[ Fixup wrt recent patchset by John Garry ]
Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
---
tools/perf/pmu-events/arch/arm64/mapfile.csv | 1 +
1 file changed, 1 insertion(+)

diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv b/tools/perf/pmu-events/arch/arm64/mapfile.csv
index 8f11aeb003a9..f03e26ecb658 100644
--- a/tools/perf/pmu-events/arch/arm64/mapfile.csv
+++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv
@@ -14,4 +14,5 @@
#Family-model,Version,Filename,EventType
0x00000000410fd03[[:xdigit:]],v1,arm/cortex-a53,core
0x00000000420f5160,v1,cavium/thunderx2,core
+0x00000000430f0af0,v1,cavium/thunderx2,core
0x00000000480fd010,v1,hisilicon/hip08,core

2018-03-21 02:39:03