Add generic i.MX8 SoC driver along with the i.MX8MQ SoC specific code.
For now, only i.MX8MQ revision B1 is supported. For any other, i.MX8MQ
revision it will print 'unknown'.
Signed-off-by: Abel Vesa <[email protected]>
---
Changes since v1:
* added the of_node_put on free_soc failure as suggested by Stefan Agner.
* made imx8mq_soc_data const as suggested by Stefan Agner.
* also made the imx8mq_soc_data static
* marked imx8mq_soc_revision as __init
* changed the revision read-out from anatop to ocotp since the rev B1
is specified in there. For now, for i.MX8MQ only revision B1 is supported.
For any other revision, it will print the revision as unknown.
drivers/soc/imx/Makefile | 1 +
drivers/soc/imx/soc-imx8.c | 115 +++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 116 insertions(+)
create mode 100644 drivers/soc/imx/soc-imx8.c
diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
index 506a6f3..d6b529e0 100644
--- a/drivers/soc/imx/Makefile
+++ b/drivers/soc/imx/Makefile
@@ -1,2 +1,3 @@
obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
+obj-$(CONFIG_ARCH_MXC) += soc-imx8.o
diff --git a/drivers/soc/imx/soc-imx8.c b/drivers/soc/imx/soc-imx8.c
new file mode 100644
index 0000000..fc6429f
--- /dev/null
+++ b/drivers/soc/imx/soc-imx8.c
@@ -0,0 +1,115 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2019 NXP.
+ */
+
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/of_address.h>
+#include <linux/slab.h>
+#include <linux/sys_soc.h>
+#include <linux/platform_device.h>
+#include <linux/of.h>
+
+#define REV_B1 0x21
+
+#define IMX8MQ_SW_INFO_B1 0x40
+#define IMX8MQ_SW_MAGIC_B1 0xff0055aa
+
+struct imx8_soc_data {
+ char *name;
+ u32 (*soc_revision)(void);
+};
+
+static u32 __init imx8mq_soc_revision(void)
+{
+ struct device_node *np;
+ void __iomem *ocotp_base;
+ u32 magic;
+ u32 rev = 0;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,imx8mq-ocotp");
+ if (!np)
+ goto out;
+
+ ocotp_base = of_iomap(np, 0);
+ WARN_ON(!ocotp_base);
+
+ magic = readl_relaxed(ocotp_base + IMX8MQ_SW_INFO_B1);
+ if (magic == IMX8MQ_SW_MAGIC_B1)
+ rev = REV_B1;
+
+ iounmap(ocotp_base);
+
+out:
+ of_node_put(np);
+ return rev;
+}
+
+static const struct imx8_soc_data imx8mq_soc_data = {
+ .name = "i.MX8MQ",
+ .soc_revision = imx8mq_soc_revision,
+};
+
+static const struct of_device_id imx8_soc_match[] = {
+ { .compatible = "fsl,imx8mq", .data = &imx8mq_soc_data, },
+ { }
+};
+
+#define imx8_revision(soc_rev) \
+ soc_rev ? \
+ kasprintf(GFP_KERNEL, "%d.%d", (soc_rev >> 4) & 0xf, soc_rev & 0xf) : \
+ "unknown"
+
+static int __init imx8_soc_init(void)
+{
+ struct soc_device_attribute *soc_dev_attr;
+ struct soc_device *soc_dev;
+ struct device_node *root;
+ const struct of_device_id *id;
+ u32 soc_rev = 0;
+ const struct imx8_soc_data *data;
+ int ret;
+
+ soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
+ if (!soc_dev_attr)
+ return -ENODEV;
+
+ soc_dev_attr->family = "Freescale i.MX";
+
+ root = of_find_node_by_path("/");
+ ret = of_property_read_string(root, "model", &soc_dev_attr->machine);
+ if (ret)
+ goto free_soc;
+
+ id = of_match_node(imx8_soc_match, root);
+ if (!id)
+ goto free_soc;
+
+ of_node_put(root);
+
+ data = id->data;
+ if (data) {
+ soc_dev_attr->soc_id = data->name;
+ if (data->soc_revision)
+ soc_rev = data->soc_revision();
+ }
+
+ soc_dev_attr->revision = imx8_revision(soc_rev);
+ if (!soc_dev_attr->revision)
+ goto free_soc;
+
+ soc_dev = soc_device_register(soc_dev_attr);
+ if (IS_ERR(soc_dev))
+ goto free_rev;
+
+ return 0;
+
+free_rev:
+ kfree(soc_dev_attr->revision);
+free_soc:
+ kfree(soc_dev_attr);
+ of_node_put(root);
+ return -ENODEV;
+}
+device_initcall(imx8_soc_init);
--
2.7.4
On Tue, 26 Feb 2019 at 10:53, Abel Vesa <[email protected]> wrote:
> Add generic i.MX8 SoC driver along with the i.MX8MQ SoC specific code.
> For now, only i.MX8MQ revision B1 is supported. For any other, i.MX8MQ
> revision it will print 'unknown'.
>
> Signed-off-by: Abel Vesa <[email protected]>
Tested on i.MX8MQ-EVK. No idea what i.MX8MQ revision I've got on my
board, but it shows 'unknown' for me.
Tested-by: Chris Spencer <[email protected]>
Thanks,
Chris
On Tue, 2019-02-26 at 10:53 +0000, Abel Vesa wrote:
> Add generic i.MX8 SoC driver along with the i.MX8MQ SoC specific code.
> For now, only i.MX8MQ revision B1 is supported. For any other, i.MX8MQ
> revision it will print 'unknown'.
>
> + np = of_find_compatible_node(NULL, NULL, "fsl,imx8mq-ocotp");
> + if (!np)
> + goto out;
> +
> + ocotp_base = of_iomap(np, 0);
> + WARN_ON(!ocotp_base);
> +
> + magic = readl_relaxed(ocotp_base + IMX8MQ_SW_INFO_B1);
> + if (magic == IMX8MQ_SW_MAGIC_B1)
> + rev = REV_B1;
Turns out that imx8mq version determination is uniquely messy. I think
we should try to print the revision number even for older chips so that
we know how old they are, but this code can be enhanced in later
patches.
In the vendor tree we handle this with a SIP call to ATF, it's not
clear why we shouldn't just upstream that (in both ATF and Linux).
Also, there are some imx soc revision declarations in
include/soc/imx/revision.h. Those are implemented in arch/arm/mach-imx
for older chips, would it make sense for soc-imx8 to define
imx_get_soc_revision?
--
Regards,
Leonard
On Tue, Feb 26, 2019 at 7:53 AM Abel Vesa <[email protected]> wrote:
> + magic = readl_relaxed(ocotp_base + IMX8MQ_SW_INFO_B1);
> + if (magic == IMX8MQ_SW_MAGIC_B1)
> + rev = REV_B1;
Don't you mean rev == REV_B1; ?
On Tue, Feb 26, 2019 at 10:37 AM Fabio Estevam <[email protected]> wrote:
>
> On Tue, Feb 26, 2019 at 7:53 AM Abel Vesa <[email protected]> wrote:
>
> > + magic = readl_relaxed(ocotp_base + IMX8MQ_SW_INFO_B1);
> > + if (magic == IMX8MQ_SW_MAGIC_B1)
> > + rev = REV_B1;
>
> Don't you mean rev == REV_B1; ?
Ops, was looking at the wrong line, sorry :-)
On 19-02-26 13:34:52, Leonard Crestez wrote:
> On Tue, 2019-02-26 at 10:53 +0000, Abel Vesa wrote:
> > Add generic i.MX8 SoC driver along with the i.MX8MQ SoC specific code.
> > For now, only i.MX8MQ revision B1 is supported. For any other, i.MX8MQ
> > revision it will print 'unknown'.
> >
> > + np = of_find_compatible_node(NULL, NULL, "fsl,imx8mq-ocotp");
> > + if (!np)
> > + goto out;
> > +
> > + ocotp_base = of_iomap(np, 0);
> > + WARN_ON(!ocotp_base);
> > +
> > + magic = readl_relaxed(ocotp_base + IMX8MQ_SW_INFO_B1);
> > + if (magic == IMX8MQ_SW_MAGIC_B1)
> > + rev = REV_B1;
>
> Turns out that imx8mq version determination is uniquely messy. I think
> we should try to print the revision number even for older chips so that
> we know how old they are, but this code can be enhanced in later
> patches.
>
Fair enough. I believe we should stick to B1 only for now though.
> In the vendor tree we handle this with a SIP call to ATF, it's not
> clear why we shouldn't just upstream that (in both ATF and Linux).
>
Question here is: do we need to go through psci for things like revision ?
I believe the cost is not worth it.
> Also, there are some imx soc revision declarations in
> include/soc/imx/revision.h. Those are implemented in arch/arm/mach-imx
> for older chips, would it make sense for soc-imx8 to define
> imx_get_soc_revision?
>
I'm totally against the use of imx_get_soc_revision everywhere. Plus,
according to our internal tree there doens't seem to indicate a need for
such a thing for imx8. Anyway, that can be added later on if necessary.
> --
> Regards,
> Leonard
On Wed, 2019-02-27 at 08:41 +0000, Abel Vesa wrote:
> On 19-02-26 13:34:52, Leonard Crestez wrote:
> > On Tue, 2019-02-26 at 10:53 +0000, Abel Vesa wrote:
> > > Add generic i.MX8 SoC driver along with the i.MX8MQ SoC specific code.
> > > For now, only i.MX8MQ revision B1 is supported. For any other, i.MX8MQ
> > > revision it will print 'unknown'.
> > >
> > > + np = of_find_compatible_node(NULL, NULL, "fsl,imx8mq-ocotp");
> > > + if (!np)
> > > + goto out;
> > > +
> > > + ocotp_base = of_iomap(np, 0);
> > > + WARN_ON(!ocotp_base);
> > > +
> > > + magic = readl_relaxed(ocotp_base + IMX8MQ_SW_INFO_B1);
> > > + if (magic == IMX8MQ_SW_MAGIC_B1)
> > > + rev = REV_B1;
> >
> > Turns out that imx8mq version determination is uniquely messy. I think
> > we should try to print the revision number even for older chips so that
> > we know how old they are, but this code can be enhanced in later
> > patches.
>
> Fair enough. I believe we should stick to B1 only for now though.
Yes, people who want their old SOC revisions to be be detected can
submit later patches.