The pinmuxing for the enable pin of the usbh1 node is wrong. It needs to
be muxed as GPIO. While at it, move the pinctrl to the vbus regulator
since it is actually the regulator enable pin.
Signed-off-by: Stefan Riedmueller <[email protected]>
---
Changes in v2:
- Use default pad ctl value instead of 0x80000000
arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
index 7a1e53195785..9f39c926cc08 100644
--- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
@@ -31,6 +31,8 @@ reg_usb_otg_vbus: regulator@0 {
reg_usb_h1_vbus: regulator@1 {
compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbh1_vbus>;
reg = <1>;
regulator-name = "usb_h1_vbus";
regulator-min-microvolt = <5000000>;
@@ -328,9 +330,9 @@ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
>;
};
- pinctrl_usbh1: usbh1grp {
+ pinctrl_usbh1_vbus: usbh1vbusgrp {
fsl,pins = <
- MX6QDL_PAD_GPIO_0__USB_H1_PWR 0x80000000
+ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
>;
};
@@ -415,8 +417,6 @@ &uart4 {
&usbh1 {
vbus-supply = <®_usb_h1_vbus>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usbh1>;
status = "disabled";
};
--
2.25.1
Setting the vmmc supplies is crucial since otherwise the supplying
regulators get disabled and the SD interfaces are no longer powered
which leads to system failures if the system is booted from that SD
interface.
Fixes: 1e44d3f880d5 ("ARM i.MX6Q: dts: Enable I2C1 with EEPROM and PMIC on Phytec phyFLEX-i.MX6 Ouad module")
Signed-off-by: Stefan Riedmueller <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
---
Changes in v2:
- Added fixes tag
- Added reviewed-by
arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
index 9f39c926cc08..cafbd3d1064d 100644
--- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
@@ -433,6 +433,7 @@ &usdhc2 {
pinctrl-0 = <&pinctrl_usdhc2>;
cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+ vmmc-supply = <&vdd_sd1_reg>;
status = "disabled";
};
@@ -442,5 +443,6 @@ &usdhc3 {
&pinctrl_usdhc3_cdwp>;
cd-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
+ vmmc-supply = <&vdd_sd0_reg>;
status = "disabled";
};
--
2.25.1
Due to a hardware bug preventing the correct detection if the ID pin
the USB OTG port cannot be used in otg mode. It can either be set to
host or peripheral. Set it to peripheral so vbus is disabled by default.
Signed-off-by: Stefan Riedmueller <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
---
Changes in v2:
- Added reviewed-by
arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi
index d434868e870a..b2f78b4362cb 100644
--- a/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi
@@ -164,6 +164,7 @@ &usbh1 {
&usbotg {
status = "okay";
+ dr_mode = "peripheral";
};
&usdhc2 {
--
2.25.1
Hi Stefan,
On Mon, Mar 29, 2021 at 10:01 AM Stefan Riedmueller
<[email protected]> wrote:
>
> The pinmuxing for the enable pin of the usbh1 node is wrong. It needs to
> be muxed as GPIO. While at it, move the pinctrl to the vbus regulator
> since it is actually the regulator enable pin.
>
> Signed-off-by: Stefan Riedmueller <[email protected]>
Thanks for the respin:
Reviewed-by: Fabio Estevam <[email protected]>
On Mon, Mar 29, 2021 at 03:01:01PM +0200, Stefan Riedmueller wrote:
> The pinmuxing for the enable pin of the usbh1 node is wrong. It needs to
> be muxed as GPIO. While at it, move the pinctrl to the vbus regulator
> since it is actually the regulator enable pin.
>
> Signed-off-by: Stefan Riedmueller <[email protected]>
Applied all, thanks.