Hello all,
the following two patches add a property in devicetree
to enable warm reset on PMIC_RST_B pin assertion.
kr
---
v2 ---> v3:
- split patch in two: bindings patch comes first
- add missing mailing lists and maintainers
- remove underscore in property name
v1 ---> v2:
- Fix email addresses
Fabio Aiuto (2):
regulator: dt-bindings: pca9450: add PMIC_RST_B warm reset property
regulator: pca9450: make warm reset on PMIC_RST_B assertion
.../bindings/regulator/nxp,pca9450-regulator.yaml | 6 ++++++
drivers/regulator/pca9450-regulator.c | 11 ++++++++---
include/linux/regulator/pca9450.h | 6 ++++++
3 files changed, 20 insertions(+), 3 deletions(-)
--
2.34.1
The default configuration of the PMIC behavior makes the PMIC
power cycle most regulators on PMIC_RST_B assertion. This power
cycling causes the memory contents of OCRAM to be lost.
Some systems needs some memory that survives reset and
reboot, therefore this patch is created.
This patch extends commit 2364a64d0673 ("regulator: pca9450:
Make warm reset on WDOG_B assertion") to the other reset
input source PMIC_RST_B as per pmic specs.
Cc: Matteo Lisi <[email protected]>
Cc: Mirko Ardinghi <[email protected]>
Signed-off-by: Fabio Aiuto <[email protected]>
---
drivers/regulator/pca9450-regulator.c | 11 ++++++++---
include/linux/regulator/pca9450.h | 6 ++++++
2 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/drivers/regulator/pca9450-regulator.c b/drivers/regulator/pca9450-regulator.c
index be488c5dff14..3a7f238de1a5 100644
--- a/drivers/regulator/pca9450-regulator.c
+++ b/drivers/regulator/pca9450-regulator.c
@@ -999,11 +999,16 @@ static int pca9450_i2c_probe(struct i2c_client *i2c)
else
reset_ctrl = WDOG_B_CFG_COLD_LDO12;
- /* Set reset behavior on assertion of WDOG_B signal */
+ if (of_property_read_bool(i2c->dev.of_node, "nxp,pmic-rst-b-warm-reset"))
+ reset_ctrl |= PMIC_RST_CFG_WARM;
+ else
+ reset_ctrl |= PMIC_RST_CFG_COLD_LDO12;
+
+ /* Set reset behavior on assertion of WDOG_B/PMIC_RST_B signal */
ret = regmap_update_bits(pca9450->regmap, PCA9450_REG_RESET_CTRL,
- WDOG_B_CFG_MASK, reset_ctrl);
+ WDOG_B_CFG_MASK | PMIC_RST_CFG_MASK, reset_ctrl);
if (ret) {
- dev_err(&i2c->dev, "Failed to set WDOG_B reset behavior\n");
+ dev_err(&i2c->dev, "Failed to set WDOG_B/PMIC_RST_B reset behavior\n");
return ret;
}
diff --git a/include/linux/regulator/pca9450.h b/include/linux/regulator/pca9450.h
index 243633c8dceb..d87f0b410b00 100644
--- a/include/linux/regulator/pca9450.h
+++ b/include/linux/regulator/pca9450.h
@@ -227,6 +227,12 @@ enum {
#define WDOG_B_CFG_COLD_LDO12 0x80
#define WDOG_B_CFG_COLD 0xC0
+#define PMIC_RST_CFG_MASK 0x30
+#define PMIC_RST_CFG_NONE 0x00
+#define PMIC_RST_CFG_WARM 0x10
+#define PMIC_RST_CFG_COLD_LDO12 0x20
+#define PMIC_RST_CFG_COLD 0x30
+
/* PCA9450_REG_CONFIG2 bits */
#define I2C_LT_MASK 0x03
#define I2C_LT_FORCE_DISABLE 0x00
--
2.34.1
Add property to trigger warm reset on PMIC_RST_B assertion
Cc: Matteo Lisi <[email protected]>
Cc: Mirko Ardinghi <[email protected]>
Signed-off-by: Fabio Aiuto <[email protected]>
---
.../bindings/regulator/nxp,pca9450-regulator.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml b/Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml
index 849bfa50bdba..865b259dac37 100644
--- a/Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml
+++ b/Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml
@@ -93,6 +93,12 @@ properties:
When WDOG_B signal is asserted a warm reset will be done instead of cold
reset.
+ nxp,pmic-rst-b-warm-reset:
+ type: boolean
+ description:
+ When PMIC_RST_B signal is asserted a warm reset will be done instead of cold
+ reset.
+
required:
- compatible
- reg
--
2.34.1
On 11/04/2024 18:58, Fabio Aiuto wrote:
> Add property to trigger warm reset on PMIC_RST_B assertion
>
That's rather vague and does not tell me much why this is supposed to be
board level configuration. It sounds more like a debugging feature:
during development you want to retain memory contents for pstore etc.
Then I could imagine this should be turned runtime, e.g. via
sysfs/debugfs, because for example you want to start inspecting a
customer's device.
Best regards,
Krzysztof
Dear Krzysztof,
Il Thu, Apr 11, 2024 at 09:52:12PM +0200, Krzysztof Kozlowski ha scritto:
> On 11/04/2024 18:58, Fabio Aiuto wrote:
> > Add property to trigger warm reset on PMIC_RST_B assertion
> >
>
> That's rather vague and does not tell me much why this is supposed to be
> board level configuration. It sounds more like a debugging feature:
> during development you want to retain memory contents for pstore etc.
> Then I could imagine this should be turned runtime, e.g. via
> sysfs/debugfs, because for example you want to start inspecting a
> customer's device.
thanks, I spent too few time writing this commit log and I apologize
for that. I was thinking about something like:
The default configuration of the PMIC behavior makes the PMIC
power cycle most regulators on PMIC_RST_B assertion. This power
cycling causes the memory contents of OCRAM to be lost.
Some systems needs some memory that survives reset and
reboot, therefore add a property to tell PMIC_RST_B is
wired.
The actual configuration is made at probe time, anyway we need
to override the default behavior of the pmic to get a warm reset
everytime the PMIC_RST_B pin is asserted and this property tells
us that "something is wired to that pin" and "it has to behave
that way on pin assertion". Our use cases do not meet the need
of further runtime configuration change.
Maybe this patchset is a simple starting point...
kindly waiting for you reply before submitting v4.
best regards,
fabio
>
> Best regards,
> Krzysztof
>
On 12/04/2024 09:21, Fabio Aiuto wrote:
> Dear Krzysztof,
>
> Il Thu, Apr 11, 2024 at 09:52:12PM +0200, Krzysztof Kozlowski ha scritto:
>> On 11/04/2024 18:58, Fabio Aiuto wrote:
>>> Add property to trigger warm reset on PMIC_RST_B assertion
>>>
>>
>> That's rather vague and does not tell me much why this is supposed to be
>> board level configuration. It sounds more like a debugging feature:
>> during development you want to retain memory contents for pstore etc.
>> Then I could imagine this should be turned runtime, e.g. via
>> sysfs/debugfs, because for example you want to start inspecting a
>> customer's device.
>
> thanks, I spent too few time writing this commit log and I apologize
> for that. I was thinking about something like:
>
> The default configuration of the PMIC behavior makes the PMIC
> power cycle most regulators on PMIC_RST_B assertion. This power
> cycling causes the memory contents of OCRAM to be lost.
> Some systems needs some memory that survives reset and
> reboot, therefore add a property to tell PMIC_RST_B is
> wired.
>
> The actual configuration is made at probe time, anyway we need
> to override the default behavior of the pmic to get a warm reset
> everytime the PMIC_RST_B pin is asserted and this property tells
> us that "something is wired to that pin" and "it has to behave
> that way on pin assertion". Our use cases do not meet the need
> of further runtime configuration change.
What is the use case?
Sorry, you did not bring any further argument why this is board
specific. And please don't explain how probing works, but address the
problem here: why type of reset is specific to board design. To me it is
OS policy.
Best regards,
Krzysztof
Dear Krzysztof,
Il Sat, Apr 13, 2024 at 12:58:35PM +0200, Krzysztof Kozlowski ha scritto:
> On 12/04/2024 09:21, Fabio Aiuto wrote:
> > Dear Krzysztof,
> >
> > Il Thu, Apr 11, 2024 at 09:52:12PM +0200, Krzysztof Kozlowski ha scritto:
> >> On 11/04/2024 18:58, Fabio Aiuto wrote:
> >>> Add property to trigger warm reset on PMIC_RST_B assertion
> >>>
> >>
> >> That's rather vague and does not tell me much why this is supposed to be
> >> board level configuration. It sounds more like a debugging feature:
> >> during development you want to retain memory contents for pstore etc.
> >> Then I could imagine this should be turned runtime, e.g. via
> >> sysfs/debugfs, because for example you want to start inspecting a
> >> customer's device.
> >
> > thanks, I spent too few time writing this commit log and I apologize
> > for that. I was thinking about something like:
> >
> > The default configuration of the PMIC behavior makes the PMIC
> > power cycle most regulators on PMIC_RST_B assertion. This power
> > cycling causes the memory contents of OCRAM to be lost.
> > Some systems needs some memory that survives reset and
> > reboot, therefore add a property to tell PMIC_RST_B is
> > wired.
> >
> > The actual configuration is made at probe time, anyway we need
> > to override the default behavior of the pmic to get a warm reset
> > everytime the PMIC_RST_B pin is asserted and this property tells
> > us that "something is wired to that pin" and "it has to behave
> > that way on pin assertion". Our use cases do not meet the need
> > of further runtime configuration change.
>
> What is the use case?
I just have an external power button connected to that pin, it works
either with warm reset and cold-reset-except-ldo12. Moreover the default behavior
is cold reset and not reset-disabled. Anyway I thought it was useful for other
people to add a property selecting behavior for that pin too as was done for
WDOG_B. That's why I mainly duplicated the logic. If there is a pin adding a
reset source it's a good point to provide a way to access the register bits
related to this signal.
>
> Sorry, you did not bring any further argument why this is board
> specific. And please don't explain how probing works, but address the
> problem here: why type of reset is specific to board design. To me it is
> OS policy.
>
Why reset type is specific to board design? I'm sorry but I don't know
what you mean, as said my intention was to enlarge the number of configurable
bits in pca9450 register space hoping this would be useful for someone.
All I can say is that is specific to board design for the same reason the
wdog_b- reset type was specific to board design.
Thank you for your time,
fabio
> Best regards,
> Krzysztof
>
On 13/04/2024 19:10, Fabio Aiuto wrote:
> Dear Krzysztof,
>
> Il Sat, Apr 13, 2024 at 12:58:35PM +0200, Krzysztof Kozlowski ha scritto:
>> On 12/04/2024 09:21, Fabio Aiuto wrote:
>>> Dear Krzysztof,
>>>
>>> Il Thu, Apr 11, 2024 at 09:52:12PM +0200, Krzysztof Kozlowski ha scritto:
>>>> On 11/04/2024 18:58, Fabio Aiuto wrote:
>>>>> Add property to trigger warm reset on PMIC_RST_B assertion
>>>>>
>>>>
>>>> That's rather vague and does not tell me much why this is supposed to be
>>>> board level configuration. It sounds more like a debugging feature:
>>>> during development you want to retain memory contents for pstore etc.
>>>> Then I could imagine this should be turned runtime, e.g. via
>>>> sysfs/debugfs, because for example you want to start inspecting a
>>>> customer's device.
>>>
>>> thanks, I spent too few time writing this commit log and I apologize
>>> for that. I was thinking about something like:
>>>
>>> The default configuration of the PMIC behavior makes the PMIC
>>> power cycle most regulators on PMIC_RST_B assertion. This power
>>> cycling causes the memory contents of OCRAM to be lost.
>>> Some systems needs some memory that survives reset and
>>> reboot, therefore add a property to tell PMIC_RST_B is
>>> wired.
>>>
>>> The actual configuration is made at probe time, anyway we need
>>> to override the default behavior of the pmic to get a warm reset
>>> everytime the PMIC_RST_B pin is asserted and this property tells
>>> us that "something is wired to that pin" and "it has to behave
>>> that way on pin assertion". Our use cases do not meet the need
>>> of further runtime configuration change.
>>
>> What is the use case?
>
> I just have an external power button connected to that pin, it works
> either with warm reset and cold-reset-except-ldo12. Moreover the default behavior
> is cold reset and not reset-disabled. Anyway I thought it was useful for other
> people to add a property selecting behavior for that pin too as was done for
> WDOG_B. That's why I mainly duplicated the logic. If there is a pin adding a
> reset source it's a good point to provide a way to access the register bits
> related to this signal.
I don't understand what is the use case. You wrote runtime does not
solve your use case. What is the use case?
>
>>
>> Sorry, you did not bring any further argument why this is board
>> specific. And please don't explain how probing works, but address the
>> problem here: why type of reset is specific to board design. To me it is
>> OS policy.
>>
>
> Why reset type is specific to board design? I'm sorry but I don't know
> what you mean, as said my intention was to enlarge the number of configurable
> bits in pca9450 register space hoping this would be useful for someone.
>
> All I can say is that is specific to board design for the same reason the
> wdog_b- reset type was specific to board design.
Specific to board design means different boards have somehow different
configuration/schematics/layout/hardware meaning they need this property
to configure device differently.
I already said it implicitly, but let's reiterate: Devicetree is for
hardware properties, not OS policies.
I also said, so repeating the same argument, the choice how you want to
reboot the system based on button press, sounds like debugging choice
thus runtime suits better.
Unless you want to say there are two signals and you want to configure
them differently? But that's your job to explain it, not mine.
Best regards,
Krzysztof
Dear Krzysztof,
Il Sat, Apr 13, 2024 at 11:40:18PM +0200, Krzysztof Kozlowski ha scritto:
> On 13/04/2024 19:10, Fabio Aiuto wrote:
> > Dear Krzysztof,
> >
> > Il Sat, Apr 13, 2024 at 12:58:35PM +0200, Krzysztof Kozlowski ha scritto:
> >> On 12/04/2024 09:21, Fabio Aiuto wrote:
> >>> Dear Krzysztof,
> >>>
> >>> Il Thu, Apr 11, 2024 at 09:52:12PM +0200, Krzysztof Kozlowski ha scritto:
> >>>> On 11/04/2024 18:58, Fabio Aiuto wrote:
<snip>
> I don't understand what is the use case. You wrote runtime does not
> solve your use case. What is the use case?
We experimented problems on some boards with SD card, if a cold reset
is done when the card is powered back on it completely freezes, the way
devices behave when unpowered for such short intervals is design specific,
not an OS policy.
kr,
fabio
> >
> >>
> >> Sorry, you did not bring any further argument why this is board
> >> specific. And please don't explain how probing works, but address the
> >> problem here: why type of reset is specific to board design. To me it is
> >> OS policy.
> >>
> >
> > Why reset type is specific to board design? I'm sorry but I don't know
> > what you mean, as said my intention was to enlarge the number of configurable
> > bits in pca9450 register space hoping this would be useful for someone.
> >
> > All I can say is that is specific to board design for the same reason the
> > wdog_b- reset type was specific to board design.
>
> Specific to board design means different boards have somehow different
> configuration/schematics/layout/hardware meaning they need this property
> to configure device differently.
>
> I already said it implicitly, but let's reiterate: Devicetree is for
> hardware properties, not OS policies.
>
> I also said, so repeating the same argument, the choice how you want to
> reboot the system based on button press, sounds like debugging choice
> thus runtime suits better.
>
> Unless you want to say there are two signals and you want to configure
> them differently? But that's your job to explain it, not mine.
please see above,
kr,
fabio
>
> Best regards,
> Krzysztof
>
On 15/04/2024 12:59, Fabio Aiuto wrote:
> Dear Krzysztof,
>
> Il Sat, Apr 13, 2024 at 11:40:18PM +0200, Krzysztof Kozlowski ha scritto:
>> On 13/04/2024 19:10, Fabio Aiuto wrote:
>>> Dear Krzysztof,
>>>
>>> Il Sat, Apr 13, 2024 at 12:58:35PM +0200, Krzysztof Kozlowski ha scritto:
>>>> On 12/04/2024 09:21, Fabio Aiuto wrote:
>>>>> Dear Krzysztof,
>>>>>
>>>>> Il Thu, Apr 11, 2024 at 09:52:12PM +0200, Krzysztof Kozlowski ha scritto:
>>>>>> On 11/04/2024 18:58, Fabio Aiuto wrote:
> <snip>
>> I don't understand what is the use case. You wrote runtime does not
>> solve your use case. What is the use case?
>
> We experimented problems on some boards with SD card, if a cold reset
> is done when the card is powered back on it completely freezes, the way
> devices behave when unpowered for such short intervals is design specific,
> not an OS policy.
>
Then describe the actual hardware issue, not instruct OS how to behave.
In the property name and description.
Best regards,
Krzysztof
Dear Krzysztof,
Il Thu, May 02, 2024 at 09:54:29AM +0200, Krzysztof Kozlowski ha scritto:
> On 15/04/2024 12:59, Fabio Aiuto wrote:
> > Dear Krzysztof,
> >
> > Il Sat, Apr 13, 2024 at 11:40:18PM +0200, Krzysztof Kozlowski ha scritto:
> >> On 13/04/2024 19:10, Fabio Aiuto wrote:
> >>> Dear Krzysztof,
> >>>
> >>> Il Sat, Apr 13, 2024 at 12:58:35PM +0200, Krzysztof Kozlowski ha scritto:
> >>>> On 12/04/2024 09:21, Fabio Aiuto wrote:
> >>>>> Dear Krzysztof,
> >>>>>
> >>>>> Il Thu, Apr 11, 2024 at 09:52:12PM +0200, Krzysztof Kozlowski ha scritto:
> >>>>>> On 11/04/2024 18:58, Fabio Aiuto wrote:
> > <snip>
> >> I don't understand what is the use case. You wrote runtime does not
> >> solve your use case. What is the use case?
> >
> > We experimented problems on some boards with SD card, if a cold reset
> > is done when the card is powered back on it completely freezes, the way
> > devices behave when unpowered for such short intervals is design specific,
> > not an OS policy.
> >
>
> Then describe the actual hardware issue, not instruct OS how to behave.
> In the property name and description.
Unfortunately we don't know the details of the hardware issue at the moment.
kr,
fabio
>
> Best regards,
> Krzysztof
>