2022-09-13 00:51:55

by Pawan Gupta

[permalink] [raw]
Subject: [PATCH 0/3] Check enumeration before MSR save/restore

Hi,

This patchset is to fix the "unchecked MSR access error" [1] during S3
resume. Patch 1/3 adds a feature bit for MSR_IA32_TSX_CTRL.

Patch 2/3 adds a feature bit for MSR_AMD64_LS_CFG.

Patch 3/3 adds check for feature bit before adding any speculation
control MSR to the list of MSRs to save/restore.

[1] https://lore.kernel.org/lkml/[email protected]/

Pawan Gupta (3):
x86/tsx: Add feature bit for TSX control MSR support
x86/cpu/amd: Add feature bit for MSR_AMD64_LS_CFG enumeration
x86/pm: Add enumeration check before spec MSRs save/restore setup

arch/x86/include/asm/cpufeatures.h | 2 ++
arch/x86/kernel/cpu/amd.c | 3 +++
arch/x86/kernel/cpu/tsx.c | 30 +++++++++++++++---------------
arch/x86/power/cpu.c | 23 ++++++++++++++++-------
4 files changed, 36 insertions(+), 22 deletions(-)


base-commit: 80e78fcce86de0288793a0ef0f6acf37656ee4cf
--
2.37.2



2022-09-13 00:58:33

by Pawan Gupta

[permalink] [raw]
Subject: Re: [PATCH 0/3] Check enumeration before MSR save/restore

On Mon, Sep 12, 2022 at 04:38:44PM -0700, Pawan Gupta wrote:
> Hi,
>
> This patchset is to fix the "unchecked MSR access error" [1] during S3
> resume. Patch 1/3 adds a feature bit for MSR_IA32_TSX_CTRL.
>
> Patch 2/3 adds a feature bit for MSR_AMD64_LS_CFG.
>
> Patch 3/3 adds check for feature bit before adding any speculation
> control MSR to the list of MSRs to save/restore.
>
> [1] https://lore.kernel.org/lkml/[email protected]/

Added the correct email-id of Hans de Goede <[email protected]>.

2022-09-17 12:05:16

by Hans de Goede

[permalink] [raw]
Subject: Re: [PATCH 0/3] Check enumeration before MSR save/restore

Hi,

On 9/13/22 02:50, Pawan Gupta wrote:
> On Mon, Sep 12, 2022 at 04:38:44PM -0700, Pawan Gupta wrote:
>> Hi,
>>
>> This patchset is to fix the "unchecked MSR access error" [1] during S3
>> resume. Patch 1/3 adds a feature bit for MSR_IA32_TSX_CTRL.
>>
>> Patch 2/3 adds a feature bit for MSR_AMD64_LS_CFG.
>>
>> Patch 3/3 adds check for feature bit before adding any speculation
>> control MSR to the list of MSRs to save/restore.
>>
>> [1] https://lore.kernel.org/lkml/[email protected]/
>
> Added the correct email-id of Hans de Goede <[email protected]>.

I have tested this series and I can confirm that it fixes the exception
which I was seeing on a Packard Bell Dot SC with an Atom N2600 CPU:

Tested-by: Hans de Goede <[email protected]>

Regards,

Hans

2022-09-19 18:08:11

by Pawan Gupta

[permalink] [raw]
Subject: Re: [PATCH 0/3] Check enumeration before MSR save/restore

On Sat, Sep 17, 2022 at 01:42:13PM +0200, Hans de Goede wrote:
> Hi,
>
> On 9/13/22 02:50, Pawan Gupta wrote:
> > On Mon, Sep 12, 2022 at 04:38:44PM -0700, Pawan Gupta wrote:
> >> Hi,
> >>
> >> This patchset is to fix the "unchecked MSR access error" [1] during S3
> >> resume. Patch 1/3 adds a feature bit for MSR_IA32_TSX_CTRL.
> >>
> >> Patch 2/3 adds a feature bit for MSR_AMD64_LS_CFG.
> >>
> >> Patch 3/3 adds check for feature bit before adding any speculation
> >> control MSR to the list of MSRs to save/restore.
> >>
> >> [1] https://lore.kernel.org/lkml/[email protected]/
> >
> > Added the correct email-id of Hans de Goede <[email protected]>.
>
> I have tested this series and I can confirm that it fixes the exception
> which I was seeing on a Packard Bell Dot SC with an Atom N2600 CPU:
>
> Tested-by: Hans de Goede <[email protected]>

Thanks.

2022-11-08 18:38:43

by Borislav Petkov

[permalink] [raw]
Subject: Re: [PATCH 0/3] Check enumeration before MSR save/restore

On Tue, Nov 08, 2022 at 07:16:00PM +0100, Hans de Goede wrote:
> What is the status of this series ?

Lost in the avalanche of patches. ;-\

Will take a look tomorrow.

--
Regards/Gruss,
Boris.

https://people.kernel.org/tglx/notes-about-netiquette

2022-11-08 19:10:54

by Hans de Goede

[permalink] [raw]
Subject: Re: [PATCH 0/3] Check enumeration before MSR save/restore

Hi All,

On 9/13/22 01:38, Pawan Gupta wrote:
> Hi,
>
> This patchset is to fix the "unchecked MSR access error" [1] during S3
> resume. Patch 1/3 adds a feature bit for MSR_IA32_TSX_CTRL.
>
> Patch 2/3 adds a feature bit for MSR_AMD64_LS_CFG.
>
> Patch 3/3 adds check for feature bit before adding any speculation
> control MSR to the list of MSRs to save/restore.
>
> [1] https://lore.kernel.org/lkml/[email protected]/
>
> Pawan Gupta (3):
> x86/tsx: Add feature bit for TSX control MSR support
> x86/cpu/amd: Add feature bit for MSR_AMD64_LS_CFG enumeration
> x86/pm: Add enumeration check before spec MSRs save/restore setup

What is the status of this series ?

To me this seems like a sensible way to solve the problem which
I reported and other similar problems...

Regards,

Hans


2022-11-08 19:30:24

by Borislav Petkov

[permalink] [raw]
Subject: Re: [PATCH 0/3] Check enumeration before MSR save/restore

On Tue, Nov 08, 2022 at 07:26:43PM +0100, Borislav Petkov wrote:
> Will take a look tomorrow.

Yap, needs a new revision.

--
Regards/Gruss,
Boris.

https://people.kernel.org/tglx/notes-about-netiquette

2022-11-08 22:53:25

by Pawan Gupta

[permalink] [raw]
Subject: Re: [PATCH 0/3] Check enumeration before MSR save/restore

On Tue, Nov 08, 2022 at 07:55:04PM +0100, Borislav Petkov wrote:
>On Tue, Nov 08, 2022 at 07:26:43PM +0100, Borislav Petkov wrote:
>> Will take a look tomorrow.
>
>Yap, needs a new revision.

Sure, I will revise this.