2023-05-21 22:57:22

by Manikanta Mylavarapu

[permalink] [raw]
Subject: [PATCH V2 00/13] Add multipd remoteproc support

APSS brings Q6 out of reset and then Q6 brings
WCSS block (wifi radio's) out of reset.

---------------
--> |WiFi 2G radio|
| --------------
|
-------- ------- |
| APSS | ---> |QDSP6| -----|
--------- ------- |
|
|
| --------------
--> |WiFi 5G radio|
--------------

Problem here is if any radio crashes, subsequently other
radio also should crash because Q6 crashed. Let's say
2G radio crashed, Q6 should pass this info to APSS. Only
Q6 processor interrupts registered with APSS. Obviously
Q6 should crash and raise fatal interrupt to APSS. Due
to this 5G radio also crashed. But no issue in 5G radio,
because of 2G radio crash 5G radio also impacted.

In multi pd model, this problem is resolved. Here WCSS
functionality (WiFi radio's) moved out from Q6 root pd
to a separate user pd. Due to this, radio's independently
pass their status info to APPS with out crashing Q6. So
other radio's won't be impacted.

Pd means protection domain. It's similar to process in Linux.
Here QDSP6 processor runs each wifi radio functionality on a
separate process. One process can't access other process
resources, so this is termed as PD i.e protection domain.

---------
|WiFi |
--> |2G radio|
| ---------
------ Start Q6 ------- |
| | ------------------> | | |
| | Start WCSS PD1 (2G) | | |
|APSS| ----------------------->|QDSP6|-----|
| | Start WCSS PD1 (5G) | |
| | ----------------------->| |-----|
------ ------- |
|
| -----------
|-->|WiFi |
|5G radio |
-----------
According to linux terminology, here consider Q6 as root
i.e it provide all services, WCSS (wifi radio's) as user
i.e it uses services provided by root.

Since Q6 root & WCSS user pd's able to communicate with
APSS individually, multipd remoteproc driver registers
each PD with rproc framework. Here clients (Wifi host drivers)
intrested on WCSS PD rproc, so multipd driver start's root
pd in the context of WCSS user pd rproc start. Similarly
on down path, root pd will be stopped after wcss user pd
stopped.

Here WCSS(user) PD is dependent on Q6(root) PD, so first
q6 pd should be up before wcss pd. After wcss pd goes down,
q6 pd should be turned off.

rproc->ops->start(userpd_rproc) {
/* Boot root pd rproc */
rproc_boot(upd_dev->parent);
---
/* user pd rproc start sequence */
---
---
}
With this way we ensure that root pd brought up before userpd.

rproc->ops->stop(userpd_rproc) {
---
---
/* user pd rproc stop sequence */
---
---
/* Shutdown root pd rproc */
rproc_shutdown(upd_dev->parent);
}
After userpd rproc stops, root pd rproc will be stopped.
IPQ5018, IPQ9574 supports multipd remoteproc driver.

DTS patch [13/13] is based on below series
https://lore.kernel.org/linux-arm-msm/[email protected]/

[V2]
- This patch is depends on the below series
https://lore.kernel.org/linux-arm-msm/[email protected]/
https://lore.kernel.org/linux-arm-msm/[email protected]/
- Fixed all comments and rebased for TOT.
- Strip off SCM code changes from https://lore.kernel.org/linux-arm-msm/[email protected]/
and made new patchset [08/13]
- Strip off qcom_q6v5 changes from https://lore.kernel.org/linux-arm-msm/[email protected]/
and made new patchset [09/13]
- since clocks handled by QDSP6 firmware
Dropped https://lore.kernel.org/linux-arm-msm/[email protected]/,
https://lore.kernel.org/linux-arm-msm/[email protected]/.
Added [04/13], [05/13], [06/13], [07/13] patches.

Manikanta Mylavarapu (13):
dt-bindings: remoteproc: qcom: Add support for multipd model
dt-bindings: mailbox: qcom: Add IPQ5018 APCS compatible
dt-bindings: arm: qcom: Document the Qualcomm rdp432-c1 board
dt-bindings: clock: qcom: gcc-ipq5018: remove q6 clocks macros
dt-bindings: clock: qcom: gcc-ipq9574: remove q6 bring up clock macros
clk: qcom: ipq5018: remove q6 bring up clocks
clk: qcom: ipq9574: remove q6 bring up clocks
firmware: qcom_scm: ipq5018: Add WCSS AHB pd support
remoteproc: qcom: q6v5: Add multipd interrupts support
remoteproc: qcom: Add Hexagon based multipd rproc driver
arm64: dtsi: qcom: ipq5018: enable nodes required for multipd
arm64: dts: qcom: ipq5018: Add RDP432-c1 board support
arm64: dtsi: qcom: ipq9574: Add nodes to bring up multipd

.../devicetree/bindings/arm/qcom.yaml | 1 +
.../mailbox/qcom,apcs-kpss-global.yaml | 1 +
.../bindings/remoteproc/qcom,multipd-pil.yaml | 265 +++++++
arch/arm64/boot/dts/qcom/Makefile | 1 +
.../arm64/boot/dts/qcom/ipq5018-rdp432-c1.dts | 49 ++
arch/arm64/boot/dts/qcom/ipq5018.dtsi | 140 ++++
arch/arm64/boot/dts/qcom/ipq9574.dtsi | 118 +++
drivers/clk/qcom/gcc-ipq5018.c | 414 -----------
drivers/clk/qcom/gcc-ipq9574.c | 326 ---------
drivers/firmware/qcom_scm.c | 114 +++
drivers/firmware/qcom_scm.h | 6 +
drivers/remoteproc/Kconfig | 20 +
drivers/remoteproc/Makefile | 1 +
drivers/remoteproc/qcom_common.h | 9 +
drivers/remoteproc/qcom_q6v5.c | 37 +-
drivers/remoteproc/qcom_q6v5.h | 11 +
drivers/remoteproc/qcom_q6v5_mpd.c | 677 ++++++++++++++++++
drivers/soc/qcom/mdt_loader.c | 332 +++++++++
include/dt-bindings/clock/qcom,gcc-ipq5018.h | 21 -
include/dt-bindings/clock/qcom,ipq9574-gcc.h | 18 -
include/linux/firmware/qcom/qcom_scm.h | 3 +
include/linux/soc/qcom/mdt_loader.h | 19 +
22 files changed, 1801 insertions(+), 782 deletions(-)
create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,multipd-pil.yaml
create mode 100644 arch/arm64/boot/dts/qcom/ipq5018-rdp432-c1.dts
create mode 100644 drivers/remoteproc/qcom_q6v5_mpd.c


base-commit: dbd91ef4e91c1ce3a24429f5fb3876b7a0306733
--
2.17.1



2023-05-21 22:58:49

by Manikanta Mylavarapu

[permalink] [raw]
Subject: [PATCH V2 04/13] dt-bindings: clock: qcom: gcc-ipq5018: remove q6 clocks macros

Since Q6 firmware takes care of bring up clocks in multipd
model, remove bring up clock macros.

Signed-off-by: Manikanta Mylavarapu <[email protected]>
---
include/dt-bindings/clock/qcom,gcc-ipq5018.h | 21 --------------------
1 file changed, 21 deletions(-)

diff --git a/include/dt-bindings/clock/qcom,gcc-ipq5018.h b/include/dt-bindings/clock/qcom,gcc-ipq5018.h
index f3de2fdfeea1..89d81fa1a758 100644
--- a/include/dt-bindings/clock/qcom,gcc-ipq5018.h
+++ b/include/dt-bindings/clock/qcom,gcc-ipq5018.h
@@ -74,15 +74,8 @@
#define GCC_PCIE1_AXI_S_CLK 65
#define GCC_PCIE1_PIPE_CLK 66
#define GCC_PRNG_AHB_CLK 67
-#define GCC_Q6_AXIM_CLK 68
-#define GCC_Q6_AXIM2_CLK 69
-#define GCC_Q6_AXIS_CLK 70
-#define GCC_Q6_AHB_CLK 71
-#define GCC_Q6_AHB_S_CLK 72
#define GCC_Q6_TSCTR_1TO2_CLK 73
#define GCC_Q6SS_ATBM_CLK 74
-#define GCC_Q6SS_PCLKDBG_CLK 75
-#define GCC_Q6SS_TRIG_CLK 76
#define GCC_QDSS_AT_CLK 77
#define GCC_QDSS_CFG_AHB_CLK 78
#define GCC_QDSS_DAP_AHB_CLK 79
@@ -109,7 +102,6 @@
#define GCC_SYS_NOC_PCIE1_AXI_CLK 100
#define GCC_SYS_NOC_QDSS_STM_AXI_CLK 101
#define GCC_SYS_NOC_USB0_AXI_CLK 102
-#define GCC_SYS_NOC_WCSS_AHB_CLK 103
#define GCC_UBI0_AXI_CLK 104
#define GCC_UBI0_CFG_CLK 105
#define GCC_UBI0_CORE_CLK 106
@@ -127,19 +119,6 @@
#define GCC_USB0_MOCK_UTMI_CLK 118
#define GCC_USB0_PHY_CFG_AHB_CLK 119
#define GCC_USB0_SLEEP_CLK 120
-#define GCC_WCSS_ACMT_CLK 121
-#define GCC_WCSS_AHB_S_CLK 122
-#define GCC_WCSS_AXI_M_CLK 123
-#define GCC_WCSS_AXI_S_CLK 124
-#define GCC_WCSS_DBG_IFC_APB_BDG_CLK 125
-#define GCC_WCSS_DBG_IFC_APB_CLK 126
-#define GCC_WCSS_DBG_IFC_ATB_BDG_CLK 127
-#define GCC_WCSS_DBG_IFC_ATB_CLK 128
-#define GCC_WCSS_DBG_IFC_DAPBUS_BDG_CLK 129
-#define GCC_WCSS_DBG_IFC_DAPBUS_CLK 130
-#define GCC_WCSS_DBG_IFC_NTS_BDG_CLK 131
-#define GCC_WCSS_DBG_IFC_NTS_CLK 132
-#define GCC_WCSS_ECAHB_CLK 133
#define GCC_XO_CLK 134
#define GCC_XO_CLK_SRC 135
#define GMAC0_RX_CLK_SRC 136
--
2.17.1


2023-05-21 23:00:16

by Manikanta Mylavarapu

[permalink] [raw]
Subject: [PATCH V2 08/13] firmware: qcom_scm: ipq5018: Add WCSS AHB pd support

Add support to power up, down & load userpd firmware.

Signed-off-by: Manikanta Mylavarapu <[email protected]>
---
Changes in V2:
- This patch is generated by Strip off SCM code changes from here
https://lore.kernel.org/linux-arm-msm/[email protected]/

drivers/firmware/qcom_scm.c | 114 +++++++++++++++++++++++++
drivers/firmware/qcom_scm.h | 6 ++
include/linux/firmware/qcom/qcom_scm.h | 3 +
3 files changed, 123 insertions(+)

diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c
index fde33acd46b7..c617e9e671ec 100644
--- a/drivers/firmware/qcom_scm.c
+++ b/drivers/firmware/qcom_scm.c
@@ -643,6 +643,120 @@ int qcom_scm_pas_shutdown(u32 peripheral)
}
EXPORT_SYMBOL(qcom_scm_pas_shutdown);

+/**
+ * qti_scm_int_radio_powerup - Bring up WCSS AHB userpd
+ *
+ * @peripheral: peripheral id
+ *
+ * Return 0 on success.
+ */
+int qti_scm_int_radio_powerup(u32 peripheral)
+{
+ int ret;
+ struct qcom_scm_desc desc = {
+ .svc = QCOM_SCM_PD_LOAD_SVC_ID,
+ .cmd = QCOM_SCM_INT_RAD_PWR_UP_CMD_ID,
+ .arginfo = QCOM_SCM_ARGS(1),
+ .args[0] = peripheral,
+ .owner = ARM_SMCCC_OWNER_SIP,
+ };
+ struct qcom_scm_res res;
+
+ ret = qcom_scm_clk_enable();
+ if (ret)
+ return ret;
+
+ ret = qcom_scm_bw_enable();
+ if (ret)
+ return ret;
+
+ ret = qcom_scm_call(__scm->dev, &desc, &res);
+ qcom_scm_bw_disable();
+ qcom_scm_clk_disable();
+
+ return ret ? : res.result[0];
+}
+EXPORT_SYMBOL(qti_scm_int_radio_powerup);
+
+/**
+ * qti_scm_int_radio_powerdown() - Shut down WCSS AHB userpd
+ *
+ * @peripheral: peripheral id
+ *
+ * Returns 0 on success.
+ */
+int qti_scm_int_radio_powerdown(u32 peripheral)
+{
+ int ret;
+ struct qcom_scm_desc desc = {
+ .svc = QCOM_SCM_PD_LOAD_SVC_ID,
+ .cmd = QCOM_SCM_INT_RAD_PWR_DN_CMD_ID,
+ .arginfo = QCOM_SCM_ARGS(1),
+ .args[0] = peripheral,
+ .owner = ARM_SMCCC_OWNER_SIP,
+ };
+ struct qcom_scm_res res;
+
+ ret = qcom_scm_clk_enable();
+ if (ret)
+ return ret;
+
+ ret = qcom_scm_bw_enable();
+ if (ret)
+ return ret;
+
+ ret = qcom_scm_call(__scm->dev, &desc, &res);
+ qcom_scm_bw_disable();
+ qcom_scm_clk_disable();
+
+ return ret ? : res.result[0];
+}
+EXPORT_SYMBOL(qti_scm_int_radio_powerdown);
+
+/**
+ * qti_scm_pdseg_memcpy_v2() - copy userpd PIL segments data to dma blocks
+ *
+ * @peripheral: peripheral id
+ * @phno: program header no
+ * @dma: handle of dma region
+ * @seg_cnt: no of dma blocks
+ *
+ * Returns 0 if trustzone successfully loads userpd PIL segments from dma
+ * blocks to DDR
+ */
+int qti_scm_pdseg_memcpy_v2(u32 peripheral, int phno, dma_addr_t dma,
+ int seg_cnt)
+{
+ int ret;
+ struct qcom_scm_desc desc = {
+ .svc = QCOM_SCM_PD_LOAD_SVC_ID,
+ .cmd = QCOM_SCM_PD_LOAD_V2_CMD_ID,
+ .arginfo = QCOM_SCM_ARGS(4, QCOM_SCM_VAL, QCOM_SCM_VAL,
+ QCOM_SCM_RW, QCOM_SCM_VAL),
+ .args[0] = peripheral,
+ .args[1] = phno,
+ .args[2] = dma,
+ .args[3] = seg_cnt,
+ .owner = ARM_SMCCC_OWNER_SIP,
+ };
+ struct qcom_scm_res res;
+
+ ret = qcom_scm_clk_enable();
+ if (ret)
+ return ret;
+
+ ret = qcom_scm_bw_enable();
+ if (ret)
+ return ret;
+
+ ret = qcom_scm_call(__scm->dev, &desc, &res);
+ qcom_scm_bw_disable();
+ qcom_scm_clk_disable();
+
+ return ret ? : res.result[0];
+}
+EXPORT_SYMBOL(qti_scm_pdseg_memcpy_v2);
+
/**
* qcom_scm_pas_supported() - Check if the peripheral authentication service is
* available for the given peripherial
diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h
index e6e512bd57d1..99e3ab2f1986 100644
--- a/drivers/firmware/qcom_scm.h
+++ b/drivers/firmware/qcom_scm.h
@@ -132,6 +132,12 @@ extern int scm_legacy_call(struct device *dev, const struct qcom_scm_desc *desc,
#define QCOM_SCM_SMMU_CONFIG_ERRATA1 0x03
#define QCOM_SCM_SMMU_CONFIG_ERRATA1_CLIENT_ALL 0x02

+#define QCOM_SCM_PD_LOAD_SVC_ID 0x2
+#define QCOM_SCM_PD_LOAD_CMD_ID 0x16
+#define QCOM_SCM_PD_LOAD_V2_CMD_ID 0x19
+#define QCOM_SCM_INT_RAD_PWR_UP_CMD_ID 0x17
+#define QCOM_SCM_INT_RAD_PWR_DN_CMD_ID 0x18
+
#define QCOM_SCM_SVC_WAITQ 0x24
#define QCOM_SCM_WAITQ_RESUME 0x02
#define QCOM_SCM_WAITQ_GET_WQ_CTX 0x03
diff --git a/include/linux/firmware/qcom/qcom_scm.h b/include/linux/firmware/qcom/qcom_scm.h
index 250ea4efb7cb..488d6eccb5a4 100644
--- a/include/linux/firmware/qcom/qcom_scm.h
+++ b/include/linux/firmware/qcom/qcom_scm.h
@@ -81,6 +81,9 @@ extern int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr,
extern int qcom_scm_pas_auth_and_reset(u32 peripheral);
extern int qcom_scm_pas_shutdown(u32 peripheral);
extern bool qcom_scm_pas_supported(u32 peripheral);
+int qti_scm_int_radio_powerup(u32 peripheral);
+int qti_scm_int_radio_powerdown(u32 peripheral);
+int qti_scm_pdseg_memcpy_v2(u32 peripheral, int phno, dma_addr_t dma, int seg_cnt);

extern int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val);
extern int qcom_scm_io_writel(phys_addr_t addr, unsigned int val);
--
2.17.1


2023-05-21 23:00:31

by Manikanta Mylavarapu

[permalink] [raw]
Subject: [PATCH V2 13/13] arm64: dtsi: qcom: ipq9574: Add nodes to bring up multipd

Enable nodes required for multipd remoteproc bring up.

Signed-off-by: Manikanta Mylavarapu <[email protected]>
---
Changes in V2:
- Corrected syntax like alignmnet and kept nodes in sorted order.
- Added 'firmware-name' property.

arch/arm64/boot/dts/qcom/ipq9574.dtsi | 118 ++++++++++++++++++++++++++
1 file changed, 118 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
index 0e04549c69a5..ff0da53ba05f 100644
--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
@@ -160,6 +160,11 @@
no-map;
};

+ q6_region: wcnss@4ab00000 {
+ reg = <0x0 0x4ab00000 0x0 0x2b00000>;
+ no-map;
+ };
+
smem@4aa00000 {
compatible = "qcom,smem";
reg = <0x0 0x4aa00000 0x0 0x00100000>;
@@ -697,6 +702,95 @@
};
};

+ q6v5_wcss: remoteproc@cd00000 {
+ compatible = "qcom,ipq9574-q6-mpd";
+ reg = <0x0cd00000 0x4040>;
+ firmware-name = "IPQ9574/q6_fw.mdt",
+ "IPQ9574/m3_fw.mdt";
+ interrupts-extended = <&intc GIC_SPI 325 IRQ_TYPE_EDGE_RISING>,
+ <&wcss_smp2p_in 0 0>,
+ <&wcss_smp2p_in 1 0>,
+ <&wcss_smp2p_in 2 0>,
+ <&wcss_smp2p_in 3 0>;
+ interrupt-names = "wdog",
+ "fatal",
+ "ready",
+ "handover",
+ "stop-ack";
+
+ qcom,smem-states = <&wcss_smp2p_out 0>,
+ <&wcss_smp2p_out 1>;
+ qcom,smem-state-names = "shutdown",
+ "stop";
+ memory-region = <&q6_region>;
+
+ glink-edge {
+ interrupts = <GIC_SPI 321 IRQ_TYPE_EDGE_RISING>;
+ label = "rtr";
+ qcom,remote-pid = <1>;
+ mboxes = <&apcs_glb 8>;
+ };
+
+ pd-1 {
+ compatible = "qcom,ipq9574-wcss-ahb-mpd";
+ firmware-name = "IPQ9574/q6_fw.mdt";
+ interrupts-extended = <&wcss_smp2p_in 8 0>,
+ <&wcss_smp2p_in 9 0>,
+ <&wcss_smp2p_in 12 0>,
+ <&wcss_smp2p_in 11 0>;
+ interrupt-names = "fatal",
+ "ready",
+ "spawn-ack",
+ "stop-ack";
+ qcom,smem-states = <&wcss_smp2p_out 8>,
+ <&wcss_smp2p_out 9>,
+ <&wcss_smp2p_out 10>;
+ qcom,smem-state-names = "shutdown",
+ "stop",
+ "spawn";
+ };
+
+ pd-2 {
+ compatible = "qcom,ipq5018-wcss-pcie-mpd";
+ interrupts-extended = <&wcss_smp2p_in 16 0>,
+ <&wcss_smp2p_in 17 0>,
+ <&wcss_smp2p_in 20 0>,
+ <&wcss_smp2p_in 19 0>;
+ interrupt-names = "fatal",
+ "ready",
+ "spawn-ack",
+ "stop-ack";
+
+ qcom,smem-states = <&wcss_smp2p_out 16>,
+ <&wcss_smp2p_out 17>,
+ <&wcss_smp2p_out 18>;
+ qcom,smem-state-names = "shutdown",
+ "stop",
+ "spawn";
+ status = "disabled";
+ };
+
+ pd-3 {
+ compatible = "qcom,ipq5018-wcss-pcie-mpd";
+ interrupts-extended = <&wcss_smp2p_in 24 0>,
+ <&wcss_smp2p_in 25 0>,
+ <&wcss_smp2p_in 28 0>,
+ <&wcss_smp2p_in 27 0>;
+ interrupt-names = "fatal",
+ "ready",
+ "spawn-ack",
+ "stop-ack";
+
+ qcom,smem-states = <&wcss_smp2p_out 24>,
+ <&wcss_smp2p_out 25>,
+ <&wcss_smp2p_out 26>;
+ qcom,smem-state-names = "shutdown",
+ "stop",
+ "spawn";
+ status = "disabled";
+ };
+ };
+
pcie1: pci@10000000 {
compatible = "qcom,pcie-ipq9574";
reg = <0x10000000 0xf1d>,
@@ -966,4 +1060,28 @@
<GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
+
+ wcss: wcss-smp2p {
+ compatible = "qcom,smp2p";
+ qcom,smem = <435>, <428>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <GIC_SPI 322 IRQ_TYPE_EDGE_RISING>;
+
+ mboxes = <&apcs_glb 9>;
+
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <1>;
+
+ wcss_smp2p_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ wcss_smp2p_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
};
--
2.17.1


2023-05-21 23:01:12

by Manikanta Mylavarapu

[permalink] [raw]
Subject: [PATCH V2 10/13] remoteproc: qcom: Add Hexagon based multipd rproc driver

It adds support to bring up remoteproc's on multipd model.
Pd means protection domain. It's similar to process in Linux.
Here QDSP6 processor runs each wifi radio functionality on a
separate process. One process can't access other process
resources, so this is termed as PD i.e protection domain.

Here we have two pd's called root and user pd. We can correlate
Root pd as root and user pd as user in linux. Root pd has more
privileges than user pd. Root will provide services to user pd.

From remoteproc driver perspective, root pd corresponds to QDSP6
processor bring up and user pd corresponds to Wifi radio (WCSS)
bring up.

Here WCSS(user) PD is dependent on Q6(root) PD, so first
q6 pd should be up before wcss pd. After wcss pd goes down,
q6 pd should be turned off.

IPQ5018, IPQ9574 supports multipd remoteproc driver.

Signed-off-by: Manikanta Mylavarapu <[email protected]>
---
Changes in V2:
- Common functionalities moved to seperate patches
- qcom_get_pd_asid() moved to mpd driver
- Last DMA block alone memset to zero
- Added diagram to show how userpd data is organized and sent to
trustzone
- Rewritten commit message since most of the content available
in cover page
- Removed 'remote_id' becuase it's not required for bring up.

drivers/remoteproc/Kconfig | 20 +
drivers/remoteproc/Makefile | 1 +
drivers/remoteproc/qcom_common.h | 9 +
drivers/remoteproc/qcom_q6v5_mpd.c | 677 ++++++++++++++++++++++++++++
drivers/soc/qcom/mdt_loader.c | 332 ++++++++++++++
include/linux/soc/qcom/mdt_loader.h | 19 +
6 files changed, 1058 insertions(+)
create mode 100644 drivers/remoteproc/qcom_q6v5_mpd.c

diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig
index a850e9f486dd..44af5c36f67e 100644
--- a/drivers/remoteproc/Kconfig
+++ b/drivers/remoteproc/Kconfig
@@ -234,6 +234,26 @@ config QCOM_Q6V5_PAS
CDSP (Compute DSP), MPSS (Modem Peripheral SubSystem), and
SLPI (Sensor Low Power Island).

+config QCOM_Q6V5_MPD
+ tristate "Qualcomm Hexagon based MPD model Peripheral Image Loader"
+ depends on OF && ARCH_QCOM
+ depends on QCOM_SMEM
+ depends on RPMSG_QCOM_SMD || RPMSG_QCOM_SMD=n
+ depends on RPMSG_QCOM_GLINK_SMEM || RPMSG_QCOM_GLINK_SMEM=n
+ depends on QCOM_SYSMON || QCOM_SYSMON=n
+ depends on RPMSG_QCOM_GLINK || RPMSG_QCOM_GLINK=n
+ depends on QCOM_AOSS_QMP || QCOM_AOSS_QMP=n
+ select MFD_SYSCON
+ select QCOM_MDT_LOADER
+ select QCOM_PIL_INFO
+ select QCOM_Q6V5_COMMON
+ select QCOM_RPROC_COMMON
+ select QCOM_SCM
+ help
+ Say y here to support the Qualcomm Secure Peripheral Image Loader
+ for the Hexagon based MultiPD model remote processors on e.g. IPQ5018.
+ This is trustZone wireless subsystem.
+
config QCOM_Q6V5_WCSS
tristate "Qualcomm Hexagon based WCSS Peripheral Image Loader"
depends on OF && ARCH_QCOM
diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile
index 91314a9b43ce..b64051080ec1 100644
--- a/drivers/remoteproc/Makefile
+++ b/drivers/remoteproc/Makefile
@@ -25,6 +25,7 @@ obj-$(CONFIG_QCOM_PIL_INFO) += qcom_pil_info.o
obj-$(CONFIG_QCOM_RPROC_COMMON) += qcom_common.o
obj-$(CONFIG_QCOM_Q6V5_COMMON) += qcom_q6v5.o
obj-$(CONFIG_QCOM_Q6V5_ADSP) += qcom_q6v5_adsp.o
+obj-$(CONFIG_QCOM_Q6V5_MPD) += qcom_q6v5_mpd.o
obj-$(CONFIG_QCOM_Q6V5_MSS) += qcom_q6v5_mss.o
obj-$(CONFIG_QCOM_Q6V5_PAS) += qcom_q6v5_pas.o
obj-$(CONFIG_QCOM_Q6V5_WCSS) += qcom_q6v5_wcss.o
diff --git a/drivers/remoteproc/qcom_common.h b/drivers/remoteproc/qcom_common.h
index 9ef4449052a9..9d9e08aac6ef 100644
--- a/drivers/remoteproc/qcom_common.h
+++ b/drivers/remoteproc/qcom_common.h
@@ -76,4 +76,13 @@ static inline bool qcom_sysmon_shutdown_acked(struct qcom_sysmon *sysmon)
}
#endif

+#if IS_ENABLED(CONFIG_QCOM_Q6V5_MPD)
+s8 qcom_get_pd_asid(struct device_node *node);
+#else
+static inline s8 qcom_get_pd_asid(struct device_node *node)
+{
+ return 0;
+}
+#endif
+
#endif
diff --git a/drivers/remoteproc/qcom_q6v5_mpd.c b/drivers/remoteproc/qcom_q6v5_mpd.c
new file mode 100644
index 000000000000..959143960350
--- /dev/null
+++ b/drivers/remoteproc/qcom_q6v5_mpd.c
@@ -0,0 +1,677 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2016-2018 Linaro Ltd.
+ * Copyright (C) 2014 Sony Mobile Communications AB
+ * Copyright (c) 2012-2018, 2021 The Linux Foundation. All rights reserved.
+ */
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/firmware/qcom/qcom_scm.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/iopoll.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/of_reserved_mem.h>
+#include <linux/platform_device.h>
+#include <linux/reset.h>
+#include <linux/soc/qcom/mdt_loader.h>
+#include <linux/soc/qcom/smem.h>
+#include <linux/soc/qcom/smem_state.h>
+#include "qcom_common.h"
+#include "qcom_q6v5.h"
+
+#include "remoteproc_internal.h"
+
+#define WCSS_CRASH_REASON 421
+#define WCSS_SMEM_HOST 1
+
+#define WCNSS_PAS_ID 6
+#define MPD_WCNSS_PAS_ID 0xD
+
+#define BUF_SIZE 35
+
+#define MAX_FIRMWARE 3
+/**
+ * enum state - state of a wcss (private)
+ * @WCSS_NORMAL: subsystem is operating normally
+ * @WCSS_SHUTDOWN: subsystem has been shutdown
+ *
+ */
+enum q6_wcss_state {
+ WCSS_NORMAL,
+ WCSS_SHUTDOWN,
+};
+
+enum {
+ Q6_IPQ,
+ WCSS_AHB_IPQ,
+ WCSS_PCIE_IPQ,
+};
+
+struct q6_wcss {
+ struct device *dev;
+ struct qcom_rproc_glink glink_subdev;
+ struct qcom_rproc_ssr ssr_subdev;
+ struct qcom_q6v5 q6;
+ phys_addr_t mem_phys;
+ phys_addr_t mem_reloc;
+ void *mem_region;
+ size_t mem_size;
+ int crash_reason_smem;
+ s8 pd_asid;
+ enum q6_wcss_state state;
+ const struct wcss_data *desc;
+ const char **firmware;
+};
+
+struct wcss_data {
+ int (*init_irq)(struct qcom_q6v5 *q6, struct platform_device *pdev,
+ struct rproc *rproc, int crash_reason,
+ const char *load_state,
+ void (*handover)(struct qcom_q6v5 *q6));
+ int crash_reason_smem;
+ u32 version;
+ const char *ssr_name;
+ const struct rproc_ops *ops;
+ bool glink_subdev_required;
+ bool reset_seq;
+ u32 pasid;
+ int (*mdt_load_sec)(struct device *dev, const struct firmware *fw,
+ const char *fw_name, int pas_id, void *mem_region,
+ phys_addr_t mem_phys, size_t mem_size,
+ phys_addr_t *reloc_base);
+ int (*powerup_scm)(u32 peripheral);
+ int (*powerdown_scm)(u32 peripheral);
+};
+
+/**
+ * qcom_get_pd_asid() - get the pd asid number from DT node
+ * @node: device tree node
+ *
+ * Returns asid if node name has 'pd' string
+ */
+s8 qcom_get_pd_asid(struct device_node *node)
+{
+ char *str;
+ s8 pd_asid;
+
+ if (!node)
+ return -EINVAL;
+
+ str = strstr(node->name, "pd");
+ if (!str)
+ return 0;
+
+ str += strlen("pd") + 1;
+ return kstrtos8(str, 10, &pd_asid) ? -EINVAL : pd_asid;
+}
+EXPORT_SYMBOL(qcom_get_pd_asid);
+
+static int q6_wcss_start(struct rproc *rproc)
+{
+ struct q6_wcss *wcss = rproc->priv;
+ int ret;
+ struct device_node *upd_np;
+ struct platform_device *upd_pdev;
+ struct rproc *upd_rproc;
+ struct q6_wcss *upd_wcss;
+ const struct wcss_data *desc = wcss->desc;
+
+ qcom_q6v5_prepare(&wcss->q6);
+
+ ret = qcom_scm_pas_auth_and_reset(desc->pasid);
+ if (ret) {
+ dev_err(wcss->dev, "wcss_reset failed\n");
+ return ret;
+ }
+
+ ret = qcom_q6v5_wait_for_start(&wcss->q6, 5 * HZ);
+ if (ret == -ETIMEDOUT)
+ dev_err(wcss->dev, "start timed out\n");
+
+ /* On rootpd restart still user pd wcss state's
+ * initialized to WCSS_SHUTDOWN and it leads to
+ * user pd FW load (user pd fw load should happen
+ * only on user pd restart, not on root pd restart).
+ * So bring userpd wcss state to default value.
+ */
+ for_each_available_child_of_node(wcss->dev->of_node, upd_np) {
+ upd_pdev = of_find_device_by_node(upd_np);
+ if (!upd_pdev)
+ continue;
+ upd_rproc = platform_get_drvdata(upd_pdev);
+ upd_wcss = upd_rproc->priv;
+ upd_wcss->state = WCSS_NORMAL;
+ }
+ return ret;
+}
+
+static int q6_wcss_spawn_pd(struct rproc *rproc)
+{
+ int ret;
+ struct q6_wcss *wcss = rproc->priv;
+
+ ret = qcom_q6v5_request_spawn(&wcss->q6);
+ if (ret == -ETIMEDOUT) {
+ pr_err("%s spawn timedout\n", rproc->name);
+ return ret;
+ }
+
+ ret = qcom_q6v5_wait_for_start(&wcss->q6, msecs_to_jiffies(10000));
+ if (ret == -ETIMEDOUT) {
+ pr_err("%s start timedout\n", rproc->name);
+ wcss->q6.running = false;
+ return ret;
+ }
+ wcss->q6.running = true;
+ return ret;
+}
+
+static int wcss_ahb_pcie_pd_start(struct rproc *rproc)
+{
+ struct q6_wcss *wcss = rproc->priv;
+ const struct wcss_data *desc = wcss->desc;
+ int ret;
+
+ if (!desc->reset_seq)
+ return 0;
+
+ if (desc->powerup_scm) {
+ ret = desc->powerup_scm(desc->pasid);
+ if (ret) {
+ dev_err(wcss->dev, "failed to power up pd\n");
+ return ret;
+ }
+ }
+
+ ret = q6_wcss_spawn_pd(rproc);
+ if (ret)
+ return ret;
+
+ wcss->state = WCSS_NORMAL;
+ return ret;
+}
+
+static int q6_wcss_stop(struct rproc *rproc)
+{
+ struct q6_wcss *wcss = rproc->priv;
+ const struct wcss_data *desc = wcss->desc;
+ int ret;
+
+ ret = qcom_scm_pas_shutdown(desc->pasid);
+ if (ret) {
+ dev_err(wcss->dev, "not able to shutdown\n");
+ return ret;
+ }
+ qcom_q6v5_unprepare(&wcss->q6);
+
+ return 0;
+}
+
+static int wcss_ahb_pcie_pd_stop(struct rproc *rproc)
+{
+ struct q6_wcss *wcss = rproc->priv;
+ struct rproc *rpd_rproc = dev_get_drvdata(wcss->dev->parent);
+ const struct wcss_data *desc = wcss->desc;
+ int ret;
+
+ if (!desc->reset_seq)
+ goto shut_down_rpd;
+
+ if (rproc->state != RPROC_CRASHED && wcss->q6.stop_bit) {
+ ret = qcom_q6v5_request_stop(&wcss->q6, NULL);
+ if (ret) {
+ dev_err(&rproc->dev, "pd not stopped\n");
+ return ret;
+ }
+ }
+
+ if (desc->powerdown_scm) {
+ ret = desc->powerdown_scm(desc->pasid);
+ if (ret) {
+ dev_err(wcss->dev, "failed to power down pd\n");
+ return ret;
+ }
+ }
+
+shut_down_rpd:
+ rproc_shutdown(rpd_rproc);
+
+ wcss->state = WCSS_SHUTDOWN;
+ return 0;
+}
+
+static void *q6_wcss_da_to_va(struct rproc *rproc, u64 da, size_t len,
+ bool *is_iomem)
+{
+ struct q6_wcss *wcss = rproc->priv;
+ int offset;
+
+ offset = da - wcss->mem_reloc;
+ if (offset < 0 || offset + len > wcss->mem_size)
+ return NULL;
+
+ return wcss->mem_region + offset;
+}
+
+static int q6_wcss_load(struct rproc *rproc, const struct firmware *fw)
+{
+ struct q6_wcss *wcss = rproc->priv;
+ const struct firmware *fw_hdl;
+ int ret;
+ const struct wcss_data *desc = wcss->desc;
+ int loop;
+
+ ret = qcom_mdt_load(wcss->dev, fw, rproc->firmware,
+ desc->pasid, wcss->mem_region,
+ wcss->mem_phys, wcss->mem_size,
+ &wcss->mem_reloc);
+ if (ret)
+ return ret;
+
+ for (loop = 1; loop < MAX_FIRMWARE; loop++) {
+ if (!wcss->firmware[loop])
+ continue;
+
+ ret = request_firmware(&fw_hdl, wcss->firmware[loop],
+ wcss->dev);
+ if (ret)
+ continue;
+
+ ret = qcom_mdt_load_no_init(wcss->dev, fw_hdl,
+ wcss->firmware[loop], 0,
+ wcss->mem_region,
+ wcss->mem_phys,
+ wcss->mem_size,
+ &wcss->mem_reloc);
+
+ release_firmware(fw_hdl);
+
+ if (ret) {
+ dev_err(wcss->dev,
+ "can't load %s ret:%d\n", wcss->firmware[loop], ret);
+ return ret;
+ }
+ }
+ return 0;
+}
+
+/* This function load's userpd firmware. Since Userpd depends on rootpd
+ * first bring up root pd and then load. User pd firmware load is required
+ * only during user pd restart because root pd loads user pd FW pil segments
+ * during it's bringup.
+ */
+static int wcss_ahb_pcie_pd_load(struct rproc *rproc, const struct firmware *fw)
+{
+ struct q6_wcss *wcss = rproc->priv, *wcss_rpd;
+ struct rproc *rpd_rproc = dev_get_drvdata(wcss->dev->parent);
+ const struct wcss_data *desc = wcss->desc;
+ int ret;
+
+ wcss_rpd = rpd_rproc->priv;
+
+ /* Boot rootpd rproc */
+ ret = rproc_boot(rpd_rproc);
+ if (ret || wcss->state == WCSS_NORMAL)
+ return ret;
+
+ return desc->mdt_load_sec(wcss->dev, fw, rproc->firmware,
+ desc->pasid, wcss->mem_region,
+ wcss->mem_phys, wcss->mem_size,
+ &wcss->mem_reloc);
+}
+
+static unsigned long q6_wcss_panic(struct rproc *rproc)
+{
+ struct q6_wcss *wcss = rproc->priv;
+
+ return qcom_q6v5_panic(&wcss->q6);
+}
+
+static const struct rproc_ops wcss_ahb_pcie_ipq5018_ops = {
+ .start = wcss_ahb_pcie_pd_start,
+ .stop = wcss_ahb_pcie_pd_stop,
+ .load = wcss_ahb_pcie_pd_load,
+};
+
+static const struct rproc_ops q6_wcss_ipq5018_ops = {
+ .start = q6_wcss_start,
+ .stop = q6_wcss_stop,
+ .da_to_va = q6_wcss_da_to_va,
+ .load = q6_wcss_load,
+ .get_boot_addr = rproc_elf_get_boot_addr,
+ .panic = q6_wcss_panic,
+};
+
+static int q6_alloc_memory_region(struct q6_wcss *wcss)
+{
+ struct reserved_mem *rmem = NULL;
+ struct device_node *node;
+ struct device *dev = wcss->dev;
+ const struct wcss_data *desc = wcss->desc;
+
+ if (desc->version == Q6_IPQ) {
+ node = of_parse_phandle(dev->of_node, "memory-region", 0);
+ if (node)
+ rmem = of_reserved_mem_lookup(node);
+
+ of_node_put(node);
+
+ if (!rmem) {
+ dev_err(dev, "unable to acquire memory-region\n");
+ return -EINVAL;
+ }
+ } else {
+ struct rproc *rpd_rproc = dev_get_drvdata(dev->parent);
+ struct q6_wcss *rpd_wcss = rpd_rproc->priv;
+
+ wcss->mem_phys = rpd_wcss->mem_phys;
+ wcss->mem_reloc = rpd_wcss->mem_reloc;
+ wcss->mem_size = rpd_wcss->mem_size;
+ wcss->mem_region = rpd_wcss->mem_region;
+ return 0;
+ }
+
+ wcss->mem_phys = rmem->base;
+ wcss->mem_reloc = rmem->base;
+ wcss->mem_size = rmem->size;
+ wcss->mem_region = devm_ioremap_wc(dev, wcss->mem_phys, wcss->mem_size);
+ if (!wcss->mem_region) {
+ dev_err(dev, "unable to map memory region: %pa+%pa\n",
+ &rmem->base, &rmem->size);
+ return -EBUSY;
+ }
+
+ return 0;
+}
+
+static int q6_get_inbound_irq(struct qcom_q6v5 *q6,
+ struct platform_device *pdev,
+ const char *int_name,
+ irqreturn_t (*handler)(int irq, void *data))
+{
+ int ret, irq;
+ char *interrupt, *tmp = (char *)int_name;
+ struct q6_wcss *wcss = q6->rproc->priv;
+
+ irq = platform_get_irq_byname(pdev, int_name);
+ if (irq < 0) {
+ if (irq != -EPROBE_DEFER)
+ dev_err(&pdev->dev,
+ "failed to retrieve %s IRQ: %d\n",
+ int_name, irq);
+ return irq;
+ }
+
+ if (!strcmp(int_name, "fatal")) {
+ q6->fatal_irq = irq;
+ } else if (!strcmp(int_name, "stop-ack")) {
+ q6->stop_irq = irq;
+ tmp = "stop_ack";
+ } else if (!strcmp(int_name, "ready")) {
+ q6->ready_irq = irq;
+ } else if (!strcmp(int_name, "handover")) {
+ q6->handover_irq = irq;
+ } else if (!strcmp(int_name, "spawn-ack")) {
+ q6->spawn_irq = irq;
+ tmp = "spawn_ack";
+ } else {
+ dev_err(&pdev->dev, "unknown interrupt\n");
+ return -EINVAL;
+ }
+
+ interrupt = devm_kzalloc(&pdev->dev, BUF_SIZE, GFP_KERNEL);
+ if (!interrupt)
+ return -ENOMEM;
+
+ snprintf(interrupt, BUF_SIZE, "q6v5_wcss_userpd%d_%s", wcss->pd_asid, tmp);
+
+ ret = devm_request_threaded_irq(&pdev->dev, irq,
+ NULL, handler,
+ IRQF_TRIGGER_RISING | IRQF_ONESHOT,
+ interrupt, q6);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to acquire %s irq\n", interrupt);
+ return ret;
+ }
+ return 0;
+}
+
+static int q6_get_outbound_irq(struct qcom_q6v5 *q6,
+ struct platform_device *pdev,
+ const char *int_name)
+{
+ struct qcom_smem_state *tmp_state;
+ unsigned bit;
+
+ tmp_state = qcom_smem_state_get(&pdev->dev, int_name, &bit);
+ if (IS_ERR(tmp_state)) {
+ dev_err(&pdev->dev, "failed to acquire %s state\n", int_name);
+ return PTR_ERR(tmp_state);
+ }
+
+ if (!strcmp(int_name, "stop")) {
+ q6->state = tmp_state;
+ q6->stop_bit = bit;
+ } else if (!strcmp(int_name, "spawn")) {
+ q6->spawn_state = tmp_state;
+ q6->spawn_bit = bit;
+ }
+
+ return 0;
+}
+
+static int init_irq(struct qcom_q6v5 *q6,
+ struct platform_device *pdev, struct rproc *rproc,
+ int crash_reason, const char *load_state,
+ void (*handover)(struct qcom_q6v5 *q6))
+{
+ int ret;
+
+ q6->rproc = rproc;
+ q6->dev = &pdev->dev;
+ q6->crash_reason = crash_reason;
+ q6->handover = handover;
+
+ init_completion(&q6->start_done);
+ init_completion(&q6->stop_done);
+ init_completion(&q6->spawn_done);
+
+ ret = q6_get_inbound_irq(q6, pdev, "fatal",
+ q6v5_fatal_interrupt);
+ if (ret)
+ return ret;
+
+ ret = q6_get_inbound_irq(q6, pdev, "ready",
+ q6v5_ready_interrupt);
+ if (ret)
+ return ret;
+
+ ret = q6_get_inbound_irq(q6, pdev, "stop-ack",
+ q6v5_stop_interrupt);
+ if (ret)
+ return ret;
+
+ ret = q6_get_inbound_irq(q6, pdev, "spawn-ack",
+ q6v5_spawn_interrupt);
+ if (ret)
+ return ret;
+
+ ret = q6_get_outbound_irq(q6, pdev, "stop");
+ if (ret)
+ return ret;
+
+ ret = q6_get_outbound_irq(q6, pdev, "spawn");
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static int q6_wcss_probe(struct platform_device *pdev)
+{
+ const struct wcss_data *desc;
+ struct q6_wcss *wcss;
+ struct rproc *rproc;
+ int ret;
+ char *subdev_name;
+ const char **firmware;
+
+ desc = of_device_get_match_data(&pdev->dev);
+ if (!desc)
+ return -EINVAL;
+
+ firmware = devm_kcalloc(&pdev->dev, MAX_FIRMWARE,
+ sizeof(*firmware), GFP_KERNEL);
+ if (!firmware)
+ return -ENOMEM;
+
+ ret = of_property_read_string_array(pdev->dev.of_node, "firmware-name",
+ firmware, MAX_FIRMWARE);
+ if (ret < 0)
+ return ret;
+
+ rproc = rproc_alloc(&pdev->dev, pdev->name, desc->ops,
+ firmware[0], sizeof(*wcss));
+ if (!rproc) {
+ dev_err(&pdev->dev, "failed to allocate rproc\n");
+ return -ENOMEM;
+ }
+ wcss = rproc->priv;
+ wcss->dev = &pdev->dev;
+ wcss->desc = desc;
+ wcss->firmware = firmware;
+
+ ret = q6_alloc_memory_region(wcss);
+ if (ret)
+ goto free_rproc;
+
+ wcss->pd_asid = qcom_get_pd_asid(wcss->dev->of_node);
+ if (wcss->pd_asid < 0)
+ goto free_rproc;
+
+ if (desc->init_irq) {
+ ret = desc->init_irq(&wcss->q6, pdev, rproc,
+ desc->crash_reason_smem, NULL, NULL);
+ if (ret)
+ goto free_rproc;
+ }
+
+ if (desc->glink_subdev_required)
+ qcom_add_glink_subdev(rproc, &wcss->glink_subdev, desc->ssr_name);
+
+ subdev_name = (char *)(desc->ssr_name ? desc->ssr_name : pdev->name);
+ qcom_add_ssr_subdev(rproc, &wcss->ssr_subdev, subdev_name);
+
+ rproc->auto_boot = false;
+ ret = rproc_add(rproc);
+ if (ret)
+ goto free_rproc;
+
+ platform_set_drvdata(pdev, rproc);
+
+ ret = of_platform_populate(wcss->dev->of_node, NULL,
+ NULL, wcss->dev);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to populate wcss pd nodes\n");
+ goto free_rproc;
+ }
+ return 0;
+
+free_rproc:
+ rproc_free(rproc);
+
+ return ret;
+}
+
+static int q6_wcss_remove(struct platform_device *pdev)
+{
+ struct rproc *rproc = platform_get_drvdata(pdev);
+ struct q6_wcss *wcss = rproc->priv;
+
+ qcom_q6v5_deinit(&wcss->q6);
+
+ rproc_del(rproc);
+ rproc_free(rproc);
+
+ return 0;
+}
+
+static const struct wcss_data q6_ipq5018_res_init = {
+ .init_irq = qcom_q6v5_init,
+ .crash_reason_smem = WCSS_CRASH_REASON,
+ .ssr_name = "q6wcss",
+ .ops = &q6_wcss_ipq5018_ops,
+ .version = Q6_IPQ,
+ .glink_subdev_required = true,
+ .pasid = MPD_WCNSS_PAS_ID,
+};
+
+static const struct wcss_data q6_ipq9574_res_init = {
+ .init_irq = qcom_q6v5_init,
+ .crash_reason_smem = WCSS_CRASH_REASON,
+ .ssr_name = "q6wcss",
+ .ops = &q6_wcss_ipq5018_ops,
+ .version = Q6_IPQ,
+ .glink_subdev_required = true,
+ .pasid = WCNSS_PAS_ID,
+};
+
+static const struct wcss_data wcss_ahb_ipq5018_res_init = {
+ .init_irq = init_irq,
+ .crash_reason_smem = WCSS_CRASH_REASON,
+ .ops = &wcss_ahb_pcie_ipq5018_ops,
+ .version = WCSS_AHB_IPQ,
+ .pasid = MPD_WCNSS_PAS_ID,
+ .reset_seq = true,
+ .mdt_load_sec = qcom_mdt_load_pd_seg,
+ .powerup_scm = qti_scm_int_radio_powerup,
+ .powerdown_scm = qti_scm_int_radio_powerdown,
+};
+
+static const struct wcss_data wcss_ahb_ipq9574_res_init = {
+ .crash_reason_smem = WCSS_CRASH_REASON,
+ .ops = &wcss_ahb_pcie_ipq5018_ops,
+ .version = WCSS_AHB_IPQ,
+ .pasid = WCNSS_PAS_ID,
+ .mdt_load_sec = qcom_mdt_load,
+};
+
+static const struct wcss_data wcss_pcie_ipq5018_res_init = {
+ .init_irq = init_irq,
+ .crash_reason_smem = WCSS_CRASH_REASON,
+ .ops = &wcss_ahb_pcie_ipq5018_ops,
+ .version = WCSS_PCIE_IPQ,
+ .reset_seq = true,
+ .mdt_load_sec = qcom_mdt_load_pd_seg,
+ .pasid = MPD_WCNSS_PAS_ID,
+};
+
+static const struct of_device_id q6_wcss_of_match[] = {
+ { .compatible = "qcom,ipq5018-q6-mpd", .data = &q6_ipq5018_res_init },
+ { .compatible = "qcom,ipq9574-q6-mpd", .data = &q6_ipq9574_res_init },
+ { .compatible = "qcom,ipq5018-wcss-ahb-mpd",
+ .data = &wcss_ahb_ipq5018_res_init },
+ { .compatible = "qcom,ipq9574-wcss-ahb-mpd",
+ .data = &wcss_ahb_ipq9574_res_init },
+ { .compatible = "qcom,ipq5018-wcss-pcie-mpd",
+ .data = &wcss_pcie_ipq5018_res_init },
+ { },
+};
+MODULE_DEVICE_TABLE(of, q6_wcss_of_match);
+
+static struct platform_driver q6_wcss_driver = {
+ .probe = q6_wcss_probe,
+ .remove = q6_wcss_remove,
+ .driver = {
+ .name = "qcom-q6-mpd",
+ .of_match_table = q6_wcss_of_match,
+ },
+};
+module_platform_driver(q6_wcss_driver);
+
+MODULE_DESCRIPTION("Hexagon WCSS Multipd Peripheral Image Loader");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/soc/qcom/mdt_loader.c b/drivers/soc/qcom/mdt_loader.c
index 33dd8c315eb7..ab7f60cceafc 100644
--- a/drivers/soc/qcom/mdt_loader.c
+++ b/drivers/soc/qcom/mdt_loader.c
@@ -16,6 +16,56 @@
#include <linux/sizes.h>
#include <linux/slab.h>
#include <linux/soc/qcom/mdt_loader.h>
+#include <linux/dma-mapping.h>
+
+#include "../../remoteproc/qcom_common.h"
+#define PDSEG_PAS_ID 0xD
+
+/**
+ * struct region - structure passed to TrustZone
+ * @addr: address of dma region, where dma blocks/chunks address resides
+ * @blk_size: size of each block
+ */
+struct region {
+ u64 addr;
+ unsigned int blk_size;
+};
+
+/**
+ * struct pdseg_dma_mem_info
+ * @tz_addr: reference to structure passed to trustzone
+ * @blocks: no of blocks
+ * @tz_dma: dma handle of tz_addr
+ * @dma_blk_arr_addr_phys: dma handle of dma_blk_arr_addr
+ * @dma_blk_arr_addr: VA of dma array, where each index points to
+ * dma block PA
+ * @pt: stores VA of each block
+ *
+ *
+ ---- ---- ----
+ DMA | | | | | |
+ blocks ---- ---- ----
+ | | |
+ |-----| | |-------
+ | | |
+ Array of --------------
+ pointers | | | | dma_blk_arr_addr_phys
+ --------------
+ |
+ |
+ Address referred tz_addr->addr
+ by trustzone
+ to get dma blocks
+ */
+
+struct pdseg_dma_mem_info {
+ struct region *tz_addr;
+ int blocks;
+ dma_addr_t tz_dma;
+ dma_addr_t dma_blk_arr_addr_phys;
+ u64 *dma_blk_arr_addr;
+ void **pt;
+};

static bool mdt_phdr_valid(const struct elf32_phdr *phdr)
{
@@ -358,6 +408,261 @@ static int __qcom_mdt_load(struct device *dev, const struct firmware *fw,
return ret;
}

+static int allocate_dma_mem(struct device *dev,
+ struct pdseg_dma_mem_info *pd_dma,
+ int max_size)
+{
+ dma_addr_t dma_tmp = 0;
+ int i;
+
+ pd_dma->blocks = DIV_ROUND_UP(max_size, PAGE_SIZE);
+
+ /* Allocate dma memory for structure passed to trust zone */
+ pd_dma->tz_addr = dma_alloc_coherent(dev, sizeof(struct region),
+ &pd_dma->tz_dma, GFP_DMA);
+ if (!pd_dma->tz_addr) {
+ pr_err("Error in dma alloc\n");
+ return -ENOMEM;
+ }
+
+ /* Allocate dma memory to store array of blocks PA */
+ pd_dma->dma_blk_arr_addr =
+ dma_alloc_coherent(dev, (pd_dma->blocks * sizeof(u64)),
+ &pd_dma->dma_blk_arr_addr_phys, GFP_DMA);
+ if (!pd_dma->dma_blk_arr_addr) {
+ pr_err("Error in dma alloc\n");
+ goto free_tz_dma_alloc;
+ }
+
+ /* Assign dma block array PA to trustzone structure addr variable */
+ memcpy(&pd_dma->tz_addr->addr, &pd_dma->dma_blk_arr_addr_phys,
+ sizeof(dma_addr_t));
+
+ /* Allocate memory to store array of blocks VA */
+ pd_dma->pt = kzalloc(pd_dma->blocks * sizeof(void *), GFP_KERNEL);
+ if (!pd_dma->pt) {
+ pr_err("Error in memory alloc\n");
+ goto free_dma_blk_arr_alloc;
+ }
+
+ for (i = 0; i < pd_dma->blocks; i++) {
+ /* Allocate dma memory for blocks with PAGE_SIZE each */
+ pd_dma->pt[i] = dma_alloc_coherent(dev, PAGE_SIZE,
+ &dma_tmp, GFP_DMA);
+ if (!pd_dma->pt[i]) {
+ pr_err("Error in dma alloc i:%d - blocks:%d\n", i,
+ pd_dma->blocks);
+ goto free_mem_alloc;
+ }
+
+ /* Assign dma block PA to dma_blk_arr_addr */
+ memcpy(&pd_dma->dma_blk_arr_addr[i], &dma_tmp,
+ sizeof(dma_addr_t));
+ }
+ pd_dma->tz_addr->blk_size = PAGE_SIZE;
+ return 0;
+
+free_mem_alloc:
+ i = 0;
+ while (i < pd_dma->blocks && pd_dma->pt[i]) {
+ memcpy(&dma_tmp, &pd_dma->dma_blk_arr_addr[i],
+ sizeof(dma_addr_t));
+ dma_free_coherent(dev, PAGE_SIZE, pd_dma->pt[i], dma_tmp);
+ i++;
+ }
+ kfree(pd_dma->pt);
+free_dma_blk_arr_alloc:
+ dma_free_coherent(dev, (pd_dma->blocks * sizeof(u64)),
+ pd_dma->dma_blk_arr_addr,
+ pd_dma->dma_blk_arr_addr_phys);
+free_tz_dma_alloc:
+ dma_free_coherent(dev, sizeof(struct region), pd_dma->tz_addr,
+ pd_dma->tz_dma);
+
+ return -ENOMEM;
+}
+
+static void free_dma_mem(struct device *dev, struct pdseg_dma_mem_info *pd_dma)
+{
+ int i;
+ dma_addr_t dma_tmp = 0;
+
+ for (i = 0; i < pd_dma->blocks; i++) {
+ memcpy(&dma_tmp, &pd_dma->dma_blk_arr_addr[i],
+ sizeof(dma_addr_t));
+ dma_free_coherent(dev, PAGE_SIZE, pd_dma->pt[i],
+ dma_tmp);
+ }
+
+ dma_free_coherent(dev, (pd_dma->blocks * sizeof(u64)),
+ pd_dma->dma_blk_arr_addr,
+ pd_dma->dma_blk_arr_addr_phys);
+
+ dma_free_coherent(dev, sizeof(struct region), pd_dma->tz_addr,
+ pd_dma->tz_dma);
+ kfree(pd_dma->pt);
+}
+
+static int memcpy_pdseg_to_dma_blk(const char *fw_name, struct device *dev,
+ int ph_no, struct pdseg_dma_mem_info *pd_dma)
+{
+ const struct firmware *seg_fw;
+ int ret, offset_tmp = 0, tmp = 0;
+ size_t size = 0;
+
+ ret = request_firmware(&seg_fw, fw_name, dev);
+ if (ret) {
+ dev_err(dev, "failed to load %s\n", fw_name);
+ return ret;
+ }
+ size = seg_fw->size < PAGE_SIZE ?
+ seg_fw->size : PAGE_SIZE;
+ while (tmp < pd_dma->blocks && size) {
+ /* Clear last block and copy data */
+ if ((tmp + 1) == pd_dma->blocks)
+ memset_io(pd_dma->pt[tmp], 0, PAGE_SIZE);
+ memcpy_toio(pd_dma->pt[tmp], seg_fw->data + offset_tmp, size);
+ tmp++;
+ offset_tmp += size;
+ if ((seg_fw->size - offset_tmp) < PAGE_SIZE)
+ size = seg_fw->size - offset_tmp;
+ }
+ release_firmware(seg_fw);
+ ret = qti_scm_pdseg_memcpy_v2(PDSEG_PAS_ID, ph_no, pd_dma->tz_dma,
+ tmp);
+ if (ret) {
+ dev_err(dev, "pd seg memcpy scm failed\n");
+ return ret;
+ }
+ return ret;
+}
+
+static int __qcom_mdt_load_pd_seg(struct device *dev, const struct firmware *fw,
+ const char *fw_name, int pas_id, void *mem_region,
+ phys_addr_t mem_phys, size_t mem_size,
+ phys_addr_t *reloc_base, bool pas_init)
+{
+ const struct elf32_phdr *phdrs;
+ const struct elf32_phdr *phdr;
+ const struct elf32_hdr *ehdr;
+ phys_addr_t mem_reloc;
+ phys_addr_t min_addr = PHYS_ADDR_MAX;
+ ssize_t offset;
+ bool relocate = false;
+ int ret = 0;
+ int i;
+ u8 pd_asid;
+ int max_size = 0;
+ struct pdseg_dma_mem_info pd_dma = {0};
+ char *firmware_name;
+ size_t fw_name_len = strlen(fw_name);
+
+ if (!fw || !mem_region || !mem_phys || !mem_size)
+ return -EINVAL;
+
+ firmware_name = kstrdup(fw_name, GFP_KERNEL);
+ if (!firmware_name)
+ return -ENOMEM;
+
+ pd_asid = qcom_get_pd_asid(dev->of_node);
+
+ ehdr = (struct elf32_hdr *)fw->data;
+ phdrs = (struct elf32_phdr *)(ehdr + 1);
+
+ for (i = 0; i < ehdr->e_phnum; i++) {
+ phdr = &phdrs[i];
+
+ if (!mdt_phdr_valid(phdr))
+ continue;
+ /*
+ * While doing PD specific reloading, load only that PD
+ * specific writeable entries. Skip others
+ */
+ if ((QCOM_MDT_PF_ASID(phdr->p_flags) != pd_asid) ||
+ ((phdr->p_flags & PF_W) == 0))
+ continue;
+
+ if (phdr->p_flags & QCOM_MDT_RELOCATABLE)
+ relocate = true;
+
+ if (phdr->p_paddr < min_addr)
+ min_addr = phdr->p_paddr;
+
+ if (max_size < phdr->p_memsz)
+ max_size = phdr->p_memsz;
+ }
+
+ /**
+ * During userpd PIL segments reloading, Q6 is live. Due to
+ * this we can't access memory region of PIL segments. So
+ * create DMA chunks/blocks to store PIL segments data.
+ */
+ ret = allocate_dma_mem(dev, &pd_dma, max_size);
+ if (ret)
+ goto out;
+
+ if (relocate) {
+ /*
+ * The image is relocatable, so offset each segment based on
+ * the lowest segment address.
+ */
+ mem_reloc = min_addr;
+ } else {
+ /*
+ * Image is not relocatable, so offset each segment based on
+ * the allocated physical chunk of memory.
+ */
+ mem_reloc = mem_phys;
+ }
+
+ for (i = 0; i < ehdr->e_phnum; i++) {
+ phdr = &phdrs[i];
+
+ if (!mdt_phdr_valid(phdr))
+ continue;
+
+ /*
+ * While doing PD specific reloading, load only that PD
+ * specific writeable entries. Skip others
+ */
+ if ((QCOM_MDT_PF_ASID(phdr->p_flags) != pd_asid) ||
+ ((phdr->p_flags & PF_W) == 0))
+ continue;
+
+ offset = phdr->p_paddr - mem_reloc;
+ if (offset < 0 || offset + phdr->p_memsz > mem_size) {
+ dev_err(dev, "segment outside memory range\n");
+ ret = -EINVAL;
+ break;
+ }
+
+ if (phdr->p_filesz > phdr->p_memsz) {
+ dev_err(dev,
+ "refusing to load segment %d with p_filesz > p_memsz\n",
+ i);
+ ret = -EINVAL;
+ break;
+ }
+
+ if (phdr->p_filesz) {
+ snprintf(firmware_name + fw_name_len - 3, 4, "b%02d", i);
+
+ /* copy PIL segments data to dma blocks */
+ ret = memcpy_pdseg_to_dma_blk(firmware_name, dev, i, &pd_dma);
+ if (ret)
+ goto free_dma;
+ }
+ }
+free_dma:
+ free_dma_mem(dev, &pd_dma);
+
+out:
+ if (reloc_base)
+ *reloc_base = mem_reloc;
+
+ return ret;
+}
+
/**
* qcom_mdt_load() - load the firmware which header is loaded as fw
* @dev: device handle to associate resources with
@@ -410,5 +715,32 @@ int qcom_mdt_load_no_init(struct device *dev, const struct firmware *fw,
}
EXPORT_SYMBOL_GPL(qcom_mdt_load_no_init);

+/**
+ * qcom_mdt_load_pd_seg() - load userpd specific PIL segements
+ * @dev: device handle to associate resources with
+ * @fw: firmware object for the mdt file
+ * @firmware: name of the firmware, for construction of segment file names
+ * @pas_id: PAS identifier
+ * @mem_region: allocated memory region to load firmware into
+ * @mem_phys: physical address of allocated memory region
+ * @mem_size: size of the allocated memory region
+ * @reloc_base: adjusted physical address after relocation
+ *
+ * Here userpd PIL segements are stitched with rootpd firmware.
+ * This function reloads userpd specific PIL segments during SSR
+ * of userpd.
+ *
+ * Returns 0 on success, negative errno otherwise.
+ */
+int qcom_mdt_load_pd_seg(struct device *dev, const struct firmware *fw,
+ const char *firmware, int pas_id, void *mem_region,
+ phys_addr_t mem_phys, size_t mem_size,
+ phys_addr_t *reloc_base)
+{
+ return __qcom_mdt_load_pd_seg(dev, fw, firmware, pas_id, mem_region, mem_phys,
+ mem_size, reloc_base, true);
+}
+EXPORT_SYMBOL_GPL(qcom_mdt_load_pd_seg);
+
MODULE_DESCRIPTION("Firmware parser for Qualcomm MDT format");
MODULE_LICENSE("GPL v2");
diff --git a/include/linux/soc/qcom/mdt_loader.h b/include/linux/soc/qcom/mdt_loader.h
index 9e8e60421192..57021236dfc9 100644
--- a/include/linux/soc/qcom/mdt_loader.h
+++ b/include/linux/soc/qcom/mdt_loader.h
@@ -7,6 +7,11 @@
#define QCOM_MDT_TYPE_MASK (7 << 24)
#define QCOM_MDT_TYPE_HASH (2 << 24)
#define QCOM_MDT_RELOCATABLE BIT(27)
+#define QCOM_MDT_ASID_MASK 0xfu
+#define QCOM_MDT_PF_ASID_SHIFT 16
+#define QCOM_MDT_PF_ASID_MASK (QCOM_MDT_ASID_MASK << QCOM_MDT_PF_ASID_SHIFT)
+#define QCOM_MDT_PF_ASID(x) \
+ (((x) >> QCOM_MDT_PF_ASID_SHIFT) & QCOM_MDT_ASID_MASK)

struct device;
struct firmware;
@@ -27,6 +32,10 @@ int qcom_mdt_load_no_init(struct device *dev, const struct firmware *fw,
const char *fw_name, int pas_id, void *mem_region,
phys_addr_t mem_phys, size_t mem_size,
phys_addr_t *reloc_base);
+int qcom_mdt_load_pd_seg(struct device *dev, const struct firmware *fw,
+ const char *firmware, int pas_id, void *mem_region,
+ phys_addr_t mem_phys, size_t mem_size,
+ phys_addr_t *reloc_base);
void *qcom_mdt_read_metadata(const struct firmware *fw, size_t *data_len,
const char *fw_name, struct device *dev);

@@ -62,6 +71,16 @@ static inline int qcom_mdt_load_no_init(struct device *dev,
return -ENODEV;
}

+static inline int qcom_mdt_load_pd_seg(struct device *dev,
+ const struct firmware *fw,
+ const char *fw_name, int pas_id,
+ void *mem_region, phys_addr_t mem_phys,
+ size_t mem_size,
+ phys_addr_t *reloc_base)
+{
+ return -ENODEV;
+}
+
static inline void *qcom_mdt_read_metadata(const struct firmware *fw,
size_t *data_len, const char *fw_name,
struct device *dev)
--
2.17.1


2023-05-21 23:02:57

by Manikanta Mylavarapu

[permalink] [raw]
Subject: [PATCH V2 11/13] arm64: dtsi: qcom: ipq5018: enable nodes required for multipd

Enable nodes required for multipd remoteproc bring up

Signed-off-by: Manikanta Mylavarapu <[email protected]>
---
Changes in V2:
- Corrected syntax like alignmnet and kept nodes in sorted order.
- Covered entire TCSR region.
- Added 'firmware-name' property.

arch/arm64/boot/dts/qcom/ipq5018.dtsi | 140 ++++++++++++++++++++++++++
1 file changed, 140 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
index 9f13d2dcdfd5..3772d54d89e4 100644
--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
@@ -85,6 +85,18 @@
reg = <0x0 0x4ac00000 0x0 0x200000>;
no-map;
};
+
+ q6_region: wcnss@4b000000 {
+ reg = <0x0 0x4b000000 0x0 0x1700000>;
+ no-map;
+ };
+
+ smem@4ab00000 {
+ compatible = "qcom,smem";
+ reg = <0x0 0x4ab00000 0x0 0x100000>;
+ hwlocks = <&tcsr_mutex 0>;
+ no-map;
+ };
};

soc: soc@0 {
@@ -128,6 +140,12 @@
#power-domain-cells = <1>;
};

+ tcsr_mutex: hwlock@1905000 {
+ compatible = "qcom,tcsr-mutex";
+ reg = <0x01905000 0x20000>;
+ #hwlock-cells = <1>;
+ };
+
sdhc_1: mmc@7804000 {
compatible = "qcom,ipq5018-sdhci", "qcom,sdhci-msm-v5";
reg = <0x7804000 0x1000>;
@@ -181,6 +199,14 @@
};
};

+ apcs_glb: mailbox@b111000 {
+ compatible = "qcom,ipq5018-apcs-apps-global",
+ "qcom,ipq6018-apcs-apps-global";
+ reg = <0x0b111000 0x1000>;
+ #clock-cells = <1>;
+ #mbox-cells = <1>;
+ };
+
timer@b120000 {
compatible = "arm,armv7-timer-mem";
reg = <0x0b120000 0x1000>;
@@ -238,6 +264,96 @@
status = "disabled";
};
};
+
+ q6v5_wcss: remoteproc@cd00000 {
+ compatible = "qcom,ipq5018-q6-mpd";
+ reg = <0x0cd00000 0x4040>;
+ firmware-name = "IPQ5018/q6_fw.mdt",
+ "IPQ5018/m3_fw.mdt",
+ "qcn6122/m3_fw.mdt";
+ interrupts-extended = <&intc GIC_SPI 291 IRQ_TYPE_EDGE_RISING>,
+ <&wcss_smp2p_in 0 0>,
+ <&wcss_smp2p_in 1 0>,
+ <&wcss_smp2p_in 2 0>,
+ <&wcss_smp2p_in 3 0>;
+ interrupt-names = "wdog",
+ "fatal",
+ "ready",
+ "handover",
+ "stop-ack";
+
+ qcom,smem-states = <&wcss_smp2p_out 0>,
+ <&wcss_smp2p_out 1>;
+ qcom,smem-state-names = "shutdown",
+ "stop";
+ memory-region = <&q6_region>;
+
+ glink-edge {
+ interrupts = <GIC_SPI 179 IRQ_TYPE_EDGE_RISING>;
+ label = "rtr";
+ qcom,remote-pid = <1>;
+ mboxes = <&apcs_glb 8>;
+ };
+
+ pd-1 {
+ compatible = "qcom,ipq5018-wcss-ahb-mpd";
+ firmware-name = "IPQ5018/q6_fw.mdt";
+ interrupts-extended = <&wcss_smp2p_in 8 0>,
+ <&wcss_smp2p_in 9 0>,
+ <&wcss_smp2p_in 12 0>,
+ <&wcss_smp2p_in 11 0>;
+ interrupt-names = "fatal",
+ "ready",
+ "spawn-ack",
+ "stop-ack";
+ qcom,smem-states = <&wcss_smp2p_out 8>,
+ <&wcss_smp2p_out 9>,
+ <&wcss_smp2p_out 10>;
+ qcom,smem-state-names = "shutdown",
+ "stop",
+ "spawn";
+ };
+
+ pd-2 {
+ compatible = "qcom,ipq5018-wcss-pcie-mpd";
+ interrupts-extended = <&wcss_smp2p_in 16 0>,
+ <&wcss_smp2p_in 17 0>,
+ <&wcss_smp2p_in 20 0>,
+ <&wcss_smp2p_in 19 0>;
+ interrupt-names = "fatal",
+ "ready",
+ "spawn-ack",
+ "stop-ack";
+
+ qcom,smem-states = <&wcss_smp2p_out 16>,
+ <&wcss_smp2p_out 17>,
+ <&wcss_smp2p_out 18>;
+ qcom,smem-state-names = "shutdown",
+ "stop",
+ "spawn";
+ status = "disabled";
+ };
+
+ pd-3 {
+ compatible = "qcom,ipq5018-wcss-pcie-mpd";
+ interrupts-extended = <&wcss_smp2p_in 24 0>,
+ <&wcss_smp2p_in 25 0>,
+ <&wcss_smp2p_in 28 0>,
+ <&wcss_smp2p_in 27 0>;
+ interrupt-names = "fatal",
+ "ready",
+ "spawn-ack",
+ "stop-ack";
+
+ qcom,smem-states = <&wcss_smp2p_out 24>,
+ <&wcss_smp2p_out 25>,
+ <&wcss_smp2p_out 26>;
+ qcom,smem-state-names = "shutdown",
+ "stop",
+ "spawn";
+ status = "disabled";
+ };
+ };
};

timer {
@@ -247,4 +363,28 @@
<GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
+
+ wcss: wcss-smp2p {
+ compatible = "qcom,smp2p";
+ qcom,smem = <435>, <428>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>;
+
+ mboxes = <&apcs_glb 9>;
+
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <1>;
+
+ wcss_smp2p_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ wcss_smp2p_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
};
--
2.17.1


2023-05-21 23:05:45

by Manikanta Mylavarapu

[permalink] [raw]
Subject: [PATCH V2 03/13] dt-bindings: arm: qcom: Document the Qualcomm rdp432-c1 board

Document the Qualcomm rdp432-c1 board based on IPQ5018 Soc.

Signed-off-by: Manikanta Mylavarapu <[email protected]>
---
Changes in V2:
- Renamed mp03.5-c1 to rdp432-c1

Documentation/devicetree/bindings/arm/qcom.yaml | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
index 33a9a97d7b5b..53ae2b6b2da6 100644
--- a/Documentation/devicetree/bindings/arm/qcom.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom.yaml
@@ -337,6 +337,7 @@ properties:
- items:
- enum:
- qcom,ipq5018-rdp432-c2
+ - qcom,ipq5018-rdp432-c1
- const: qcom,ipq5018

- items:
--
2.17.1


2023-05-30 11:35:23

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH V2 04/13] dt-bindings: clock: qcom: gcc-ipq5018: remove q6 clocks macros

On 22/05/2023 00:28, Manikanta Mylavarapu wrote:
> Since Q6 firmware takes care of bring up clocks in multipd
> model, remove bring up clock macros.
>
> Signed-off-by: Manikanta Mylavarapu <[email protected]>
> ---
> include/dt-bindings/clock/qcom,gcc-ipq5018.h | 21 --------------------
> 1 file changed, 21 deletions(-)
>

I am fine with this if it still compiles... I have doubts about it,
unless of some depedencies (you mentioned three !)... but then it gets
complicated.

Keep patches doing same logical change in same patchset. This dependency
dance in recent submissions is making things tricky and prolonging your
upstreaming process significantly.

Best regards,
Krzysztof


2023-05-30 11:37:07

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH V2 03/13] dt-bindings: arm: qcom: Document the Qualcomm rdp432-c1 board

On 22/05/2023 00:28, Manikanta Mylavarapu wrote:
> Document the Qualcomm rdp432-c1 board based on IPQ5018 Soc.
>
> Signed-off-by: Manikanta Mylavarapu <[email protected]>
> ---
> Changes in V2:
> - Renamed mp03.5-c1 to rdp432-c1
>
> Documentation/devicetree/bindings/arm/qcom.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
> index 33a9a97d7b5b..53ae2b6b2da6 100644
> --- a/Documentation/devicetree/bindings/arm/qcom.yaml
> +++ b/Documentation/devicetree/bindings/arm/qcom.yaml
> @@ -337,6 +337,7 @@ properties:
> - items:
> - enum:
> - qcom,ipq5018-rdp432-c2
> + - qcom,ipq5018-rdp432-c1

Then keep it before c2, to have it sorted.

Best regards,
Krzysztof


2023-05-30 11:43:21

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH V2 11/13] arm64: dtsi: qcom: ipq5018: enable nodes required for multipd

On 22/05/2023 00:28, Manikanta Mylavarapu wrote:
> Enable nodes required for multipd remoteproc bring up

Please use subject prefixes matching the subsystem. You can get them for
example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory
your patch is touching.

It is "dts". Not "dtsi".

>
> Signed-off-by: Manikanta Mylavarapu <[email protected]>
> ---
> Changes in V2:
> - Corrected syntax like alignmnet and kept nodes in sorted order.
> - Covered entire TCSR region.
> - Added 'firmware-name' property.
>
> arch/arm64/boot/dts/qcom/ipq5018.dtsi | 140 ++++++++++++++++++++++++++
> 1 file changed, 140 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
> index 9f13d2dcdfd5..3772d54d89e4 100644
> --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
> @@ -85,6 +85,18 @@
> reg = <0x0 0x4ac00000 0x0 0x200000>;
> no-map;
> };
> +
> + q6_region: wcnss@4b000000 {
> + reg = <0x0 0x4b000000 0x0 0x1700000>;
> + no-map;
> + };
> +
> + smem@4ab00000 {
> + compatible = "qcom,smem";
> + reg = <0x0 0x4ab00000 0x0 0x100000>;
> + hwlocks = <&tcsr_mutex 0>;
> + no-map;
> + };
> };
>
> soc: soc@0 {
> @@ -128,6 +140,12 @@
> #power-domain-cells = <1>;
> };
>
> + tcsr_mutex: hwlock@1905000 {
> + compatible = "qcom,tcsr-mutex";
> + reg = <0x01905000 0x20000>;
> + #hwlock-cells = <1>;
> + };
> +
> sdhc_1: mmc@7804000 {
> compatible = "qcom,ipq5018-sdhci", "qcom,sdhci-msm-v5";
> reg = <0x7804000 0x1000>;
> @@ -181,6 +199,14 @@
> };
> };
>
> + apcs_glb: mailbox@b111000 {
> + compatible = "qcom,ipq5018-apcs-apps-global",
> + "qcom,ipq6018-apcs-apps-global";
> + reg = <0x0b111000 0x1000>;
> + #clock-cells = <1>;
> + #mbox-cells = <1>;
> + };
> +
> timer@b120000 {
> compatible = "arm,armv7-timer-mem";
> reg = <0x0b120000 0x1000>;
> @@ -238,6 +264,96 @@
> status = "disabled";
> };
> };
> +
> + q6v5_wcss: remoteproc@cd00000 {
> + compatible = "qcom,ipq5018-q6-mpd";
> + reg = <0x0cd00000 0x4040>;
> + firmware-name = "IPQ5018/q6_fw.mdt",
> + "IPQ5018/m3_fw.mdt",
> + "qcn6122/m3_fw.mdt";
> + interrupts-extended = <&intc GIC_SPI 291 IRQ_TYPE_EDGE_RISING>,
> + <&wcss_smp2p_in 0 0>,
> + <&wcss_smp2p_in 1 0>,
> + <&wcss_smp2p_in 2 0>,
> + <&wcss_smp2p_in 3 0>;
> + interrupt-names = "wdog",
> + "fatal",
> + "ready",
> + "handover",
> + "stop-ack";
> +
> + qcom,smem-states = <&wcss_smp2p_out 0>,
> + <&wcss_smp2p_out 1>;
> + qcom,smem-state-names = "shutdown",
> + "stop";
> + memory-region = <&q6_region>;
> +
> + glink-edge {
> + interrupts = <GIC_SPI 179 IRQ_TYPE_EDGE_RISING>;
> + label = "rtr";
> + qcom,remote-pid = <1>;
> + mboxes = <&apcs_glb 8>;
> + };
> +
> + pd-1 {
> + compatible = "qcom,ipq5018-wcss-ahb-mpd";
> + firmware-name = "IPQ5018/q6_fw.mdt";
> + interrupts-extended = <&wcss_smp2p_in 8 0>,
> + <&wcss_smp2p_in 9 0>,
> + <&wcss_smp2p_in 12 0>,
> + <&wcss_smp2p_in 11 0>;

What "0" stands for?

> + interrupt-names = "fatal",
> + "ready",
Best regards,
Krzysztof


2023-06-01 19:20:15

by Robert Marko

[permalink] [raw]
Subject: Re: [PATCH V2 04/13] dt-bindings: clock: qcom: gcc-ipq5018: remove q6 clocks macros

On 30. 05. 2023. 13:01, Krzysztof Kozlowski wrote:

> On 22/05/2023 00:28, Manikanta Mylavarapu wrote:
>> Since Q6 firmware takes care of bring up clocks in multipd
>> model, remove bring up clock macros.
>>
>> Signed-off-by: Manikanta Mylavarapu <[email protected]>
>> ---
>> include/dt-bindings/clock/qcom,gcc-ipq5018.h | 21 --------------------
>> 1 file changed, 21 deletions(-)
>>
> I am fine with this if it still compiles... I have doubts about it,
> unless of some depedencies (you mentioned three !)... but then it gets
> complicated.
>
> Keep patches doing same logical change in same patchset. This dependency
> dance in recent submissions is making things tricky and prolonging your
> upstreaming process significantly.

Considering that the basic IPQ5018 patchset that this series depends on
has not yet been merged, why not just drop these there instead?

Regards,
Robert

>
> Best regards,
> Krzysztof
>
>
>

2023-06-05 05:39:27

by Manikanta Mylavarapu

[permalink] [raw]
Subject: Re: [PATCH V2 03/13] dt-bindings: arm: qcom: Document the Qualcomm rdp432-c1 board



On 5/30/2023 4:29 PM, Krzysztof Kozlowski wrote:
> On 22/05/2023 00:28, Manikanta Mylavarapu wrote:
>> Document the Qualcomm rdp432-c1 board based on IPQ5018 Soc.
>>
>> Signed-off-by: Manikanta Mylavarapu <[email protected]>
>> ---
>> Changes in V2:
>> - Renamed mp03.5-c1 to rdp432-c1
>>
>> Documentation/devicetree/bindings/arm/qcom.yaml | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
>> index 33a9a97d7b5b..53ae2b6b2da6 100644
>> --- a/Documentation/devicetree/bindings/arm/qcom.yaml
>> +++ b/Documentation/devicetree/bindings/arm/qcom.yaml
>> @@ -337,6 +337,7 @@ properties:
>> - items:
>> - enum:
>> - qcom,ipq5018-rdp432-c2
>> + - qcom,ipq5018-rdp432-c1
>
> Then keep it before c2, to have it sorted.
>
> Best regards,
> Krzysztof
>

Sure, I will move c1 first.

Thanks & Regards,
Manikanta.

2023-06-05 05:40:35

by Manikanta Mylavarapu

[permalink] [raw]
Subject: Re: [PATCH V2 11/13] arm64: dtsi: qcom: ipq5018: enable nodes required for multipd



On 5/30/2023 4:35 PM, Krzysztof Kozlowski wrote:
> On 22/05/2023 00:28, Manikanta Mylavarapu wrote:
>> Enable nodes required for multipd remoteproc bring up
>
> Please use subject prefixes matching the subsystem. You can get them for
> example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory
> your patch is touching.
>
> It is "dts". Not "dtsi".
>
Sure, I will update to 'dtsi'.

>>
>> Signed-off-by: Manikanta Mylavarapu <[email protected]>
>> ---
>> Changes in V2:
>> - Corrected syntax like alignmnet and kept nodes in sorted order.
>> - Covered entire TCSR region.
>> - Added 'firmware-name' property.
>>
>> arch/arm64/boot/dts/qcom/ipq5018.dtsi | 140 ++++++++++++++++++++++++++
>> 1 file changed, 140 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
>> index 9f13d2dcdfd5..3772d54d89e4 100644
>> --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
>> @@ -85,6 +85,18 @@
>> reg = <0x0 0x4ac00000 0x0 0x200000>;
>> no-map;
>> };
>> +
>> + q6_region: wcnss@4b000000 {
>> + reg = <0x0 0x4b000000 0x0 0x1700000>;
>> + no-map;
>> + };
>> +
>> + smem@4ab00000 {
>> + compatible = "qcom,smem";
>> + reg = <0x0 0x4ab00000 0x0 0x100000>;
>> + hwlocks = <&tcsr_mutex 0>;
>> + no-map;
>> + };
>> };
>>
>> soc: soc@0 {
>> @@ -128,6 +140,12 @@
>> #power-domain-cells = <1>;
>> };
>>
>> + tcsr_mutex: hwlock@1905000 {
>> + compatible = "qcom,tcsr-mutex";
>> + reg = <0x01905000 0x20000>;
>> + #hwlock-cells = <1>;
>> + };
>> +
>> sdhc_1: mmc@7804000 {
>> compatible = "qcom,ipq5018-sdhci", "qcom,sdhci-msm-v5";
>> reg = <0x7804000 0x1000>;
>> @@ -181,6 +199,14 @@
>> };
>> };
>>
>> + apcs_glb: mailbox@b111000 {
>> + compatible = "qcom,ipq5018-apcs-apps-global",
>> + "qcom,ipq6018-apcs-apps-global";
>> + reg = <0x0b111000 0x1000>;
>> + #clock-cells = <1>;
>> + #mbox-cells = <1>;
>> + };
>> +
>> timer@b120000 {
>> compatible = "arm,armv7-timer-mem";
>> reg = <0x0b120000 0x1000>;
>> @@ -238,6 +264,96 @@
>> status = "disabled";
>> };
>> };
>> +
>> + q6v5_wcss: remoteproc@cd00000 {
>> + compatible = "qcom,ipq5018-q6-mpd";
>> + reg = <0x0cd00000 0x4040>;
>> + firmware-name = "IPQ5018/q6_fw.mdt",
>> + "IPQ5018/m3_fw.mdt",
>> + "qcn6122/m3_fw.mdt";
>> + interrupts-extended = <&intc GIC_SPI 291 IRQ_TYPE_EDGE_RISING>,
>> + <&wcss_smp2p_in 0 0>,
>> + <&wcss_smp2p_in 1 0>,
>> + <&wcss_smp2p_in 2 0>,
>> + <&wcss_smp2p_in 3 0>;
>> + interrupt-names = "wdog",
>> + "fatal",
>> + "ready",
>> + "handover",
>> + "stop-ack";
>> +
>> + qcom,smem-states = <&wcss_smp2p_out 0>,
>> + <&wcss_smp2p_out 1>;
>> + qcom,smem-state-names = "shutdown",
>> + "stop";
>> + memory-region = <&q6_region>;
>> +
>> + glink-edge {
>> + interrupts = <GIC_SPI 179 IRQ_TYPE_EDGE_RISING>;
>> + label = "rtr";
>> + qcom,remote-pid = <1>;
>> + mboxes = <&apcs_glb 8>;
>> + };
>> +
>> + pd-1 {
>> + compatible = "qcom,ipq5018-wcss-ahb-mpd";
>> + firmware-name = "IPQ5018/q6_fw.mdt";
>> + interrupts-extended = <&wcss_smp2p_in 8 0>,
>> + <&wcss_smp2p_in 9 0>,
>> + <&wcss_smp2p_in 12 0>,
>> + <&wcss_smp2p_in 11 0>;
>
> What "0" stands for?
>
0 means IRQ_NONE. These are software interrupts (register write),
so we have configured to 0. I will replace 0 with IRQ_NONE.

Thanks & Regards,
Manikanta.

>> + interrupt-names = "fatal",
>> + "ready",
> Best regards,
> Krzysztof
>

2023-06-05 05:58:11

by Manikanta Mylavarapu

[permalink] [raw]
Subject: Re: [PATCH V2 11/13] arm64: dtsi: qcom: ipq5018: enable nodes required for multipd



On 6/5/2023 11:05 AM, Manikanta Mylavarapu wrote:
>
>
> On 5/30/2023 4:35 PM, Krzysztof Kozlowski wrote:
>> On 22/05/2023 00:28, Manikanta Mylavarapu wrote:
>>> Enable nodes required for multipd remoteproc bring up
>>
>> Please use subject prefixes matching the subsystem. You can get them for
>> example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory
>> your patch is touching.
>>
>> It is "dts". Not "dtsi".
>>
> Sure, I will update to 'dtsi'.
>
Sorry please discard my previous reply.
I will update to dts.

>>>
>>> Signed-off-by: Manikanta Mylavarapu <[email protected]>
>>> ---
>>> Changes in V2:
>>>     - Corrected syntax like alignmnet and kept nodes in sorted order.
>>>     - Covered entire TCSR region.
>>>     - Added 'firmware-name' property.
>>>
>>>   arch/arm64/boot/dts/qcom/ipq5018.dtsi | 140 ++++++++++++++++++++++++++
>>>   1 file changed, 140 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
>>> b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
>>> index 9f13d2dcdfd5..3772d54d89e4 100644
>>> --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
>>> @@ -85,6 +85,18 @@
>>>               reg = <0x0 0x4ac00000 0x0 0x200000>;
>>>               no-map;
>>>           };
>>> +
>>> +        q6_region: wcnss@4b000000 {
>>> +            reg = <0x0 0x4b000000 0x0 0x1700000>;
>>> +            no-map;
>>> +        };
>>> +
>>> +        smem@4ab00000 {
>>> +            compatible = "qcom,smem";
>>> +            reg = <0x0 0x4ab00000 0x0 0x100000>;
>>> +            hwlocks = <&tcsr_mutex 0>;
>>> +            no-map;
>>> +        };
>>>       };
>>>
>>>       soc: soc@0 {
>>> @@ -128,6 +140,12 @@
>>>               #power-domain-cells = <1>;
>>>           };
>>>
>>> +        tcsr_mutex: hwlock@1905000 {
>>> +            compatible = "qcom,tcsr-mutex";
>>> +            reg = <0x01905000 0x20000>;
>>> +            #hwlock-cells = <1>;
>>> +        };
>>> +
>>>           sdhc_1: mmc@7804000 {
>>>               compatible = "qcom,ipq5018-sdhci", "qcom,sdhci-msm-v5";
>>>               reg = <0x7804000 0x1000>;
>>> @@ -181,6 +199,14 @@
>>>               };
>>>           };
>>>
>>> +        apcs_glb: mailbox@b111000 {
>>> +            compatible = "qcom,ipq5018-apcs-apps-global",
>>> +                     "qcom,ipq6018-apcs-apps-global";
>>> +            reg = <0x0b111000 0x1000>;
>>> +            #clock-cells = <1>;
>>> +            #mbox-cells = <1>;
>>> +        };
>>> +
>>>           timer@b120000 {
>>>               compatible = "arm,armv7-timer-mem";
>>>               reg = <0x0b120000 0x1000>;
>>> @@ -238,6 +264,96 @@
>>>                   status = "disabled";
>>>               };
>>>           };
>>> +
>>> +        q6v5_wcss: remoteproc@cd00000 {
>>> +            compatible = "qcom,ipq5018-q6-mpd";
>>> +            reg = <0x0cd00000 0x4040>;
>>> +            firmware-name = "IPQ5018/q6_fw.mdt",
>>> +                    "IPQ5018/m3_fw.mdt",
>>> +                    "qcn6122/m3_fw.mdt";
>>> +            interrupts-extended = <&intc GIC_SPI 291
>>> IRQ_TYPE_EDGE_RISING>,
>>> +                          <&wcss_smp2p_in 0 0>,
>>> +                          <&wcss_smp2p_in 1 0>,
>>> +                          <&wcss_smp2p_in 2 0>,
>>> +                          <&wcss_smp2p_in 3 0>;
>>> +            interrupt-names = "wdog",
>>> +                      "fatal",
>>> +                      "ready",
>>> +                      "handover",
>>> +                      "stop-ack";
>>> +
>>> +            qcom,smem-states = <&wcss_smp2p_out 0>,
>>> +                       <&wcss_smp2p_out 1>;
>>> +            qcom,smem-state-names = "shutdown",
>>> +                        "stop";
>>> +            memory-region = <&q6_region>;
>>> +
>>> +            glink-edge {
>>> +                interrupts = <GIC_SPI 179 IRQ_TYPE_EDGE_RISING>;
>>> +                label = "rtr";
>>> +                qcom,remote-pid = <1>;
>>> +                mboxes = <&apcs_glb 8>;
>>> +            };
>>> +
>>> +            pd-1 {
>>> +                compatible = "qcom,ipq5018-wcss-ahb-mpd";
>>> +                firmware-name = "IPQ5018/q6_fw.mdt";
>>> +                interrupts-extended = <&wcss_smp2p_in 8 0>,
>>> +                              <&wcss_smp2p_in 9 0>,
>>> +                              <&wcss_smp2p_in 12 0>,
>>> +                              <&wcss_smp2p_in 11 0>;
>>
>> What "0" stands for?
>>
> 0 means IRQ_NONE. These are software interrupts (register write),
> so we have configured to 0. I will replace 0 with IRQ_NONE.
>
> Thanks & Regards,
> Manikanta.
>
>>> +                interrupt-names = "fatal",
>>> +                          "ready",
>> Best regards,
>> Krzysztof
>>

2023-06-05 06:39:47

by Manikanta Mylavarapu

[permalink] [raw]
Subject: Re: [PATCH V2 04/13] dt-bindings: clock: qcom: gcc-ipq5018: remove q6 clocks macros



On 6/2/2023 12:25 AM, Robert Marko wrote:
> On 30. 05. 2023. 13:01, Krzysztof Kozlowski wrote:
>
>> On 22/05/2023 00:28, Manikanta Mylavarapu wrote:
>>> Since Q6 firmware takes care of bring up clocks in multipd
>>> model, remove bring up clock macros.
>>>
>>> Signed-off-by: Manikanta Mylavarapu <[email protected]>
>>> ---
>>>   include/dt-bindings/clock/qcom,gcc-ipq5018.h | 21 --------------------
>>>   1 file changed, 21 deletions(-)
>>>
>> I am fine with this if it still compiles... I have doubts about it,
>> unless of some depedencies (you mentioned three !)... but then it gets
>> complicated.
>>
>> Keep patches doing same logical change in same patchset. This dependency
>> dance in recent submissions is making things tricky and prolonging your
>> upstreaming process significantly.
>
> Considering that the basic IPQ5018 patchset that this series depends on
> has not yet been merged, why not just drop these there instead?
>
> Regards,
> Robert
>
Yeah i agree. I will drop this patch in this series.

Thanks & Regards,
Manikanta.

>>
>> Best regards,
>> Krzysztof
>>
>>
>>

2023-06-24 07:49:54

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH V2 10/13] remoteproc: qcom: Add Hexagon based multipd rproc driver

On 22/05/2023 00:28, Manikanta Mylavarapu wrote:
> It adds support to bring up remoteproc's on multipd model.
> Pd means protection domain. It's similar to process in Linux.
> Here QDSP6 processor runs each wifi radio functionality on a
> separate process. One process can't access other process
> resources, so this is termed as PD i.e protection domain.
>
> Here we have two pd's called root and user pd. We can correlate
> Root pd as root and user pd as user in linux. Root pd has more
> privileges than user pd. Root will provide services to user pd.
>
> From remoteproc driver perspective, root pd corresponds to QDSP6
> processor bring up and user pd corresponds to Wifi radio (WCSS)
> bring up.
>
> Here WCSS(user) PD is dependent on Q6(root) PD, so first
> q6 pd should be up before wcss pd. After wcss pd goes down,
> q6 pd should be turned off.
>
> IPQ5018, IPQ9574 supports multipd remoteproc driver.
>
> Signed-off-by: Manikanta Mylavarapu <[email protected]>
> ---
> Changes in V2:
> - Common functionalities moved to seperate patches
> - qcom_get_pd_asid() moved to mpd driver
> - Last DMA block alone memset to zero
> - Added diagram to show how userpd data is organized and sent to
> trustzone
> - Rewritten commit message since most of the content available
> in cover page
> - Removed 'remote_id' becuase it's not required for bring up.
>
> drivers/remoteproc/Kconfig | 20 +
> drivers/remoteproc/Makefile | 1 +
> drivers/remoteproc/qcom_common.h | 9 +
> drivers/remoteproc/qcom_q6v5_mpd.c | 677 ++++++++++++++++++++++++++++
> drivers/soc/qcom/mdt_loader.c | 332 ++++++++++++++
> include/linux/soc/qcom/mdt_loader.h | 19 +
> 6 files changed, 1058 insertions(+)
> create mode 100644 drivers/remoteproc/qcom_q6v5_mpd.c
>
> diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig
> index a850e9f486dd..44af5c36f67e 100644
> --- a/drivers/remoteproc/Kconfig
> +++ b/drivers/remoteproc/Kconfig
> @@ -234,6 +234,26 @@ config QCOM_Q6V5_PAS
> CDSP (Compute DSP), MPSS (Modem Peripheral SubSystem), and
> SLPI (Sensor Low Power Island).
>
> +config QCOM_Q6V5_MPD
> + tristate "Qualcomm Hexagon based MPD model Peripheral Image Loader"
> + depends on OF && ARCH_QCOM
> + depends on QCOM_SMEM
> + depends on RPMSG_QCOM_SMD || RPMSG_QCOM_SMD=n
> + depends on RPMSG_QCOM_GLINK_SMEM || RPMSG_QCOM_GLINK_SMEM=n
> + depends on QCOM_SYSMON || QCOM_SYSMON=n
> + depends on RPMSG_QCOM_GLINK || RPMSG_QCOM_GLINK=n
> + depends on QCOM_AOSS_QMP || QCOM_AOSS_QMP=n
> + select MFD_SYSCON

Do you really need this?

> + select QCOM_MDT_LOADER
> + select QCOM_PIL_INFO
> + select QCOM_Q6V5_COMMON
> + select QCOM_RPROC_COMMON
> + select QCOM_SCM
> + help
> + Say y here to support the Qualcomm Secure Peripheral Image Loader
> + for the Hexagon based MultiPD model remote processors on e.g. IPQ5018.
> + This is trustZone wireless subsystem.
> +

...

> + int (*powerup_scm)(u32 peripheral);
> + int (*powerdown_scm)(u32 peripheral);
> +};
> +
> +/**
> + * qcom_get_pd_asid() - get the pd asid number from DT node

From node name? NAK. It does not work like that. Node names can change
and you did not define this number as part of ABI.

Probably you wanted unit address.

> + * @node: device tree node
> + *
> + * Returns asid if node name has 'pd' string
> + */
> +s8 qcom_get_pd_asid(struct device_node *node)
> +{
> + char *str;
> + s8 pd_asid;
> +
> + if (!node)
> + return -EINVAL;
> +
> + str = strstr(node->name, "pd");
> + if (!str)
> + return 0;
> +
> + str += strlen("pd") + 1;
> + return kstrtos8(str, 10, &pd_asid) ? -EINVAL : pd_asid;
> +}
> +EXPORT_SYMBOL(qcom_get_pd_asid);
> +

...

> +
> +static int q6_wcss_spawn_pd(struct rproc *rproc)
> +{
> + int ret;
> + struct q6_wcss *wcss = rproc->priv;
> +
> + ret = qcom_q6v5_request_spawn(&wcss->q6);
> + if (ret == -ETIMEDOUT) {
> + pr_err("%s spawn timedout\n", rproc->name);

dev_err

> + return ret;
> + }
> +
> + ret = qcom_q6v5_wait_for_start(&wcss->q6, msecs_to_jiffies(10000));
> + if (ret == -ETIMEDOUT) {
> + pr_err("%s start timedout\n", rproc->name);

dev_err

> + wcss->q6.running = false;
> + return ret;
> + }
> + wcss->q6.running = true;
> + return ret;
> +}
> +
> +static int wcss_ahb_pcie_pd_start(struct rproc *rproc)
> +{
> + struct q6_wcss *wcss = rproc->priv;
> + const struct wcss_data *desc = wcss->desc;
> + int ret;
> +
> + if (!desc->reset_seq)
> + return 0;
> +
> + if (desc->powerup_scm) {
> + ret = desc->powerup_scm(desc->pasid);
> + if (ret) {
> + dev_err(wcss->dev, "failed to power up pd\n");
> + return ret;
> + }
> + }
> +
> + ret = q6_wcss_spawn_pd(rproc);
> + if (ret)
> + return ret;
> +
> + wcss->state = WCSS_NORMAL;
> + return ret;
> +}
> +
> +static int q6_wcss_stop(struct rproc *rproc)
> +{
> + struct q6_wcss *wcss = rproc->priv;
> + const struct wcss_data *desc = wcss->desc;
> + int ret;
> +
> + ret = qcom_scm_pas_shutdown(desc->pasid);
> + if (ret) {
> + dev_err(wcss->dev, "not able to shutdown\n");
> + return ret;
> + }
> + qcom_q6v5_unprepare(&wcss->q6);
> +
> + return 0;
> +}
> +
> +static int wcss_ahb_pcie_pd_stop(struct rproc *rproc)
> +{
> + struct q6_wcss *wcss = rproc->priv;
> + struct rproc *rpd_rproc = dev_get_drvdata(wcss->dev->parent);
> + const struct wcss_data *desc = wcss->desc;
> + int ret;
> +
> + if (!desc->reset_seq)
> + goto shut_down_rpd;
> +
> + if (rproc->state != RPROC_CRASHED && wcss->q6.stop_bit) {
> + ret = qcom_q6v5_request_stop(&wcss->q6, NULL);
> + if (ret) {
> + dev_err(&rproc->dev, "pd not stopped\n");
> + return ret;
> + }
> + }
> +
> + if (desc->powerdown_scm) {
> + ret = desc->powerdown_scm(desc->pasid);
> + if (ret) {
> + dev_err(wcss->dev, "failed to power down pd\n");
> + return ret;
> + }
> + }
> +
> +shut_down_rpd:
> + rproc_shutdown(rpd_rproc);
> +
> + wcss->state = WCSS_SHUTDOWN;
> + return 0;
> +}
> +
> +static void *q6_wcss_da_to_va(struct rproc *rproc, u64 da, size_t len,
> + bool *is_iomem)
> +{
> + struct q6_wcss *wcss = rproc->priv;
> + int offset;
> +
> + offset = da - wcss->mem_reloc;
> + if (offset < 0 || offset + len > wcss->mem_size)
> + return NULL;
> +
> + return wcss->mem_region + offset;
> +}
> +
> +static int q6_wcss_load(struct rproc *rproc, const struct firmware *fw)
> +{
> + struct q6_wcss *wcss = rproc->priv;
> + const struct firmware *fw_hdl;
> + int ret;
> + const struct wcss_data *desc = wcss->desc;
> + int loop;
> +
> + ret = qcom_mdt_load(wcss->dev, fw, rproc->firmware,
> + desc->pasid, wcss->mem_region,
> + wcss->mem_phys, wcss->mem_size,
> + &wcss->mem_reloc);
> + if (ret)
> + return ret;
> +
> + for (loop = 1; loop < MAX_FIRMWARE; loop++) {
> + if (!wcss->firmware[loop])
> + continue;
> +
> + ret = request_firmware(&fw_hdl, wcss->firmware[loop],
> + wcss->dev);
> + if (ret)
> + continue;
> +
> + ret = qcom_mdt_load_no_init(wcss->dev, fw_hdl,
> + wcss->firmware[loop], 0,
> + wcss->mem_region,
> + wcss->mem_phys,
> + wcss->mem_size,
> + &wcss->mem_reloc);
> +
> + release_firmware(fw_hdl);
> +
> + if (ret) {
> + dev_err(wcss->dev,
> + "can't load %s ret:%d\n", wcss->firmware[loop], ret);
> + return ret;
> + }
> + }
> + return 0;
> +}
> +
> +/* This function load's userpd firmware. Since Userpd depends on rootpd

Use Linux coding style comments.

> + * first bring up root pd and then load. User pd firmware load is required
> + * only during user pd restart because root pd loads user pd FW pil segments
> + * during it's bringup.
> + */
> +static int wcss_ahb_pcie_pd_load(struct rproc *rproc, const struct firmware *fw)
> +{
> + struct q6_wcss *wcss = rproc->priv, *wcss_rpd;
> + struct rproc *rpd_rproc = dev_get_drvdata(wcss->dev->parent);
> + const struct wcss_data *desc = wcss->desc;
> + int ret;
> +
> + wcss_rpd = rpd_rproc->priv;
> +
> + /* Boot rootpd rproc */

That's not helpful - i tcopies the function name.

> + ret = rproc_boot(rpd_rproc);
> + if (ret || wcss->state == WCSS_NORMAL)
> + return ret;
> +
> + return desc->mdt_load_sec(wcss->dev, fw, rproc->firmware,
> + desc->pasid, wcss->mem_region,
> + wcss->mem_phys, wcss->mem_size,
> + &wcss->mem_reloc);
> +}
> +

...

> +
> +static int q6_get_inbound_irq(struct qcom_q6v5 *q6,
> + struct platform_device *pdev,
> + const char *int_name,
> + irqreturn_t (*handler)(int irq, void *data))
> +{
> + int ret, irq;
> + char *interrupt, *tmp = (char *)int_name;
> + struct q6_wcss *wcss = q6->rproc->priv;
> +
> + irq = platform_get_irq_byname(pdev, int_name);
> + if (irq < 0) {
> + if (irq != -EPROBE_DEFER)
> + dev_err(&pdev->dev,
> + "failed to retrieve %s IRQ: %d\n",
> + int_name, irq);

return dev_err_probe

> + return irq;
> + }
> +
> + if (!strcmp(int_name, "fatal")) {
> + q6->fatal_irq = irq;
> + } else if (!strcmp(int_name, "stop-ack")) {
> + q6->stop_irq = irq;
> + tmp = "stop_ack";
> + } else if (!strcmp(int_name, "ready")) {
> + q6->ready_irq = irq;
> + } else if (!strcmp(int_name, "handover")) {
> + q6->handover_irq = irq;
> + } else if (!strcmp(int_name, "spawn-ack")) {
> + q6->spawn_irq = irq;
> + tmp = "spawn_ack";
> + } else {
> + dev_err(&pdev->dev, "unknown interrupt\n");
> + return -EINVAL;
> + }

This is over complicated method of getting interrupts. First, you can
pass here address of variable with interrupt to assign (*irq_field =
irq). Second, drop the names and get by index. Entries are fixed, not
flexible.

> +
> + interrupt = devm_kzalloc(&pdev->dev, BUF_SIZE, GFP_KERNEL);
> + if (!interrupt)
> + return -ENOMEM;
> +
> + snprintf(interrupt, BUF_SIZE, "q6v5_wcss_userpd%d_%s", wcss->pd_asid, tmp);
> +
> + ret = devm_request_threaded_irq(&pdev->dev, irq,
> + NULL, handler,
> + IRQF_TRIGGER_RISING | IRQF_ONESHOT,
> + interrupt, q6);
> + if (ret) {
> + dev_err(&pdev->dev, "failed to acquire %s irq\n", interrupt);
> + return ret;
> + }
> + return 0;
> +}
> +
> +static int q6_get_outbound_irq(struct qcom_q6v5 *q6,
> + struct platform_device *pdev,
> + const char *int_name)
> +{
> + struct qcom_smem_state *tmp_state;
> + unsigned bit;
> +
> + tmp_state = qcom_smem_state_get(&pdev->dev, int_name, &bit);
> + if (IS_ERR(tmp_state)) {
> + dev_err(&pdev->dev, "failed to acquire %s state\n", int_name);
> + return PTR_ERR(tmp_state);
> + }
> +
> + if (!strcmp(int_name, "stop")) {
> + q6->state = tmp_state;
> + q6->stop_bit = bit;
> + } else if (!strcmp(int_name, "spawn")) {
> + q6->spawn_state = tmp_state;
> + q6->spawn_bit = bit;
> + }
> +
> + return 0;
> +}
> +
> +static int init_irq(struct qcom_q6v5 *q6,
> + struct platform_device *pdev, struct rproc *rproc,
> + int crash_reason, const char *load_state,
> + void (*handover)(struct qcom_q6v5 *q6))
> +{
> + int ret;
> +
> + q6->rproc = rproc;
> + q6->dev = &pdev->dev;
> + q6->crash_reason = crash_reason;
> + q6->handover = handover;
> +
> + init_completion(&q6->start_done);
> + init_completion(&q6->stop_done);
> + init_completion(&q6->spawn_done);
> +
> + ret = q6_get_inbound_irq(q6, pdev, "fatal",
> + q6v5_fatal_interrupt);
> + if (ret)
> + return ret;
> +
> + ret = q6_get_inbound_irq(q6, pdev, "ready",
> + q6v5_ready_interrupt);
> + if (ret)
> + return ret;
> +
> + ret = q6_get_inbound_irq(q6, pdev, "stop-ack",
> + q6v5_stop_interrupt);
> + if (ret)
> + return ret;
> +
> + ret = q6_get_inbound_irq(q6, pdev, "spawn-ack",
> + q6v5_spawn_interrupt);
> + if (ret)
> + return ret;
> +
> + ret = q6_get_outbound_irq(q6, pdev, "stop");
> + if (ret)
> + return ret;
> +
> + ret = q6_get_outbound_irq(q6, pdev, "spawn");
> + if (ret)
> + return ret;
> +
> + return 0;
> +}
> +
> +static int q6_wcss_probe(struct platform_device *pdev)
> +{
> + const struct wcss_data *desc;
> + struct q6_wcss *wcss;
> + struct rproc *rproc;
> + int ret;
> + char *subdev_name;
> + const char **firmware;
> +
> + desc = of_device_get_match_data(&pdev->dev);
> + if (!desc)
> + return -EINVAL;
> +
> + firmware = devm_kcalloc(&pdev->dev, MAX_FIRMWARE,
> + sizeof(*firmware), GFP_KERNEL);
> + if (!firmware)
> + return -ENOMEM;
> +
> + ret = of_property_read_string_array(pdev->dev.of_node, "firmware-name",
> + firmware, MAX_FIRMWARE);
> + if (ret < 0)
> + return ret;
> +
> + rproc = rproc_alloc(&pdev->dev, pdev->name, desc->ops,
> + firmware[0], sizeof(*wcss));
> + if (!rproc) {
> + dev_err(&pdev->dev, "failed to allocate rproc\n");

ENOMEM do not print errors. Why do you have to print something here?

> + return -ENOMEM;
> + }
> + wcss = rproc->priv;
> + wcss->dev = &pdev->dev;
> + wcss->desc = desc;
> + wcss->firmware = firmware;
> +
> + ret = q6_alloc_memory_region(wcss);
> + if (ret)
> + goto free_rproc;
> +
> + wcss->pd_asid = qcom_get_pd_asid(wcss->dev->of_node);
> + if (wcss->pd_asid < 0)
> + goto free_rproc;
> +
> + if (desc->init_irq) {
> + ret = desc->init_irq(&wcss->q6, pdev, rproc,
> + desc->crash_reason_smem, NULL, NULL);
> + if (ret)
> + goto free_rproc;
> + }
> +
> + if (desc->glink_subdev_required)
> + qcom_add_glink_subdev(rproc, &wcss->glink_subdev, desc->ssr_name);
> +
> + subdev_name = (char *)(desc->ssr_name ? desc->ssr_name : pdev->name);
> + qcom_add_ssr_subdev(rproc, &wcss->ssr_subdev, subdev_name);
> +
> + rproc->auto_boot = false;
> + ret = rproc_add(rproc);
> + if (ret)
> + goto free_rproc;
> +
> + platform_set_drvdata(pdev, rproc);
> +
> + ret = of_platform_populate(wcss->dev->of_node, NULL,
> + NULL, wcss->dev);

It is the same probe used for the children, right? So whom do they populate?

> + if (ret) {
> + dev_err(&pdev->dev, "failed to populate wcss pd nodes\n");

dev_err_probe

> + goto free_rproc;
> + }
> + return 0;
> +
> +free_rproc:
> + rproc_free(rproc);
> +
> + return ret;
> +}
> +
> +static int q6_wcss_remove(struct platform_device *pdev)
> +{
> + struct rproc *rproc = platform_get_drvdata(pdev);
> + struct q6_wcss *wcss = rproc->priv;
> +
> + qcom_q6v5_deinit(&wcss->q6);
> +
> + rproc_del(rproc);
> + rproc_free(rproc);
> +
> + return 0;
> +}



Best regards,
Krzysztof


2023-06-24 07:53:35

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH V2 13/13] arm64: dtsi: qcom: ipq9574: Add nodes to bring up multipd

On 22/05/2023 00:28, Manikanta Mylavarapu wrote:
> Enable nodes required for multipd remoteproc bring up.
>
> Signed-off-by: Manikanta Mylavarapu <[email protected]>
> ---
> Changes in V2:
> - Corrected syntax like alignmnet and kept nodes in sorted order.
> - Added 'firmware-name' property.
>
> arch/arm64/boot/dts/qcom/ipq9574.dtsi | 118 ++++++++++++++++++++++++++
> 1 file changed, 118 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
> index 0e04549c69a5..ff0da53ba05f 100644
> --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
> @@ -160,6 +160,11 @@
> no-map;
> };
>
> + q6_region: wcnss@4ab00000 {
> + reg = <0x0 0x4ab00000 0x0 0x2b00000>;
> + no-map;
> + };
> +
> smem@4aa00000 {
> compatible = "qcom,smem";
> reg = <0x0 0x4aa00000 0x0 0x00100000>;
> @@ -697,6 +702,95 @@
> };
> };
>
> + q6v5_wcss: remoteproc@cd00000 {
> + compatible = "qcom,ipq9574-q6-mpd";
> + reg = <0x0cd00000 0x4040>;
> + firmware-name = "IPQ9574/q6_fw.mdt",
> + "IPQ9574/m3_fw.mdt";

Here and...

> + interrupts-extended = <&intc GIC_SPI 325 IRQ_TYPE_EDGE_RISING>,
> + <&wcss_smp2p_in 0 0>,
> + <&wcss_smp2p_in 1 0>,
> + <&wcss_smp2p_in 2 0>,
> + <&wcss_smp2p_in 3 0>;
> + interrupt-names = "wdog",
> + "fatal",
> + "ready",
> + "handover",
> + "stop-ack";
> +
> + qcom,smem-states = <&wcss_smp2p_out 0>,
> + <&wcss_smp2p_out 1>;
> + qcom,smem-state-names = "shutdown",
> + "stop";
> + memory-region = <&q6_region>;
> +
> + glink-edge {
> + interrupts = <GIC_SPI 321 IRQ_TYPE_EDGE_RISING>;
> + label = "rtr";
> + qcom,remote-pid = <1>;
> + mboxes = <&apcs_glb 8>;
> + };
> +
> + pd-1 {
> + compatible = "qcom,ipq9574-wcss-ahb-mpd";
> + firmware-name = "IPQ9574/q6_fw.mdt";

... here - why do you have firmware in both places?

> + interrupts-extended = <&wcss_smp2p_in 8 0>,
> + <&wcss_smp2p_in 9 0>,
> + <&wcss_smp2p_in 12 0>,
> + <&wcss_smp2p_in 11 0>;
> + interrupt-names = "fatal",
> + "ready",
> + "spawn-ack",
> + "stop-ack";
> + qcom,smem-states = <&wcss_smp2p_out 8>,
> + <&wcss_smp2p_out 9>,
> + <&wcss_smp2p_out 10>;
> + qcom,smem-state-names = "shutdown",
> + "stop",
> + "spawn";
> + };
> +
> + pd-2 {
> + compatible = "qcom,ipq5018-wcss-pcie-mpd";

This compatible is confusing for this device.

Best regards,
Krzysztof


2023-06-30 07:36:17

by Manikanta Mylavarapu

[permalink] [raw]
Subject: Re: [PATCH V2 13/13] arm64: dtsi: qcom: ipq9574: Add nodes to bring up multipd



On 6/27/2023 1:14 PM, Manikanta Mylavarapu wrote:
>
>
> On 6/24/2023 12:31 PM, Krzysztof Kozlowski wrote:
>> On 22/05/2023 00:28, Manikanta Mylavarapu wrote:
>>> Enable nodes required for multipd remoteproc bring up.
>>>
>>> Signed-off-by: Manikanta Mylavarapu <[email protected]>
>>> ---
>>> Changes in V2:
>>>     - Corrected syntax like alignmnet and kept nodes in sorted order.
>>>     - Added 'firmware-name' property.
>>>
>>>   arch/arm64/boot/dts/qcom/ipq9574.dtsi | 118 ++++++++++++++++++++++++++
>>>   1 file changed, 118 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>>> b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>>> index 0e04549c69a5..ff0da53ba05f 100644
>>> --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>>> @@ -160,6 +160,11 @@
>>>               no-map;
>>>           };
>>>
>>> +        q6_region: wcnss@4ab00000 {
>>> +            reg = <0x0 0x4ab00000 0x0 0x2b00000>;
>>> +            no-map;
>>> +        };
>>> +
>>>           smem@4aa00000 {
>>>               compatible = "qcom,smem";
>>>               reg = <0x0 0x4aa00000 0x0 0x00100000>;
>>> @@ -697,6 +702,95 @@
>>>               };
>>>           };
>>>
>>> +        q6v5_wcss: remoteproc@cd00000 {
>>> +            compatible = "qcom,ipq9574-q6-mpd";
>>> +            reg = <0x0cd00000 0x4040>;
>>> +            firmware-name = "IPQ9574/q6_fw.mdt",
>>> +                    "IPQ9574/m3_fw.mdt";
>>
>> Here and...
>>
>>> +            interrupts-extended = <&intc GIC_SPI 325
>>> IRQ_TYPE_EDGE_RISING>,
>>> +                          <&wcss_smp2p_in 0 0>,
>>> +                          <&wcss_smp2p_in 1 0>,
>>> +                          <&wcss_smp2p_in 2 0>,
>>> +                          <&wcss_smp2p_in 3 0>;
>>> +            interrupt-names = "wdog",
>>> +                      "fatal",
>>> +                      "ready",
>>> +                      "handover",
>>> +                      "stop-ack";
>>> +
>>> +            qcom,smem-states = <&wcss_smp2p_out 0>,
>>> +                       <&wcss_smp2p_out 1>;
>>> +            qcom,smem-state-names = "shutdown",
>>> +                        "stop";
>>> +            memory-region = <&q6_region>;
>>> +
>>> +            glink-edge {
>>> +                interrupts = <GIC_SPI 321 IRQ_TYPE_EDGE_RISING>;
>>> +                label = "rtr";
>>> +                qcom,remote-pid = <1>;
>>> +                mboxes = <&apcs_glb 8>;
>>> +            };
>>> +
>>> +            pd-1 {
>>> +                compatible = "qcom,ipq9574-wcss-ahb-mpd";
>>> +                firmware-name = "IPQ9574/q6_fw.mdt";
>>
>> ... here - why do you have firmware in both places?
>>

In multipd model, Q6 & WCSS uses different firmware.
I will correct the firmware-name. Thanks for catching.

>>> +                interrupts-extended = <&wcss_smp2p_in 8 0>,
>>> +                              <&wcss_smp2p_in 9 0>,
>>> +                              <&wcss_smp2p_in 12 0>,
>>> +                              <&wcss_smp2p_in 11 0>;
>>> +                interrupt-names = "fatal",
>>> +                          "ready",
>>> +                          "spawn-ack",
>>> +                          "stop-ack";
>>> +                qcom,smem-states = <&wcss_smp2p_out 8>,
>>> +                           <&wcss_smp2p_out 9>,
>>> +                           <&wcss_smp2p_out 10>;
>>> +                qcom,smem-state-names = "shutdown",
>>> +                            "stop",
>>> +                            "spawn";
>>> +            };
>>> +
>>> +            pd-2 {
>>> +                compatible = "qcom,ipq5018-wcss-pcie-mpd";
>>
>> This compatible is confusing for this device.
>>
I will clean up all SOC specific compatibles and have
only device specific compatibles for Q6 & WCSS radio's
as i mentioned on other thread.

Thanks & Regards,
Manikanta.

2023-06-30 10:47:15

by Manikanta Mylavarapu

[permalink] [raw]
Subject: Re: [PATCH V2 10/13] remoteproc: qcom: Add Hexagon based multipd rproc driver



On 6/27/2023 6:09 PM, Manikanta Mylavarapu wrote:
>
>
> On 6/24/2023 12:58 PM, Krzysztof Kozlowski wrote:
>> On 22/05/2023 00:28, Manikanta Mylavarapu wrote:
>>> It adds support to bring up remoteproc's on multipd model.
>>> Pd means protection domain. It's similar to process in Linux.
>>> Here QDSP6 processor runs each wifi radio functionality on a
>>> separate process. One process can't access other process
>>> resources, so this is termed as PD i.e protection domain.
>>>
>>> Here we have two pd's called root and user pd. We can correlate
>>> Root pd as root and user pd as user in linux. Root pd has more
>>> privileges than user pd. Root will provide services to user pd.
>>>
>>>  From remoteproc driver perspective, root pd corresponds to QDSP6
>>> processor bring up and user pd corresponds to Wifi radio (WCSS)
>>> bring up.
>>>
>>> Here WCSS(user) PD is dependent on Q6(root) PD, so first
>>> q6 pd should be up before wcss pd. After wcss pd goes down,
>>> q6 pd should be turned off.
>>>
>>> IPQ5018, IPQ9574 supports multipd remoteproc driver.
>>>
>>> Signed-off-by: Manikanta Mylavarapu <[email protected]>
>>> ---
>>> Changes in V2:
>>>     - Common functionalities moved to seperate patches
>>>     - qcom_get_pd_asid() moved to mpd driver
>>>     - Last DMA block alone memset to zero
>>>     - Added diagram to show how userpd data is organized and sent to
>>>       trustzone
>>>     - Rewritten commit message since most of the content available
>>>       in cover page
>>>     - Removed 'remote_id' becuase it's not required for bring up.
>>>
>>>   drivers/remoteproc/Kconfig          |  20 +
>>>   drivers/remoteproc/Makefile         |   1 +
>>>   drivers/remoteproc/qcom_common.h    |   9 +
>>>   drivers/remoteproc/qcom_q6v5_mpd.c  | 677 ++++++++++++++++++++++++++++
>>>   drivers/soc/qcom/mdt_loader.c       | 332 ++++++++++++++
>>>   include/linux/soc/qcom/mdt_loader.h |  19 +
>>>   6 files changed, 1058 insertions(+)
>>>   create mode 100644 drivers/remoteproc/qcom_q6v5_mpd.c
>>>
>>> diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig
>>> index a850e9f486dd..44af5c36f67e 100644
>>> --- a/drivers/remoteproc/Kconfig
>>> +++ b/drivers/remoteproc/Kconfig
>>> @@ -234,6 +234,26 @@ config QCOM_Q6V5_PAS
>>>         CDSP (Compute DSP), MPSS (Modem Peripheral SubSystem), and
>>>         SLPI (Sensor Low Power Island).
>>>
>>> +config QCOM_Q6V5_MPD
>>> +    tristate "Qualcomm Hexagon based MPD model Peripheral Image Loader"
>>> +    depends on OF && ARCH_QCOM
>>> +    depends on QCOM_SMEM
>>> +    depends on RPMSG_QCOM_SMD || RPMSG_QCOM_SMD=n
>>> +    depends on RPMSG_QCOM_GLINK_SMEM || RPMSG_QCOM_GLINK_SMEM=n
>>> +    depends on QCOM_SYSMON || QCOM_SYSMON=n
>>> +    depends on RPMSG_QCOM_GLINK || RPMSG_QCOM_GLINK=n
>>> +    depends on QCOM_AOSS_QMP || QCOM_AOSS_QMP=n
>>> +    select MFD_SYSCON
>>
>> Do you really need this?
>>
It's not required. I will remove. Thanks for catching.

>>> +    select QCOM_MDT_LOADER
>>> +    select QCOM_PIL_INFO
>>> +    select QCOM_Q6V5_COMMON
>>> +    select QCOM_RPROC_COMMON
>>> +    select QCOM_SCM
>>> +    help
>>> +      Say y here to support the Qualcomm Secure Peripheral Image Loader
>>> +      for the Hexagon based MultiPD model remote processors on e.g.
>>> IPQ5018.
>>> +      This is trustZone wireless subsystem.
>>> +
>>
>> ...
>>
I didn't understand. Can you please elaborate your comment?

>>> +    int (*powerup_scm)(u32 peripheral);
>>> +    int (*powerdown_scm)(u32 peripheral);
>>> +};
>>> +
>>> +/**
>>> + * qcom_get_pd_asid() - get the pd asid number from DT node
>>
>>  From node name? NAK. It does not work like that. Node names can change
>> and you did not define this number as part of ABI.
>>
>> Probably you wanted unit address.
>>

Yeah i got your point. Each of the WCSS PD's are internally
represented in Q6 with their corresponding "spawn" bit numbers.
I will use same and remove the "PD-" hardcodings.

Is this fine ?

>>> + * @node:    device tree node
>>> + *
>>> + * Returns asid if node name has 'pd' string
>>> + */
>>> +s8 qcom_get_pd_asid(struct device_node *node)
>>> +{
>>> +    char *str;
>>> +    s8 pd_asid;
>>> +
>>> +    if (!node)
>>> +        return -EINVAL;
>>> +
>>> +    str = strstr(node->name, "pd");
>>> +    if (!str)
>>> +        return 0;
>>> +
>>> +    str += strlen("pd") + 1;
>>> +    return kstrtos8(str, 10, &pd_asid) ? -EINVAL : pd_asid;
>>> +}
>>> +EXPORT_SYMBOL(qcom_get_pd_asid);
>>> +
>>
>> ...
>>

I didn't understand. Can you please elaborate your comment?

>>> +
>>> +static int q6_wcss_spawn_pd(struct rproc *rproc)
>>> +{
>>> +    int ret;
>>> +    struct q6_wcss *wcss = rproc->priv;
>>> +
>>> +    ret = qcom_q6v5_request_spawn(&wcss->q6);
>>> +    if (ret == -ETIMEDOUT) {
>>> +        pr_err("%s spawn timedout\n", rproc->name);
>>
>> dev_err
>>

Sure, I will change to dev_err.

>>> +        return ret;
>>> +    }
>>> +
>>> +    ret = qcom_q6v5_wait_for_start(&wcss->q6, msecs_to_jiffies(10000));
>>> +    if (ret == -ETIMEDOUT) {
>>> +        pr_err("%s start timedout\n", rproc->name);
>>
>> dev_err
>>

Sure, I will change to dev_err.

>>> +        wcss->q6.running = false;
>>> +        return ret;
>>> +    }
>>> +    wcss->q6.running = true;
>>> +    return ret;
>>> +}
>>> +
>>> +static int wcss_ahb_pcie_pd_start(struct rproc *rproc)
>>> +{
>>> +    struct q6_wcss *wcss = rproc->priv;
>>> +    const struct wcss_data *desc = wcss->desc;
>>> +    int ret;
>>> +
>>> +    if (!desc->reset_seq)
>>> +        return 0;
>>> +
>>> +    if (desc->powerup_scm) {
>>> +        ret = desc->powerup_scm(desc->pasid);
>>> +        if (ret) {
>>> +            dev_err(wcss->dev, "failed to power up pd\n");
>>> +            return ret;
>>> +        }
>>> +    }
>>> +
>>> +    ret = q6_wcss_spawn_pd(rproc);
>>> +    if (ret)
>>> +        return ret;
>>> +
>>> +    wcss->state = WCSS_NORMAL;
>>> +    return ret;
>>> +}
>>> +
>>> +static int q6_wcss_stop(struct rproc *rproc)
>>> +{
>>> +    struct q6_wcss *wcss = rproc->priv;
>>> +    const struct wcss_data *desc = wcss->desc;
>>> +    int ret;
>>> +
>>> +    ret = qcom_scm_pas_shutdown(desc->pasid);
>>> +    if (ret) {
>>> +        dev_err(wcss->dev, "not able to shutdown\n");
>>> +        return ret;
>>> +    }
>>> +    qcom_q6v5_unprepare(&wcss->q6);
>>> +
>>> +    return 0;
>>> +}
>>> +
>>> +static int wcss_ahb_pcie_pd_stop(struct rproc *rproc)
>>> +{
>>> +    struct q6_wcss *wcss = rproc->priv;
>>> +    struct rproc *rpd_rproc = dev_get_drvdata(wcss->dev->parent);
>>> +    const struct wcss_data *desc = wcss->desc;
>>> +    int ret;
>>> +
>>> +    if (!desc->reset_seq)
>>> +        goto shut_down_rpd;
>>> +
>>> +    if (rproc->state != RPROC_CRASHED && wcss->q6.stop_bit) {
>>> +        ret = qcom_q6v5_request_stop(&wcss->q6, NULL);
>>> +        if (ret) {
>>> +            dev_err(&rproc->dev, "pd not stopped\n");
>>> +            return ret;
>>> +        }
>>> +    }
>>> +
>>> +    if (desc->powerdown_scm) {
>>> +        ret = desc->powerdown_scm(desc->pasid);
>>> +        if (ret) {
>>> +            dev_err(wcss->dev, "failed to power down pd\n");
>>> +            return ret;
>>> +        }
>>> +    }
>>> +
>>> +shut_down_rpd:
>>> +    rproc_shutdown(rpd_rproc);
>>> +
>>> +    wcss->state = WCSS_SHUTDOWN;
>>> +    return 0;
>>> +}
>>> +
>>> +static void *q6_wcss_da_to_va(struct rproc *rproc, u64 da, size_t len,
>>> +                  bool *is_iomem)
>>> +{
>>> +    struct q6_wcss *wcss = rproc->priv;
>>> +    int offset;
>>> +
>>> +    offset = da - wcss->mem_reloc;
>>> +    if (offset < 0 || offset + len > wcss->mem_size)
>>> +        return NULL;
>>> +
>>> +    return wcss->mem_region + offset;
>>> +}
>>> +
>>> +static int q6_wcss_load(struct rproc *rproc, const struct firmware *fw)
>>> +{
>>> +    struct q6_wcss *wcss = rproc->priv;
>>> +    const struct firmware *fw_hdl;
>>> +    int ret;
>>> +    const struct wcss_data *desc = wcss->desc;
>>> +    int loop;
>>> +
>>> +    ret = qcom_mdt_load(wcss->dev, fw, rproc->firmware,
>>> +                desc->pasid, wcss->mem_region,
>>> +                wcss->mem_phys, wcss->mem_size,
>>> +                &wcss->mem_reloc);
>>> +    if (ret)
>>> +        return ret;
>>> +
>>> +    for (loop = 1; loop < MAX_FIRMWARE; loop++) {
>>> +        if (!wcss->firmware[loop])
>>> +            continue;
>>> +
>>> +        ret = request_firmware(&fw_hdl, wcss->firmware[loop],
>>> +                       wcss->dev);
>>> +        if (ret)
>>> +            continue;
>>> +
>>> +        ret = qcom_mdt_load_no_init(wcss->dev, fw_hdl,
>>> +                        wcss->firmware[loop], 0,
>>> +                        wcss->mem_region,
>>> +                        wcss->mem_phys,
>>> +                        wcss->mem_size,
>>> +                        &wcss->mem_reloc);
>>> +
>>> +        release_firmware(fw_hdl);
>>> +
>>> +        if (ret) {
>>> +            dev_err(wcss->dev,
>>> +                "can't load %s ret:%d\n", wcss->firmware[loop], ret);
>>> +            return ret;
>>> +        }
>>> +    }
>>> +    return 0;
>>> +}
>>> +
>>> +/* This function load's userpd firmware. Since Userpd depends on rootpd
>>
>> Use Linux coding style comments.
>>

Sure, I will update.

>>> + * first bring up root pd and then load. User pd firmware load is
>>> required
>>> + * only during user pd restart because root pd loads user pd FW pil
>>> segments
>>> + * during it's bringup.
>>> + */
>>> +static int wcss_ahb_pcie_pd_load(struct rproc *rproc, const struct
>>> firmware *fw)
>>> +{
>>> +    struct q6_wcss *wcss = rproc->priv, *wcss_rpd;
>>> +    struct rproc *rpd_rproc = dev_get_drvdata(wcss->dev->parent);
>>> +    const struct wcss_data *desc = wcss->desc;
>>> +    int ret;
>>> +
>>> +    wcss_rpd = rpd_rproc->priv;
>>> +
>>> +    /* Boot rootpd rproc */
>>
>> That's not helpful - i tcopies the function name.
>>

sure, i will remove comment.

>>> +    ret = rproc_boot(rpd_rproc);
>>> +    if (ret || wcss->state == WCSS_NORMAL)
>>> +        return ret;
>>> +
>>> +    return desc->mdt_load_sec(wcss->dev, fw, rproc->firmware,
>>> +                  desc->pasid, wcss->mem_region,
>>> +                  wcss->mem_phys, wcss->mem_size,
>>> +                  &wcss->mem_reloc);
>>> +}
>>> +

...

I didn't understand. Can you please elaborate your comment?

>>> +static int q6_get_inbound_irq(struct qcom_q6v5 *q6,
>>> +                  struct platform_device *pdev,
>>> +                  const char *int_name,
>>> +                  irqreturn_t (*handler)(int irq, void *data))
>>> +{
>>> +    int ret, irq;
>>> +    char *interrupt, *tmp = (char *)int_name;
>>> +    struct q6_wcss *wcss = q6->rproc->priv;
>>> +
>>> +    irq = platform_get_irq_byname(pdev, int_name);
>>> +    if (irq < 0) {
>>> +        if (irq != -EPROBE_DEFER)
>>> +            dev_err(&pdev->dev,
>>> +                "failed to retrieve %s IRQ: %d\n",
>>> +                    int_name, irq);
>>
>> return dev_err_probe
>>

I will use dev_err_probe.

>>> +        return irq;
>>> +    }
>>> +
>>> +    if (!strcmp(int_name, "fatal")) {
>>> +        q6->fatal_irq = irq;
>>> +    } else if (!strcmp(int_name, "stop-ack")) {
>>> +        q6->stop_irq = irq;
>>> +        tmp = "stop_ack";
>>> +    } else if (!strcmp(int_name, "ready")) {
>>> +        q6->ready_irq = irq;
>>> +    } else if (!strcmp(int_name, "handover")) {
>>> +        q6->handover_irq  = irq;
>>> +    } else if (!strcmp(int_name, "spawn-ack")) {
>>> +        q6->spawn_irq = irq;
>>> +        tmp = "spawn_ack";
>>> +    } else {
>>> +        dev_err(&pdev->dev, "unknown interrupt\n");
>>> +        return -EINVAL;
>>> +    }
>>
>> This is over complicated method of getting interrupts. First, you can
>> pass here address of variable with interrupt to assign (*irq_field =
>> irq). Second, drop the names and get by index. Entries are fixed, not
>> flexible.
>>
Sure, I will do it.

>>> +
>>> +    interrupt = devm_kzalloc(&pdev->dev, BUF_SIZE, GFP_KERNEL);
>>> +    if (!interrupt)
>>> +        return -ENOMEM;
>>> +
>>> +    snprintf(interrupt, BUF_SIZE, "q6v5_wcss_userpd%d_%s",
>>> wcss->pd_asid, tmp);
>>> +
>>> +    ret = devm_request_threaded_irq(&pdev->dev, irq,
>>> +                    NULL, handler,
>>> +                    IRQF_TRIGGER_RISING | IRQF_ONESHOT,
>>> +                    interrupt, q6);
>>> +    if (ret) {
>>> +        dev_err(&pdev->dev, "failed to acquire %s irq\n", interrupt);
>>> +        return ret;
>>> +    }
>>> +    return 0;
>>> +}
>>> +
>>> +static int q6_get_outbound_irq(struct qcom_q6v5 *q6,
>>> +                   struct platform_device *pdev,
>>> +                   const char *int_name)
>>> +{
>>> +    struct qcom_smem_state *tmp_state;
>>> +    unsigned  bit;
>>> +
>>> +    tmp_state = qcom_smem_state_get(&pdev->dev, int_name, &bit);
>>> +    if (IS_ERR(tmp_state)) {
>>> +        dev_err(&pdev->dev, "failed to acquire %s state\n", int_name);
>>> +        return PTR_ERR(tmp_state);
>>> +    }
>>> +
>>> +    if (!strcmp(int_name, "stop")) {
>>> +        q6->state = tmp_state;
>>> +        q6->stop_bit = bit;
>>> +    } else if (!strcmp(int_name, "spawn")) {
>>> +        q6->spawn_state = tmp_state;
>>> +        q6->spawn_bit = bit;
>>> +    }
>>> +
>>> +    return 0;
>>> +}
>>> +
>>> +static int init_irq(struct qcom_q6v5 *q6,
>>> +            struct platform_device *pdev, struct rproc *rproc,
>>> +            int crash_reason, const char *load_state,
>>> +            void (*handover)(struct qcom_q6v5 *q6))
>>> +{
>>> +    int ret;
>>> +
>>> +    q6->rproc = rproc;
>>> +    q6->dev = &pdev->dev;
>>> +    q6->crash_reason = crash_reason;
>>> +    q6->handover = handover;
>>> +
>>> +    init_completion(&q6->start_done);
>>> +    init_completion(&q6->stop_done);
>>> +    init_completion(&q6->spawn_done);
>>> +
>>> +    ret = q6_get_inbound_irq(q6, pdev, "fatal",
>>> +                 q6v5_fatal_interrupt);
>>> +    if (ret)
>>> +        return ret;
>>> +
>>> +    ret = q6_get_inbound_irq(q6, pdev, "ready",
>>> +                 q6v5_ready_interrupt);
>>> +    if (ret)
>>> +        return ret;
>>> +
>>> +    ret = q6_get_inbound_irq(q6, pdev, "stop-ack",
>>> +                 q6v5_stop_interrupt);
>>> +    if (ret)
>>> +        return ret;
>>> +
>>> +    ret = q6_get_inbound_irq(q6, pdev, "spawn-ack",
>>> +                 q6v5_spawn_interrupt);
>>> +    if (ret)
>>> +        return ret;
>>> +
>>> +    ret = q6_get_outbound_irq(q6, pdev, "stop");
>>> +    if (ret)
>>> +        return ret;
>>> +
>>> +    ret = q6_get_outbound_irq(q6, pdev, "spawn");
>>> +    if (ret)
>>> +        return ret;
>>> +
>>> +    return 0;
>>> +}
>>> +
>>> +static int q6_wcss_probe(struct platform_device *pdev)
>>> +{
>>> +    const struct wcss_data *desc;
>>> +    struct q6_wcss *wcss;
>>> +    struct rproc *rproc;
>>> +    int ret;
>>> +    char *subdev_name;
>>> +    const char **firmware;
>>> +
>>> +    desc = of_device_get_match_data(&pdev->dev);
>>> +    if (!desc)
>>> +        return -EINVAL;
>>> +
>>> +    firmware = devm_kcalloc(&pdev->dev, MAX_FIRMWARE,
>>> +                sizeof(*firmware), GFP_KERNEL);
>>> +    if (!firmware)
>>> +        return -ENOMEM;
>>> +
>>> +    ret = of_property_read_string_array(pdev->dev.of_node,
>>> "firmware-name",
>>> +                        firmware, MAX_FIRMWARE);
>>> +    if (ret < 0)
>>> +        return ret;
>>> +
>>> +    rproc = rproc_alloc(&pdev->dev, pdev->name, desc->ops,
>>> +                firmware[0], sizeof(*wcss));
>>> +    if (!rproc) {
>>> +        dev_err(&pdev->dev, "failed to allocate rproc\n");
>>
>> ENOMEM do not print errors. Why do you have to print something here?
>>

Yeah, I will remove print.

>>> +        return -ENOMEM;
>>> +    }
>>> +    wcss = rproc->priv;
>>> +    wcss->dev = &pdev->dev;
>>> +    wcss->desc = desc;
>>> +    wcss->firmware = firmware;
>>> +
>>> +    ret = q6_alloc_memory_region(wcss);
>>> +    if (ret)
>>> +        goto free_rproc;
>>> +
>>> +    wcss->pd_asid = qcom_get_pd_asid(wcss->dev->of_node);
>>> +    if (wcss->pd_asid < 0)
>>> +        goto free_rproc;
>>> +
>>> +    if (desc->init_irq) {
>>> +        ret = desc->init_irq(&wcss->q6, pdev, rproc,
>>> +                     desc->crash_reason_smem, NULL, NULL);
>>> +        if (ret)
>>> +            goto free_rproc;
>>> +    }
>>> +
>>> +    if (desc->glink_subdev_required)
>>> +        qcom_add_glink_subdev(rproc, &wcss->glink_subdev,
>>> desc->ssr_name);
>>> +
>>> +    subdev_name = (char *)(desc->ssr_name ? desc->ssr_name :
>>> pdev->name);
>>> +    qcom_add_ssr_subdev(rproc, &wcss->ssr_subdev, subdev_name);
>>> +
>>> +    rproc->auto_boot = false;
>>> +    ret = rproc_add(rproc);
>>> +    if (ret)
>>> +        goto free_rproc;
>>> +
>>> +    platform_set_drvdata(pdev, rproc);
>>> +
>>> +    ret = of_platform_populate(wcss->dev->of_node, NULL,
>>> +                   NULL, wcss->dev);
>>
>> It is the same probe used for the children, right? So whom do they
>> populate?
>>

I will add match table in 2nd param, so that childs, whose
compatible matches with match table will be populated.

Is this fine ?
>>> +    if (ret) {
>>> +        dev_err(&pdev->dev, "failed to populate wcss pd nodes\n");
>>
>> dev_err_probe
>>
Sure, i will use dev_err_probe

>>> +        goto free_rproc;
>>> +    }
>>> +    return 0;
>>> +
>>> +free_rproc:
>>> +    rproc_free(rproc);
>>> +
>>> +    return ret;
>>> +}
>>> +
>>> +static int q6_wcss_remove(struct platform_device *pdev)
>>> +{
>>> +    struct rproc *rproc = platform_get_drvdata(pdev);
>>> +    struct q6_wcss *wcss = rproc->priv;
>>> +
>>> +    qcom_q6v5_deinit(&wcss->q6);
>>> +
>>> +    rproc_del(rproc);
>>> +    rproc_free(rproc);
>>> +
>>> +    return 0;
>>> +}
>>
>>
>>

Thanks & Regards,
Manikanta.

2023-07-01 11:06:23

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH V2 10/13] remoteproc: qcom: Add Hexagon based multipd rproc driver

On 30/06/2023 12:29, Manikanta Mylavarapu wrote:
>
>
> On 6/27/2023 6:09 PM, Manikanta Mylavarapu wrote:
>>
>>

Do you see the lines above? You quote my reply and claim it is you who
wrote it.

Please fix your mailer, it's making discussions unnecessary difficult.


>>>> +      Say y here to support the Qualcomm Secure Peripheral Image Loader
>>>> +      for the Hexagon based MultiPD model remote processors on e.g.
>>>> IPQ5018.
>>>> +      This is trustZone wireless subsystem.
>>>> +
>>>
>>> ...
>>>
> I didn't understand. Can you please elaborate your comment?

https://en.wikipedia.org/wiki/Ellipsis

>
>>>> +    int (*powerup_scm)(u32 peripheral);
>>>> +    int (*powerdown_scm)(u32 peripheral);
>>>> +};
>>>> +
>>>> +/**
>>>> + * qcom_get_pd_asid() - get the pd asid number from DT node
>>>
>>>  From node name? NAK. It does not work like that. Node names can change
>>> and you did not define this number as part of ABI.
>>>
>>> Probably you wanted unit address.
>>>
>
> Yeah i got your point. Each of the WCSS PD's are internally
> represented in Q6 with their corresponding "spawn" bit numbers.
> I will use same and remove the "PD-" hardcodings.
>
> Is this fine ?

I don't get what you are going to use, so post a patch. Talk is cheap.


Best regards,
Krzysztof


2023-07-18 12:29:32

by Manikanta Mylavarapu

[permalink] [raw]
Subject: Re: [PATCH V2 10/13] remoteproc: qcom: Add Hexagon based multipd rproc driver



On 7/1/2023 4:25 PM, Krzysztof Kozlowski wrote:
> On 30/06/2023 12:29, Manikanta Mylavarapu wrote:
>>
>>
>> On 6/27/2023 6:09 PM, Manikanta Mylavarapu wrote:
>>>
>>>
>
> Do you see the lines above? You quote my reply and claim it is you who
> wrote it.
>
> Please fix your mailer, it's making discussions unnecessary difficult.
>
>

Sure, i will correct it.

>>>>> +      Say y here to support the Qualcomm Secure Peripheral Image Loader
>>>>> +      for the Hexagon based MultiPD model remote processors on e.g.
>>>>> IPQ5018.
>>>>> +      This is trustZone wireless subsystem.
>>>>> +
>>>>
>>>> ...
>>>>
>> I didn't understand. Can you please elaborate your comment?
>
> https://en.wikipedia.org/wiki/Ellipsis
>
Got it.

>>
>>>>> +    int (*powerup_scm)(u32 peripheral);
>>>>> +    int (*powerdown_scm)(u32 peripheral);
>>>>> +};
>>>>> +
>>>>> +/**
>>>>> + * qcom_get_pd_asid() - get the pd asid number from DT node
>>>>
>>>>  From node name? NAK. It does not work like that. Node names can change
>>>> and you did not define this number as part of ABI.
>>>>
>>>> Probably you wanted unit address.
>>>>
>>
>> Yeah i got your point. Each of the WCSS PD's are internally
>> represented in Q6 with their corresponding "spawn" bit numbers.
>> I will use same and remove the "PD-" hardcodings.
>>
>> Is this fine ?
>
> I don't get what you are going to use, so post a patch. Talk is cheap.
>
>
Sure, i posted a patch. Patch available here
https://lore.kernel.org/linux-arm-msm/[email protected]/

Thanks & Regards,
Manikanta.

> Best regards,
> Krzysztof
>