Hello,
This series adds below updates to sc8280xp-pmics:
PM8280_{1/2}:
- Temp alarm
- Thermal zones
- VADC channels
- ADC_TM5 channels
PMK8280:
- ADC7 block
- VADC channels
- TM5 block
PMR735A:
- VADC channels
Also adds the thermal zone support to Lenovo X13s based on the thermistor
SYS_THERM6 that provides the laptop skin temperature.
The sc8280xp-pmics is based on the new PMIC7 architecture. In this, all the
ADC/TM5 measurements are collected by the primary PMIC PMK8280 from other
slave PMICs PM8280_{1/2}, PMR735A using the Programmable Boot Sequence (PBS)
and exposed them over the individual channels.
PMK8280 uses the Slave ID (SID) for identifying each slave PMICs in a system.
This ID is not static for each PMIC but rather set for each platform by the
hardware designers. So this series allows the configurable SID by modifying the
binding to accept SID values instead of hardcoding them.
This series is tested on Lenovo X13s laptop by monitoring the temperature of
the 8 on-board thermistors through IIO interface. The thermal zone support is
validated by adding loads to the CPUs and making sure the skin temperature stays
below the threshold provided in DT.
NOTE: This series requires fwnode support to QCOM_SPMI_ADC5 driver [1] for making
use of the full node name for IIO channels. Since the support is already in
mainline, it should just work. But for older kernels, the IIO channels and
thus the SPMI_ADC5 driver will fail to probe.
Thanks,
Mani
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/drivers/iio/adc/qcom-spmi-adc5.c?id=4f47a236a23d9f18d018a2f6639daad476d2a3f2
Changes in v4:
* Got rid of "label" properties from ADC nodes and used common node names. The
ADC5 driver in mainline now uses the full node name for registering the IIO
channels. So "label" or unique node name is not required.
Changes in v3:
* Used thermistor index in node names for VADC channels. This is required by IIO
* Collected reviews
* Rearranged the dt properties (Konrad)
Changes in v2:
* Fixed issues reported by Krzysztof and "make dtbs_check"
* Collected reviews from Krzysztof
* Added the Lenovo X13s thermal zone patch
Manivannan Sadhasivam (12):
dt-bindings: iio: qcom: adc7-pm8350: Allow specifying SID for channels
arm64: dts: qcom: sc8280xp-pmics: Add temp alarm for PM8280_{1/2}
PMICs
arm64: dts: qcom: sc8280xp-pmics: Add thermal zones for PM8280_{1/2}
PMICs
arm64: dts: qcom: sc8280xp-pmics: Add support for PMK8280 RESIN input
arm64: dts: qcom: sc8280xp-pmics: Add PMK8280 ADC7 block
arm64: dts: qcom: sc8280xp-pmics: Add support for TM5 block in PMK8280
arm64: dts: qcom: sc8280xp-x13s: Enable PMK8280 RESIN input
arm64: dts: qcom: sc8280xp-x13s: Add PMK8280 VADC channels
arm64: dts: qcom: sc8280xp-x13s: Add PM8280_{1/2} VADC channels
arm64: dts: qcom: sc8280xp-x13s: Add PMR735A VADC channel
arm64: dts: qcom: sc8280xp-x13s: Add PM8280_{1/2} ADC_TM5 channels
arm64: dts: qcom: sc8280xp-x13s: Add thermal zone support
.../bindings/thermal/qcom-spmi-adc-tm5.yaml | 6 +-
.../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 199 ++++++++++++++++++
arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi | 84 ++++++++
.../dt-bindings/iio/qcom,spmi-adc7-pm8350.h | 90 ++++----
4 files changed, 329 insertions(+), 50 deletions(-)
--
2.25.1
Add thermal zone support by making use of the thermistor SYS_THERM6.
Based on experiments, this thermistor seems to reflect the actual
surface temperature of the laptop.
For the cooling device, all BIG CPU cores are throttled down to keep the
temperature at a sane level.
Signed-off-by: Manivannan Sadhasivam <[email protected]>
---
.../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 46 +++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
index bdaacf1abf9f..60dbc736f4d7 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
@@ -29,6 +29,52 @@ backlight {
pinctrl-0 = <&edp_bl_en>, <&edp_bl_pwm>;
};
+ thermal-zones {
+ skin-temp-thermal {
+ polling-delay-passive = <250>;
+ polling-delay = <0>;
+ thermal-sensors = <&pmk8280_adc_tm 5>;
+
+ trips {
+ skin_temp_alert0: trip-point0 {
+ temperature = <55000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+
+ skin_temp_alert1: trip-point1 {
+ temperature = <58000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+
+ skin-temp-crit {
+ temperature = <73000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&skin_temp_alert0>;
+ cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+
+ map1 {
+ trip = <&skin_temp_alert1>;
+ cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+ };
+
vreg_edp_bl: regulator-edp-bl {
compatible = "regulator-fixed";
--
2.25.1
Add thermal zones for the PM8280_{1/2} PMICs by using the temperature
alarm blocks as the thermal sensors. Temperature trip points are
inherited from PM8350 PMIC.
Reviewed-by: Konrad Dybcio <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Manivannan Sadhasivam <[email protected]>
---
arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi | 44 ++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi
index 5de47b1434a4..397ff4995003 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi
@@ -7,6 +7,50 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
+/ {
+ thermal-zones {
+ pm8280_1_thermal: pm8280-1-thermal {
+ polling-delay-passive = <100>;
+ polling-delay = <0>;
+ thermal-sensors = <&pm8280_1_temp_alarm>;
+
+ trips {
+ trip0 {
+ temperature = <95000>;
+ hysteresis = <0>;
+ type = "passive";
+ };
+
+ trip1 {
+ temperature = <115000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ pm8280_2_thermal: pm8280-2-thermal {
+ polling-delay-passive = <100>;
+ polling-delay = <0>;
+ thermal-sensors = <&pm8280_2_temp_alarm>;
+
+ trips {
+ trip0 {
+ temperature = <95000>;
+ hysteresis = <0>;
+ type = "passive";
+ };
+
+ trip1 {
+ temperature = <115000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+ };
+};
+
&spmi_bus {
pmk8280: pmic@0 {
compatible = "qcom,pmk8350", "qcom,spmi-pmic";
--
2.25.1
The RESIN input can be used to reset the PMK8280 PMIC. Enabling the
RESIN block allows the PMK8280 to detect reset input via RESIN_N pin.
Reviewed-by: Konrad Dybcio <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Manivannan Sadhasivam <[email protected]>
---
arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi
index 397ff4995003..4a3464f5e6e9 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi
@@ -68,6 +68,12 @@ pmk8280_pon_pwrkey: pwrkey {
linux,code = <KEY_POWER>;
status = "disabled";
};
+
+ pmk8280_pon_resin: resin {
+ compatible = "qcom,pmk8350-resin";
+ interrupts = <0x0 0x13 0x6 IRQ_TYPE_EDGE_BOTH>;
+ status = "disabled";
+ };
};
};
--
2.25.1
As per the new ADC7 architecture used by the Qualcomm PMICs, each PMIC
has the static Slave ID (SID) assigned by default. The primary PMIC
PMK8350 is responsible for collecting the temperature/voltage data from
the slave PMICs and exposing them via it's registers.
For getting the measurements from the slave PMICs, PMK8350 uses the
channel ID encoded with the SID of the relevant PMIC. So far, the
dt-binding for the slave PMIC PM8350 assumed that there will be only
one PM8350 in a system. So it harcoded SID 1 with channel IDs.
But this got changed in platforms such as Lenovo X13s where there are a
couple of PM8350 PMICs available. So to address multiple PM8350s, change
the binding to accept the SID specified by the user and use it for
encoding the channel ID.
It should be noted that, even though the SID is static it is not
globally unique. Only the primary PMIC has the unique SID id 0.
Reviewed-by: Dmitry Baryshkov <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Manivannan Sadhasivam <[email protected]>
---
.../bindings/thermal/qcom-spmi-adc-tm5.yaml | 6 +-
.../dt-bindings/iio/qcom,spmi-adc7-pm8350.h | 90 +++++++++----------
2 files changed, 46 insertions(+), 50 deletions(-)
diff --git a/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml b/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml
index feb390d50696..d20569b9b763 100644
--- a/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml
+++ b/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml
@@ -222,8 +222,8 @@ examples:
qcom,hw-settle-time = <200>;
};
- conn-therm@47 {
- reg = <PM8350_ADC7_AMUX_THM4_100K_PU>;
+ conn-therm@147 {
+ reg = <PM8350_ADC7_AMUX_THM4_100K_PU(1)>;
qcom,ratiometric;
qcom,hw-settle-time = <200>;
};
@@ -247,7 +247,7 @@ examples:
conn-therm@1 {
reg = <1>;
- io-channels = <&pmk8350_vadc PM8350_ADC7_AMUX_THM4_100K_PU>;
+ io-channels = <&pmk8350_vadc PM8350_ADC7_AMUX_THM4_100K_PU(1)>;
qcom,avg-samples = <2>;
qcom,ratiometric;
qcom,hw-settle-time-us = <200>;
diff --git a/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h b/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h
index 9426f27a1946..09fd169ad18e 100644
--- a/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h
+++ b/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h
@@ -6,62 +6,58 @@
#ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H
#define _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H
-#ifndef PM8350_SID
-#define PM8350_SID 1
-#endif
-
/* ADC channels for PM8350_ADC for PMIC7 */
-#define PM8350_ADC7_REF_GND (PM8350_SID << 8 | 0x0)
-#define PM8350_ADC7_1P25VREF (PM8350_SID << 8 | 0x01)
-#define PM8350_ADC7_VREF_VADC (PM8350_SID << 8 | 0x02)
-#define PM8350_ADC7_DIE_TEMP (PM8350_SID << 8 | 0x03)
-
-#define PM8350_ADC7_AMUX_THM1 (PM8350_SID << 8 | 0x04)
-#define PM8350_ADC7_AMUX_THM2 (PM8350_SID << 8 | 0x05)
-#define PM8350_ADC7_AMUX_THM3 (PM8350_SID << 8 | 0x06)
-#define PM8350_ADC7_AMUX_THM4 (PM8350_SID << 8 | 0x07)
-#define PM8350_ADC7_AMUX_THM5 (PM8350_SID << 8 | 0x08)
-#define PM8350_ADC7_GPIO1 (PM8350_SID << 8 | 0x0a)
-#define PM8350_ADC7_GPIO2 (PM8350_SID << 8 | 0x0b)
-#define PM8350_ADC7_GPIO3 (PM8350_SID << 8 | 0x0c)
-#define PM8350_ADC7_GPIO4 (PM8350_SID << 8 | 0x0d)
+#define PM8350_ADC7_REF_GND(sid) ((sid) << 8 | 0x0)
+#define PM8350_ADC7_1P25VREF(sid) ((sid) << 8 | 0x01)
+#define PM8350_ADC7_VREF_VADC(sid) ((sid) << 8 | 0x02)
+#define PM8350_ADC7_DIE_TEMP(sid) ((sid) << 8 | 0x03)
+
+#define PM8350_ADC7_AMUX_THM1(sid) ((sid) << 8 | 0x04)
+#define PM8350_ADC7_AMUX_THM2(sid) ((sid) << 8 | 0x05)
+#define PM8350_ADC7_AMUX_THM3(sid) ((sid) << 8 | 0x06)
+#define PM8350_ADC7_AMUX_THM4(sid) ((sid) << 8 | 0x07)
+#define PM8350_ADC7_AMUX_THM5(sid) ((sid) << 8 | 0x08)
+#define PM8350_ADC7_GPIO1(sid) ((sid) << 8 | 0x0a)
+#define PM8350_ADC7_GPIO2(sid) ((sid) << 8 | 0x0b)
+#define PM8350_ADC7_GPIO3(sid) ((sid) << 8 | 0x0c)
+#define PM8350_ADC7_GPIO4(sid) ((sid) << 8 | 0x0d)
/* 30k pull-up1 */
-#define PM8350_ADC7_AMUX_THM1_30K_PU (PM8350_SID << 8 | 0x24)
-#define PM8350_ADC7_AMUX_THM2_30K_PU (PM8350_SID << 8 | 0x25)
-#define PM8350_ADC7_AMUX_THM3_30K_PU (PM8350_SID << 8 | 0x26)
-#define PM8350_ADC7_AMUX_THM4_30K_PU (PM8350_SID << 8 | 0x27)
-#define PM8350_ADC7_AMUX_THM5_30K_PU (PM8350_SID << 8 | 0x28)
-#define PM8350_ADC7_GPIO1_30K_PU (PM8350_SID << 8 | 0x2a)
-#define PM8350_ADC7_GPIO2_30K_PU (PM8350_SID << 8 | 0x2b)
-#define PM8350_ADC7_GPIO3_30K_PU (PM8350_SID << 8 | 0x2c)
-#define PM8350_ADC7_GPIO4_30K_PU (PM8350_SID << 8 | 0x2d)
+#define PM8350_ADC7_AMUX_THM1_30K_PU(sid) ((sid) << 8 | 0x24)
+#define PM8350_ADC7_AMUX_THM2_30K_PU(sid) ((sid) << 8 | 0x25)
+#define PM8350_ADC7_AMUX_THM3_30K_PU(sid) ((sid) << 8 | 0x26)
+#define PM8350_ADC7_AMUX_THM4_30K_PU(sid) ((sid) << 8 | 0x27)
+#define PM8350_ADC7_AMUX_THM5_30K_PU(sid) ((sid) << 8 | 0x28)
+#define PM8350_ADC7_GPIO1_30K_PU(sid) ((sid) << 8 | 0x2a)
+#define PM8350_ADC7_GPIO2_30K_PU(sid) ((sid) << 8 | 0x2b)
+#define PM8350_ADC7_GPIO3_30K_PU(sid) ((sid) << 8 | 0x2c)
+#define PM8350_ADC7_GPIO4_30K_PU(sid) ((sid) << 8 | 0x2d)
/* 100k pull-up2 */
-#define PM8350_ADC7_AMUX_THM1_100K_PU (PM8350_SID << 8 | 0x44)
-#define PM8350_ADC7_AMUX_THM2_100K_PU (PM8350_SID << 8 | 0x45)
-#define PM8350_ADC7_AMUX_THM3_100K_PU (PM8350_SID << 8 | 0x46)
-#define PM8350_ADC7_AMUX_THM4_100K_PU (PM8350_SID << 8 | 0x47)
-#define PM8350_ADC7_AMUX_THM5_100K_PU (PM8350_SID << 8 | 0x48)
-#define PM8350_ADC7_GPIO1_100K_PU (PM8350_SID << 8 | 0x4a)
-#define PM8350_ADC7_GPIO2_100K_PU (PM8350_SID << 8 | 0x4b)
-#define PM8350_ADC7_GPIO3_100K_PU (PM8350_SID << 8 | 0x4c)
-#define PM8350_ADC7_GPIO4_100K_PU (PM8350_SID << 8 | 0x4d)
+#define PM8350_ADC7_AMUX_THM1_100K_PU(sid) ((sid) << 8 | 0x44)
+#define PM8350_ADC7_AMUX_THM2_100K_PU(sid) ((sid) << 8 | 0x45)
+#define PM8350_ADC7_AMUX_THM3_100K_PU(sid) ((sid) << 8 | 0x46)
+#define PM8350_ADC7_AMUX_THM4_100K_PU(sid) ((sid) << 8 | 0x47)
+#define PM8350_ADC7_AMUX_THM5_100K_PU(sid) ((sid) << 8 | 0x48)
+#define PM8350_ADC7_GPIO1_100K_PU(sid) ((sid) << 8 | 0x4a)
+#define PM8350_ADC7_GPIO2_100K_PU(sid) ((sid) << 8 | 0x4b)
+#define PM8350_ADC7_GPIO3_100K_PU(sid) ((sid) << 8 | 0x4c)
+#define PM8350_ADC7_GPIO4_100K_PU(sid) ((sid) << 8 | 0x4d)
/* 400k pull-up3 */
-#define PM8350_ADC7_AMUX_THM1_400K_PU (PM8350_SID << 8 | 0x64)
-#define PM8350_ADC7_AMUX_THM2_400K_PU (PM8350_SID << 8 | 0x65)
-#define PM8350_ADC7_AMUX_THM3_400K_PU (PM8350_SID << 8 | 0x66)
-#define PM8350_ADC7_AMUX_THM4_400K_PU (PM8350_SID << 8 | 0x67)
-#define PM8350_ADC7_AMUX_THM5_400K_PU (PM8350_SID << 8 | 0x68)
-#define PM8350_ADC7_GPIO1_400K_PU (PM8350_SID << 8 | 0x6a)
-#define PM8350_ADC7_GPIO2_400K_PU (PM8350_SID << 8 | 0x6b)
-#define PM8350_ADC7_GPIO3_400K_PU (PM8350_SID << 8 | 0x6c)
-#define PM8350_ADC7_GPIO4_400K_PU (PM8350_SID << 8 | 0x6d)
+#define PM8350_ADC7_AMUX_THM1_400K_PU(sid) ((sid) << 8 | 0x64)
+#define PM8350_ADC7_AMUX_THM2_400K_PU(sid) ((sid) << 8 | 0x65)
+#define PM8350_ADC7_AMUX_THM3_400K_PU(sid) ((sid) << 8 | 0x66)
+#define PM8350_ADC7_AMUX_THM4_400K_PU(sid) ((sid) << 8 | 0x67)
+#define PM8350_ADC7_AMUX_THM5_400K_PU(sid) ((sid) << 8 | 0x68)
+#define PM8350_ADC7_GPIO1_400K_PU(sid) ((sid) << 8 | 0x6a)
+#define PM8350_ADC7_GPIO2_400K_PU(sid) ((sid) << 8 | 0x6b)
+#define PM8350_ADC7_GPIO3_400K_PU(sid) ((sid) << 8 | 0x6c)
+#define PM8350_ADC7_GPIO4_400K_PU(sid) ((sid) << 8 | 0x6d)
/* 1/3 Divider */
-#define PM8350_ADC7_GPIO4_DIV3 (PM8350_SID << 8 | 0x8d)
+#define PM8350_ADC7_GPIO4_DIV3(sid) ((sid) << 8 | 0x8d)
-#define PM8350_ADC7_VPH_PWR (PM8350_SID << 8 | 0x8e)
+#define PM8350_ADC7_VPH_PWR(sid) ((sid) << 8 | 0x8e)
#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H */
--
2.25.1
Add VADC channel of PMR735A for measuring the on-chip die temperature.
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Manivannan Sadhasivam <[email protected]>
---
arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
index 807d74026fab..7677fe5cf28e 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
@@ -9,6 +9,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/iio/qcom,spmi-adc7-pm8350.h>
#include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
+#include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "sc8280xp.dtsi"
@@ -246,6 +247,11 @@ sys-therm@347 {
qcom,hw-settle-time = <200>;
qcom,ratiometric;
};
+
+ pmic-die-temp@403 {
+ reg = <PMR735A_ADC7_DIE_TEMP>;
+ qcom,pre-scaling = <1 1>;
+ };
};
&qup0 {
--
2.25.1
Enable resetting the PMK8280 through RESIN block in SC8280XP X13s.
Reviewed-by: Konrad Dybcio <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Manivannan Sadhasivam <[email protected]>
---
arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
index b2b744bb8a53..6aa8cf6d9776 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
@@ -169,6 +169,10 @@ &pmk8280_pon_pwrkey {
status = "okay";
};
+&pmk8280_pon_resin {
+ status = "okay";
+};
+
&qup0 {
status = "okay";
};
--
2.25.1
Add ADC_TM5 channels of PM8280_{1/2} for monitoring the temperature from
external thermistors connected to AMUX pins. The temperature measurements
are collected from the PMK8280's VADC channels that expose the
measurements from secondary PMICs PM8280_{1/2}.
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Manivannan Sadhasivam <[email protected]>
---
.../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 68 +++++++++++++++++++
1 file changed, 68 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
index 7677fe5cf28e..bdaacf1abf9f 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
@@ -254,6 +254,74 @@ pmic-die-temp@403 {
};
};
+&pmk8280_adc_tm {
+ status = "okay";
+
+ sys-therm@0 {
+ reg = <0>;
+ io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM1_100K_PU(1)>;
+ qcom,hw-settle-time-us = <200>;
+ qcom,avg-samples = <2>;
+ qcom,ratiometric;
+ };
+
+ sys-therm@1 {
+ reg = <1>;
+ io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM2_100K_PU(1)>;
+ qcom,hw-settle-time-us = <200>;
+ qcom,avg-samples = <2>;
+ qcom,ratiometric;
+ };
+
+ sys-therm@2 {
+ reg = <2>;
+ io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM3_100K_PU(1)>;
+ qcom,hw-settle-time-us = <200>;
+ qcom,avg-samples = <2>;
+ qcom,ratiometric;
+ };
+
+ sys-therm@3 {
+ reg = <3>;
+ io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM4_100K_PU(1)>;
+ qcom,hw-settle-time-us = <200>;
+ qcom,avg-samples = <2>;
+ qcom,ratiometric;
+ };
+
+ sys-therm@4 {
+ reg = <4>;
+ io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM1_100K_PU(3)>;
+ qcom,hw-settle-time-us = <200>;
+ qcom,avg-samples = <2>;
+ qcom,ratiometric;
+ };
+
+ sys-therm@5 {
+ reg = <5>;
+ io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM2_100K_PU(3)>;
+ qcom,hw-settle-time-us = <200>;
+ qcom,avg-samples = <2>;
+ qcom,ratiometric;
+ };
+
+ sys-therm@6 {
+ reg = <6>;
+ io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM3_100K_PU(3)>;
+ qcom,hw-settle-time-us = <200>;
+ qcom,avg-samples = <2>;
+ qcom,ratiometric;
+ };
+
+ sys-therm@7 {
+ reg = <7>;
+ io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM4_100K_PU(3)>;
+ qcom,hw-settle-time-us = <200>;
+ qcom,avg-samples = <2>;
+ qcom,ratiometric;
+ };
+};
+
&qup0 {
status = "okay";
};
--
2.25.1
Add support for temperature alarm feature in the PM8280_{1/2} PMICs.
Reviewed-by: Konrad Dybcio <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Manivannan Sadhasivam <[email protected]>
---
arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi
index 24836b6b9bbc..5de47b1434a4 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi
@@ -33,6 +33,13 @@ pmc8280_1: pmic@1 {
#address-cells = <1>;
#size-cells = <0>;
+ pm8280_1_temp_alarm: temp-alarm@a00 {
+ compatible = "qcom,spmi-temp-alarm";
+ reg = <0xa00>;
+ interrupts = <0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
+ #thermal-sensor-cells = <0>;
+ };
+
pmc8280_1_gpios: gpio@8800 {
compatible = "qcom,pm8350-gpio", "qcom,spmi-gpio";
reg = <0x8800>;
@@ -78,6 +85,13 @@ pmc8280_2: pmic@3 {
#address-cells = <1>;
#size-cells = <0>;
+ pm8280_2_temp_alarm: temp-alarm@a00 {
+ compatible = "qcom,spmi-temp-alarm";
+ reg = <0xa00>;
+ interrupts = <0x2 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
+ #thermal-sensor-cells = <0>;
+ };
+
pmc8280_2_gpios: gpio@8800 {
compatible = "qcom,pm8350-gpio", "qcom,spmi-gpio";
reg = <0x8800>;
--
2.25.1
Thermal Monitoring block ADC5 (TM5) in PMK8280 can be used to monitor the
temperature from secondary PMICs like PM8280.
Reviewed-by: Konrad Dybcio <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Manivannan Sadhasivam <[email protected]>
---
arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi
index b1cdde2f7861..f2c0b71b5d8e 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi
@@ -85,6 +85,16 @@ pmk8280_vadc: adc@3100 {
#io-channel-cells = <1>;
status = "disabled";
};
+
+ pmk8280_adc_tm: adc-tm@3400 {
+ compatible = "qcom,spmi-adc-tm5-gen2";
+ reg = <0x3400>;
+ interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #thermal-sensor-cells = <1>;
+ status = "disabled";
+ };
};
pmc8280_1: pmic@1 {
--
2.25.1
On Thu, Nov 03, 2022 at 03:28:09PM +0530, Manivannan Sadhasivam wrote:
> Add ADC_TM5 channels of PM8280_{1/2} for monitoring the temperature from
> external thermistors connected to AMUX pins. The temperature measurements
> are collected from the PMK8280's VADC channels that expose the
> measurements from secondary PMICs PM8280_{1/2}.
>
> Reviewed-by: Krzysztof Kozlowski <[email protected]>
> Reviewed-by: Konrad Dybcio <[email protected]>
> Signed-off-by: Manivannan Sadhasivam <[email protected]>
> ---
> .../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 68 +++++++++++++++++++
> 1 file changed, 68 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
> index 7677fe5cf28e..bdaacf1abf9f 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
> @@ -254,6 +254,74 @@ pmic-die-temp@403 {
> };
> };
>
> +&pmk8280_adc_tm {
Please try to keep the nodes sorted alphabetically (e.g. this one should
go before &pmk8280_pon_pwrkey).
Johan
On 03/11/2022 10:58, Manivannan Sadhasivam wrote:
> Add thermal zone support by making use of the thermistor SYS_THERM6.
> Based on experiments, this thermistor seems to reflect the actual
> surface temperature of the laptop.
>
> For the cooling device, all BIG CPU cores are throttled down to keep the
> temperature at a sane level.
>
> Signed-off-by: Manivannan Sadhasivam <[email protected]>
> ---
Taking into account your explanations from our thread on v2,
Reviewed-by: Konrad Dybcio <[email protected]>
Konrad
> .../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 46 +++++++++++++++++++
> 1 file changed, 46 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
> index bdaacf1abf9f..60dbc736f4d7 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
> @@ -29,6 +29,52 @@ backlight {
> pinctrl-0 = <&edp_bl_en>, <&edp_bl_pwm>;
> };
>
> + thermal-zones {
> + skin-temp-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <0>;
> + thermal-sensors = <&pmk8280_adc_tm 5>;
> +
> + trips {
> + skin_temp_alert0: trip-point0 {
> + temperature = <55000>;
> + hysteresis = <1000>;
> + type = "passive";
> + };
> +
> + skin_temp_alert1: trip-point1 {
> + temperature = <58000>;
> + hysteresis = <1000>;
> + type = "passive";
> + };
> +
> + skin-temp-crit {
> + temperature = <73000>;
> + hysteresis = <1000>;
> + type = "critical";
> + };
> + };
> +
> + cooling-maps {
> + map0 {
> + trip = <&skin_temp_alert0>;
> + cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> + };
> +
> + map1 {
> + trip = <&skin_temp_alert1>;
> + cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> + };
> + };
> + };
> + };
> +
> vreg_edp_bl: regulator-edp-bl {
> compatible = "regulator-fixed";
>
On Thu, Nov 03, 2022 at 12:32:36PM +0100, Johan Hovold wrote:
> On Thu, Nov 03, 2022 at 03:28:09PM +0530, Manivannan Sadhasivam wrote:
> > Add ADC_TM5 channels of PM8280_{1/2} for monitoring the temperature from
> > external thermistors connected to AMUX pins. The temperature measurements
> > are collected from the PMK8280's VADC channels that expose the
> > measurements from secondary PMICs PM8280_{1/2}.
> >
> > Reviewed-by: Krzysztof Kozlowski <[email protected]>
> > Reviewed-by: Konrad Dybcio <[email protected]>
> > Signed-off-by: Manivannan Sadhasivam <[email protected]>
> > ---
> > .../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 68 +++++++++++++++++++
> > 1 file changed, 68 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
> > index 7677fe5cf28e..bdaacf1abf9f 100644
> > --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
> > +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
> > @@ -254,6 +254,74 @@ pmic-die-temp@403 {
> > };
> > };
> >
> > +&pmk8280_adc_tm {
>
> Please try to keep the nodes sorted alphabetically (e.g. this one should
> go before &pmk8280_pon_pwrkey).
>
Thanks for spotting that, I fixed up the order.
Regards,
Bjorn
On Thu, 3 Nov 2022 15:27:58 +0530, Manivannan Sadhasivam wrote:
> This series adds below updates to sc8280xp-pmics:
>
> PM8280_{1/2}:
> - Temp alarm
> - Thermal zones
> - VADC channels
> - ADC_TM5 channels
>
> [...]
Applied, thanks!
[01/12] dt-bindings: iio: qcom: adc7-pm8350: Allow specifying SID for channels
commit: 22f1d06f4f283e36622036726093032a07d67c0d
[02/12] arm64: dts: qcom: sc8280xp-pmics: Add temp alarm for PM8280_{1/2} PMICs
commit: 6c82f40ec94ed99eb5200fc0d3afe79648078d93
[03/12] arm64: dts: qcom: sc8280xp-pmics: Add thermal zones for PM8280_{1/2} PMICs
commit: 448a7821daa1bb12ec0978694cd0e77be3d9663b
[04/12] arm64: dts: qcom: sc8280xp-pmics: Add support for PMK8280 RESIN input
commit: 34bd6d227ffc99d8ce1ced20bbfceacb14651869
[05/12] arm64: dts: qcom: sc8280xp-pmics: Add PMK8280 ADC7 block
commit: e0f681f7294a9899dbae897f31720efc30807582
[06/12] arm64: dts: qcom: sc8280xp-pmics: Add support for TM5 block in PMK8280
commit: 5cd549c7e7cd55453e0c0d4f2c1f51d071061451
[07/12] arm64: dts: qcom: sc8280xp-x13s: Enable PMK8280 RESIN input
commit: 7858c676c8b243941d1539c6e2619c1713292025
[08/12] arm64: dts: qcom: sc8280xp-x13s: Add PMK8280 VADC channels
commit: 9a6b3042c5337141a2ad202c6e6a28e4e0440c29
[09/12] arm64: dts: qcom: sc8280xp-x13s: Add PM8280_{1/2} VADC channels
commit: 3375151a71855d44edf4ff78aedac6d5272525ff
[10/12] arm64: dts: qcom: sc8280xp-x13s: Add PMR735A VADC channel
commit: 9d41cd17394aca9ce3e00ab52edfa35f1848d2b3
[11/12] arm64: dts: qcom: sc8280xp-x13s: Add PM8280_{1/2} ADC_TM5 channels
commit: 7c0151347401a55f98afa640f741f70e411ce685
[12/12] arm64: dts: qcom: sc8280xp-x13s: Add thermal zone support
commit: 31863c523ac5bd2b0fe0857c6405a7431c59d653
Best regards,
--
Bjorn Andersson <[email protected]>
On Thu, Nov 17, 2022 at 01:14:00PM +0100, Krzysztof Kozlowski wrote:
> On 03/11/2022 10:57, Manivannan Sadhasivam wrote:
> > As per the new ADC7 architecture used by the Qualcomm PMICs, each PMIC
> > has the static Slave ID (SID) assigned by default. The primary PMIC
> > PMK8350 is responsible for collecting the temperature/voltage data from
> > the slave PMICs and exposing them via it's registers.
> >
> > For getting the measurements from the slave PMICs, PMK8350 uses the
> > channel ID encoded with the SID of the relevant PMIC. So far, the
> > dt-binding for the slave PMIC PM8350 assumed that there will be only
> > one PM8350 in a system. So it harcoded SID 1 with channel IDs.
> >
> > But this got changed in platforms such as Lenovo X13s where there are a
> > couple of PM8350 PMICs available. So to address multiple PM8350s, change
> > the binding to accept the SID specified by the user and use it for
> > encoding the channel ID.
> >
> > It should be noted that, even though the SID is static it is not
> > globally unique. Only the primary PMIC has the unique SID id 0.
> >
> > Reviewed-by: Dmitry Baryshkov <[email protected]>
> > Reviewed-by: Krzysztof Kozlowski <[email protected]>
> > Acked-by: Rob Herring <[email protected]>
> > Signed-off-by: Manivannan Sadhasivam <[email protected]>
> > ---
>
> This was never sent to IIO maintainers, so now next is failing.
>
I missed it since there was only one bindings patch and rest all were dts :/
> Please use scripts/get_maintainers.pl to get a list of necessary people
> and lists to CC. It might happen, that command when run on an older
> kernel, gives you outdated entries. Therefore please be sure you base
> your patches on recent Linux kernel.
>
The problem was that I didn't rebase my patches on top of linux-next/Bjorn's
for-next at that time but used v6.1-rcX. So I did not see the example in
spmi-vadc.
Thanks,
Mani
> Best regards,
> Krzysztof
>
--
மணிவண்ணன் சதாசிவம்
On 03/11/2022 10:57, Manivannan Sadhasivam wrote:
> As per the new ADC7 architecture used by the Qualcomm PMICs, each PMIC
> has the static Slave ID (SID) assigned by default. The primary PMIC
> PMK8350 is responsible for collecting the temperature/voltage data from
> the slave PMICs and exposing them via it's registers.
>
> For getting the measurements from the slave PMICs, PMK8350 uses the
> channel ID encoded with the SID of the relevant PMIC. So far, the
> dt-binding for the slave PMIC PM8350 assumed that there will be only
> one PM8350 in a system. So it harcoded SID 1 with channel IDs.
>
> But this got changed in platforms such as Lenovo X13s where there are a
> couple of PM8350 PMICs available. So to address multiple PM8350s, change
> the binding to accept the SID specified by the user and use it for
> encoding the channel ID.
>
> It should be noted that, even though the SID is static it is not
> globally unique. Only the primary PMIC has the unique SID id 0.
>
> Reviewed-by: Dmitry Baryshkov <[email protected]>
> Reviewed-by: Krzysztof Kozlowski <[email protected]>
> Acked-by: Rob Herring <[email protected]>
> Signed-off-by: Manivannan Sadhasivam <[email protected]>
> ---
This was never sent to IIO maintainers, so now next is failing.
Please use scripts/get_maintainers.pl to get a list of necessary people
and lists to CC. It might happen, that command when run on an older
kernel, gives you outdated entries. Therefore please be sure you base
your patches on recent Linux kernel.
Best regards,
Krzysztof