2017-06-01 06:09:52

by Erin Lo

[permalink] [raw]
Subject: [PATCH 0/3] Add some DT nodes for Mediatek MT2701

This patch series based on v4.12-rc1, include MT2701 ethernet/disp bls/display function DT nodes.

Sean Wang (1):
arm: dts: mt2701: Add ethernet device node

YT Shen (2):
arm: dts: mt2701: Add display bls related nodes for MT2701
arm: dts: mt2701: Add display subsystem related nodes for MT2701

arch/arm/boot/dts/mt2701-evb.dts | 29 ++++++++++
arch/arm/boot/dts/mt2701.dtsi | 113 +++++++++++++++++++++++++++++++++++++++
2 files changed, 142 insertions(+)

--
1.9.1


2017-06-01 06:08:58

by Erin Lo

[permalink] [raw]
Subject: [PATCH 1/3] arm: dts: mt2701: Add ethernet device node

From: Sean Wang <[email protected]>

Add ethernet device node for MT2701

Signed-off-by: Sean Wang <[email protected]>
Signed-off-by: Erin Lo <[email protected]>
---
arch/arm/boot/dts/mt2701.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)

diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
index 8037210..de88bd7 100644
--- a/arch/arm/boot/dts/mt2701.dtsi
+++ b/arch/arm/boot/dts/mt2701.dtsi
@@ -420,6 +420,26 @@
#clock-cells = <1>;
};

+ eth: ethernet@1b100000 {
+ compatible = "mediatek,mt2701-eth", "syscon";
+ reg = <0 0x1b100000 0 0x20000>;
+ interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 199 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 198 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&topckgen CLK_TOP_ETHIF_SEL>,
+ <&ethsys CLK_ETHSYS_ESW>,
+ <&ethsys CLK_ETHSYS_GP1>,
+ <&ethsys CLK_ETHSYS_GP2>,
+ <&apmixedsys CLK_APMIXED_TRGPLL>;
+ clock-names = "ethif", "esw", "gp1", "gp2", "trgpll";
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
+ mediatek,ethsys = <&ethsys>;
+ mediatek,pctl = <&syscfg_pctl_a>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
bdpsys: syscon@1c000000 {
compatible = "mediatek,mt2701-bdpsys", "syscon";
reg = <0 0x1c000000 0 0x1000>;
--
1.9.1

2017-06-01 06:09:07

by Erin Lo

[permalink] [raw]
Subject: [PATCH 3/3] arm: dts: mt2701: Add display subsystem related nodes for MT2701

From: YT Shen <[email protected]>

This patch adds the device nodes for the DISP function blocks for MT2701

Signed-off-by: YT Shen <[email protected]>
Signed-off-by: Erin Lo <[email protected]>
---
arch/arm/boot/dts/mt2701.dtsi | 84 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 84 insertions(+)

diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
index 4f110d5..e20b65c 100644
--- a/arch/arm/boot/dts/mt2701.dtsi
+++ b/arch/arm/boot/dts/mt2701.dtsi
@@ -17,6 +17,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset/mt2701-resets.h>
+#include <dt-bindings/memory/mt2701-larb-port.h>
#include "skeleton64.dtsi"
#include "mt2701-pinfunc.h"

@@ -24,6 +25,11 @@
compatible = "mediatek,mt2701";
interrupt-parent = <&sysirq>;

+ aliases {
+ rdma0 = &rdma0;
+ rdma1 = &rdma1;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -201,6 +207,16 @@
power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
};

+ mipi_tx0: mipi-dphy@10010000 {
+ compatible = "mediatek,mt2701-mipi-tx";
+ reg = <0 0x10010000 0 0x90>;
+ clocks = <&clk26m>;
+ clock-output-names = "mipi_tx0_pll";
+ #clock-cells = <0>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
sysirq: interrupt-controller@10200100 {
compatible = "mediatek,mt2701-sysirq",
"mediatek,mt6577-sysirq";
@@ -366,6 +382,39 @@
#clock-cells = <1>;
};

+ display_components: dispsys@14000000 {
+ compatible = "mediatek,mt2701-mmsys";
+ reg = <0 0x14000000 0 0x1000>;
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
+ };
+
+ ovl@14007000 {
+ compatible = "mediatek,mt2701-disp-ovl";
+ reg = <0 0x14007000 0 0x1000>;
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&mmsys CLK_MM_DISP_OVL>;
+ iommus = <&iommu MT2701_M4U_PORT_DISP_OVL_0>;
+ mediatek,larb = <&larb0>;
+ };
+
+ rdma0: rdma@14008000 {
+ compatible = "mediatek,mt2701-disp-rdma";
+ reg = <0 0x14008000 0 0x1000>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&mmsys CLK_MM_DISP_RDMA>;
+ iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA>;
+ mediatek,larb = <&larb0>;
+ };
+
+ wdma@14009000 {
+ compatible = "mediatek,mt2701-disp-wdma";
+ reg = <0 0x14009000 0 0x1000>;
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&mmsys CLK_MM_DISP_WDMA>;
+ iommus = <&iommu MT2701_M4U_PORT_DISP_WDMA>;
+ mediatek,larb = <&larb0>;
+ };
+
bls: bls@1400a000 {
compatible = "mediatek,mt2701-disp-pwm";
reg = <0 0x1400a000 0 0x1000>;
@@ -375,6 +424,32 @@
status = "disabled";
};

+ color@1400b000 {
+ compatible = "mediatek,mt2701-disp-color";
+ reg = <0 0x1400b000 0 0x1000>;
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&mmsys CLK_MM_DISP_COLOR>;
+ };
+
+ dsi: dsi@1400c000 {
+ compatible = "mediatek,mt2701-dsi";
+ reg = <0 0x1400c000 0 0x1000>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&mmsys CLK_MM_DSI_ENGINE>, <&mmsys CLK_MM_DSI_DIG>,
+ <&mipi_tx0>;
+ clock-names = "engine", "digital", "hs";
+ phys = <&mipi_tx0>;
+ phy-names = "dphy";
+ status = "disabled";
+ };
+
+ mutex: mutex@1400e000 {
+ compatible = "mediatek,mt2701-disp-mutex";
+ reg = <0 0x1400e000 0 0x1000>;
+ interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&mmsys CLK_MM_MUTEX_32K>;
+ };
+
larb0: larb@14010000 {
compatible = "mediatek,mt2701-smi-larb";
reg = <0 0x14010000 0 0x1000>;
@@ -385,6 +460,15 @@
power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
};

+ rdma1: rdma@14012000 {
+ compatible = "mediatek,mt2701-disp-rdma";
+ reg = <0 0x14012000 0 0x1000>;
+ interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&mmsys CLK_MM_DISP_RDMA1>;
+ iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA1>;
+ mediatek,larb = <&larb0>;
+ };
+
imgsys: syscon@15000000 {
compatible = "mediatek,mt2701-imgsys", "syscon";
reg = <0 0x15000000 0 0x1000>;
--
1.9.1

2017-06-01 06:10:05

by Erin Lo

[permalink] [raw]
Subject: [PATCH 2/3] arm: dts: mt2701: Add display bls related nodes for MT2701

From: YT Shen <[email protected]>

This patch adds the device node of display backlight for MT2701

Signed-off-by: Weiqing Kong <[email protected]>
Signed-off-by: Erin Lo <[email protected]>
---
arch/arm/boot/dts/mt2701-evb.dts | 29 +++++++++++++++++++++++++++++
arch/arm/boot/dts/mt2701.dtsi | 9 +++++++++
2 files changed, 38 insertions(+)

diff --git a/arch/arm/boot/dts/mt2701-evb.dts b/arch/arm/boot/dts/mt2701-evb.dts
index a483798..e49c2b7 100644
--- a/arch/arm/boot/dts/mt2701-evb.dts
+++ b/arch/arm/boot/dts/mt2701-evb.dts
@@ -22,6 +22,35 @@
memory {
reg = <0 0x80000000 0 0x40000000>;
};
+
+ backlight_lcd: backlight_lcd {
+ compatible = "pwm-backlight";
+ pwms = <&bls 0 100000>;
+ brightness-levels = <
+ 0 16 32 48 64 80 96 112
+ 128 144 160 176 192 208 224 240
+ 255
+ >;
+ default-brightness-level = <9>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_bls_gpio>;
+ };
+};
+
+&bls {
+ status = "okay";
+};
+
+&mmsys {
+ status = "okay";
+};
+
+&pio {
+ pwm_bls_gpio: pwm_bls_gpio {
+ pins_cmd_dat {
+ pinmux = <MT2701_PIN_208_AUD_EXT_CK1__FUNC_DISP_PWM>;
+ };
+ };
};

&auxadc {
diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
index de88bd7..4f110d5 100644
--- a/arch/arm/boot/dts/mt2701.dtsi
+++ b/arch/arm/boot/dts/mt2701.dtsi
@@ -366,6 +366,15 @@
#clock-cells = <1>;
};

+ bls: bls@1400a000 {
+ compatible = "mediatek,mt2701-disp-pwm";
+ reg = <0 0x1400a000 0 0x1000>;
+ #pwm-cells = <2>;
+ clocks = <&mmsys CLK_MM_MDP_BLS_26M>, <&mmsys CLK_MM_DISP_BLS>;
+ clock-names = "main", "mm";
+ status = "disabled";
+ };
+
larb0: larb@14010000 {
compatible = "mediatek,mt2701-smi-larb";
reg = <0 0x14010000 0 0x1000>;
--
1.9.1

2017-06-09 08:13:02

by Matthias Brugger

[permalink] [raw]
Subject: Re: [PATCH 2/3] arm: dts: mt2701: Add display bls related nodes for MT2701



On 01/06/17 08:08, Erin Lo wrote:
> From: YT Shen <[email protected]>

I miss the Singed-off-by from YT Shen.

>
> This patch adds the device node of display backlight for MT2701
>
> Signed-off-by: Weiqing Kong <[email protected]>
> Signed-off-by: Erin Lo <[email protected]>
> ---
> arch/arm/boot/dts/mt2701-evb.dts | 29 +++++++++++++++++++++++++++++
> arch/arm/boot/dts/mt2701.dtsi | 9 +++++++++
> 2 files changed, 38 insertions(+)
>
> diff --git a/arch/arm/boot/dts/mt2701-evb.dts b/arch/arm/boot/dts/mt2701-evb.dts
> index a483798..e49c2b7 100644
> --- a/arch/arm/boot/dts/mt2701-evb.dts
> +++ b/arch/arm/boot/dts/mt2701-evb.dts
> @@ -22,6 +22,35 @@
> memory {
> reg = <0 0x80000000 0 0x40000000>;
> };
> +
> + backlight_lcd: backlight_lcd {
> + compatible = "pwm-backlight";
> + pwms = <&bls 0 100000>;
> + brightness-levels = <
> + 0 16 32 48 64 80 96 112
> + 128 144 160 176 192 208 224 240
> + 255
> + >;
> + default-brightness-level = <9>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pwm_bls_gpio>;
> + };
> +};
> +
> +&bls {
> + status = "okay";
> +};
> +
> +&mmsys {
> + status = "okay";
> +};
> +
> +&pio {
> + pwm_bls_gpio: pwm_bls_gpio {
> + pins_cmd_dat {
> + pinmux = <MT2701_PIN_208_AUD_EXT_CK1__FUNC_DISP_PWM>;
> + };
> + };
> };
>
> &auxadc {
> diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
> index de88bd7..4f110d5 100644
> --- a/arch/arm/boot/dts/mt2701.dtsi
> +++ b/arch/arm/boot/dts/mt2701.dtsi
> @@ -366,6 +366,15 @@
> #clock-cells = <1>;
> };
>
> + bls: bls@1400a000 {
> + compatible = "mediatek,mt2701-disp-pwm";
> + reg = <0 0x1400a000 0 0x1000>;
> + #pwm-cells = <2>;
> + clocks = <&mmsys CLK_MM_MDP_BLS_26M>, <&mmsys CLK_MM_DISP_BLS>;
> + clock-names = "main", "mm";
> + status = "disabled";
> + };
> +

Can you make this a new patch please. It's preferred to have one patch
for the dtsi and another one for the actual board.

Thanks,
Matthias

> larb0: larb@14010000 {
> compatible = "mediatek,mt2701-smi-larb";
> reg = <0 0x14010000 0 0x1000>;
>

2017-06-09 08:14:45

by Matthias Brugger

[permalink] [raw]
Subject: Re: [PATCH 3/3] arm: dts: mt2701: Add display subsystem related nodes for MT2701



On 01/06/17 08:08, Erin Lo wrote:
> From: YT Shen <[email protected]>
>
> This patch adds the device nodes for the DISP function blocks for MT2701
>
> Signed-off-by: YT Shen <[email protected]>
> Signed-off-by: Erin Lo <[email protected]>
> ---
> arch/arm/boot/dts/mt2701.dtsi | 84 +++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 84 insertions(+)
>
> diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
> index 4f110d5..e20b65c 100644
> --- a/arch/arm/boot/dts/mt2701.dtsi
> +++ b/arch/arm/boot/dts/mt2701.dtsi
> @@ -17,6 +17,7 @@
> #include <dt-bindings/interrupt-controller/irq.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/reset/mt2701-resets.h>
> +#include <dt-bindings/memory/mt2701-larb-port.h>
> #include "skeleton64.dtsi"
> #include "mt2701-pinfunc.h"
>
> @@ -24,6 +25,11 @@
> compatible = "mediatek,mt2701";
> interrupt-parent = <&sysirq>;
>
> + aliases {
> + rdma0 = &rdma0;
> + rdma1 = &rdma1;
> + };
> +

I know we have this alias in mt8173.dtsi, but I don't understand what
they are for. Do you know?

Regards,
Matthias

2017-06-09 08:22:07

by Matthias Brugger

[permalink] [raw]
Subject: Re: [PATCH 1/3] arm: dts: mt2701: Add ethernet device node



On 01/06/17 08:08, Erin Lo wrote:
> From: Sean Wang <[email protected]>
>
> Add ethernet device node for MT2701
>
> Signed-off-by: Sean Wang <[email protected]>
> Signed-off-by: Erin Lo <[email protected]>
> ---
> arch/arm/boot/dts/mt2701.dtsi | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
> diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
> index 8037210..de88bd7 100644
> --- a/arch/arm/boot/dts/mt2701.dtsi
> +++ b/arch/arm/boot/dts/mt2701.dtsi
> @@ -420,6 +420,26 @@
> #clock-cells = <1>;
> };
>
> + eth: ethernet@1b100000 {
> + compatible = "mediatek,mt2701-eth", "syscon";
> + reg = <0 0x1b100000 0 0x20000>;
> + interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 199 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 198 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&topckgen CLK_TOP_ETHIF_SEL>,
> + <&ethsys CLK_ETHSYS_ESW>,
> + <&ethsys CLK_ETHSYS_GP1>,
> + <&ethsys CLK_ETHSYS_GP2>,
> + <&apmixedsys CLK_APMIXED_TRGPLL>;
> + clock-names = "ethif", "esw", "gp1", "gp2", "trgpll";
> + power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
> + mediatek,ethsys = <&ethsys>;
> + mediatek,pctl = <&syscfg_pctl_a>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +

I'm missing the reset properties.

Regards,
Matthias

2017-06-09 08:22:55

by Philipp Zabel

[permalink] [raw]
Subject: Re: [PATCH 3/3] arm: dts: mt2701: Add display subsystem related nodes for MT2701

Hi Matthias,

On Fri, 2017-06-09 at 10:14 +0200, Matthias Brugger wrote:
>
> On 01/06/17 08:08, Erin Lo wrote:
> > From: YT Shen <[email protected]>
> >
> > This patch adds the device nodes for the DISP function blocks for MT2701
> >
> > Signed-off-by: YT Shen <[email protected]>
> > Signed-off-by: Erin Lo <[email protected]>
> > ---
> > arch/arm/boot/dts/mt2701.dtsi | 84 +++++++++++++++++++++++++++++++++++++++++++
> > 1 file changed, 84 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
> > index 4f110d5..e20b65c 100644
> > --- a/arch/arm/boot/dts/mt2701.dtsi
> > +++ b/arch/arm/boot/dts/mt2701.dtsi
> > @@ -17,6 +17,7 @@
> > #include <dt-bindings/interrupt-controller/irq.h>
> > #include <dt-bindings/interrupt-controller/arm-gic.h>
> > #include <dt-bindings/reset/mt2701-resets.h>
> > +#include <dt-bindings/memory/mt2701-larb-port.h>
> > #include "skeleton64.dtsi"
> > #include "mt2701-pinfunc.h"
> >
> > @@ -24,6 +25,11 @@
> > compatible = "mediatek,mt2701";
> > interrupt-parent = <&sysirq>;
> >
> > + aliases {
> > + rdma0 = &rdma0;
> > + rdma1 = &rdma1;
> > + };
> > +
>
> I know we have this alias in mt8173.dtsi, but I don't understand what
> they are for. Do you know?

The mtk_disp_rdma platform driver uses mtk_ddp_comp_get_id() to identify
the specific RDMA instance, which calls of_alias_get_id(). The core code
needs to know which RDMA is which to correctly set up the display data
paths.

regards
Philipp

2017-06-09 10:59:31

by Matthias Brugger

[permalink] [raw]
Subject: Re: [PATCH 3/3] arm: dts: mt2701: Add display subsystem related nodes for MT2701



On 09/06/17 10:22, Philipp Zabel wrote:
> Hi Matthias,
>
> On Fri, 2017-06-09 at 10:14 +0200, Matthias Brugger wrote:
>>
>> On 01/06/17 08:08, Erin Lo wrote:
>>> From: YT Shen <[email protected]>
>>>
>>> This patch adds the device nodes for the DISP function blocks for MT2701
>>>
>>> Signed-off-by: YT Shen <[email protected]>
>>> Signed-off-by: Erin Lo <[email protected]>
>>> ---
>>> arch/arm/boot/dts/mt2701.dtsi | 84 +++++++++++++++++++++++++++++++++++++++++++
>>> 1 file changed, 84 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
>>> index 4f110d5..e20b65c 100644
>>> --- a/arch/arm/boot/dts/mt2701.dtsi
>>> +++ b/arch/arm/boot/dts/mt2701.dtsi
>>> @@ -17,6 +17,7 @@
>>> #include <dt-bindings/interrupt-controller/irq.h>
>>> #include <dt-bindings/interrupt-controller/arm-gic.h>
>>> #include <dt-bindings/reset/mt2701-resets.h>
>>> +#include <dt-bindings/memory/mt2701-larb-port.h>
>>> #include "skeleton64.dtsi"
>>> #include "mt2701-pinfunc.h"
>>>
>>> @@ -24,6 +25,11 @@
>>> compatible = "mediatek,mt2701";
>>> interrupt-parent = <&sysirq>;
>>>
>>> + aliases {
>>> + rdma0 = &rdma0;
>>> + rdma1 = &rdma1;
>>> + };
>>> +
>>
>> I know we have this alias in mt8173.dtsi, but I don't understand what
>> they are for. Do you know?
>
> The mtk_disp_rdma platform driver uses mtk_ddp_comp_get_id() to identify
> the specific RDMA instance, which calls of_alias_get_id(). The core code
> needs to know which RDMA is which to correctly set up the display data
> paths.
>

Ok, thanks for the clarification!

Matthias

2017-06-12 09:13:51

by Matthias Brugger

[permalink] [raw]
Subject: Re: [PATCH 3/3] arm: dts: mt2701: Add display subsystem related nodes for MT2701



On 01/06/17 08:08, Erin Lo wrote:
> From: YT Shen <[email protected]>
>
> This patch adds the device nodes for the DISP function blocks for MT2701
>
> Signed-off-by: YT Shen <[email protected]>
> Signed-off-by: Erin Lo <[email protected]>
> ---
> arch/arm/boot/dts/mt2701.dtsi | 84 +++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 84 insertions(+)
>
> diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
> index 4f110d5..e20b65c 100644
> --- a/arch/arm/boot/dts/mt2701.dtsi
> +++ b/arch/arm/boot/dts/mt2701.dtsi
> @@ -17,6 +17,7 @@
> #include <dt-bindings/interrupt-controller/irq.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/reset/mt2701-resets.h>
> +#include <dt-bindings/memory/mt2701-larb-port.h>
> #include "skeleton64.dtsi"
> #include "mt2701-pinfunc.h"
>
> @@ -24,6 +25,11 @@
> compatible = "mediatek,mt2701";
> interrupt-parent = <&sysirq>;
>
> + aliases {
> + rdma0 = &rdma0;
> + rdma1 = &rdma1;
> + };
> +
> cpus {
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -201,6 +207,16 @@
> power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
> };
>
> + mipi_tx0: mipi-dphy@10010000 {
> + compatible = "mediatek,mt2701-mipi-tx";
> + reg = <0 0x10010000 0 0x90>;
> + clocks = <&clk26m>;
> + clock-output-names = "mipi_tx0_pll";
> + #clock-cells = <0>;
> + #phy-cells = <0>;
> + status = "disabled";
> + };
> +
> sysirq: interrupt-controller@10200100 {
> compatible = "mediatek,mt2701-sysirq",
> "mediatek,mt6577-sysirq";
> @@ -366,6 +382,39 @@
> #clock-cells = <1>;
> };
>
> + display_components: dispsys@14000000 {
> + compatible = "mediatek,mt2701-mmsys";
> + reg = <0 0x14000000 0 0x1000>;
> + power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
> + };

Can you please rebase on a recent kernel version. mt2701-mmsys node is
already present.

Thanks,
Matthias

> +
> + ovl@14007000 {
> + compatible = "mediatek,mt2701-disp-ovl";
> + reg = <0 0x14007000 0 0x1000>;
> + interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&mmsys CLK_MM_DISP_OVL>;
> + iommus = <&iommu MT2701_M4U_PORT_DISP_OVL_0>;
> + mediatek,larb = <&larb0>;
> + };
> +
> + rdma0: rdma@14008000 {
> + compatible = "mediatek,mt2701-disp-rdma";
> + reg = <0 0x14008000 0 0x1000>;
> + interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&mmsys CLK_MM_DISP_RDMA>;
> + iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA>;
> + mediatek,larb = <&larb0>;
> + };
> +
> + wdma@14009000 {
> + compatible = "mediatek,mt2701-disp-wdma";
> + reg = <0 0x14009000 0 0x1000>;
> + interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&mmsys CLK_MM_DISP_WDMA>;
> + iommus = <&iommu MT2701_M4U_PORT_DISP_WDMA>;
> + mediatek,larb = <&larb0>;
> + };
> +
> bls: bls@1400a000 {
> compatible = "mediatek,mt2701-disp-pwm";
> reg = <0 0x1400a000 0 0x1000>;
> @@ -375,6 +424,32 @@
> status = "disabled";
> };
>
> + color@1400b000 {
> + compatible = "mediatek,mt2701-disp-color";
> + reg = <0 0x1400b000 0 0x1000>;
> + interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&mmsys CLK_MM_DISP_COLOR>;
> + };
> +
> + dsi: dsi@1400c000 {
> + compatible = "mediatek,mt2701-dsi";
> + reg = <0 0x1400c000 0 0x1000>;
> + interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&mmsys CLK_MM_DSI_ENGINE>, <&mmsys CLK_MM_DSI_DIG>,
> + <&mipi_tx0>;
> + clock-names = "engine", "digital", "hs";
> + phys = <&mipi_tx0>;
> + phy-names = "dphy";
> + status = "disabled";
> + };
> +
> + mutex: mutex@1400e000 {
> + compatible = "mediatek,mt2701-disp-mutex";
> + reg = <0 0x1400e000 0 0x1000>;
> + interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&mmsys CLK_MM_MUTEX_32K>;
> + };
> +
> larb0: larb@14010000 {
> compatible = "mediatek,mt2701-smi-larb";
> reg = <0 0x14010000 0 0x1000>;
> @@ -385,6 +460,15 @@
> power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
> };
>
> + rdma1: rdma@14012000 {
> + compatible = "mediatek,mt2701-disp-rdma";
> + reg = <0 0x14012000 0 0x1000>;
> + interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&mmsys CLK_MM_DISP_RDMA1>;
> + iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA1>;
> + mediatek,larb = <&larb0>;
> + };
> +
> imgsys: syscon@15000000 {
> compatible = "mediatek,mt2701-imgsys", "syscon";
> reg = <0 0x15000000 0 0x1000>;
>

2017-06-14 03:08:34

by Sean Wang

[permalink] [raw]
Subject: Re: [PATCH 1/3] arm: dts: mt2701: Add ethernet device node

On Fri, 2017-06-09 at 10:22 +0200, Matthias Brugger wrote:
>
> On 01/06/17 08:08, Erin Lo wrote:
> > From: Sean Wang <[email protected]>
> >
> > Add ethernet device node for MT2701
> >
> > Signed-off-by: Sean Wang <[email protected]>
> > Signed-off-by: Erin Lo <[email protected]>
> > ---
> > arch/arm/boot/dts/mt2701.dtsi | 20 ++++++++++++++++++++
> > 1 file changed, 20 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
> > index 8037210..de88bd7 100644
> > --- a/arch/arm/boot/dts/mt2701.dtsi
> > +++ b/arch/arm/boot/dts/mt2701.dtsi
> > @@ -420,6 +420,26 @@
> > #clock-cells = <1>;
> > };
> >
> > + eth: ethernet@1b100000 {
> > + compatible = "mediatek,mt2701-eth", "syscon";
> > + reg = <0 0x1b100000 0 0x20000>;
> > + interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_LOW>,
> > + <GIC_SPI 199 IRQ_TYPE_LEVEL_LOW>,
> > + <GIC_SPI 198 IRQ_TYPE_LEVEL_LOW>;
> > + clocks = <&topckgen CLK_TOP_ETHIF_SEL>,
> > + <&ethsys CLK_ETHSYS_ESW>,
> > + <&ethsys CLK_ETHSYS_GP1>,
> > + <&ethsys CLK_ETHSYS_GP2>,
> > + <&apmixedsys CLK_APMIXED_TRGPLL>;
> > + clock-names = "ethif", "esw", "gp1", "gp2", "trgpll";
> > + power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
> > + mediatek,ethsys = <&ethsys>;
> > + mediatek,pctl = <&syscfg_pctl_a>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + status = "disabled";
> > + };
> > +
>
> I'm missing the reset properties.


Hi Matthias,

Appreciate your careful reviewing,

I'll add it for the missing which causes binding violation.


Sean

>
> Regards,
> Matthias


2017-06-15 05:34:53

by Weiqing Kong

[permalink] [raw]
Subject: Re: [PATCH 2/3] arm: dts: mt2701: Add display bls related nodes for MT2701

On Fri, 2017-06-09 at 10:12 +0200, Matthias Brugger wrote:
>
> On 01/06/17 08:08, Erin Lo wrote:
> > From: YT Shen <[email protected]>
>
> I miss the Singed-off-by from YT Shen.
>
> >
> > This patch adds the device node of display backlight for MT2701
> >
> > Signed-off-by: Weiqing Kong <[email protected]>
> > Signed-off-by: Erin Lo <[email protected]>
> > ---
> > arch/arm/boot/dts/mt2701-evb.dts | 29 +++++++++++++++++++++++++++++
> > arch/arm/boot/dts/mt2701.dtsi | 9 +++++++++
> > 2 files changed, 38 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/mt2701-evb.dts b/arch/arm/boot/dts/mt2701-evb.dts
> > index a483798..e49c2b7 100644
> > --- a/arch/arm/boot/dts/mt2701-evb.dts
> > +++ b/arch/arm/boot/dts/mt2701-evb.dts
> > @@ -22,6 +22,35 @@
> > memory {
> > reg = <0 0x80000000 0 0x40000000>;
> > };
> > +
> > + backlight_lcd: backlight_lcd {
> > + compatible = "pwm-backlight";
> > + pwms = <&bls 0 100000>;
> > + brightness-levels = <
> > + 0 16 32 48 64 80 96 112
> > + 128 144 160 176 192 208 224 240
> > + 255
> > + >;
> > + default-brightness-level = <9>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pwm_bls_gpio>;
> > + };
> > +};
> > +
> > +&bls {
> > + status = "okay";
> > +};
> > +
> > +&mmsys {
> > + status = "okay";
> > +};
> > +
> > +&pio {
> > + pwm_bls_gpio: pwm_bls_gpio {
> > + pins_cmd_dat {
> > + pinmux = <MT2701_PIN_208_AUD_EXT_CK1__FUNC_DISP_PWM>;
> > + };
> > + };
> > };
> >
> > &auxadc {
> > diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
> > index de88bd7..4f110d5 100644
> > --- a/arch/arm/boot/dts/mt2701.dtsi
> > +++ b/arch/arm/boot/dts/mt2701.dtsi
> > @@ -366,6 +366,15 @@
> > #clock-cells = <1>;
> > };
> >
> > + bls: bls@1400a000 {
> > + compatible = "mediatek,mt2701-disp-pwm";
> > + reg = <0 0x1400a000 0 0x1000>;
> > + #pwm-cells = <2>;
> > + clocks = <&mmsys CLK_MM_MDP_BLS_26M>, <&mmsys CLK_MM_DISP_BLS>;
> > + clock-names = "main", "mm";
> > + status = "disabled";
> > + };
> > +
>
> Can you make this a new patch please. It's preferred to have one patch
> for the dtsi and another one for the actual board.
>
> Thanks,
> Matthias

OK, I will split it into two patches.

Thanks,
Weiqing Kong

>
> > larb0: larb@14010000 {
> > compatible = "mediatek,mt2701-smi-larb";
> > reg = <0 0x14010000 0 0x1000>;
> >


2017-06-16 13:54:37

by YT Shen

[permalink] [raw]
Subject: Re: [PATCH 3/3] arm: dts: mt2701: Add display subsystem related nodes for MT2701

On Mon, 2017-06-12 at 11:13 +0200, Matthias Brugger wrote:
>
> On 01/06/17 08:08, Erin Lo wrote:
> > From: YT Shen <[email protected]>
> >
> > This patch adds the device nodes for the DISP function blocks for MT2701
> >
> > Signed-off-by: YT Shen <[email protected]>
> > Signed-off-by: Erin Lo <[email protected]>
> > ---
> > arch/arm/boot/dts/mt2701.dtsi | 84 +++++++++++++++++++++++++++++++++++++++++++
> > 1 file changed, 84 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
> > index 4f110d5..e20b65c 100644
> > --- a/arch/arm/boot/dts/mt2701.dtsi
> > +++ b/arch/arm/boot/dts/mt2701.dtsi
> > @@ -17,6 +17,7 @@
> > #include <dt-bindings/interrupt-controller/irq.h>
> > #include <dt-bindings/interrupt-controller/arm-gic.h>
> > #include <dt-bindings/reset/mt2701-resets.h>
> > +#include <dt-bindings/memory/mt2701-larb-port.h>
> > #include "skeleton64.dtsi"
> > #include "mt2701-pinfunc.h"
> >
> > @@ -24,6 +25,11 @@
> > compatible = "mediatek,mt2701";
> > interrupt-parent = <&sysirq>;
> >
> > + aliases {
> > + rdma0 = &rdma0;
> > + rdma1 = &rdma1;
> > + };
> > +
> > cpus {
> > #address-cells = <1>;
> > #size-cells = <0>;
> > @@ -201,6 +207,16 @@
> > power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
> > };
> >
> > + mipi_tx0: mipi-dphy@10010000 {
> > + compatible = "mediatek,mt2701-mipi-tx";
> > + reg = <0 0x10010000 0 0x90>;
> > + clocks = <&clk26m>;
> > + clock-output-names = "mipi_tx0_pll";
> > + #clock-cells = <0>;
> > + #phy-cells = <0>;
> > + status = "disabled";
> > + };
> > +
> > sysirq: interrupt-controller@10200100 {
> > compatible = "mediatek,mt2701-sysirq",
> > "mediatek,mt6577-sysirq";
> > @@ -366,6 +382,39 @@
> > #clock-cells = <1>;
> > };
> >
> > + display_components: dispsys@14000000 {
> > + compatible = "mediatek,mt2701-mmsys";
> > + reg = <0 0x14000000 0 0x1000>;
> > + power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
> > + };
>
> Can you please rebase on a recent kernel version. mt2701-mmsys node is
> already present.
>
> Thanks,
> Matthias
OK, we will rebase the mt2701 device tree in the next version.
Thanks.

yt.shen

>
> > +
> > + ovl@14007000 {
> > + compatible = "mediatek,mt2701-disp-ovl";
> > + reg = <0 0x14007000 0 0x1000>;
> > + interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_LOW>;
> > + clocks = <&mmsys CLK_MM_DISP_OVL>;
> > + iommus = <&iommu MT2701_M4U_PORT_DISP_OVL_0>;
> > + mediatek,larb = <&larb0>;
> > + };
> > +
> > + rdma0: rdma@14008000 {
> > + compatible = "mediatek,mt2701-disp-rdma";
> > + reg = <0 0x14008000 0 0x1000>;
> > + interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_LOW>;
> > + clocks = <&mmsys CLK_MM_DISP_RDMA>;
> > + iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA>;
> > + mediatek,larb = <&larb0>;
> > + };
> > +
> > + wdma@14009000 {
> > + compatible = "mediatek,mt2701-disp-wdma";
> > + reg = <0 0x14009000 0 0x1000>;
> > + interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_LOW>;
> > + clocks = <&mmsys CLK_MM_DISP_WDMA>;
> > + iommus = <&iommu MT2701_M4U_PORT_DISP_WDMA>;
> > + mediatek,larb = <&larb0>;
> > + };
> > +
> > bls: bls@1400a000 {
> > compatible = "mediatek,mt2701-disp-pwm";
> > reg = <0 0x1400a000 0 0x1000>;
> > @@ -375,6 +424,32 @@
> > status = "disabled";
> > };
> >
> > + color@1400b000 {
> > + compatible = "mediatek,mt2701-disp-color";
> > + reg = <0 0x1400b000 0 0x1000>;
> > + interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_LOW>;
> > + clocks = <&mmsys CLK_MM_DISP_COLOR>;
> > + };
> > +
> > + dsi: dsi@1400c000 {
> > + compatible = "mediatek,mt2701-dsi";
> > + reg = <0 0x1400c000 0 0x1000>;
> > + interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_LOW>;
> > + clocks = <&mmsys CLK_MM_DSI_ENGINE>, <&mmsys CLK_MM_DSI_DIG>,
> > + <&mipi_tx0>;
> > + clock-names = "engine", "digital", "hs";
> > + phys = <&mipi_tx0>;
> > + phy-names = "dphy";
> > + status = "disabled";
> > + };
> > +
> > + mutex: mutex@1400e000 {
> > + compatible = "mediatek,mt2701-disp-mutex";
> > + reg = <0 0x1400e000 0 0x1000>;
> > + interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_LOW>;
> > + clocks = <&mmsys CLK_MM_MUTEX_32K>;
> > + };
> > +
> > larb0: larb@14010000 {
> > compatible = "mediatek,mt2701-smi-larb";
> > reg = <0 0x14010000 0 0x1000>;
> > @@ -385,6 +460,15 @@
> > power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
> > };
> >
> > + rdma1: rdma@14012000 {
> > + compatible = "mediatek,mt2701-disp-rdma";
> > + reg = <0 0x14012000 0 0x1000>;
> > + interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_LOW>;
> > + clocks = <&mmsys CLK_MM_DISP_RDMA1>;
> > + iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA1>;
> > + mediatek,larb = <&larb0>;
> > + };
> > +
> > imgsys: syscon@15000000 {
> > compatible = "mediatek,mt2701-imgsys", "syscon";
> > reg = <0 0x15000000 0 0x1000>;
> >