Add epwm and ecap nodes for AM64 boards.
Changes since v1:
- Mark all un-used pwm nodes as disabled.
Lokesh Vutla (4):
arm64: dts: ti: k3-am64-main: Add epwm nodes
arm64: dts: ti: k3-am64-main: Add ecap pwm nodes
arm64: dts: ti: k3-am642-evm: Add pwm nodes
arm64: dts: ti: k3-am642-sk: Add pwm nodes
arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 114 +++++++++++++++++++++++
arch/arm64/boot/dts/ti/k3-am642-evm.dts | 56 +++++++++++
arch/arm64/boot/dts/ti/k3-am642-sk.dts | 64 +++++++++++++
3 files changed, 234 insertions(+)
--
2.31.1
Add DT nodes for all epwm instances present in AM64 SoC.
Signed-off-by: Lokesh Vutla <[email protected]>
---
arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 87 ++++++++++++++++++++++++
1 file changed, 87 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index 02c3fdf9cc46..9e762f64b631 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -217,6 +217,12 @@ phy_gmii_sel: phy@4044 {
reg = <0x4044 0x8>;
#phy-cells = <1>;
};
+
+ epwm_tbclk: clock@4140 {
+ compatible = "ti,am64-epwm-tbclk", "syscon";
+ reg = <0x4130 0x4>;
+ #clock-cells = <1>;
+ };
};
main_uart0: serial@2800000 {
@@ -859,4 +865,85 @@ pcie0_ep: pcie-ep@f102000 {
clock-names = "fck";
max-functions = /bits/ 8 <1>;
};
+
+ epwm0: pwm@23000000 {
+ compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x0 0x23000000 0x0 0x100>;
+ power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&epwm_tbclk 0>, <&k3_clks 86 0>;
+ clock-names = "tbclk", "fck";
+ };
+
+ epwm1: pwm@23010000 {
+ compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x0 0x23010000 0x0 0x100>;
+ power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&epwm_tbclk 1>, <&k3_clks 87 0>;
+ clock-names = "tbclk", "fck";
+ };
+
+ epwm2: pwm@23020000 {
+ compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x0 0x23020000 0x0 0x100>;
+ power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&epwm_tbclk 2>, <&k3_clks 88 0>;
+ clock-names = "tbclk", "fck";
+ };
+
+ epwm3: pwm@23030000 {
+ compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x0 0x23030000 0x0 0x100>;
+ power-domains = <&k3_pds 89 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&epwm_tbclk 3>, <&k3_clks 89 0>;
+ clock-names = "tbclk", "fck";
+ };
+
+ epwm4: pwm@23040000 {
+ compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x0 0x23040000 0x0 0x100>;
+ power-domains = <&k3_pds 90 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&epwm_tbclk 4>, <&k3_clks 90 0>;
+ clock-names = "tbclk", "fck";
+ };
+
+ epwm5: pwm@23050000 {
+ compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x0 0x23050000 0x0 0x100>;
+ power-domains = <&k3_pds 91 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&epwm_tbclk 5>, <&k3_clks 91 0>;
+ clock-names = "tbclk", "fck";
+ };
+
+ epwm6: pwm@23060000 {
+ compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x0 0x23060000 0x0 0x100>;
+ power-domains = <&k3_pds 92 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&epwm_tbclk 6>, <&k3_clks 92 0>;
+ clock-names = "tbclk", "fck";
+ };
+
+ epwm7: pwm@23070000 {
+ compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x0 0x23070000 0x0 0x100>;
+ power-domains = <&k3_pds 93 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&epwm_tbclk 7>, <&k3_clks 93 0>;
+ clock-names = "tbclk", "fck";
+ };
+
+ epwm8: pwm@23080000 {
+ compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x0 0x23080000 0x0 0x100>;
+ power-domains = <&k3_pds 94 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&epwm_tbclk 8>, <&k3_clks 94 0>;
+ clock-names = "tbclk", "fck";
+ };
};
--
2.31.1
There are 3 instances of ecap modules that are capable of generating
a pwm when configured in apwm mode. Add DT nodes for these 3 ecap
instances.
Signed-off-by: Lokesh Vutla <[email protected]>
---
arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 27 ++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index 9e762f64b631..42d1d219a3fd 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -946,4 +946,31 @@ epwm8: pwm@23080000 {
clocks = <&epwm_tbclk 8>, <&k3_clks 94 0>;
clock-names = "tbclk", "fck";
};
+
+ ecap0: pwm@23100000 {
+ compatible = "ti,am64-ecap", "ti,am3352-ecap";
+ #pwm-cells = <3>;
+ reg = <0x0 0x23100000 0x0 0x60>;
+ power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 51 0>;
+ clock-names = "fck";
+ };
+
+ ecap1: pwm@23110000 {
+ compatible = "ti,am64-ecap", "ti,am3352-ecap";
+ #pwm-cells = <3>;
+ reg = <0x0 0x23110000 0x0 0x60>;
+ power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 52 0>;
+ clock-names = "fck";
+ };
+
+ ecap2: pwm@23120000 {
+ compatible = "ti,am64-ecap", "ti,am3352-ecap";
+ #pwm-cells = <3>;
+ reg = <0x0 0x23120000 0x0 0x60>;
+ power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 53 0>;
+ clock-names = "fck";
+ };
};
--
2.31.1
ecap0 can be configured to use pad ECAP0_IN_APWM_OUT (D18) which has a
signal connected to Pin 1 of J12 on EVM. Add support for adding this
pinmux so that pwm can be observed on pin 1 of Header J12
Also mark all un-used epwm and ecap pwm nodes as disabled.
Signed-off-by: Lokesh Vutla <[email protected]>
---
arch/arm64/boot/dts/ti/k3-am642-evm.dts | 56 +++++++++++++++++++++++++
1 file changed, 56 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
index 030712221188..24ce4942618d 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
@@ -288,6 +288,12 @@ AM64X_IOPAD(0x0028, PIN_INPUT, 0) /* (M17) OSPI0_D7 */
AM64X_IOPAD(0x0008, PIN_INPUT, 0) /* (N19) OSPI0_DQS */
>;
};
+
+ main_ecap0_pins_default: main-ecap0-pins-default {
+ pinctrl-single,pins = <
+ AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */
+ >;
+ };
};
&main_uart0 {
@@ -574,3 +580,53 @@ &pcie0_ep {
num-lanes = <1>;
status = "disabled";
};
+
+&ecap0 {
+ /* PWM is available on Pin 1 of header J12 */
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_ecap0_pins_default>;
+};
+
+&ecap1 {
+ status = "disabled";
+};
+
+&ecap2 {
+ status = "disabled";
+};
+
+&epwm0 {
+ status = "disabled";
+};
+
+&epwm1 {
+ status = "disabled";
+};
+
+&epwm2 {
+ status = "disabled";
+};
+
+&epwm3 {
+ status = "disabled";
+};
+
+&epwm4 {
+ status = "disabled";
+};
+
+&epwm5 {
+ status = "disabled";
+};
+
+&epwm6 {
+ status = "disabled";
+};
+
+&epwm7 {
+ status = "disabled";
+};
+
+&epwm8 {
+ status = "disabled";
+};
--
2.31.1
ecap0 can be configured to use pad ECAP0_IN_APWM_OUT (D18) which has a
signal connected to Pin 1 of J3. Add support for adding this pinmux so
that pwm can be observed on pin 1 of Header J3
Also mark all un-used epwm and ecap pwm nodes as disabled.
Signed-off-by: Lokesh Vutla <[email protected]>
---
arch/arm64/boot/dts/ti/k3-am642-sk.dts | 64 ++++++++++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index d3aa2901e6fd..6b45cdeeeefa 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -210,6 +210,12 @@ AM64X_IOPAD(0x0028, PIN_INPUT, 0) /* (M17) OSPI0_D7 */
AM64X_IOPAD(0x0008, PIN_INPUT, 0) /* (N19) OSPI0_DQS */
>;
};
+
+ main_ecap0_pins_default: main-ecap0-pins-default {
+ pinctrl-single,pins = <
+ AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */
+ >;
+ };
};
&mcu_uart0 {
@@ -453,3 +459,61 @@ &pcie0_rc {
&pcie0_ep {
status = "disabled";
};
+
+&ecap0 {
+ /* PWM is available on Pin 1 of header J3 */
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_ecap0_pins_default>;
+};
+
+&ecap1 {
+ status = "disabled";
+};
+
+&ecap2 {
+ status = "disabled";
+};
+
+&epwm0 {
+ status = "disabled";
+};
+
+&epwm1 {
+ status = "disabled";
+};
+
+&epwm2 {
+ status = "disabled";
+};
+
+&epwm3 {
+ status = "disabled";
+};
+
+&epwm4 {
+ /*
+ * EPWM4_A, EPWM4_B is available on Pin 32 and 33 on J4 (RPi hat)
+ * But RPi Hat will be used for other use cases, so marking epwm4 as disabled.
+ */
+ status = "disabled";
+};
+
+&epwm5 {
+ /*
+ * EPWM5_A, EPWM5_B is available on Pin 29 and 31 on J4 (RPi hat)
+ * But RPi Hat will be used for other use cases, so marking epwm5 as disabled.
+ */
+ status = "disabled";
+};
+
+&epwm6 {
+ status = "disabled";
+};
+
+&epwm7 {
+ status = "disabled";
+};
+
+&epwm8 {
+ status = "disabled";
+};
--
2.31.1
On 21/07/2021 14:36, Lokesh Vutla wrote:
> Add DT nodes for all epwm instances present in AM64 SoC.
>
> Signed-off-by: Lokesh Vutla <[email protected]>
> ---
> arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 87 ++++++++++++++++++++++++
> 1 file changed, 87 insertions(+)
>
Reviewed-by: Grygorii Strashko <[email protected]>
--
Best regards,
grygorii
On 21/07/2021 14:36, Lokesh Vutla wrote:
> ecap0 can be configured to use pad ECAP0_IN_APWM_OUT (D18) which has a
> signal connected to Pin 1 of J3. Add support for adding this pinmux so
> that pwm can be observed on pin 1 of Header J3
>
> Also mark all un-used epwm and ecap pwm nodes as disabled.
>
> Signed-off-by: Lokesh Vutla <[email protected]>
> ---
> arch/arm64/boot/dts/ti/k3-am642-sk.dts | 64 ++++++++++++++++++++++++++
> 1 file changed, 64 insertions(+)
>
Reviewed-by: Grygorii Strashko <[email protected]>
--
Best regards,
grygorii
On 21/07/2021 14:36, Lokesh Vutla wrote:
> There are 3 instances of ecap modules that are capable of generating
> a pwm when configured in apwm mode. Add DT nodes for these 3 ecap
> instances.
>
> Signed-off-by: Lokesh Vutla <[email protected]>
> ---
> arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 27 ++++++++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> index 9e762f64b631..42d1d219a3fd 100644
> --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> @@ -946,4 +946,31 @@ epwm8: pwm@23080000 {
> clocks = <&epwm_tbclk 8>, <&k3_clks 94 0>;
> clock-names = "tbclk", "fck";
> };
> +
> + ecap0: pwm@23100000 {
> + compatible = "ti,am64-ecap", "ti,am3352-ecap";
> + #pwm-cells = <3>;
> + reg = <0x0 0x23100000 0x0 0x60>;
> + power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 51 0>;
> + clock-names = "fck";
> + };
> +
> + ecap1: pwm@23110000 {
> + compatible = "ti,am64-ecap", "ti,am3352-ecap";
> + #pwm-cells = <3>;
> + reg = <0x0 0x23110000 0x0 0x60>;
> + power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 52 0>;
> + clock-names = "fck";
> + };
> +
> + ecap2: pwm@23120000 {
> + compatible = "ti,am64-ecap", "ti,am3352-ecap";
> + #pwm-cells = <3>;
> + reg = <0x0 0x23120000 0x0 0x60>;
> + power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 53 0>;
> + clock-names = "fck";
> + };
> };
>
Reviewed-by: Grygorii Strashko <[email protected]>
--
Best regards,
grygorii
On 21/07/2021 14:36, Lokesh Vutla wrote:
> ecap0 can be configured to use pad ECAP0_IN_APWM_OUT (D18) which has a
> signal connected to Pin 1 of J12 on EVM. Add support for adding this
> pinmux so that pwm can be observed on pin 1 of Header J12
>
> Also mark all un-used epwm and ecap pwm nodes as disabled.
>
> Signed-off-by: Lokesh Vutla <[email protected]>
> ---
> arch/arm64/boot/dts/ti/k3-am642-evm.dts | 56 +++++++++++++++++++++++++
> 1 file changed, 56 insertions(+)
>
Reviewed-by: Grygorii Strashko <[email protected]>
--
Best regards,
grygorii
On Wed, 21 Jul 2021 17:06:21 +0530, Lokesh Vutla wrote:
> Add epwm and ecap nodes for AM64 boards.
>
> Changes since v1:
> - Mark all un-used pwm nodes as disabled.
>
> Lokesh Vutla (4):
> arm64: dts: ti: k3-am64-main: Add epwm nodes
> arm64: dts: ti: k3-am64-main: Add ecap pwm nodes
> arm64: dts: ti: k3-am642-evm: Add pwm nodes
> arm64: dts: ti: k3-am642-sk: Add pwm nodes
>
> [...]
Hi Lokesh Vutla,
I have applied the following to branch ti-k3-dts-next on [1].
Thank you!
[1/4] arm64: dts: ti: k3-am64-main: Add epwm nodes
commit: 13a9a3ef66248a1b6e9acaaa5292d96f8635935b
[2/4] arm64: dts: ti: k3-am64-main: Add ecap pwm nodes
commit: ae0df139b51a8448afb38e9706f257ab56fea097
[3/4] arm64: dts: ti: k3-am642-evm: Add pwm nodes
commit: 8032affdf5a156a467d3b109f32cd9f57ea7afda
[4/4] arm64: dts: ti: k3-am642-sk: Add pwm nodes
commit: c1fa5ac6c2f475b5140e6323801ed93c24e7e5cf
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
[1] git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux.git
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D)/Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D