Add the PWM DT node in SiFive FU540 soc-specific DT file.
Enable the PWM nodes in HiFive Unleashed board-specific DT file.
Signed-off-by: Yash Shah <[email protected]>
---
arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 19 +++++++++++++++++++
arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 8 ++++++++
2 files changed, 27 insertions(+)
diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
index 42b5ec2..bb422db 100644
--- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
+++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
@@ -230,6 +230,25 @@
#size-cells = <0>;
status = "disabled";
};
+ pwm0: pwm@10020000 {
+ compatible = "sifive,pwm0";
+ reg = <0x0 0x10020000 0x0 0x1000>;
+ interrupt-parent = <&plic0>;
+ interrupts = <42 43 44 45>;
+ clocks = <&prci PRCI_CLK_TLCLK>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+ pwm1: pwm@10021000 {
+ compatible = "sifive,pwm0";
+ reg = <0x0 0x10021000 0x0 0x1000>;
+ interrupt-parent = <&plic0>;
+ interrupts = <46 47 48 49>;
+ reg-names = "control";
+ clocks = <&prci PRCI_CLK_TLCLK>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
};
};
diff --git a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
index 93d68cb..104d334 100644
--- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
+++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
@@ -85,3 +85,11 @@
reg = <0>;
};
};
+
+&pwm0 {
+ status = "okay";
+};
+
+&pwm1 {
+ status = "okay";
+};
--
1.9.1
Hi,
Any comments on this patch?
- Yash
On Wed, Aug 21, 2019 at 2:53 PM Yash Shah <[email protected]> wrote:
>
> Add the PWM DT node in SiFive FU540 soc-specific DT file.
> Enable the PWM nodes in HiFive Unleashed board-specific DT file.
>
> Signed-off-by: Yash Shah <[email protected]>
> ---
> arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 19 +++++++++++++++++++
> arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 8 ++++++++
> 2 files changed, 27 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
> index 42b5ec2..bb422db 100644
> --- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
> +++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
> @@ -230,6 +230,25 @@
> #size-cells = <0>;
> status = "disabled";
> };
> + pwm0: pwm@10020000 {
> + compatible = "sifive,pwm0";
> + reg = <0x0 0x10020000 0x0 0x1000>;
> + interrupt-parent = <&plic0>;
> + interrupts = <42 43 44 45>;
> + clocks = <&prci PRCI_CLK_TLCLK>;
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> + pwm1: pwm@10021000 {
> + compatible = "sifive,pwm0";
> + reg = <0x0 0x10021000 0x0 0x1000>;
> + interrupt-parent = <&plic0>;
> + interrupts = <46 47 48 49>;
> + reg-names = "control";
> + clocks = <&prci PRCI_CLK_TLCLK>;
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
>
> };
> };
> diff --git a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
> index 93d68cb..104d334 100644
> --- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
> +++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
> @@ -85,3 +85,11 @@
> reg = <0>;
> };
> };
> +
> +&pwm0 {
> + status = "okay";
> +};
> +
> +&pwm1 {
> + status = "okay";
> +};
> --
> 1.9.1
>
On Tue, 10 Sep 2019 02:52:07 PDT (-0700), [email protected] wrote:
> Hi,
>
> Any comments on this patch?
I don't see "sifive,pwm0" in the DT bindings documentation, and it doesn't
match our standard way of doing these things (which would have at least
"sifive,fu540-c000-pwm").
>
> - Yash
>
> On Wed, Aug 21, 2019 at 2:53 PM Yash Shah <[email protected]> wrote:
>>
>> Add the PWM DT node in SiFive FU540 soc-specific DT file.
>> Enable the PWM nodes in HiFive Unleashed board-specific DT file.
>>
>> Signed-off-by: Yash Shah <[email protected]>
>> ---
>> arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 19 +++++++++++++++++++
>> arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 8 ++++++++
>> 2 files changed, 27 insertions(+)
>>
>> diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
>> index 42b5ec2..bb422db 100644
>> --- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
>> +++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
>> @@ -230,6 +230,25 @@
>> #size-cells = <0>;
>> status = "disabled";
>> };
>> + pwm0: pwm@10020000 {
>> + compatible = "sifive,pwm0";
>> + reg = <0x0 0x10020000 0x0 0x1000>;
>> + interrupt-parent = <&plic0>;
>> + interrupts = <42 43 44 45>;
>> + clocks = <&prci PRCI_CLK_TLCLK>;
>> + #pwm-cells = <3>;
>> + status = "disabled";
>> + };
>> + pwm1: pwm@10021000 {
>> + compatible = "sifive,pwm0";
>> + reg = <0x0 0x10021000 0x0 0x1000>;
>> + interrupt-parent = <&plic0>;
>> + interrupts = <46 47 48 49>;
>> + reg-names = "control";
>> + clocks = <&prci PRCI_CLK_TLCLK>;
>> + #pwm-cells = <3>;
>> + status = "disabled";
>> + };
>>
>> };
>> };
>> diff --git a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
>> index 93d68cb..104d334 100644
>> --- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
>> +++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
>> @@ -85,3 +85,11 @@
>> reg = <0>;
>> };
>> };
>> +
>> +&pwm0 {
>> + status = "okay";
>> +};
>> +
>> +&pwm1 {
>> + status = "okay";
>> +};
>> --
>> 1.9.1
>>
On Sat, Sep 14, 2019 at 2:50 AM Palmer Dabbelt <[email protected]> wrote:
>
> On Tue, 10 Sep 2019 02:52:07 PDT (-0700), [email protected] wrote:
> > Hi,
> >
> > Any comments on this patch?
>
> I don't see "sifive,pwm0" in the DT bindings documentation, and it doesn't
> match our standard way of doing these things (which would have at least
> "sifive,fu540-c000-pwm").
"sifive,pwm0" is present in the DT bindings documentation at
Documentation/devicetree/bindings/pwm/pwm-sifive.txt
Yes, I agree that this patch is missing "sifive,fu540-c000-pwm". I
will add it along with "sifive,pwm0" and repost as version 2.
Thanks for your comment.
- Yash
>
> >
> > - Yash
> >
> > On Wed, Aug 21, 2019 at 2:53 PM Yash Shah <[email protected]> wrote:
> >>
> >> Add the PWM DT node in SiFive FU540 soc-specific DT file.
> >> Enable the PWM nodes in HiFive Unleashed board-specific DT file.
> >>
> >> Signed-off-by: Yash Shah <[email protected]>
> >> ---
> >> arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 19 +++++++++++++++++++
> >> arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 8 ++++++++
> >> 2 files changed, 27 insertions(+)
> >>
> >> diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
> >> index 42b5ec2..bb422db 100644
> >> --- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
> >> +++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
> >> @@ -230,6 +230,25 @@
> >> #size-cells = <0>;
> >> status = "disabled";
> >> };
> >> + pwm0: pwm@10020000 {
> >> + compatible = "sifive,pwm0";
> >> + reg = <0x0 0x10020000 0x0 0x1000>;
> >> + interrupt-parent = <&plic0>;
> >> + interrupts = <42 43 44 45>;
> >> + clocks = <&prci PRCI_CLK_TLCLK>;
> >> + #pwm-cells = <3>;
> >> + status = "disabled";
> >> + };
> >> + pwm1: pwm@10021000 {
> >> + compatible = "sifive,pwm0";
> >> + reg = <0x0 0x10021000 0x0 0x1000>;
> >> + interrupt-parent = <&plic0>;
> >> + interrupts = <46 47 48 49>;
> >> + reg-names = "control";
> >> + clocks = <&prci PRCI_CLK_TLCLK>;
> >> + #pwm-cells = <3>;
> >> + status = "disabled";
> >> + };
> >>
> >> };
> >> };
> >> diff --git a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
> >> index 93d68cb..104d334 100644
> >> --- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
> >> +++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
> >> @@ -85,3 +85,11 @@
> >> reg = <0>;
> >> };
> >> };
> >> +
> >> +&pwm0 {
> >> + status = "okay";
> >> +};
> >> +
> >> +&pwm1 {
> >> + status = "okay";
> >> +};
> >> --
> >> 1.9.1
> >>
On Mon, 16 Sep 2019, Yash Shah wrote:
> On Sat, Sep 14, 2019 at 2:50 AM Palmer Dabbelt <[email protected]> wrote:
> >
> > On Tue, 10 Sep 2019 02:52:07 PDT (-0700), [email protected] wrote:
> > > Hi,
> > >
> > > Any comments on this patch?
> >
> > I don't see "sifive,pwm0" in the DT bindings documentation, and it doesn't
> > match our standard way of doing these things (which would have at least
> > "sifive,fu540-c000-pwm").
>
> "sifive,pwm0" is present in the DT bindings documentation at
> Documentation/devicetree/bindings/pwm/pwm-sifive.txt
> Yes, I agree that this patch is missing "sifive,fu540-c000-pwm". I
> will add it along with "sifive,pwm0" and repost as version 2.
Fixed the compat string here and also dropped the superfluous reg-names
property from pwm1. Queued for v5.4-rc, thanks.
- Paul
From: Yash Shah <[email protected]>
Date: Wed, 21 Aug 2019 14:53:40 +0530
Subject: [PATCH] riscv: dts: Add DT support for SiFive FU540 PWM driver
Add the PWM DT node in SiFive FU540 soc-specific DT file.
Enable the PWM nodes in HiFive Unleashed board-specific DT file.
Signed-off-by: Yash Shah <[email protected]>
Cc: Palmer Dabbelt <[email protected]>
[[email protected]: added chip-specific compatible string;
dropped reg-names string from pwm1]
Signed-off-by: Paul Walmsley <[email protected]>
---
arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 18 ++++++++++++++++++
.../boot/dts/sifive/hifive-unleashed-a00.dts | 8 ++++++++
2 files changed, 26 insertions(+)
diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
index 42b5ec223100..5a29211d396e 100644
--- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
+++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
@@ -230,6 +230,24 @@
#size-cells = <0>;
status = "disabled";
};
+ pwm0: pwm@10020000 {
+ compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
+ reg = <0x0 0x10020000 0x0 0x1000>;
+ interrupt-parent = <&plic0>;
+ interrupts = <42 43 44 45>;
+ clocks = <&prci PRCI_CLK_TLCLK>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+ pwm1: pwm@10021000 {
+ compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
+ reg = <0x0 0x10021000 0x0 0x1000>;
+ interrupt-parent = <&plic0>;
+ interrupts = <46 47 48 49>;
+ clocks = <&prci PRCI_CLK_TLCLK>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
};
};
diff --git a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
index 93d68cbd64fe..104d334511cd 100644
--- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
+++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
@@ -85,3 +85,11 @@
reg = <0>;
};
};
+
+&pwm0 {
+ status = "okay";
+};
+
+&pwm1 {
+ status = "okay";
+};
--
2.23.0