2022-10-04 03:44:50

by Neal Liu

Subject: [PATCH v2 4/4] dt-bindings: bus: add documentation for Aspeed AHBC

Add device tree binding documentation for the Aspeed
Advanced High-Performance Bus (AHB) Controller.

Signed-off-by: Neal Liu <[email protected]>
---
.../bindings/bus/aspeed,ast2600-ahbc.yaml | 46 +++++++++++++++++++
1 file changed, 46 insertions(+)
create mode 100644 Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml

diff --git a/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml b/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml
new file mode 100644
index 000000000000..c42a350d30a1
--- /dev/null
+++ b/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bus/aspeed,ast2600-ahbc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ASPEED Advanced High-Performance Bus Controller (AHBC) Device Tree Bindings
+
+maintainers:
+ - Neal Liu <[email protected]>
+ - Chia-Wei Wang <[email protected]>
+
+description: |
+ Advanced High-performance Bus Controller (AHBC) supports plenty of mechanisms
+ including a priority arbiter, an address decoder and a data multiplexer
+ to control the overall operations of Advanced High-performance
+ Bus (AHB). AHB is the main system bus for ARM CPU to communicate with the
+ related peripherals.
+
+properties:
+ compatible:
+ enum:
+ - aspeed,ast2600-ahbc
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ bus {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ ahbc: bus@1e600000 {
+ compatible = "aspeed,ast2600-ahbc";
+ reg = <0x1e600000 0x100>;
+ };
+ };
--
2.25.1

2022-10-05 13:25:31

by Rob Herring (Arm)

Subject: Re: [PATCH v2 4/4] dt-bindings: bus: add documentation for Aspeed AHBC

On Tue, Oct 04, 2022 at 11:28:41AM +0800, Neal Liu wrote:
> Add device tree binding documentation for the Aspeed
> Advanced High-Performance Bus (AHB) Controller.
>
> Signed-off-by: Neal Liu <[email protected]>
> ---
> .../bindings/bus/aspeed,ast2600-ahbc.yaml | 46 +++++++++++++++++++
> 1 file changed, 46 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml
>
> diff --git a/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml b/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml
> new file mode 100644
> index 000000000000..c42a350d30a1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml
> @@ -0,0 +1,46 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/bus/aspeed,ast2600-ahbc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: ASPEED Advanced High-Performance Bus Controller (AHBC) Device Tree Bindings
> +
> +maintainers:
> + - Neal Liu <[email protected]>
> + - Chia-Wei Wang <[email protected]>
> +
> +description: |
> + Advanced High-performance Bus Controller (AHBC) supports plenty of mechanisms
> + including a priority arbiter, an address decoder and a data multiplexer
> + to control the overall operations of Advanced High-performance
> + Bus (AHB). AHB is the main system bus for ARM CPU to communicate with the
> + related peripherals.
> +
> +properties:
> + compatible:
> + enum:
> + - aspeed,ast2600-ahbc
> +
> + reg:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + bus {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + ahbc: bus@1e600000 {
> + compatible = "aspeed,ast2600-ahbc";
> + reg = <0x1e600000 0x100>;

Devices on the AHB bus should be child nodes here. Unless this is just
for device master interface to memory, but that's not what the
description says.

Rob

2022-10-06 06:16:25

by Neal Liu

Subject: RE: [PATCH v2 4/4] dt-bindings: bus: add documentation for Aspeed AHBC

> > Add device tree binding documentation for the Aspeed Advanced
> > High-Performance Bus (AHB) Controller.
> >
> > Signed-off-by: Neal Liu <[email protected]>
> > ---
> > .../bindings/bus/aspeed,ast2600-ahbc.yaml | 46
> +++++++++++++++++++
> > 1 file changed, 46 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml
> >
> > diff --git
> > a/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml
> > b/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml
> > new file mode 100644
> > index 000000000000..c42a350d30a1
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml
> > @@ -0,0 +1,46 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/bus/aspeed,ast2600-ahbc.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: ASPEED Advanced High-Performance Bus Controller (AHBC) Device
> > +Tree Bindings
> > +
> > +maintainers:
> > + - Neal Liu <[email protected]>
> > + - Chia-Wei Wang <[email protected]>
> > +
> > +description: |
> > + Advanced High-performance Bus Controller (AHBC) supports plenty of
> > +mechanisms
> > + including a priority arbiter, an address decoder and a data
> > +multiplexer
> > + to control the overall operations of Advanced High-performance
> > + Bus (AHB). AHB is the main system bus for ARM CPU to communicate
> > +with the
> > + related peripherals.
> > +
> > +properties:
> > + compatible:
> > + enum:
> > + - aspeed,ast2600-ahbc
> > +
> > + reg:
> > + maxItems: 1
> > +
> > +required:
> > + - compatible
> > + - reg
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + bus {
> > + compatible = "simple-bus";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges;
> > +
> > + ahbc: bus@1e600000 {
> > + compatible = "aspeed,ast2600-ahbc";
> > + reg = <0x1e600000 0x100>;
>
> Devices on the AHB bus should be child nodes here. Unless this is just for
> device master interface to memory, but that's not what the description says.

Sorry, I don't understand. "ahbc" device is already a child node here under AHB bus.
"ahbc" is a controller to control the overall operations of AHB, which is described in the description.
Could you explain more details?
Thanks.

2022-10-28 07:38:36

by Neal Liu

Subject: RE: [PATCH v2 4/4] dt-bindings: bus: add documentation for Aspeed AHBC

> > > Add device tree binding documentation for the Aspeed Advanced
> > > High-Performance Bus (AHB) Controller.
> > >
> > > Signed-off-by: Neal Liu <[email protected]>
> > > ---
> > > .../bindings/bus/aspeed,ast2600-ahbc.yaml | 46
> > +++++++++++++++++++
> > > 1 file changed, 46 insertions(+)
> > > create mode 100644
> > > Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml
> > >
> > > diff --git
> > > a/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml
> > > b/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml
> > > new file mode 100644
> > > index 000000000000..c42a350d30a1
> > > --- /dev/null
> > > +++
> b/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml
> > > @@ -0,0 +1,46 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/bus/aspeed,ast2600-ahbc.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: ASPEED Advanced High-Performance Bus Controller (AHBC)
> > > +Device Tree Bindings
> > > +
> > > +maintainers:
> > > + - Neal Liu <[email protected]>
> > > + - Chia-Wei Wang <[email protected]>
> > > +
> > > +description: |
> > > + Advanced High-performance Bus Controller (AHBC) supports plenty
> > > +of mechanisms
> > > + including a priority arbiter, an address decoder and a data
> > > +multiplexer
> > > + to control the overall operations of Advanced High-performance
> > > + Bus (AHB). AHB is the main system bus for ARM CPU to communicate
> > > +with the
> > > + related peripherals.
> > > +
> > > +properties:
> > > + compatible:
> > > + enum:
> > > + - aspeed,ast2600-ahbc
> > > +
> > > + reg:
> > > + maxItems: 1
> > > +
> > > +required:
> > > + - compatible
> > > + - reg
> > > +
> > > +additionalProperties: false
> > > +
> > > +examples:
> > > + - |
> > > + bus {
> > > + compatible = "simple-bus";
> > > + #address-cells = <1>;
> > > + #size-cells = <1>;
> > > + ranges;
> > > +
> > > + ahbc: bus@1e600000 {
> > > + compatible = "aspeed,ast2600-ahbc";
> > > + reg = <0x1e600000 0x100>;
> >
> > Devices on the AHB bus should be child nodes here. Unless this is just
> > for device master interface to memory, but that's not what the description
> says.
>
> Sorry, I don't understand. "ahbc" device is already a child node here under
> AHB bus.
> "ahbc" is a controller to control the overall operations of AHB, which is
> described in the description.
> Could you explain more details?
> Thanks.

Hi Rob,

This controller is a device master interface to memory, not the bus itself. Maybe the description confuse it, I'll try to revise it.
Thanks.