2023-05-19 17:29:42

by Mario Limonciello

[permalink] [raw]
Subject: [PATCH 0/3] New hardware support

Add support for some new CCP hardware.

Patch 1 also adds protections to prevent problems with
psp_send_platform_access_msg() when utilized with this hardware
as it only supports platform doorbell interface.

John Allen (1):
crypto: ccp - Add support for PCI device 0x156E

Mario Limonciello (2):
crypto: ccp - Validate that platform access mailbox registers are
declared
crypto: ccp - Add support for PCI device 0x17E0

drivers/crypto/ccp/platform-access.c | 5 ++++
drivers/crypto/ccp/sp-pci.c | 43 ++++++++++++++++++++++++++++
2 files changed, 48 insertions(+)


base-commit: f573db7aa528f11820dcc811bc7791b231d22b1c
--
2.34.1



2023-05-19 17:29:53

by Mario Limonciello

[permalink] [raw]
Subject: [PATCH 2/3] crypto: ccp - Add support for PCI device 0x17E0

PCI device 0x17E0 includes new TEE offsets, doesn't support a
platform mailbox, and does support platform doorbell
so introduce a new structure to represent it.

Signed-off-by: Mario Limonciello <[email protected]>
---
drivers/crypto/ccp/sp-pci.c | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)

diff --git a/drivers/crypto/ccp/sp-pci.c b/drivers/crypto/ccp/sp-pci.c
index aa15bc4cac2b..d0d70af0c4c0 100644
--- a/drivers/crypto/ccp/sp-pci.c
+++ b/drivers/crypto/ccp/sp-pci.c
@@ -361,6 +361,14 @@ static const struct tee_vdata teev1 = {
.ring_rptr_reg = 0x10554, /* C2PMSG_21 */
};

+static const struct tee_vdata teev2 = {
+ .cmdresp_reg = 0x10944, /* C2PMSG_17 */
+ .cmdbuff_addr_lo_reg = 0x10948, /* C2PMSG_18 */
+ .cmdbuff_addr_hi_reg = 0x1094c, /* C2PMSG_19 */
+ .ring_wptr_reg = 0x10950, /* C2PMSG_20 */
+ .ring_rptr_reg = 0x10954, /* C2PMSG_21 */
+};
+
static const struct platform_access_vdata pa_v1 = {
.cmdresp_reg = 0x10570, /* C2PMSG_28 */
.cmdbuff_addr_lo_reg = 0x10574, /* C2PMSG_29 */
@@ -369,6 +377,11 @@ static const struct platform_access_vdata pa_v1 = {
.doorbell_cmd_reg = 0x10a40, /* C2PMSG_80 */
};

+static const struct platform_access_vdata pa_v2 = {
+ .doorbell_button_reg = 0x10a24, /* C2PMSG_73 */
+ .doorbell_cmd_reg = 0x10a40, /* C2PMSG_80 */
+};
+
static const struct psp_vdata pspv1 = {
.sev = &sevv1,
.feature_reg = 0x105fc, /* C2PMSG_63 */
@@ -399,6 +412,14 @@ static const struct psp_vdata pspv4 = {
.intsts_reg = 0x10694, /* P2CMSG_INTSTS */
};

+static const struct psp_vdata pspv5 = {
+ .tee = &teev2,
+ .platform_access = &pa_v2,
+ .feature_reg = 0x109fc, /* C2PMSG_63 */
+ .inten_reg = 0x10510, /* P2CMSG_INTEN */
+ .intsts_reg = 0x10514, /* P2CMSG_INTSTS */
+};
+
#endif

static const struct sp_dev_vdata dev_vdata[] = {
@@ -451,6 +472,12 @@ static const struct sp_dev_vdata dev_vdata[] = {
.bar = 2,
#ifdef CONFIG_CRYPTO_DEV_SP_PSP
.psp_vdata = &pspv3,
+#endif
+ },
+ { /* 7 */
+ .bar = 2,
+#ifdef CONFIG_CRYPTO_DEV_SP_PSP
+ .psp_vdata = &pspv5,
#endif
},
};
@@ -463,6 +490,7 @@ static const struct pci_device_id sp_pci_table[] = {
{ PCI_VDEVICE(AMD, 0x14CA), (kernel_ulong_t)&dev_vdata[5] },
{ PCI_VDEVICE(AMD, 0x15C7), (kernel_ulong_t)&dev_vdata[6] },
{ PCI_VDEVICE(AMD, 0x1649), (kernel_ulong_t)&dev_vdata[6] },
+ { PCI_VDEVICE(AMD, 0x17E0), (kernel_ulong_t)&dev_vdata[7] },
/* Last entry must be zero */
{ 0, }
};
--
2.34.1


2023-05-19 17:30:00

by Mario Limonciello

[permalink] [raw]
Subject: [PATCH 3/3] crypto: ccp - Add support for PCI device 0x156E

From: John Allen <[email protected]>

Add a new CCP/PSP PCI device ID and new PSP register offsets.

Signed-off-by: John Allen <[email protected]>
---
drivers/crypto/ccp/sp-pci.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)

diff --git a/drivers/crypto/ccp/sp-pci.c b/drivers/crypto/ccp/sp-pci.c
index d0d70af0c4c0..b603ad9b8341 100644
--- a/drivers/crypto/ccp/sp-pci.c
+++ b/drivers/crypto/ccp/sp-pci.c
@@ -420,6 +420,14 @@ static const struct psp_vdata pspv5 = {
.intsts_reg = 0x10514, /* P2CMSG_INTSTS */
};

+static const struct psp_vdata pspv6 = {
+ .sev = &sevv2,
+ .tee = &teev2,
+ .feature_reg = 0x109fc, /* C2PMSG_63 */
+ .inten_reg = 0x10510, /* P2CMSG_INTEN */
+ .intsts_reg = 0x10514, /* P2CMSG_INTSTS */
+};
+
#endif

static const struct sp_dev_vdata dev_vdata[] = {
@@ -478,6 +486,12 @@ static const struct sp_dev_vdata dev_vdata[] = {
.bar = 2,
#ifdef CONFIG_CRYPTO_DEV_SP_PSP
.psp_vdata = &pspv5,
+#endif
+ },
+ { /* 8 */
+ .bar = 2,
+#ifdef CONFIG_CRYPTO_DEV_SP_PSP
+ .psp_vdata = &pspv6,
#endif
},
};
@@ -491,6 +505,7 @@ static const struct pci_device_id sp_pci_table[] = {
{ PCI_VDEVICE(AMD, 0x15C7), (kernel_ulong_t)&dev_vdata[6] },
{ PCI_VDEVICE(AMD, 0x1649), (kernel_ulong_t)&dev_vdata[6] },
{ PCI_VDEVICE(AMD, 0x17E0), (kernel_ulong_t)&dev_vdata[7] },
+ { PCI_VDEVICE(AMD, 0x156E), (kernel_ulong_t)&dev_vdata[8] },
/* Last entry must be zero */
{ 0, }
};
--
2.34.1


2023-05-19 17:54:39

by Mario Limonciello

[permalink] [raw]
Subject: Re: [PATCH 3/3] crypto: ccp - Add support for PCI device 0x156E

On 5/18/2023 10:24 PM, Mario Limonciello wrote:
> From: John Allen <[email protected]>
>
> Add a new CCP/PSP PCI device ID and new PSP register offsets.
>
> Signed-off-by: John Allen <[email protected]>

As this patch was from John, I forgot to include my S-o-b:

Signed-off-by: Mario Limonciello <[email protected]>

Herbert if you would like me to resend with this directly
in the patch, let me know and I will.

> ---
> drivers/crypto/ccp/sp-pci.c | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/drivers/crypto/ccp/sp-pci.c b/drivers/crypto/ccp/sp-pci.c
> index d0d70af0c4c0..b603ad9b8341 100644
> --- a/drivers/crypto/ccp/sp-pci.c
> +++ b/drivers/crypto/ccp/sp-pci.c
> @@ -420,6 +420,14 @@ static const struct psp_vdata pspv5 = {
> .intsts_reg = 0x10514, /* P2CMSG_INTSTS */
> };
>
> +static const struct psp_vdata pspv6 = {
> + .sev = &sevv2,
> + .tee = &teev2,
> + .feature_reg = 0x109fc, /* C2PMSG_63 */
> + .inten_reg = 0x10510, /* P2CMSG_INTEN */
> + .intsts_reg = 0x10514, /* P2CMSG_INTSTS */
> +};
> +
> #endif
>
> static const struct sp_dev_vdata dev_vdata[] = {
> @@ -478,6 +486,12 @@ static const struct sp_dev_vdata dev_vdata[] = {
> .bar = 2,
> #ifdef CONFIG_CRYPTO_DEV_SP_PSP
> .psp_vdata = &pspv5,
> +#endif
> + },
> + { /* 8 */
> + .bar = 2,
> +#ifdef CONFIG_CRYPTO_DEV_SP_PSP
> + .psp_vdata = &pspv6,
> #endif
> },
> };
> @@ -491,6 +505,7 @@ static const struct pci_device_id sp_pci_table[] = {
> { PCI_VDEVICE(AMD, 0x15C7), (kernel_ulong_t)&dev_vdata[6] },
> { PCI_VDEVICE(AMD, 0x1649), (kernel_ulong_t)&dev_vdata[6] },
> { PCI_VDEVICE(AMD, 0x17E0), (kernel_ulong_t)&dev_vdata[7] },
> + { PCI_VDEVICE(AMD, 0x156E), (kernel_ulong_t)&dev_vdata[8] },
> /* Last entry must be zero */
> { 0, }
> };

2023-05-19 19:30:16

by John Allen

[permalink] [raw]
Subject: Re: [PATCH 3/3] crypto: ccp - Add support for PCI device 0x156E

On Thu, May 18, 2023 at 10:24:14PM -0500, Mario Limonciello wrote:
> From: John Allen <[email protected]>
>
> Add a new CCP/PSP PCI device ID and new PSP register offsets.
>
> Signed-off-by: John Allen <[email protected]>

Hi Herbert,

Please hold off on applying this patch for now. I need to do a little
bit more testing.

Thanks,
John

> ---
> drivers/crypto/ccp/sp-pci.c | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/drivers/crypto/ccp/sp-pci.c b/drivers/crypto/ccp/sp-pci.c
> index d0d70af0c4c0..b603ad9b8341 100644
> --- a/drivers/crypto/ccp/sp-pci.c
> +++ b/drivers/crypto/ccp/sp-pci.c
> @@ -420,6 +420,14 @@ static const struct psp_vdata pspv5 = {
> .intsts_reg = 0x10514, /* P2CMSG_INTSTS */
> };
>
> +static const struct psp_vdata pspv6 = {
> + .sev = &sevv2,
> + .tee = &teev2,
> + .feature_reg = 0x109fc, /* C2PMSG_63 */
> + .inten_reg = 0x10510, /* P2CMSG_INTEN */
> + .intsts_reg = 0x10514, /* P2CMSG_INTSTS */
> +};
> +
> #endif
>
> static const struct sp_dev_vdata dev_vdata[] = {
> @@ -478,6 +486,12 @@ static const struct sp_dev_vdata dev_vdata[] = {
> .bar = 2,
> #ifdef CONFIG_CRYPTO_DEV_SP_PSP
> .psp_vdata = &pspv5,
> +#endif
> + },
> + { /* 8 */
> + .bar = 2,
> +#ifdef CONFIG_CRYPTO_DEV_SP_PSP
> + .psp_vdata = &pspv6,
> #endif
> },
> };
> @@ -491,6 +505,7 @@ static const struct pci_device_id sp_pci_table[] = {
> { PCI_VDEVICE(AMD, 0x15C7), (kernel_ulong_t)&dev_vdata[6] },
> { PCI_VDEVICE(AMD, 0x1649), (kernel_ulong_t)&dev_vdata[6] },
> { PCI_VDEVICE(AMD, 0x17E0), (kernel_ulong_t)&dev_vdata[7] },
> + { PCI_VDEVICE(AMD, 0x156E), (kernel_ulong_t)&dev_vdata[8] },
> /* Last entry must be zero */
> { 0, }
> };
> --
> 2.34.1
>

2023-05-31 22:42:15

by John Allen

[permalink] [raw]
Subject: Re: [PATCH 3/3] crypto: ccp - Add support for PCI device 0x156E

On Fri, May 19, 2023 at 02:19:10PM -0500, John Allen wrote:
> On Thu, May 18, 2023 at 10:24:14PM -0500, Mario Limonciello wrote:
> > From: John Allen <[email protected]>
> >
> > Add a new CCP/PSP PCI device ID and new PSP register offsets.
> >
> > Signed-off-by: John Allen <[email protected]>
>
> Hi Herbert,
>
> Please hold off on applying this patch for now. I need to do a little
> bit more testing.
>
> Thanks,
> John

Hi Herbert,

I completed the aforementioned testing. This patch can be applied if
everything else in the series looks good.

Thanks,
John

>
> > ---
> > drivers/crypto/ccp/sp-pci.c | 15 +++++++++++++++
> > 1 file changed, 15 insertions(+)
> >
> > diff --git a/drivers/crypto/ccp/sp-pci.c b/drivers/crypto/ccp/sp-pci.c
> > index d0d70af0c4c0..b603ad9b8341 100644
> > --- a/drivers/crypto/ccp/sp-pci.c
> > +++ b/drivers/crypto/ccp/sp-pci.c
> > @@ -420,6 +420,14 @@ static const struct psp_vdata pspv5 = {
> > .intsts_reg = 0x10514, /* P2CMSG_INTSTS */
> > };
> >
> > +static const struct psp_vdata pspv6 = {
> > + .sev = &sevv2,
> > + .tee = &teev2,
> > + .feature_reg = 0x109fc, /* C2PMSG_63 */
> > + .inten_reg = 0x10510, /* P2CMSG_INTEN */
> > + .intsts_reg = 0x10514, /* P2CMSG_INTSTS */
> > +};
> > +
> > #endif
> >
> > static const struct sp_dev_vdata dev_vdata[] = {
> > @@ -478,6 +486,12 @@ static const struct sp_dev_vdata dev_vdata[] = {
> > .bar = 2,
> > #ifdef CONFIG_CRYPTO_DEV_SP_PSP
> > .psp_vdata = &pspv5,
> > +#endif
> > + },
> > + { /* 8 */
> > + .bar = 2,
> > +#ifdef CONFIG_CRYPTO_DEV_SP_PSP
> > + .psp_vdata = &pspv6,
> > #endif
> > },
> > };
> > @@ -491,6 +505,7 @@ static const struct pci_device_id sp_pci_table[] = {
> > { PCI_VDEVICE(AMD, 0x15C7), (kernel_ulong_t)&dev_vdata[6] },
> > { PCI_VDEVICE(AMD, 0x1649), (kernel_ulong_t)&dev_vdata[6] },
> > { PCI_VDEVICE(AMD, 0x17E0), (kernel_ulong_t)&dev_vdata[7] },
> > + { PCI_VDEVICE(AMD, 0x156E), (kernel_ulong_t)&dev_vdata[8] },
> > /* Last entry must be zero */
> > { 0, }
> > };
> > --
> > 2.34.1
> >

2023-06-02 10:26:05

by Herbert Xu

[permalink] [raw]
Subject: Re: [PATCH 0/3] New hardware support

On Thu, May 18, 2023 at 10:24:11PM -0500, Mario Limonciello wrote:
> Add support for some new CCP hardware.
>
> Patch 1 also adds protections to prevent problems with
> psp_send_platform_access_msg() when utilized with this hardware
> as it only supports platform doorbell interface.
>
> John Allen (1):
> crypto: ccp - Add support for PCI device 0x156E
>
> Mario Limonciello (2):
> crypto: ccp - Validate that platform access mailbox registers are
> declared
> crypto: ccp - Add support for PCI device 0x17E0
>
> drivers/crypto/ccp/platform-access.c | 5 ++++
> drivers/crypto/ccp/sp-pci.c | 43 ++++++++++++++++++++++++++++
> 2 files changed, 48 insertions(+)
>
>
> base-commit: f573db7aa528f11820dcc811bc7791b231d22b1c
> --
> 2.34.1

All applied. Thanks.
--
Email: Herbert Xu <[email protected]>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt