2018-09-11 10:18:09

by Suzuki K Poulose

[permalink] [raw]
Subject: [PATCH 00/11] dts: Update coresight device tree bindings

Coresight DT bindings have been updated to obey the DTS rules
for label/address matching for graph nodes. The changes are in
coresight/next tree scheduled for v4.20. This series updates the
in kernel dts to match the new bindings along with updating a couple
of new examples (e.,g CATU) in the Documentation (which were missed
as they were still in flight when we created the series).

Please note that this should not be pulled for v4.19, which I assume
is a safe assumption. But please do pull it for v4.20.
The dt updates for the Juno boards were sent earlier with the original
DT update series and has been queued for v4.20.

Applies on coresight/next (which is based on v4.19) and should apply
cleanly on v4.19-rc3.


Cc: Alexandre Belloni <[email protected]>
Cc: Andy Gross <[email protected]>
Cc: Benoît Cousson <[email protected]>
Cc: David Brown <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Frank Rowand <[email protected]>
Cc: Ivan T. Ivanov <[email protected]>
Cc: Linus Walleij <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: Liviu Dudau <[email protected]>
Cc: Lorenzo Pieralisi <[email protected]>
Cc: Mathieu Poirier <[email protected]>
Cc: Nicolas Ferre <[email protected]>
Cc: [email protected]
Cc: Pengutronix Kernel Team <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Sascha Hauer <[email protected]>
Cc: Shawn Guo <[email protected]>
Cc: Sudeep Holla <[email protected]>
Cc: Tony Lindgren <[email protected]>
Cc: Wei Xu <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]

Suzuki K Poulose (11):
Documentation: dts: Update coresight binding examples
dts: hisilicon: Update coresight bindings for hardware ports
dts: spreadtrum: Update coresight bindings for hardware ports
dts: qcom: Update coresight bindings for hardware ports
dts: arm: hisilicon: Update coresight bindings for hardware ports
dts: arm: imx7{d,s}: Update coresight binding for hardware ports
dts: arm: omap: Update coresight bindings for hardware ports
dts: arm: qcom: Update coresight bindings for hardware ports
dts: sama5d2: Update coresight bindings for hardware ports
dts: ste-dbx5x0: Update coresight bindings for hardware port
dts: tc2: Update coresight bindings for hardware ports

.../devicetree/bindings/arm/coresight.txt | 20 +-
arch/arm/boot/dts/hip04.dtsi | 322 ++++++++++++---------
arch/arm/boot/dts/imx7d.dtsi | 11 +-
arch/arm/boot/dts/imx7s.dtsi | 78 +++--
arch/arm/boot/dts/omap3-beagle-xm.dts | 17 +-
arch/arm/boot/dts/omap3-beagle.dts | 17 +-
arch/arm/boot/dts/qcom-apq8064.dtsi | 75 +++--
arch/arm/boot/dts/qcom-msm8974.dtsi | 108 ++++---
arch/arm/boot/dts/sama5d2.dtsi | 17 +-
arch/arm/boot/dts/ste-dbx5x0.dtsi | 61 ++--
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 90 +++---
.../arm64/boot/dts/hisilicon/hi6220-coresight.dtsi | 147 ++++++----
arch/arm64/boot/dts/qcom/msm8916.dtsi | 98 ++++---
arch/arm64/boot/dts/sprd/sc9836.dtsi | 74 +++--
arch/arm64/boot/dts/sprd/sc9860.dtsi | 183 +++++++-----
15 files changed, 780 insertions(+), 538 deletions(-)

--
2.7.4



2018-09-11 10:18:17

by Suzuki K Poulose

[permalink] [raw]
Subject: [PATCH 02/11] dts: hisilicon: Update coresight bindings for hardware ports

Switch to updated coresight bindings for hw ports.

Cc: [email protected]
Cc: [email protected]
Cc: Mathieu Poirier <[email protected]>
Signed-off-by: Suzuki K Poulose <[email protected]>
---
.../arm64/boot/dts/hisilicon/hi6220-coresight.dtsi | 147 ++++++++++++---------
1 file changed, 85 insertions(+), 62 deletions(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi
index 7afee5d..2202816 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi
@@ -20,7 +20,7 @@
clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
clock-names = "apb_pclk";

- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;

@@ -31,11 +31,15 @@
<&etf_in>;
};
};
+ };

- port@1 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
soc_funnel_in: endpoint {
- slave-mode;
remote-endpoint =
<&acpu_funnel_out>;
};
@@ -49,20 +53,24 @@
clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
clock-names = "apb_pclk";

- ports {
+ in-ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;
etf_in: endpoint {
- slave-mode;
remote-endpoint =
<&soc_funnel_out>;
};
};
+ };

- port@1 {
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
etf_out: endpoint {
remote-endpoint =
@@ -77,20 +85,24 @@
clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
clock-names = "apb_pclk";

- ports {
+ in-ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;
replicator_in: endpoint {
- slave-mode;
remote-endpoint =
<&etf_out>;
};
};
+ };

- port@1 {
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
replicator_out0: endpoint {
remote-endpoint =
@@ -98,7 +110,7 @@
};
};

- port@2 {
+ port@1 {
reg = <1>;
replicator_out1: endpoint {
remote-endpoint =
@@ -114,14 +126,13 @@
clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
clock-names = "apb_pclk";

- ports {
+ in-ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;
etr_in: endpoint {
- slave-mode;
remote-endpoint =
<&replicator_out0>;
};
@@ -135,14 +146,13 @@
clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
clock-names = "apb_pclk";

- ports {
+ in-ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;
tpiu_in: endpoint {
- slave-mode;
remote-endpoint =
<&replicator_out1>;
};
@@ -156,7 +166,7 @@
clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
clock-names = "apb_pclk";

- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;

@@ -167,74 +177,71 @@
<&soc_funnel_in>;
};
};
+ };

- port@1 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
acpu_funnel_in0: endpoint {
- slave-mode;
remote-endpoint =
<&etm0_out>;
};
};

- port@2 {
+ port@1 {
reg = <1>;
acpu_funnel_in1: endpoint {
- slave-mode;
remote-endpoint =
<&etm1_out>;
};
};

- port@3 {
+ port@2 {
reg = <2>;
acpu_funnel_in2: endpoint {
- slave-mode;
remote-endpoint =
<&etm2_out>;
};
};

- port@4 {
+ port@3 {
reg = <3>;
acpu_funnel_in3: endpoint {
- slave-mode;
remote-endpoint =
<&etm3_out>;
};
};

- port@5 {
+ port@4 {
reg = <4>;
acpu_funnel_in4: endpoint {
- slave-mode;
remote-endpoint =
<&etm4_out>;
};
};

- port@6 {
+ port@5 {
reg = <5>;
acpu_funnel_in5: endpoint {
- slave-mode;
remote-endpoint =
<&etm5_out>;
};
};

- port@7 {
+ port@6 {
reg = <6>;
acpu_funnel_in6: endpoint {
- slave-mode;
remote-endpoint =
<&etm6_out>;
};
};

- port@8 {
+ port@7 {
reg = <7>;
acpu_funnel_in7: endpoint {
- slave-mode;
remote-endpoint =
<&etm7_out>;
};
@@ -251,10 +258,12 @@

cpu = <&cpu0>;

- port {
- etm0_out: endpoint {
- remote-endpoint =
- <&acpu_funnel_in0>;
+ out-ports {
+ port {
+ etm0_out: endpoint {
+ remote-endpoint =
+ <&acpu_funnel_in0>;
+ };
};
};
};
@@ -268,10 +277,12 @@

cpu = <&cpu1>;

- port {
- etm1_out: endpoint {
- remote-endpoint =
- <&acpu_funnel_in1>;
+ out-ports {
+ port {
+ etm1_out: endpoint {
+ remote-endpoint =
+ <&acpu_funnel_in1>;
+ };
};
};
};
@@ -285,10 +296,12 @@

cpu = <&cpu2>;

- port {
- etm2_out: endpoint {
- remote-endpoint =
- <&acpu_funnel_in2>;
+ out-ports {
+ port {
+ etm2_out: endpoint {
+ remote-endpoint =
+ <&acpu_funnel_in2>;
+ };
};
};
};
@@ -302,10 +315,12 @@

cpu = <&cpu3>;

- port {
- etm3_out: endpoint {
- remote-endpoint =
- <&acpu_funnel_in3>;
+ out-ports {
+ port {
+ etm3_out: endpoint {
+ remote-endpoint =
+ <&acpu_funnel_in3>;
+ };
};
};
};
@@ -319,10 +334,12 @@

cpu = <&cpu4>;

- port {
+ out-ports {
+ port {
etm4_out: endpoint {
- remote-endpoint =
- <&acpu_funnel_in4>;
+ remote-endpoint =
+ <&acpu_funnel_in4>;
+ };
};
};
};
@@ -336,10 +353,12 @@

cpu = <&cpu5>;

- port {
- etm5_out: endpoint {
- remote-endpoint =
- <&acpu_funnel_in5>;
+ out-ports {
+ port {
+ etm5_out: endpoint {
+ remote-endpoint =
+ <&acpu_funnel_in5>;
+ };
};
};
};
@@ -353,10 +372,12 @@

cpu = <&cpu6>;

- port {
- etm6_out: endpoint {
- remote-endpoint =
- <&acpu_funnel_in6>;
+ out-ports {
+ port {
+ etm6_out: endpoint {
+ remote-endpoint =
+ <&acpu_funnel_in6>;
+ };
};
};
};
@@ -370,10 +391,12 @@

cpu = <&cpu7>;

- port {
- etm7_out: endpoint {
- remote-endpoint =
- <&acpu_funnel_in7>;
+ out-ports {
+ port {
+ etm7_out: endpoint {
+ remote-endpoint =
+ <&acpu_funnel_in7>;
+ };
};
};
};
--
2.7.4


2018-09-11 10:18:23

by Suzuki K Poulose

[permalink] [raw]
Subject: [PATCH 03/11] dts: spreadtrum: Update coresight bindings for hardware ports

Switch to the new coresight bindings for hw ports

Cc: [email protected]
Cc: [email protected]
Cc: Mathieu Poirier <[email protected]>
Signed-off-by: Suzuki K Poulose <[email protected]>
---
arch/arm64/boot/dts/sprd/sc9836.dtsi | 74 ++++++++------
arch/arm64/boot/dts/sprd/sc9860.dtsi | 183 +++++++++++++++++++++--------------
2 files changed, 151 insertions(+), 106 deletions(-)

diff --git a/arch/arm64/boot/dts/sprd/sc9836.dtsi b/arch/arm64/boot/dts/sprd/sc9836.dtsi
index 63894c4..416f271 100644
--- a/arch/arm64/boot/dts/sprd/sc9836.dtsi
+++ b/arch/arm64/boot/dts/sprd/sc9836.dtsi
@@ -50,10 +50,11 @@
reg = <0 0x10003000 0 0x1000>;
clocks = <&clk26mhz>;
clock-names = "apb_pclk";
- port {
- etf_in: endpoint {
- slave-mode;
- remote-endpoint = <&funnel_out_port0>;
+ in-ports {
+ port {
+ etf_in: endpoint {
+ remote-endpoint = <&funnel_out_port0>;
+ };
};
};
};
@@ -63,55 +64,54 @@
reg = <0 0x10001000 0 0x1000>;
clocks = <&clk26mhz>;
clock-names = "apb_pclk";
- ports {
+
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;

- /* funnel output port */
port@0 {
reg = <0>;
funnel_out_port0: endpoint {
remote-endpoint = <&etf_in>;
};
};
+ };

- /* funnel input port 0-4 */
- port@1 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
funnel_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&etm0_out>;
};
};

- port@2 {
+ port@1 {
reg = <1>;
funnel_in_port1: endpoint {
- slave-mode;
remote-endpoint = <&etm1_out>;
};
};

- port@3 {
+ port@2 {
reg = <2>;
funnel_in_port2: endpoint {
- slave-mode;
remote-endpoint = <&etm2_out>;
};
};

- port@4 {
+ port@3 {
reg = <3>;
funnel_in_port3: endpoint {
- slave-mode;
remote-endpoint = <&etm3_out>;
};
};

- port@5 {
+ port@4 {
reg = <4>;
funnel_in_port4: endpoint {
- slave-mode;
remote-endpoint = <&stm_out>;
};
};
@@ -126,9 +126,11 @@
cpu = <&cpu0>;
clocks = <&clk26mhz>;
clock-names = "apb_pclk";
- port {
- etm0_out: endpoint {
- remote-endpoint = <&funnel_in_port0>;
+ out-ports {
+ port {
+ etm0_out: endpoint {
+ remote-endpoint = <&funnel_in_port0>;
+ };
};
};
};
@@ -140,9 +142,11 @@
cpu = <&cpu1>;
clocks = <&clk26mhz>;
clock-names = "apb_pclk";
- port {
- etm1_out: endpoint {
- remote-endpoint = <&funnel_in_port1>;
+ out-ports {
+ port {
+ etm1_out: endpoint {
+ remote-endpoint = <&funnel_in_port1>;
+ };
};
};
};
@@ -154,9 +158,11 @@
cpu = <&cpu2>;
clocks = <&clk26mhz>;
clock-names = "apb_pclk";
- port {
- etm2_out: endpoint {
- remote-endpoint = <&funnel_in_port2>;
+ out-ports {
+ port {
+ etm2_out: endpoint {
+ remote-endpoint = <&funnel_in_port2>;
+ };
};
};
};
@@ -168,9 +174,11 @@
cpu = <&cpu3>;
clocks = <&clk26mhz>;
clock-names = "apb_pclk";
- port {
- etm3_out: endpoint {
- remote-endpoint = <&funnel_in_port3>;
+ out-ports {
+ port {
+ etm3_out: endpoint {
+ remote-endpoint = <&funnel_in_port3>;
+ };
};
};
};
@@ -182,9 +190,11 @@
reg-names = "stm-base", "stm-stimulus-base";
clocks = <&clk26mhz>;
clock-names = "apb_pclk";
- port {
- stm_out: endpoint {
- remote-endpoint = <&funnel_in_port4>;
+ out-ports {
+ port {
+ stm_out: endpoint {
+ remote-endpoint = <&funnel_in_port4>;
+ };
};
};
};
diff --git a/arch/arm64/boot/dts/sprd/sc9860.dtsi b/arch/arm64/boot/dts/sprd/sc9860.dtsi
index 48f5928..50aef73 100644
--- a/arch/arm64/boot/dts/sprd/sc9860.dtsi
+++ b/arch/arm64/boot/dts/sprd/sc9860.dtsi
@@ -304,7 +304,7 @@
reg = <0 0x10001000 0 0x1000>;
clocks = <&ext_26m>;
clock-names = "apb_pclk";
- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;

@@ -314,20 +314,23 @@
remote-endpoint = <&etb_in>;
};
};
+ };

- port@1 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
soc_funnel_in_port0: endpoint {
- slave-mode;
remote-endpoint =
<&main_funnel_out_port>;
};
};

- port@2 {
+ port@4 {
reg = <4>;
soc_funnel_in_port1: endpoint {
- slave-mode;
remote-endpoint =
<&stm_out_port>;
};
@@ -340,11 +343,12 @@
reg = <0 0x10003000 0 0x1000>;
clocks = <&ext_26m>;
clock-names = "apb_pclk";
- port {
- etb_in: endpoint {
- slave-mode;
- remote-endpoint =
- <&soc_funnel_out_port>;
+ out-ports {
+ port {
+ etb_in: endpoint {
+ remote-endpoint =
+ <&soc_funnel_out_port>;
+ };
};
};
};
@@ -356,10 +360,12 @@
reg-names = "stm-base", "stm-stimulus-base";
clocks = <&ext_26m>;
clock-names = "apb_pclk";
- port {
- stm_out_port: endpoint {
- remote-endpoint =
- <&soc_funnel_in_port1>;
+ out-ports {
+ port {
+ stm_out_port: endpoint {
+ remote-endpoint =
+ <&soc_funnel_in_port1>;
+ };
};
};
};
@@ -369,7 +375,7 @@
reg = <0 0x11001000 0 0x1000>;
clocks = <&ext_26m>;
clock-names = "apb_pclk";
- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;

@@ -380,27 +386,29 @@
<&cluster0_etf_in>;
};
};
+ };

- port@1 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
cluster0_funnel_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&etm0_out>;
};
};

- port@2 {
+ port@1 {
reg = <1>;
cluster0_funnel_in_port1: endpoint {
- slave-mode;
remote-endpoint = <&etm1_out>;
};
};

- port@3 {
+ port@2 {
reg = <2>;
cluster0_funnel_in_port2: endpoint {
- slave-mode;
remote-endpoint = <&etm2_out>;
};
};
@@ -408,7 +416,6 @@
port@4 {
reg = <4>;
cluster0_funnel_in_port3: endpoint {
- slave-mode;
remote-endpoint = <&etm3_out>;
};
};
@@ -420,7 +427,7 @@
reg = <0 0x11002000 0 0x1000>;
clocks = <&ext_26m>;
clock-names = "apb_pclk";
- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;

@@ -431,35 +438,36 @@
<&cluster1_etf_in>;
};
};
+ };

- port@1 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
cluster1_funnel_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&etm4_out>;
};
};

- port@2 {
+ port@1 {
reg = <1>;
cluster1_funnel_in_port1: endpoint {
- slave-mode;
remote-endpoint = <&etm5_out>;
};
};

- port@3 {
+ port@2 {
reg = <2>;
cluster1_funnel_in_port2: endpoint {
- slave-mode;
remote-endpoint = <&etm6_out>;
};
};

- port@4 {
+ port@3 {
reg = <3>;
cluster1_funnel_in_port3: endpoint {
- slave-mode;
remote-endpoint = <&etm7_out>;
};
};
@@ -472,7 +480,7 @@
clocks = <&ext_26m>;
clock-names = "apb_pclk";

- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;

@@ -483,11 +491,15 @@
<&main_funnel_in_port0>;
};
};
+ };

- port@1 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
cluster0_etf_in: endpoint {
- slave-mode;
remote-endpoint =
<&cluster0_funnel_out_port>;
};
@@ -501,7 +513,7 @@
clocks = <&ext_26m>;
clock-names = "apb_pclk";

- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;

@@ -512,11 +524,15 @@
<&main_funnel_in_port1>;
};
};
+ };

- port@1 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
cluster1_etf_in: endpoint {
- slave-mode;
remote-endpoint =
<&cluster1_funnel_out_port>;
};
@@ -530,7 +546,7 @@
clocks = <&ext_26m>;
clock-names = "apb_pclk";

- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;

@@ -541,20 +557,23 @@
<&soc_funnel_in_port0>;
};
};
+ };

- port@1 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
main_funnel_in_port0: endpoint {
- slave-mode;
remote-endpoint =
<&cluster0_etf_out>;
};
};

- port@2 {
+ port@1 {
reg = <1>;
main_funnel_in_port1: endpoint {
- slave-mode;
remote-endpoint =
<&cluster1_etf_out>;
};
@@ -569,10 +588,12 @@
clocks = <&ext_26m>;
clock-names = "apb_pclk";

- port {
- etm0_out: endpoint {
- remote-endpoint =
- <&cluster0_funnel_in_port0>;
+ out-ports {
+ port {
+ etm0_out: endpoint {
+ remote-endpoint =
+ <&cluster0_funnel_in_port0>;
+ };
};
};
};
@@ -584,10 +605,12 @@
clocks = <&ext_26m>;
clock-names = "apb_pclk";

- port {
- etm1_out: endpoint {
- remote-endpoint =
- <&cluster0_funnel_in_port1>;
+ out-ports {
+ port {
+ etm1_out: endpoint {
+ remote-endpoint =
+ <&cluster0_funnel_in_port1>;
+ };
};
};
};
@@ -599,10 +622,12 @@
clocks = <&ext_26m>;
clock-names = "apb_pclk";

- port {
- etm2_out: endpoint {
- remote-endpoint =
- <&cluster0_funnel_in_port2>;
+ out-ports {
+ port {
+ etm2_out: endpoint {
+ remote-endpoint =
+ <&cluster0_funnel_in_port2>;
+ };
};
};
};
@@ -614,10 +639,12 @@
clocks = <&ext_26m>;
clock-names = "apb_pclk";

- port {
- etm3_out: endpoint {
- remote-endpoint =
- <&cluster0_funnel_in_port3>;
+ out-ports {
+ port {
+ etm3_out: endpoint {
+ remote-endpoint =
+ <&cluster0_funnel_in_port3>;
+ };
};
};
};
@@ -629,10 +656,12 @@
clocks = <&ext_26m>;
clock-names = "apb_pclk";

- port {
- etm4_out: endpoint {
- remote-endpoint =
- <&cluster1_funnel_in_port0>;
+ out-ports {
+ port {
+ etm4_out: endpoint {
+ remote-endpoint =
+ <&cluster1_funnel_in_port0>;
+ };
};
};
};
@@ -644,10 +673,12 @@
clocks = <&ext_26m>;
clock-names = "apb_pclk";

- port {
- etm5_out: endpoint {
- remote-endpoint =
- <&cluster1_funnel_in_port1>;
+ out-ports {
+ port {
+ etm5_out: endpoint {
+ remote-endpoint =
+ <&cluster1_funnel_in_port1>;
+ };
};
};
};
@@ -659,10 +690,12 @@
clocks = <&ext_26m>;
clock-names = "apb_pclk";

- port {
- etm6_out: endpoint {
- remote-endpoint =
- <&cluster1_funnel_in_port2>;
+ out-ports {
+ port {
+ etm6_out: endpoint {
+ remote-endpoint =
+ <&cluster1_funnel_in_port2>;
+ };
};
};
};
@@ -674,10 +707,12 @@
clocks = <&ext_26m>;
clock-names = "apb_pclk";

- port {
- etm7_out: endpoint {
- remote-endpoint =
- <&cluster1_funnel_in_port3>;
+ out-ports {
+ port {
+ etm7_out: endpoint {
+ remote-endpoint =
+ <&cluster1_funnel_in_port3>;
+ };
};
};
};
--
2.7.4


2018-09-11 10:18:27

by Suzuki K Poulose

[permalink] [raw]
Subject: [PATCH 04/11] dts: qcom: Update coresight bindings for hardware ports

Switch to updated coresight bindings for hw ports

Cc: Andy Gross <[email protected]>
Cc: David Brown <[email protected]>
Cc: Ivan T. Ivanov <[email protected]>
Cc: Mathieu Poirier <[email protected]>
Signed-off-by: Suzuki K Poulose <[email protected]>
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 98 ++++++++++++++++++++++-------------
1 file changed, 63 insertions(+), 35 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 7b32b89..5bed52b 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -1099,10 +1099,11 @@
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";

- port {
- tpiu_in: endpoint {
- slave-mode;
- remote-endpoint = <&replicator_out1>;
+ out-ports {
+ port {
+ tpiu_in: endpoint {
+ remote-endpoint = <&replicator_out1>;
+ };
};
};
};
@@ -1114,7 +1115,7 @@
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";

- ports {
+ in-ports {
#address-cells = <1>;
#size-cells = <0>;

@@ -1132,11 +1133,16 @@
port@4 {
reg = <4>;
funnel0_in4: endpoint {
- slave-mode;
remote-endpoint = <&funnel1_out>;
};
};
- port@8 {
+ };
+
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
funnel0_out: endpoint {
remote-endpoint = <&etf_in>;
@@ -1152,7 +1158,7 @@
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";

- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;

@@ -1162,16 +1168,22 @@
remote-endpoint = <&etr_in>;
};
};
+
port@1 {
reg = <1>;
replicator_out1: endpoint {
remote-endpoint = <&tpiu_in>;
};
};
- port@2 {
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
replicator_in: endpoint {
- slave-mode;
remote-endpoint = <&etf_out>;
};
};
@@ -1185,18 +1197,23 @@
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";

- ports {
+ in-ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;
etf_in: endpoint {
- slave-mode;
remote-endpoint = <&funnel0_out>;
};
};
- port@1 {
+ };
+
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
etf_out: endpoint {
remote-endpoint = <&replicator_in>;
@@ -1212,10 +1229,11 @@
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";

- port {
- etr_in: endpoint {
- slave-mode;
- remote-endpoint = <&replicator_out0>;
+ in-ports {
+ port {
+ etr_in: endpoint {
+ remote-endpoint = <&replicator_out0>;
+ };
};
};
};
@@ -1227,39 +1245,41 @@
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";

- ports {
+ in-ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;
funnel1_in0: endpoint {
- slave-mode;
remote-endpoint = <&etm0_out>;
};
};
port@1 {
reg = <1>;
funnel1_in1: endpoint {
- slave-mode;
remote-endpoint = <&etm1_out>;
};
};
port@2 {
reg = <2>;
funnel1_in2: endpoint {
- slave-mode;
remote-endpoint = <&etm2_out>;
};
};
port@3 {
reg = <3>;
funnel1_in3: endpoint {
- slave-mode;
remote-endpoint = <&etm3_out>;
};
};
- port@4 {
+ };
+
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
funnel1_out: endpoint {
remote-endpoint = <&funnel0_in4>;
@@ -1309,9 +1329,11 @@

cpu = <&CPU0>;

- port {
- etm0_out: endpoint {
- remote-endpoint = <&funnel1_in0>;
+ out-ports {
+ port {
+ etm0_out: endpoint {
+ remote-endpoint = <&funnel1_in0>;
+ };
};
};
};
@@ -1325,9 +1347,11 @@

cpu = <&CPU1>;

- port {
- etm1_out: endpoint {
- remote-endpoint = <&funnel1_in1>;
+ out-ports {
+ port {
+ etm1_out: endpoint {
+ remote-endpoint = <&funnel1_in1>;
+ };
};
};
};
@@ -1341,9 +1365,11 @@

cpu = <&CPU2>;

- port {
- etm2_out: endpoint {
- remote-endpoint = <&funnel1_in2>;
+ out-ports {
+ port {
+ etm2_out: endpoint {
+ remote-endpoint = <&funnel1_in2>;
+ };
};
};
};
@@ -1357,9 +1383,11 @@

cpu = <&CPU3>;

- port {
- etm3_out: endpoint {
- remote-endpoint = <&funnel1_in3>;
+ out-ports {
+ port {
+ etm3_out: endpoint {
+ remote-endpoint = <&funnel1_in3>;
+ };
};
};
};
--
2.7.4


2018-09-11 10:18:37

by Suzuki K Poulose

[permalink] [raw]
Subject: [PATCH 11/11] dts: tc2: Update coresight bindings for hardware ports

Switch to the new coresight bindings

Cc: Liviu Dudau <[email protected]>
Cc: Sudeep Holla <[email protected]>
Cc: Lorenzo Pieralisi <[email protected]>
Cc: Mathieu Poirier <[email protected]>
Signed-off-by: Suzuki K Poulose <[email protected]>
---
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 90 +++++++++++++++++-------------
1 file changed, 51 insertions(+), 39 deletions(-)

diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
index ac6b90e..3a50906 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
@@ -393,10 +393,11 @@

clocks = <&oscclk6a>;
clock-names = "apb_pclk";
- port {
- etb_in_port: endpoint {
- slave-mode;
- remote-endpoint = <&replicator_out_port0>;
+ in-ports {
+ port {
+ etb_in_port: endpoint {
+ remote-endpoint = <&replicator_out_port0>;
+ };
};
};
};
@@ -407,10 +408,11 @@

clocks = <&oscclk6a>;
clock-names = "apb_pclk";
- port {
- tpiu_in_port: endpoint {
- slave-mode;
- remote-endpoint = <&replicator_out_port1>;
+ in-ports {
+ port {
+ tpiu_in_port: endpoint {
+ remote-endpoint = <&replicator_out_port1>;
+ };
};
};
};
@@ -421,11 +423,10 @@
*/
compatible = "arm,coresight-replicator";

- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;

- /* replicator output ports */
port@0 {
reg = <0>;
replicator_out_port0: endpoint {
@@ -439,12 +440,15 @@
remote-endpoint = <&tpiu_in_port>;
};
};
+ };

- /* replicator input port */
- port@2 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
replicator_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&funnel_out_port0>;
};
};
@@ -457,11 +461,10 @@

clocks = <&oscclk6a>;
clock-names = "apb_pclk";
- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;

- /* funnel output port */
port@0 {
reg = <0>;
funnel_out_port0: endpoint {
@@ -469,28 +472,29 @@
<&replicator_in_port0>;
};
};
+ };

- /* funnel input ports */
- port@1 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
funnel_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&ptm0_out_port>;
};
};

- port@2 {
+ port@1 {
reg = <1>;
funnel_in_port1: endpoint {
- slave-mode;
remote-endpoint = <&ptm1_out_port>;
};
};

- port@3 {
+ port@2 {
reg = <2>;
funnel_in_port2: endpoint {
- slave-mode;
remote-endpoint = <&etm0_out_port>;
};
};
@@ -500,7 +504,6 @@
port@4 {
reg = <4>;
funnel_in_port4: endpoint {
- slave-mode;
remote-endpoint = <&etm1_out_port>;
};
};
@@ -508,7 +511,6 @@
port@5 {
reg = <5>;
funnel_in_port5: endpoint {
- slave-mode;
remote-endpoint = <&etm2_out_port>;
};
};
@@ -522,9 +524,11 @@
cpu = <&cpu0>;
clocks = <&oscclk6a>;
clock-names = "apb_pclk";
- port {
- ptm0_out_port: endpoint {
- remote-endpoint = <&funnel_in_port0>;
+ out-ports {
+ port {
+ ptm0_out_port: endpoint {
+ remote-endpoint = <&funnel_in_port0>;
+ };
};
};
};
@@ -536,9 +540,11 @@
cpu = <&cpu1>;
clocks = <&oscclk6a>;
clock-names = "apb_pclk";
- port {
- ptm1_out_port: endpoint {
- remote-endpoint = <&funnel_in_port1>;
+ out-ports {
+ port {
+ ptm1_out_port: endpoint {
+ remote-endpoint = <&funnel_in_port1>;
+ };
};
};
};
@@ -550,9 +556,11 @@
cpu = <&cpu2>;
clocks = <&oscclk6a>;
clock-names = "apb_pclk";
- port {
- etm0_out_port: endpoint {
- remote-endpoint = <&funnel_in_port2>;
+ out-ports {
+ port {
+ etm0_out_port: endpoint {
+ remote-endpoint = <&funnel_in_port2>;
+ };
};
};
};
@@ -564,9 +572,11 @@
cpu = <&cpu3>;
clocks = <&oscclk6a>;
clock-names = "apb_pclk";
- port {
- etm1_out_port: endpoint {
- remote-endpoint = <&funnel_in_port4>;
+ out-ports {
+ port {
+ etm1_out_port: endpoint {
+ remote-endpoint = <&funnel_in_port4>;
+ };
};
};
};
@@ -578,9 +588,11 @@
cpu = <&cpu4>;
clocks = <&oscclk6a>;
clock-names = "apb_pclk";
- port {
- etm2_out_port: endpoint {
- remote-endpoint = <&funnel_in_port5>;
+ out-ports {
+ port {
+ etm2_out_port: endpoint {
+ remote-endpoint = <&funnel_in_port5>;
+ };
};
};
};
--
2.7.4


2018-09-11 10:18:54

by Suzuki K Poulose

[permalink] [raw]
Subject: [PATCH 08/11] dts: arm: qcom: Update coresight bindings for hardware ports

Switch to the new hardware port bindings for coresight

Cc: Andy Gross <[email protected]>
Cc: David Brown <[email protected]>
Cc: Mathieu Poirier <[email protected]>
Signed-off-by: Suzuki K Poulose <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 75 +++++++++++++++----------
arch/arm/boot/dts/qcom-msm8974.dtsi | 108 +++++++++++++++++++++++-------------
2 files changed, 116 insertions(+), 67 deletions(-)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 4a99c92..0a1c598 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -1611,10 +1611,11 @@
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";

- port {
- etb_in: endpoint {
- slave-mode;
- remote-endpoint = <&replicator_out0>;
+ in-ports {
+ port {
+ etb_in: endpoint {
+ remote-endpoint = <&replicator_out0>;
+ };
};
};
};
@@ -1626,10 +1627,11 @@
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";

- port {
- tpiu_in: endpoint {
- slave-mode;
- remote-endpoint = <&replicator_out1>;
+ in-ports {
+ port {
+ tpiu_in: endpoint {
+ remote-endpoint = <&replicator_out1>;
+ };
};
};
};
@@ -1640,7 +1642,7 @@
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";

- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;

@@ -1656,10 +1658,15 @@
remote-endpoint = <&tpiu_in>;
};
};
- port@2 {
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
replicator_in: endpoint {
- slave-mode;
remote-endpoint = <&funnel_out>;
};
};
@@ -1673,7 +1680,7 @@
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";

- ports {
+ in-ports {
#address-cells = <1>;
#size-cells = <0>;

@@ -1687,32 +1694,34 @@
port@0 {
reg = <0>;
funnel_in0: endpoint {
- slave-mode;
remote-endpoint = <&etm0_out>;
};
};
port@1 {
reg = <1>;
funnel_in1: endpoint {
- slave-mode;
remote-endpoint = <&etm1_out>;
};
};
port@4 {
reg = <4>;
funnel_in4: endpoint {
- slave-mode;
remote-endpoint = <&etm2_out>;
};
};
port@5 {
reg = <5>;
funnel_in5: endpoint {
- slave-mode;
remote-endpoint = <&etm3_out>;
};
};
- port@8 {
+ };
+
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
funnel_out: endpoint {
remote-endpoint = <&replicator_in>;
@@ -1730,9 +1739,11 @@

cpu = <&CPU0>;

- port {
- etm0_out: endpoint {
- remote-endpoint = <&funnel_in0>;
+ out-ports {
+ port {
+ etm0_out: endpoint {
+ remote-endpoint = <&funnel_in0>;
+ };
};
};
};
@@ -1746,9 +1757,11 @@

cpu = <&CPU1>;

- port {
- etm1_out: endpoint {
- remote-endpoint = <&funnel_in1>;
+ out-ports {
+ port {
+ etm1_out: endpoint {
+ remote-endpoint = <&funnel_in1>;
+ };
};
};
};
@@ -1762,9 +1775,11 @@

cpu = <&CPU2>;

- port {
- etm2_out: endpoint {
- remote-endpoint = <&funnel_in4>;
+ out-ports {
+ port {
+ etm2_out: endpoint {
+ remote-endpoint = <&funnel_in4>;
+ };
};
};
};
@@ -1778,9 +1793,11 @@

cpu = <&CPU3>;

- port {
- etm3_out: endpoint {
- remote-endpoint = <&funnel_in5>;
+ out-ports {
+ port {
+ etm3_out: endpoint {
+ remote-endpoint = <&funnel_in5>;
+ };
};
};
};
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index d9019a4..37aac0b 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -770,10 +770,11 @@
clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";

- port {
- etr_in: endpoint {
- slave-mode;
- remote-endpoint = <&replicator_out0>;
+ in-ports {
+ port {
+ etr_in: endpoint {
+ remote-endpoint = <&replicator_out0>;
+ };
};
};
};
@@ -785,10 +786,11 @@
clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";

- port {
- tpiu_in: endpoint {
- slave-mode;
- remote-endpoint = <&replicator_out1>;
+ in-ports {
+ port {
+ tpiu_in: endpoint {
+ remote-endpoint = <&replicator_out1>;
+ };
};
};
};
@@ -800,7 +802,7 @@
clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";

- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;

@@ -816,10 +818,15 @@
remote-endpoint = <&tpiu_in>;
};
};
- port@2 {
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
replicator_in: endpoint {
- slave-mode;
remote-endpoint = <&etf_out>;
};
};
@@ -833,7 +840,7 @@
clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";

- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;

@@ -843,10 +850,15 @@
remote-endpoint = <&replicator_in>;
};
};
- port@1 {
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
etf_in: endpoint {
- slave-mode;
remote-endpoint = <&merger_out>;
};
};
@@ -860,7 +872,7 @@
clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";

- ports {
+ in-ports {
#address-cells = <1>;
#size-cells = <0>;

@@ -873,11 +885,16 @@
port@1 {
reg = <1>;
merger_in1: endpoint {
- slave-mode;
remote-endpoint = <&funnel1_out>;
};
};
- port@8 {
+ };
+
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
merger_out: endpoint {
remote-endpoint = <&etf_in>;
@@ -893,7 +910,7 @@
clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";

- ports {
+ in-ports {
#address-cells = <1>;
#size-cells = <0>;

@@ -910,11 +927,16 @@
port@5 {
reg = <5>;
funnel1_in5: endpoint {
- slave-mode;
remote-endpoint = <&kpss_out>;
};
};
- port@8 {
+ };
+
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
funnel1_out: endpoint {
remote-endpoint = <&merger_in1>;
@@ -930,39 +952,41 @@
clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";

- ports {
+ in-ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;
kpss_in0: endpoint {
- slave-mode;
remote-endpoint = <&etm0_out>;
};
};
port@1 {
reg = <1>;
kpss_in1: endpoint {
- slave-mode;
remote-endpoint = <&etm1_out>;
};
};
port@2 {
reg = <2>;
kpss_in2: endpoint {
- slave-mode;
remote-endpoint = <&etm2_out>;
};
};
port@3 {
reg = <3>;
kpss_in3: endpoint {
- slave-mode;
remote-endpoint = <&etm3_out>;
};
};
- port@8 {
+ };
+
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
kpss_out: endpoint {
remote-endpoint = <&funnel1_in5>;
@@ -980,9 +1004,11 @@

cpu = <&CPU0>;

- port {
- etm0_out: endpoint {
- remote-endpoint = <&kpss_in0>;
+ out-ports {
+ port {
+ etm0_out: endpoint {
+ remote-endpoint = <&kpss_in0>;
+ };
};
};
};
@@ -996,9 +1022,11 @@

cpu = <&CPU1>;

- port {
- etm1_out: endpoint {
- remote-endpoint = <&kpss_in1>;
+ out-ports {
+ port {
+ etm1_out: endpoint {
+ remote-endpoint = <&kpss_in1>;
+ };
};
};
};
@@ -1012,9 +1040,11 @@

cpu = <&CPU2>;

- port {
- etm2_out: endpoint {
- remote-endpoint = <&kpss_in2>;
+ out-ports {
+ port {
+ etm2_out: endpoint {
+ remote-endpoint = <&kpss_in2>;
+ };
};
};
};
@@ -1028,9 +1058,11 @@

cpu = <&CPU3>;

- port {
- etm3_out: endpoint {
- remote-endpoint = <&kpss_in3>;
+ out-ports {
+ port {
+ etm3_out: endpoint {
+ remote-endpoint = <&kpss_in3>;
+ };
};
};
};
--
2.7.4


2018-09-11 10:19:19

by Suzuki K Poulose

[permalink] [raw]
Subject: [PATCH 07/11] dts: arm: omap: Update coresight bindings for hardware ports

Switch to the new coresight bindings for hardware ports

Cc: [email protected]
Cc: "Benoît Cousson" <[email protected]>
Cc: Tony Lindgren <[email protected]>
Cc: Mathieu Poirier <[email protected]>
Signed-off-by: Suzuki K Poulose <[email protected]>
---
arch/arm/boot/dts/omap3-beagle-xm.dts | 17 ++++++++++-------
arch/arm/boot/dts/omap3-beagle.dts | 17 ++++++++++-------
2 files changed, 20 insertions(+), 14 deletions(-)

diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
index d80587d..9985ee2 100644
--- a/arch/arm/boot/dts/omap3-beagle-xm.dts
+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
@@ -160,10 +160,11 @@

clocks = <&emu_src_ck>;
clock-names = "apb_pclk";
- port {
- etb_in: endpoint {
- slave-mode;
- remote-endpoint = <&etm_out>;
+ in-ports {
+ port {
+ etb_in: endpoint {
+ remote-endpoint = <&etm_out>;
+ };
};
};
};
@@ -174,9 +175,11 @@

clocks = <&emu_src_ck>;
clock-names = "apb_pclk";
- port {
- etm_out: endpoint {
- remote-endpoint = <&etb_in>;
+ out-ports {
+ port {
+ etm_out: endpoint {
+ remote-endpoint = <&etb_in>;
+ };
};
};
};
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index 3ca8991..91bb50a 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -147,10 +147,11 @@

clocks = <&emu_src_ck>;
clock-names = "apb_pclk";
- port {
- etb_in: endpoint {
- slave-mode;
- remote-endpoint = <&etm_out>;
+ in-ports {
+ port {
+ etb_in: endpoint {
+ remote-endpoint = <&etm_out>;
+ };
};
};
};
@@ -161,9 +162,11 @@

clocks = <&emu_src_ck>;
clock-names = "apb_pclk";
- port {
- etm_out: endpoint {
- remote-endpoint = <&etb_in>;
+ out-ports {
+ port {
+ etm_out: endpoint {
+ remote-endpoint = <&etb_in>;
+ };
};
};
};
--
2.7.4


2018-09-11 10:19:22

by Suzuki K Poulose

[permalink] [raw]
Subject: [PATCH 06/11] dts: arm: imx7{d,s}: Update coresight binding for hardware ports

Switch to the updated coresight bindings.

Cc: Shawn Guo <[email protected]>
Cc: Sascha Hauer <[email protected]>
Cc: Pengutronix Kernel Team <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Mathieu Poirier <[email protected]>
Signed-off-by: Suzuki K Poulose <[email protected]>
---
arch/arm/boot/dts/imx7d.dtsi | 11 ++++---
arch/arm/boot/dts/imx7s.dtsi | 78 ++++++++++++++++++++++++++------------------
2 files changed, 53 insertions(+), 36 deletions(-)

diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
index 7cbc2ff..4ced17c 100644
--- a/arch/arm/boot/dts/imx7d.dtsi
+++ b/arch/arm/boot/dts/imx7d.dtsi
@@ -63,9 +63,11 @@
clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
clock-names = "apb_pclk";

- port {
- etm1_out_port: endpoint {
- remote-endpoint = <&ca_funnel_in_port1>;
+ out-ports {
+ port {
+ etm1_out_port: endpoint {
+ remote-endpoint = <&ca_funnel_in_port1>;
+ };
};
};
};
@@ -148,11 +150,10 @@
};
};

-&ca_funnel_ports {
+&ca_funnel_in_ports {
port@1 {
reg = <1>;
ca_funnel_in_port1: endpoint {
- slave-mode;
remote-endpoint = <&etm1_out_port>;
};
};
diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi
index a052198..9176885 100644
--- a/arch/arm/boot/dts/imx7s.dtsi
+++ b/arch/arm/boot/dts/imx7s.dtsi
@@ -106,7 +106,7 @@
*/
compatible = "arm,coresight-replicator";

- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;
/* replicator output ports */
@@ -123,12 +123,15 @@
remote-endpoint = <&etr_in_port>;
};
};
+ };

- /* replicator input port */
- port@2 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
replicator_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&etf_out_port>;
};
};
@@ -168,28 +171,31 @@
clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
clock-names = "apb_pclk";

- ca_funnel_ports: ports {
+ ca_funnel_in_ports: in-ports {
#address-cells = <1>;
#size-cells = <0>;

- /* funnel input ports */
port@0 {
reg = <0>;
ca_funnel_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&etm0_out_port>;
};
};

- /* funnel output port */
- port@2 {
+ /* the other input ports are not connect to anything */
+ };
+
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
ca_funnel_out_port0: endpoint {
remote-endpoint = <&hugo_funnel_in_port0>;
};
};

- /* the other input ports are not connect to anything */
};
};

@@ -200,9 +206,11 @@
clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
clock-names = "apb_pclk";

- port {
- etm0_out_port: endpoint {
- remote-endpoint = <&ca_funnel_in_port0>;
+ out-ports {
+ port {
+ etm0_out_port: endpoint {
+ remote-endpoint = <&ca_funnel_in_port0>;
+ };
};
};
};
@@ -213,15 +221,13 @@
clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
clock-names = "apb_pclk";

- ports {
+ in-ports {
#address-cells = <1>;
#size-cells = <0>;

- /* funnel input ports */
port@0 {
reg = <0>;
hugo_funnel_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&ca_funnel_out_port0>;
};
};
@@ -229,18 +235,22 @@
port@1 {
reg = <1>;
hugo_funnel_in_port1: endpoint {
- slave-mode; /* M4 input */
+ /* M4 input */
};
};
+ /* the other input ports are not connect to anything */
+ };

- port@2 {
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
hugo_funnel_out_port0: endpoint {
remote-endpoint = <&etf_in_port>;
};
};
-
- /* the other input ports are not connect to anything */
};
};

@@ -250,19 +260,23 @@
clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
clock-names = "apb_pclk";

- ports {
+ in-ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;
etf_in_port: endpoint {
- slave-mode;
remote-endpoint = <&hugo_funnel_out_port0>;
};
};
+ };

- port@1 {
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
etf_out_port: endpoint {
remote-endpoint = <&replicator_in_port0>;
@@ -277,10 +291,11 @@
clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
clock-names = "apb_pclk";

- port {
- etr_in_port: endpoint {
- slave-mode;
- remote-endpoint = <&replicator_out_port1>;
+ in-ports {
+ port {
+ etr_in_port: endpoint {
+ remote-endpoint = <&replicator_out_port1>;
+ };
};
};
};
@@ -291,10 +306,11 @@
clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
clock-names = "apb_pclk";

- port {
- tpiu_in_port: endpoint {
- slave-mode;
- remote-endpoint = <&replicator_out_port0>;
+ in-ports {
+ port {
+ tpiu_in_port: endpoint {
+ remote-endpoint = <&replicator_out_port0>;
+ };
};
};
};
--
2.7.4


2018-09-11 10:19:47

by Suzuki K Poulose

[permalink] [raw]
Subject: [PATCH 01/11] Documentation: dts: Update coresight binding examples

While we updated the coresight DT bindings, some of the
new examples were not updated due to the order in which they
were merged. Let us update all the missed out ones to the
new bindings to avoid confusion.

Cc: Mathieu Poirier <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Frank Rowand <[email protected]>
Signed-off-by: Suzuki K Poulose <[email protected]>
---
Documentation/devicetree/bindings/arm/coresight.txt | 20 +++++++++++++-------
1 file changed, 13 insertions(+), 7 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt
index f39d2c6..3b689e0 100644
--- a/Documentation/devicetree/bindings/arm/coresight.txt
+++ b/Documentation/devicetree/bindings/arm/coresight.txt
@@ -147,7 +147,7 @@ Example:

clocks = <&oscclk6a>;
clock-names = "apb_pclk";
- ports {
+ in-ports {
#address-cells = <1>;
#size-cells = <0>;

@@ -159,10 +159,15 @@ Example:
remote-endpoint = <&replicator2_out_port0>;
};
};
+ };
+
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;

/* CATU link represented by output port */
- port@1 {
- reg = <1>;
+ port@0 {
+ reg = <0>;
etr_out_port: endpoint {
remote-endpoint = <&catu_in_port>;
};
@@ -310,10 +315,11 @@ Example:
clock-names = "apb_pclk";

interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
- port {
- catu_in_port: endpoint {
- slave-mode;
- remote-endpoint = <&etr_out_port>;
+ in-ports {
+ port {
+ catu_in_port: endpoint {
+ remote-endpoint = <&etr_out_port>;
+ };
};
};
};
--
2.7.4


2018-09-11 10:19:55

by Suzuki K Poulose

[permalink] [raw]
Subject: [PATCH 10/11] dts: ste-dbx5x0: Update coresight bindings for hardware port

Switch to the new coresight bindings

Cc: Linus Walleij <[email protected]>
Cc: Mathieu Poirier <[email protected]>
Signed-off-by: Suzuki K Poulose <[email protected]>
---
arch/arm/boot/dts/ste-dbx5x0.dtsi | 61 ++++++++++++++++++++++-----------------
1 file changed, 35 insertions(+), 26 deletions(-)

diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi
index 2310a4e..b1d5d3e 100644
--- a/arch/arm/boot/dts/ste-dbx5x0.dtsi
+++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi
@@ -67,9 +67,11 @@
clocks = <&prcmu_clk PRCMU_APETRACECLK>, <&prcmu_clk PRCMU_APEATCLK>;
clock-names = "apb_pclk", "atclk";
cpu = <&CPU0>;
- port {
- ptm0_out_port: endpoint {
- remote-endpoint = <&funnel_in_port0>;
+ out-ports {
+ port {
+ ptm0_out_port: endpoint {
+ remote-endpoint = <&funnel_in_port0>;
+ };
};
};
};
@@ -81,9 +83,11 @@
clocks = <&prcmu_clk PRCMU_APETRACECLK>, <&prcmu_clk PRCMU_APEATCLK>;
clock-names = "apb_pclk", "atclk";
cpu = <&CPU1>;
- port {
- ptm1_out_port: endpoint {
- remote-endpoint = <&funnel_in_port1>;
+ out-ports {
+ port {
+ ptm1_out_port: endpoint {
+ remote-endpoint = <&funnel_in_port1>;
+ };
};
};
};
@@ -94,11 +98,10 @@

clocks = <&prcmu_clk PRCMU_APETRACECLK>, <&prcmu_clk PRCMU_APEATCLK>;
clock-names = "apb_pclk", "atclk";
- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;

- /* funnel output ports */
port@0 {
reg = <0>;
funnel_out_port: endpoint {
@@ -106,20 +109,22 @@
<&replicator_in_port0>;
};
};
+ };

- /* funnel input ports */
- port@1 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
funnel_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&ptm0_out_port>;
};
};

- port@2 {
+ port@1 {
reg = <1>;
funnel_in_port1: endpoint {
- slave-mode;
remote-endpoint = <&ptm1_out_port>;
};
};
@@ -131,11 +136,10 @@
clocks = <&prcmu_clk PRCMU_APEATCLK>;
clock-names = "atclk";

- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;

- /* replicator output ports */
port@0 {
reg = <0>;
replicator_out_port0: endpoint {
@@ -148,12 +152,15 @@
remote-endpoint = <&etb_in_port>;
};
};
+ };

- /* replicator input port */
- port@2 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
replicator_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&funnel_out_port>;
};
};
@@ -166,10 +173,11 @@

clocks = <&prcmu_clk PRCMU_APETRACECLK>, <&prcmu_clk PRCMU_APEATCLK>;
clock-names = "apb_pclk", "atclk";
- port {
- tpiu_in_port: endpoint {
- slave-mode;
- remote-endpoint = <&replicator_out_port0>;
+ in-ports {
+ port {
+ tpiu_in_port: endpoint {
+ remote-endpoint = <&replicator_out_port0>;
+ };
};
};
};
@@ -180,10 +188,11 @@

clocks = <&prcmu_clk PRCMU_APETRACECLK>, <&prcmu_clk PRCMU_APEATCLK>;
clock-names = "apb_pclk", "atclk";
- port {
- etb_in_port: endpoint {
- slave-mode;
- remote-endpoint = <&replicator_out_port1>;
+ in-ports {
+ port {
+ etb_in_port: endpoint {
+ remote-endpoint = <&replicator_out_port1>;
+ };
};
};
};
--
2.7.4


2018-09-11 10:20:21

by Suzuki K Poulose

[permalink] [raw]
Subject: [PATCH 09/11] dts: sama5d2: Update coresight bindings for hardware ports

Switch to the new coresight bindings for hardware ports

Cc: Nicolas Ferre <[email protected]>
Cc: Alexandre Belloni <[email protected]>
Cc: Mathieu Poirier <[email protected]>
Signed-off-by: Suzuki K Poulose <[email protected]>
---
arch/arm/boot/dts/sama5d2.dtsi | 17 ++++++++++-------
1 file changed, 10 insertions(+), 7 deletions(-)

diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 61f68e5..f0fd2b1 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -84,10 +84,11 @@
clocks = <&mck>;
clock-names = "apb_pclk";

- port {
- etb_in: endpoint {
- slave-mode;
- remote-endpoint = <&etm_out>;
+ in-ports {
+ port {
+ etb_in: endpoint {
+ remote-endpoint = <&etm_out>;
+ };
};
};
};
@@ -99,9 +100,11 @@
clocks = <&mck>;
clock-names = "apb_pclk";

- port {
- etm_out: endpoint {
- remote-endpoint = <&etb_in>;
+ out-ports {
+ port {
+ etm_out: endpoint {
+ remote-endpoint = <&etb_in>;
+ };
};
};
};
--
2.7.4


2018-09-11 10:20:52

by Suzuki K Poulose

[permalink] [raw]
Subject: [PATCH 05/11] dts: arm: hisilicon: Update coresight bindings for hardware ports

Switch to the new the hardware port bindings.

Cc: Wei Xu <[email protected]>
Cc: Mathieu Poirier <[email protected]>
Signed-off-by: Suzuki K Poulose <[email protected]>
---
arch/arm/boot/dts/hip04.dtsi | 322 ++++++++++++++++++++++++-------------------
1 file changed, 183 insertions(+), 139 deletions(-)

diff --git a/arch/arm/boot/dts/hip04.dtsi b/arch/arm/boot/dts/hip04.dtsi
index 44044f2..9ab1980 100644
--- a/arch/arm/boot/dts/hip04.dtsi
+++ b/arch/arm/boot/dts/hip04.dtsi
@@ -277,10 +277,11 @@

clocks = <&clk_375m>;
clock-names = "apb_pclk";
- port {
- etb0_in_port: endpoint@0 {
- slave-mode;
- remote-endpoint = <&replicator0_out_port0>;
+ in-ports {
+ port {
+ etb0_in_port: endpoint@0 {
+ remote-endpoint = <&replicator0_out_port0>;
+ };
};
};
};
@@ -291,10 +292,11 @@

clocks = <&clk_375m>;
clock-names = "apb_pclk";
- port {
- etb1_in_port: endpoint@0 {
- slave-mode;
- remote-endpoint = <&replicator1_out_port0>;
+ in-ports {
+ port {
+ etb1_in_port: endpoint@0 {
+ remote-endpoint = <&replicator1_out_port0>;
+ };
};
};
};
@@ -305,10 +307,11 @@

clocks = <&clk_375m>;
clock-names = "apb_pclk";
- port {
- etb2_in_port: endpoint@0 {
- slave-mode;
- remote-endpoint = <&replicator2_out_port0>;
+ in-ports {
+ port {
+ etb2_in_port: endpoint@0 {
+ remote-endpoint = <&replicator2_out_port0>;
+ };
};
};
};
@@ -319,10 +322,11 @@

clocks = <&clk_375m>;
clock-names = "apb_pclk";
- port {
- etb3_in_port: endpoint@0 {
- slave-mode;
- remote-endpoint = <&replicator3_out_port0>;
+ in-ports {
+ port {
+ etb3_in_port: endpoint@0 {
+ remote-endpoint = <&replicator3_out_port0>;
+ };
};
};
};
@@ -333,10 +337,11 @@

clocks = <&clk_375m>;
clock-names = "apb_pclk";
- port {
- tpiu_in_port: endpoint@0 {
- slave-mode;
- remote-endpoint = <&funnel4_out_port0>;
+ in-ports {
+ port {
+ tpiu_in_port: endpoint@0 {
+ remote-endpoint = <&funnel4_out_port0>;
+ };
};
};
};
@@ -347,7 +352,7 @@
*/
compatible = "arm,coresight-replicator";

- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;

@@ -365,12 +370,16 @@
remote-endpoint = <&funnel4_in_port0>;
};
};
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;

/* replicator input port */
- port@2 {
+ port@0 {
reg = <0>;
replicator0_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&funnel0_out_port0>;
};
};
@@ -383,7 +392,7 @@
*/
compatible = "arm,coresight-replicator";

- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;

@@ -401,12 +410,16 @@
remote-endpoint = <&funnel4_in_port1>;
};
};
+ };
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;

/* replicator input port */
- port@2 {
+ port@0 {
reg = <0>;
replicator1_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&funnel1_out_port0>;
};
};
@@ -419,11 +432,10 @@
*/
compatible = "arm,coresight-replicator";

- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;

- /* replicator output ports */
port@0 {
reg = <0>;
replicator2_out_port0: endpoint {
@@ -437,12 +449,15 @@
remote-endpoint = <&funnel4_in_port2>;
};
};
+ };

- /* replicator input port */
- port@2 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
replicator2_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&funnel2_out_port0>;
};
};
@@ -455,11 +470,10 @@
*/
compatible = "arm,coresight-replicator";

- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;

- /* replicator output ports */
port@0 {
reg = <0>;
replicator3_out_port0: endpoint {
@@ -473,12 +487,15 @@
remote-endpoint = <&funnel4_in_port3>;
};
};
+ };

- /* replicator input port */
- port@2 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
replicator3_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&funnel3_out_port0>;
};
};
@@ -491,11 +508,10 @@

clocks = <&clk_375m>;
clock-names = "apb_pclk";
- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;

- /* funnel output port */
port@0 {
reg = <0>;
funnel0_out_port0: endpoint {
@@ -503,36 +519,36 @@
<&replicator0_in_port0>;
};
};
+ };

- /* funnel input ports */
- port@1 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
funnel0_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&ptm0_out_port>;
};
};

- port@2 {
+ port@1 {
reg = <1>;
funnel0_in_port1: endpoint {
- slave-mode;
remote-endpoint = <&ptm1_out_port>;
};
};

- port@3 {
+ port@2 {
reg = <2>;
funnel0_in_port2: endpoint {
- slave-mode;
remote-endpoint = <&ptm2_out_port>;
};
};

- port@4 {
+ port@3 {
reg = <3>;
funnel0_in_port3: endpoint {
- slave-mode;
remote-endpoint = <&ptm3_out_port>;
};
};
@@ -545,11 +561,10 @@

clocks = <&clk_375m>;
clock-names = "apb_pclk";
- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;

- /* funnel output port */
port@0 {
reg = <0>;
funnel1_out_port0: endpoint {
@@ -557,36 +572,36 @@
<&replicator1_in_port0>;
};
};
+ };

- /* funnel input ports */
- port@1 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
funnel1_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&ptm4_out_port>;
};
};

- port@2 {
+ port@1 {
reg = <1>;
funnel1_in_port1: endpoint {
- slave-mode;
remote-endpoint = <&ptm5_out_port>;
};
};

- port@3 {
+ port@2 {
reg = <2>;
funnel1_in_port2: endpoint {
- slave-mode;
remote-endpoint = <&ptm6_out_port>;
};
};

- port@4 {
+ port@3 {
reg = <3>;
funnel1_in_port3: endpoint {
- slave-mode;
remote-endpoint = <&ptm7_out_port>;
};
};
@@ -599,11 +614,10 @@

clocks = <&clk_375m>;
clock-names = "apb_pclk";
- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;

- /* funnel output port */
port@0 {
reg = <0>;
funnel2_out_port0: endpoint {
@@ -611,36 +625,36 @@
<&replicator2_in_port0>;
};
};
+ };

- /* funnel input ports */
- port@1 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
funnel2_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&ptm8_out_port>;
};
};

- port@2 {
+ port@1 {
reg = <1>;
funnel2_in_port1: endpoint {
- slave-mode;
remote-endpoint = <&ptm9_out_port>;
};
};

- port@3 {
+ port@2 {
reg = <2>;
funnel2_in_port2: endpoint {
- slave-mode;
remote-endpoint = <&ptm10_out_port>;
};
};

- port@4 {
+ port@3 {
reg = <3>;
funnel2_in_port3: endpoint {
- slave-mode;
remote-endpoint = <&ptm11_out_port>;
};
};
@@ -653,11 +667,10 @@

clocks = <&clk_375m>;
clock-names = "apb_pclk";
- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;

- /* funnel output port */
port@0 {
reg = <0>;
funnel3_out_port0: endpoint {
@@ -665,36 +678,36 @@
<&replicator3_in_port0>;
};
};
+ };

- /* funnel input ports */
- port@1 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
funnel3_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&ptm12_out_port>;
};
};

- port@2 {
+ port@1 {
reg = <1>;
funnel3_in_port1: endpoint {
- slave-mode;
remote-endpoint = <&ptm13_out_port>;
};
};

- port@3 {
+ port@2 {
reg = <2>;
funnel3_in_port2: endpoint {
- slave-mode;
remote-endpoint = <&ptm14_out_port>;
};
};

- port@4 {
+ port@3 {
reg = <3>;
funnel3_in_port3: endpoint {
- slave-mode;
remote-endpoint = <&ptm15_out_port>;
};
};
@@ -707,50 +720,49 @@

clocks = <&clk_375m>;
clock-names = "apb_pclk";
- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;

- /* funnel output port */
port@0 {
reg = <0>;
funnel4_out_port0: endpoint {
remote-endpoint = <&tpiu_in_port>;
};
};
+ };

- /* funnel input ports */
- port@1 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
funnel4_in_port0: endpoint {
- slave-mode;
remote-endpoint =
<&replicator0_out_port1>;
};
};

- port@2 {
+ port@1 {
reg = <1>;
funnel4_in_port1: endpoint {
- slave-mode;
remote-endpoint =
<&replicator1_out_port1>;
};
};

- port@3 {
+ port@2 {
reg = <2>;
funnel4_in_port2: endpoint {
- slave-mode;
remote-endpoint =
<&replicator2_out_port1>;
};
};

- port@4 {
+ port@3 {
reg = <3>;
funnel4_in_port3: endpoint {
- slave-mode;
remote-endpoint =
<&replicator3_out_port1>;
};
@@ -765,9 +777,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU0>;
- port {
- ptm0_out_port: endpoint {
- remote-endpoint = <&funnel0_in_port0>;
+ out-ports {
+ port {
+ ptm0_out_port: endpoint {
+ remote-endpoint = <&funnel0_in_port0>;
+ };
};
};
};
@@ -779,9 +793,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU1>;
- port {
- ptm1_out_port: endpoint {
- remote-endpoint = <&funnel0_in_port1>;
+ out-ports {
+ port {
+ ptm1_out_port: endpoint {
+ remote-endpoint = <&funnel0_in_port1>;
+ };
};
};
};
@@ -793,9 +809,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU2>;
- port {
- ptm2_out_port: endpoint {
- remote-endpoint = <&funnel0_in_port2>;
+ out-ports {
+ port {
+ ptm2_out_port: endpoint {
+ remote-endpoint = <&funnel0_in_port2>;
+ };
};
};
};
@@ -807,9 +825,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU3>;
- port {
- ptm3_out_port: endpoint {
- remote-endpoint = <&funnel0_in_port3>;
+ out-ports {
+ port {
+ ptm3_out_port: endpoint {
+ remote-endpoint = <&funnel0_in_port3>;
+ };
};
};
};
@@ -821,9 +841,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU4>;
- port {
- ptm4_out_port: endpoint {
- remote-endpoint = <&funnel1_in_port0>;
+ out-ports {
+ port {
+ ptm4_out_port: endpoint {
+ remote-endpoint = <&funnel1_in_port0>;
+ };
};
};
};
@@ -835,9 +857,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU5>;
- port {
- ptm5_out_port: endpoint {
- remote-endpoint = <&funnel1_in_port1>;
+ out-ports {
+ port {
+ ptm5_out_port: endpoint {
+ remote-endpoint = <&funnel1_in_port1>;
+ };
};
};
};
@@ -849,9 +873,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU6>;
- port {
- ptm6_out_port: endpoint {
- remote-endpoint = <&funnel1_in_port2>;
+ out-ports {
+ port {
+ ptm6_out_port: endpoint {
+ remote-endpoint = <&funnel1_in_port2>;
+ };
};
};
};
@@ -863,9 +889,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU7>;
- port {
- ptm7_out_port: endpoint {
- remote-endpoint = <&funnel1_in_port3>;
+ out-ports {
+ port {
+ ptm7_out_port: endpoint {
+ remote-endpoint = <&funnel1_in_port3>;
+ };
};
};
};
@@ -877,9 +905,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU8>;
- port {
- ptm8_out_port: endpoint {
- remote-endpoint = <&funnel2_in_port0>;
+ out-ports {
+ port {
+ ptm8_out_port: endpoint {
+ remote-endpoint = <&funnel2_in_port0>;
+ };
};
};
};
@@ -890,9 +920,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU9>;
- port {
- ptm9_out_port: endpoint {
- remote-endpoint = <&funnel2_in_port1>;
+ out-ports {
+ port {
+ ptm9_out_port: endpoint {
+ remote-endpoint = <&funnel2_in_port1>;
+ };
};
};
};
@@ -904,9 +936,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU10>;
- port {
- ptm10_out_port: endpoint {
- remote-endpoint = <&funnel2_in_port2>;
+ out-ports {
+ port {
+ ptm10_out_port: endpoint {
+ remote-endpoint = <&funnel2_in_port2>;
+ };
};
};
};
@@ -918,9 +952,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU11>;
- port {
- ptm11_out_port: endpoint {
- remote-endpoint = <&funnel2_in_port3>;
+ out-ports {
+ port {
+ ptm11_out_port: endpoint {
+ remote-endpoint = <&funnel2_in_port3>;
+ };
};
};
};
@@ -932,9 +968,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU12>;
- port {
- ptm12_out_port: endpoint {
- remote-endpoint = <&funnel3_in_port0>;
+ out-ports {
+ port {
+ ptm12_out_port: endpoint {
+ remote-endpoint = <&funnel3_in_port0>;
+ };
};
};
};
@@ -946,9 +984,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU13>;
- port {
- ptm13_out_port: endpoint {
- remote-endpoint = <&funnel3_in_port1>;
+ out-ports {
+ port {
+ ptm13_out_port: endpoint {
+ remote-endpoint = <&funnel3_in_port1>;
+ };
};
};
};
@@ -960,9 +1000,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU14>;
- port {
- ptm14_out_port: endpoint {
- remote-endpoint = <&funnel3_in_port2>;
+ out-ports {
+ port {
+ ptm14_out_port: endpoint {
+ remote-endpoint = <&funnel3_in_port2>;
+ };
};
};
};
@@ -974,9 +1016,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU15>;
- port {
- ptm15_out_port: endpoint {
- remote-endpoint = <&funnel3_in_port3>;
+ out-ports {
+ port {
+ ptm15_out_port: endpoint {
+ remote-endpoint = <&funnel3_in_port3>;
+ };
};
};
};
--
2.7.4


2018-09-11 17:02:04

by Sudeep Holla

[permalink] [raw]
Subject: Re: [PATCH 11/11] dts: tc2: Update coresight bindings for hardware ports

On Tue, Sep 11, 2018 at 11:17:12AM +0100, Suzuki K Poulose wrote:
> Switch to the new coresight bindings
>

I still see the below warnings:

vexpress-v2p-ca15_a7.dtb: Warning (graph_child_address):
/replicator/in-ports: graph node has single child node 'port@0',
#address-cells/#size-cells are not necessary
vexpress-v2p-ca15_a7.dtb: Warning (graph_child_address):
/funnel@20040000/out-ports: graph node has single child node 'port@0',
#address-cells/#size-cells are not necessary

I need the below patch to fix them, let me know if it looks OK, I can
amend and apply.

Regards,
Sudeep

-->8

diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
index 3a5090616bc6..8b926c30ccd1 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
@@ -443,11 +443,7 @@
};

in-ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
+ port {
replicator_in_port0: endpoint {
remote-endpoint = <&funnel_out_port0>;
};
@@ -462,11 +458,7 @@
clocks = <&oscclk6a>;
clock-names = "apb_pclk";
out-ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
+ port {
funnel_out_port0: endpoint {
remote-endpoint =
<&replicator_in_port0>;

2018-09-11 17:15:26

by Suzuki K Poulose

[permalink] [raw]
Subject: Re: [PATCH 11/11] dts: tc2: Update coresight bindings for hardware ports

On 09/11/2018 06:01 PM, Sudeep Holla wrote:
> On Tue, Sep 11, 2018 at 11:17:12AM +0100, Suzuki K Poulose wrote:
>> Switch to the new coresight bindings
>>
>
> I still see the below warnings:
>
> vexpress-v2p-ca15_a7.dtb: Warning (graph_child_address):
> /replicator/in-ports: graph node has single child node 'port@0',
> #address-cells/#size-cells are not necessary
> vexpress-v2p-ca15_a7.dtb: Warning (graph_child_address):
> /funnel@20040000/out-ports: graph node has single child node 'port@0',
> #address-cells/#size-cells are not necessary
>
> I need the below patch to fix them, let me know if it looks OK, I can
> amend and apply.

Thanks for reporting. I purposefully added the "address-cells" and
followed the format everywhere in the series thinking that, that is
indeed the formal way of doing it, rather than having implicit port
numbers. I can send an updated series fixing it everywhere.

Regards
Suzuki


>
> Regards,
> Sudeep
>
> -->8
>
> diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
> index 3a5090616bc6..8b926c30ccd1 100644
> --- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
> +++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
> @@ -443,11 +443,7 @@
> };
>
> in-ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> + port {
> replicator_in_port0: endpoint {
> remote-endpoint = <&funnel_out_port0>;
> };
> @@ -462,11 +458,7 @@
> clocks = <&oscclk6a>;
> clock-names = "apb_pclk";
> out-ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> + port {
> funnel_out_port0: endpoint {
> remote-endpoint =
> <&replicator_in_port0>;
>


2018-09-11 17:24:03

by Sudeep Holla

[permalink] [raw]
Subject: Re: [PATCH 11/11] dts: tc2: Update coresight bindings for hardware ports



On 11/09/18 18:15, Suzuki K Poulose wrote:
> On 09/11/2018 06:01 PM, Sudeep Holla wrote:
>> On Tue, Sep 11, 2018 at 11:17:12AM +0100, Suzuki K Poulose wrote:
>>> Switch to the new coresight bindings
>>>
>>
>> I still see the below warnings:
>>
>> vexpress-v2p-ca15_a7.dtb: Warning (graph_child_address):
>>     /replicator/in-ports: graph node has single child node 'port@0',
>>     #address-cells/#size-cells are not necessary
>> vexpress-v2p-ca15_a7.dtb: Warning (graph_child_address):
>>     /funnel@20040000/out-ports: graph node has single child node
>> 'port@0',
>>     #address-cells/#size-cells are not necessary
>>
>> I need the below patch to fix them, let me know if it looks OK, I can
>> amend and apply.
>
> Thanks for reporting. I purposefully added the "address-cells" and
> followed the format everywhere in the series thinking that, that is
> indeed the formal way of doing it, rather than having implicit port
> numbers. I can send an updated series fixing it everywhere.
>
No need to post the update for TC2 unless it's different from what I
have proposed.

--
Regards,
Sudeep

2018-09-11 17:32:07

by Suzuki K Poulose

[permalink] [raw]
Subject: Re: [PATCH 11/11] dts: tc2: Update coresight bindings for hardware ports

On 09/11/2018 06:23 PM, Sudeep Holla wrote:
>
>
> On 11/09/18 18:15, Suzuki K Poulose wrote:
>> On 09/11/2018 06:01 PM, Sudeep Holla wrote:
>>> On Tue, Sep 11, 2018 at 11:17:12AM +0100, Suzuki K Poulose wrote:
>>>> Switch to the new coresight bindings
>>>>
>>>
>>> I still see the below warnings:
>>>
>>> vexpress-v2p-ca15_a7.dtb: Warning (graph_child_address):
>>>     /replicator/in-ports: graph node has single child node 'port@0',
>>>     #address-cells/#size-cells are not necessary
>>> vexpress-v2p-ca15_a7.dtb: Warning (graph_child_address):
>>>     /funnel@20040000/out-ports: graph node has single child node
>>> 'port@0',
>>>     #address-cells/#size-cells are not necessary
>>>
>>> I need the below patch to fix them, let me know if it looks OK, I can
>>> amend and apply.
>>
>> Thanks for reporting. I purposefully added the "address-cells" and
>> followed the format everywhere in the series thinking that, that is
>> indeed the formal way of doing it, rather than having implicit port
>> numbers. I can send an updated series fixing it everywhere.
>>
> No need to post the update for TC2 unless it's different from what I
> have proposed.
>

Yes, the changes look good. Thanks Sudeep. I will drop this patch from
the next version then.

Btw, my kernel build didn't trigger those warnings.

Thanks
Suzuki


2018-09-11 21:22:55

by Suzuki K Poulose

[permalink] [raw]
Subject: Re: [PATCH 00/11] dts: Update coresight device tree bindings

On 09/11/2018 11:17 AM, Suzuki K Poulose wrote:
> Coresight DT bindings have been updated to obey the DTS rules
> for label/address matching for graph nodes. The changes are in
> coresight/next tree scheduled for v4.20. This series updates the
> in kernel dts to match the new bindings along with updating a couple
> of new examples (e.,g CATU) in the Documentation (which were missed
> as they were still in flight when we created the series).
>
> Please note that this should not be pulled for v4.19, which I assume
> is a safe assumption. But please do pull it for v4.20.
> The dt updates for the Juno boards were sent earlier with the original
> DT update series and has been queued for v4.20.
>
> Applies on coresight/next (which is based on v4.19) and should apply
> cleanly on v4.19-rc3.
>

All,

There are some additional warnings triggered by this series, as reported
by Sudeep [0]. I intend to fix the warnings and send and updated version
soon. So kindly ignore this thread. Apologies.

[0]
http://lists.infradead.org/pipermail/linux-arm-kernel/2018-September/601121.html

Suzuki

2018-09-12 02:24:42

by Shawn Guo

[permalink] [raw]
Subject: Re: [PATCH 06/11] dts: arm: imx7{d,s}: Update coresight binding for hardware ports

On Tue, Sep 11, 2018 at 11:17:07AM +0100, Suzuki K Poulose wrote:
> Switch to the updated coresight bindings.
>
> Cc: Shawn Guo <[email protected]>
> Cc: Sascha Hauer <[email protected]>
> Cc: Pengutronix Kernel Team <[email protected]>
> Cc: Fabio Estevam <[email protected]>
> Cc: Mathieu Poirier <[email protected]>
> Signed-off-by: Suzuki K Poulose <[email protected]>

As per the convention we use for subject prefix, I suggest you use

'ARM: dts: imx7: ...'

Shawn

> ---
> arch/arm/boot/dts/imx7d.dtsi | 11 ++++---
> arch/arm/boot/dts/imx7s.dtsi | 78 ++++++++++++++++++++++++++------------------
> 2 files changed, 53 insertions(+), 36 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
> index 7cbc2ff..4ced17c 100644
> --- a/arch/arm/boot/dts/imx7d.dtsi
> +++ b/arch/arm/boot/dts/imx7d.dtsi
> @@ -63,9 +63,11 @@
> clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
> clock-names = "apb_pclk";
>
> - port {
> - etm1_out_port: endpoint {
> - remote-endpoint = <&ca_funnel_in_port1>;
> + out-ports {
> + port {
> + etm1_out_port: endpoint {
> + remote-endpoint = <&ca_funnel_in_port1>;
> + };
> };
> };
> };
> @@ -148,11 +150,10 @@
> };
> };
>
> -&ca_funnel_ports {
> +&ca_funnel_in_ports {
> port@1 {
> reg = <1>;
> ca_funnel_in_port1: endpoint {
> - slave-mode;
> remote-endpoint = <&etm1_out_port>;
> };
> };
> diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi
> index a052198..9176885 100644
> --- a/arch/arm/boot/dts/imx7s.dtsi
> +++ b/arch/arm/boot/dts/imx7s.dtsi
> @@ -106,7 +106,7 @@
> */
> compatible = "arm,coresight-replicator";
>
> - ports {
> + out-ports {
> #address-cells = <1>;
> #size-cells = <0>;
> /* replicator output ports */
> @@ -123,12 +123,15 @@
> remote-endpoint = <&etr_in_port>;
> };
> };
> + };
>
> - /* replicator input port */
> - port@2 {
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> reg = <0>;
> replicator_in_port0: endpoint {
> - slave-mode;
> remote-endpoint = <&etf_out_port>;
> };
> };
> @@ -168,28 +171,31 @@
> clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
> clock-names = "apb_pclk";
>
> - ca_funnel_ports: ports {
> + ca_funnel_in_ports: in-ports {
> #address-cells = <1>;
> #size-cells = <0>;
>
> - /* funnel input ports */
> port@0 {
> reg = <0>;
> ca_funnel_in_port0: endpoint {
> - slave-mode;
> remote-endpoint = <&etm0_out_port>;
> };
> };
>
> - /* funnel output port */
> - port@2 {
> + /* the other input ports are not connect to anything */
> + };
> +
> + out-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> reg = <0>;
> ca_funnel_out_port0: endpoint {
> remote-endpoint = <&hugo_funnel_in_port0>;
> };
> };
>
> - /* the other input ports are not connect to anything */
> };
> };
>
> @@ -200,9 +206,11 @@
> clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
> clock-names = "apb_pclk";
>
> - port {
> - etm0_out_port: endpoint {
> - remote-endpoint = <&ca_funnel_in_port0>;
> + out-ports {
> + port {
> + etm0_out_port: endpoint {
> + remote-endpoint = <&ca_funnel_in_port0>;
> + };
> };
> };
> };
> @@ -213,15 +221,13 @@
> clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
> clock-names = "apb_pclk";
>
> - ports {
> + in-ports {
> #address-cells = <1>;
> #size-cells = <0>;
>
> - /* funnel input ports */
> port@0 {
> reg = <0>;
> hugo_funnel_in_port0: endpoint {
> - slave-mode;
> remote-endpoint = <&ca_funnel_out_port0>;
> };
> };
> @@ -229,18 +235,22 @@
> port@1 {
> reg = <1>;
> hugo_funnel_in_port1: endpoint {
> - slave-mode; /* M4 input */
> + /* M4 input */
> };
> };
> + /* the other input ports are not connect to anything */
> + };
>
> - port@2 {
> + out-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> reg = <0>;
> hugo_funnel_out_port0: endpoint {
> remote-endpoint = <&etf_in_port>;
> };
> };
> -
> - /* the other input ports are not connect to anything */
> };
> };
>
> @@ -250,19 +260,23 @@
> clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
> clock-names = "apb_pclk";
>
> - ports {
> + in-ports {
> #address-cells = <1>;
> #size-cells = <0>;
>
> port@0 {
> reg = <0>;
> etf_in_port: endpoint {
> - slave-mode;
> remote-endpoint = <&hugo_funnel_out_port0>;
> };
> };
> + };
>
> - port@1 {
> + out-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> reg = <0>;
> etf_out_port: endpoint {
> remote-endpoint = <&replicator_in_port0>;
> @@ -277,10 +291,11 @@
> clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
> clock-names = "apb_pclk";
>
> - port {
> - etr_in_port: endpoint {
> - slave-mode;
> - remote-endpoint = <&replicator_out_port1>;
> + in-ports {
> + port {
> + etr_in_port: endpoint {
> + remote-endpoint = <&replicator_out_port1>;
> + };
> };
> };
> };
> @@ -291,10 +306,11 @@
> clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
> clock-names = "apb_pclk";
>
> - port {
> - tpiu_in_port: endpoint {
> - slave-mode;
> - remote-endpoint = <&replicator_out_port0>;
> + in-ports {
> + port {
> + tpiu_in_port: endpoint {
> + remote-endpoint = <&replicator_out_port0>;
> + };
> };
> };
> };
> --
> 2.7.4
>

2018-09-12 08:29:03

by Suzuki K Poulose

[permalink] [raw]
Subject: Re: [PATCH 06/11] dts: arm: imx7{d,s}: Update coresight binding for hardware ports

On 12/09/18 03:21, Shawn Guo wrote:
> On Tue, Sep 11, 2018 at 11:17:07AM +0100, Suzuki K Poulose wrote:
>> Switch to the updated coresight bindings.
>>
>> Cc: Shawn Guo <[email protected]>
>> Cc: Sascha Hauer <[email protected]>
>> Cc: Pengutronix Kernel Team <[email protected]>
>> Cc: Fabio Estevam <[email protected]>
>> Cc: Mathieu Poirier <[email protected]>
>> Signed-off-by: Suzuki K Poulose <[email protected]>
>
> As per the convention we use for subject prefix, I suggest you use
>
> 'ARM: dts: imx7: ...'

Shawn

Thanks for the suggestion. As I mentioned in the reply to the cover letter, I
will update the series with this addressed.

Thanks
Suzuki

2018-09-12 10:19:22

by Leo Yan

[permalink] [raw]
Subject: Re: [PATCH 04/11] dts: qcom: Update coresight bindings for hardware ports

Hi Suzuki,

On Tue, Sep 11, 2018 at 11:17:05AM +0100, Suzuki K Poulose wrote:
> Switch to updated coresight bindings for hw ports
>
> Cc: Andy Gross <[email protected]>
> Cc: David Brown <[email protected]>
> Cc: Ivan T. Ivanov <[email protected]>
> Cc: Mathieu Poirier <[email protected]>
> Signed-off-by: Suzuki K Poulose <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/msm8916.dtsi | 98 ++++++++++++++++++++++-------------
> 1 file changed, 63 insertions(+), 35 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> index 7b32b89..5bed52b 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> @@ -1099,10 +1099,11 @@
> clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> clock-names = "apb_pclk", "atclk";
>
> - port {
> - tpiu_in: endpoint {
> - slave-mode;
> - remote-endpoint = <&replicator_out1>;
> + out-ports {

Here should be in-ports for tpiu node?

BTW, if upper comment is valid, this means the DT binding doc also
gives wrong example for tpiu node [1].

I tested this patch with upper changing to 'in-ports', etm with perf
mode can work well on DB410c board.

[...]

Thanks,
Leo Yan

[1] https://git.linaro.org/kernel/coresight.git/tree/Documentation/devicetree/bindings/arm/coresight.txt?h=next#n135

2018-09-12 10:31:46

by Suzuki K Poulose

[permalink] [raw]
Subject: Re: [PATCH 04/11] dts: qcom: Update coresight bindings for hardware ports

Hi Leo,

On 12/09/18 11:17, [email protected] wrote:
> Hi Suzuki,
>
> On Tue, Sep 11, 2018 at 11:17:05AM +0100, Suzuki K Poulose wrote:
>> Switch to updated coresight bindings for hw ports
>>
>> Cc: Andy Gross <[email protected]>
>> Cc: David Brown <[email protected]>
>> Cc: Ivan T. Ivanov <[email protected]>
>> Cc: Mathieu Poirier <[email protected]>
>> Signed-off-by: Suzuki K Poulose <[email protected]>
>> ---
>> arch/arm64/boot/dts/qcom/msm8916.dtsi | 98 ++++++++++++++++++++++-------------
>> 1 file changed, 63 insertions(+), 35 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
>> index 7b32b89..5bed52b 100644
>> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
>> @@ -1099,10 +1099,11 @@
>> clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
>> clock-names = "apb_pclk", "atclk";
>>
>> - port {
>> - tpiu_in: endpoint {
>> - slave-mode;
>> - remote-endpoint = <&replicator_out1>;
>> + out-ports {
>
> Here should be in-ports for tpiu node?
>
> BTW, if upper comment is valid, this means the DT binding doc also
> gives wrong example for tpiu node [1].

You are right on both counts.

>
> I tested this patch with upper changing to 'in-ports', etm with perf
> mode can work well on DB410c board.
>

Thanks a lot for the testing. I will fix both the problems.

Suzuki

2018-09-12 10:48:18

by Leo Yan

[permalink] [raw]
Subject: Re: [PATCH 02/11] dts: hisilicon: Update coresight bindings for hardware ports

On Tue, Sep 11, 2018 at 11:17:03AM +0100, Suzuki K Poulose wrote:
> Switch to updated coresight bindings for hw ports.

As Shawn suggested, please change subject as "arm64: dts: hi6220:
...."

> Cc: [email protected]
> Cc: [email protected]
> Cc: Mathieu Poirier <[email protected]>
> Signed-off-by: Suzuki K Poulose <[email protected]>
> ---
> .../arm64/boot/dts/hisilicon/hi6220-coresight.dtsi | 147 ++++++++++++---------
> 1 file changed, 85 insertions(+), 62 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi
> index 7afee5d..2202816 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi

[...]

> @@ -302,10 +315,12 @@
>
> cpu = <&cpu3>;
>
> - port {
> - etm3_out: endpoint {
> - remote-endpoint =
> - <&acpu_funnel_in3>;
> + out-ports {
> + port {
> + etm3_out: endpoint {
> + remote-endpoint =
> + <&acpu_funnel_in3>;
> + };
> };
> };
> };
> @@ -319,10 +334,12 @@
>
> cpu = <&cpu4>;
>
> - port {
> + out-ports {
> + port {
> etm4_out: endpoint {

Indent?

After applied this patch and tested on Hikey board; FWIW:

Tested-by: Leo Yan <[email protected]>

> - remote-endpoint =
> - <&acpu_funnel_in4>;
> + remote-endpoint =
> + <&acpu_funnel_in4>;
> + };
> };
> };
> };
> @@ -336,10 +353,12 @@
>
> cpu = <&cpu5>;
>
> - port {
> - etm5_out: endpoint {
> - remote-endpoint =
> - <&acpu_funnel_in5>;
> + out-ports {
> + port {
> + etm5_out: endpoint {
> + remote-endpoint =
> + <&acpu_funnel_in5>;
> + };
> };
> };
> };
> @@ -353,10 +372,12 @@
>
> cpu = <&cpu6>;
>
> - port {
> - etm6_out: endpoint {
> - remote-endpoint =
> - <&acpu_funnel_in6>;
> + out-ports {
> + port {
> + etm6_out: endpoint {
> + remote-endpoint =
> + <&acpu_funnel_in6>;
> + };
> };
> };
> };
> @@ -370,10 +391,12 @@
>
> cpu = <&cpu7>;
>
> - port {
> - etm7_out: endpoint {
> - remote-endpoint =
> - <&acpu_funnel_in7>;
> + out-ports {
> + port {
> + etm7_out: endpoint {
> + remote-endpoint =
> + <&acpu_funnel_in7>;
> + };
> };
> };
> };
> --
> 2.7.4
>

2018-09-12 12:42:36

by Suzuki K Poulose

[permalink] [raw]
Subject: Re: [PATCH 02/11] dts: hisilicon: Update coresight bindings for hardware ports

Hi Leo,

On 12/09/18 11:47, [email protected] wrote:
> On Tue, Sep 11, 2018 at 11:17:03AM +0100, Suzuki K Poulose wrote:
>> Switch to updated coresight bindings for hw ports.
>
> As Shawn suggested, please change subject as "arm64: dts: hi6220:
> ...."
>

Sure, will do.

>> Cc: [email protected]
>> Cc: [email protected]
>> Cc: Mathieu Poirier <[email protected]>
>> Signed-off-by: Suzuki K Poulose <[email protected]>
>> ---
>> .../arm64/boot/dts/hisilicon/hi6220-coresight.dtsi | 147 ++++++++++++---------
>> 1 file changed, 85 insertions(+), 62 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi
>> index 7afee5d..2202816 100644
>> --- a/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi
>> +++ b/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi
>
> [...]
>
>> @@ -302,10 +315,12 @@
>>
>> cpu = <&cpu3>;
>>
>> - port {
>> - etm3_out: endpoint {
>> - remote-endpoint =
>> - <&acpu_funnel_in3>;
>> + out-ports {
>> + port {
>> + etm3_out: endpoint {
>> + remote-endpoint =
>> + <&acpu_funnel_in3>;
>> + };
>> };
>> };
>> };
>> @@ -319,10 +334,12 @@
>>
>> cpu = <&cpu4>;
>>
>> - port {
>> + out-ports {
>> + port {
>> etm4_out: endpoint {
>
> Indent?

Yes, I have fixed this locally for v2.

>
> After applied this patch and tested on Hikey board; FWIW:
>
> Tested-by: Leo Yan <[email protected]>

Thanks for the testing !

Cheers
Suzuki