The patch series enable the USB host and devie functions on Jetson AGX Orin
and depend on the following change
https://lore.kernel.org/all/[email protected]/
Sing-Han Chen (3):
phy: tegra: xusb: Add Tegra234 support
usb: host: xhci-tegra: Add Tegra234 XHCI support
usb: gadget: tegra-xudc: Add Tegra234 support
Wayne Chang (8):
dt-bindings: usb: tegra-xudc: Add Tegra234 XUSB controller support
dt-bindings: usb: Add NVIDIA Tegra XUSB host controller binding
dt-bindings: usb: Add binding for Cypress cypd4226 I2C driver
arm64: tegra: Enable XUSB host and device on Jetson AGX Orin
usb: typec: ucsi_ccg: Add OF support
usb: typec: ucsi_ccg: Replace ccgx to well-known regex
i2c: nvidia-gpu: Replace ccgx to well-known regex
phy: tegra: xusb: Disable trk clk when not using
.../bindings/usb/cypress,cypd4226.yaml | 86 ++++++
.../bindings/usb/nvidia,tegra-xhci.yaml | 213 ++++++++++++++
.../bindings/usb/nvidia,tegra-xudc.yaml | 24 +-
.../boot/dts/nvidia/tegra234-p3701-0000.dtsi | 48 +++
.../nvidia/tegra234-p3737-0000+p3701-0000.dts | 184 ++++++++++++
arch/arm64/boot/dts/nvidia/tegra234.dtsi | 170 +++++++++++
drivers/i2c/busses/i2c-nvidia-gpu.c | 2 +-
drivers/phy/tegra/Makefile | 1 +
drivers/phy/tegra/xusb-tegra186.c | 65 +++-
drivers/phy/tegra/xusb.c | 6 +
drivers/phy/tegra/xusb.h | 23 ++
drivers/usb/gadget/udc/tegra-xudc.c | 17 ++
drivers/usb/host/xhci-tegra.c | 277 +++++++++++++++---
drivers/usb/typec/ucsi/ucsi_ccg.c | 11 +-
14 files changed, 1074 insertions(+), 53 deletions(-)
create mode 100644 Documentation/devicetree/bindings/usb/cypress,cypd4226.yaml
create mode 100644 Documentation/devicetree/bindings/usb/nvidia,tegra-xhci.yaml
base-commit: 247f34f7b80357943234f93f247a1ae6b6c3a740
--
2.25.1
This commit enables XUSB host, device, and pad controller on
Jetson AGX Orin.
Signed-off-by: Wayne Chang <[email protected]>
---
.../boot/dts/nvidia/tegra234-p3701-0000.dtsi | 48 +++++
.../nvidia/tegra234-p3737-0000+p3701-0000.dts | 184 ++++++++++++++++++
arch/arm64/boot/dts/nvidia/tegra234.dtsi | 170 ++++++++++++++++
3 files changed, 402 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi
index 9e4d72cfa69f..8acef87a5398 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi
@@ -61,6 +61,29 @@ mmc@3460000 {
non-removable;
};
+ padctl@3520000 {
+ vclamp-usb-supply = <&vdd_ao_1v8>;
+ avdd-usb-supply = <&vdd_ao_3v3>;
+
+ ports {
+ usb2-0 {
+ vbus-supply = <&vdd_5v0_sys>;
+ };
+
+ usb2-1 {
+ vbus-supply = <&vdd_5v0_sys>;
+ };
+
+ usb2-2 {
+ vbus-supply = <&vdd_5v0_sys>;
+ };
+
+ usb2-3 {
+ vbus-supply = <&vdd_5v0_sys>;
+ };
+ };
+ };
+
rtc@c2a0000 {
status = "okay";
};
@@ -69,4 +92,29 @@ pmc@c360000 {
nvidia,invert-interrupt;
};
};
+
+ vdd_5v0_sys: regulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "VIN_SYS_5V0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vdd_ao_1v8: regulator@1 {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd-AO-1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ vdd_ao_3v3: regulator@2 {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd-AO-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
};
diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts
index 57ab75328814..b4630280bb32 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts
@@ -2011,6 +2011,190 @@ hda@3510000 {
nvidia,model = "NVIDIA Jetson AGX Orin HDA";
status = "okay";
};
+
+ padctl@3520000 {
+ status = "okay";
+
+ pads {
+ usb2 {
+ lanes {
+ usb2-0 {
+ status = "okay";
+ };
+
+ usb2-1 {
+ status = "okay";
+ };
+
+ usb2-2 {
+ status = "okay";
+ };
+
+ usb2-3 {
+ status = "okay";
+ };
+ };
+ };
+
+ usb3 {
+ lanes {
+ usb3-0 {
+ status = "okay";
+ };
+
+ usb3-1 {
+ status = "okay";
+ };
+
+ usb3-2 {
+ status = "okay";
+ };
+ };
+ };
+ };
+
+ ports {
+ usb2-0 {
+ mode = "otg";
+ usb-role-switch;
+ status = "okay";
+ port {
+ hs_typec_p1: endpoint {
+ remote-endpoint = <&hs_ucsi_ccg_p1>;
+ };
+ };
+ };
+
+ usb2-1 {
+ mode = "host";
+ status = "okay";
+ port {
+ hs_typec_p0: endpoint {
+ remote-endpoint = <&hs_ucsi_ccg_p0>;
+ };
+ };
+ };
+
+ usb2-2 {
+ mode = "host";
+ status = "okay";
+ };
+
+ usb2-3 {
+ mode = "host";
+ status = "okay";
+ };
+
+ usb3-0 {
+ nvidia,usb2-companion = <1>;
+ status = "okay";
+ port {
+ ss_typec_p0: endpoint {
+ remote-endpoint = <&ss_ucsi_ccg_p0>;
+ };
+ };
+ };
+
+ usb3-1 {
+ nvidia,usb2-companion = <0>;
+ status = "okay";
+ port {
+ ss_typec_p1: endpoint {
+ remote-endpoint = <&ss_ucsi_ccg_p1>;
+ };
+ };
+ };
+
+ usb3-2 {
+ nvidia,usb2-companion = <3>;
+ status = "okay";
+ };
+ };
+ };
+
+ usb@3550000 {
+ status = "okay";
+
+ phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>,
+ <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-1}>;
+ phy-names = "usb2-0", "usb3-1";
+ };
+
+ usb@3610000 {
+ status = "okay";
+
+ phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>,
+ <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-1}>,
+ <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-2}>,
+ <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-3}>,
+ <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-0}>,
+ <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-1}>,
+ <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-2}>;
+ phy-names = "usb2-0", "usb2-1", "usb2-2", "usb2-3",
+ "usb3-0", "usb3-1", "usb3-2";
+ };
+
+ i2c@c240000 {
+ status = "okay";
+ ucsi_ccg: ucsi_ccg@8 {
+ compatible = "cypress,cypd4226";
+ cypress,firmware-build = "gn";
+ interrupt-parent = <&gpio>;
+ interrupts = <TEGRA234_MAIN_GPIO(Y, 4) IRQ_TYPE_LEVEL_LOW>;
+ reg = <0x08>;
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ccg_typec_con0: connector@0 {
+ compatible = "usb-c-connector";
+ reg = <0>;
+ label = "USB-C";
+ data-role = "host";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hs_ucsi_ccg_p0: endpoint {
+ remote-endpoint = <&hs_typec_p0>;
+ };
+ };
+ port@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ss_ucsi_ccg_p0: endpoint {
+ remote-endpoint = <&ss_typec_p0>;
+ };
+ };
+ };
+ ccg_typec_con1: connector@1 {
+ compatible = "usb-c-connector";
+ reg = <1>;
+ label = "USB-C";
+ data-role = "dual";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hs_ucsi_ccg_p1: endpoint {
+ remote-endpoint = <&hs_typec_p1>;
+ };
+ };
+ port@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ss_ucsi_ccg_p1: endpoint {
+ remote-endpoint = <&ss_typec_p1>;
+ };
+ };
+ };
+ };
+ };
};
chosen {
diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
index 0170bfa8a467..27635d459e4c 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -942,6 +942,174 @@ hda@3510000 {
status = "disabled";
};
+ xusb_padctl: padctl@3520000 {
+ compatible = "nvidia,tegra234-xusb-padctl";
+ reg = <0x03520000 0x20000>,
+ <0x03540000 0x10000>;
+ reg-names = "padctl", "ao";
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+
+ resets = <&bpmp TEGRA234_RESET_XUSB_PADCTL>;
+ reset-names = "padctl";
+
+ status = "disabled";
+
+ pads {
+ usb2 {
+ clocks = <&bpmp TEGRA234_CLK_USB2_TRK>;
+ clock-names = "trk";
+
+ lanes {
+ usb2-0 {
+ nvidia,function = "xusb";
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+
+ usb2-1 {
+ nvidia,function = "xusb";
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+
+ usb2-2 {
+ nvidia,function = "xusb";
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+
+ usb2-3 {
+ nvidia,function = "xusb";
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+ };
+ };
+
+ usb3 {
+ lanes {
+ usb3-0 {
+ nvidia,function = "xusb";
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+
+ usb3-1 {
+ nvidia,function = "xusb";
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+
+ usb3-2 {
+ nvidia,function = "xusb";
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+
+ usb3-3 {
+ nvidia,function = "xusb";
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+ };
+ };
+ };
+
+ ports {
+ usb2-0 {
+ status = "disabled";
+ };
+
+ usb2-1 {
+ status = "disabled";
+ };
+
+ usb2-2 {
+ status = "disabled";
+ };
+
+ usb2-3 {
+ status = "disabled";
+ };
+
+ usb3-0 {
+ status = "disabled";
+ };
+
+ usb3-1 {
+ status = "disabled";
+ };
+
+ usb3-2 {
+ status = "disabled";
+ };
+
+ usb3-3 {
+ status = "disabled";
+ };
+ };
+ };
+
+ usb@3550000 {
+ compatible = "nvidia,tegra234-xudc";
+ reg = <0x03550000 0x8000>,
+ <0x03558000 0x8000>;
+ reg-names = "base", "fpci";
+ interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&bpmp TEGRA234_CLK_XUSB_CORE_DEV>,
+ <&bpmp TEGRA234_CLK_XUSB_CORE_SS>,
+ <&bpmp TEGRA234_CLK_XUSB_SS>,
+ <&bpmp TEGRA234_CLK_XUSB_FS>;
+ clock-names = "dev", "ss", "ss_src", "fs_src";
+ interconnects = <&mc TEGRA234_MEMORY_CLIENT_XUSB_DEVR &emc>,
+ <&mc TEGRA234_MEMORY_CLIENT_XUSB_DEVW &emc>;
+ interconnect-names = "dma-mem", "write";
+ iommus = <&smmu_niso1 TEGRA234_SID_XUSB_DEV>;
+ power-domains = <&bpmp TEGRA234_POWER_DOMAIN_XUSBB>,
+ <&bpmp TEGRA234_POWER_DOMAIN_XUSBA>;
+ power-domain-names = "dev", "ss";
+ nvidia,xusb-padctl = <&xusb_padctl>;
+ dma-coherent;
+ status = "disabled";
+ };
+
+ usb@3610000 {
+ compatible = "nvidia,tegra234-xusb";
+ reg = <0x03610000 0x40000>,
+ <0x03600000 0x10000>,
+ <0x03650000 0x10000>;
+ reg-names = "hcd", "fpci", "bar2";
+
+ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
+
+ clocks = <&bpmp TEGRA234_CLK_XUSB_CORE_HOST>,
+ <&bpmp TEGRA234_CLK_XUSB_FALCON>,
+ <&bpmp TEGRA234_CLK_XUSB_CORE_SS>,
+ <&bpmp TEGRA234_CLK_XUSB_SS>,
+ <&bpmp TEGRA234_CLK_CLK_M>,
+ <&bpmp TEGRA234_CLK_XUSB_FS>,
+ <&bpmp TEGRA234_CLK_UTMIP_PLL>,
+ <&bpmp TEGRA234_CLK_CLK_M>,
+ <&bpmp TEGRA234_CLK_PLLE>;
+ clock-names = "xusb_host", "xusb_falcon_src",
+ "xusb_ss", "xusb_ss_src", "xusb_hs_src",
+ "xusb_fs_src", "pll_u_480m", "clk_m",
+ "pll_e";
+ interconnects = <&mc TEGRA234_MEMORY_CLIENT_XUSB_HOSTR &emc>,
+ <&mc TEGRA234_MEMORY_CLIENT_XUSB_HOSTW &emc>;
+ interconnect-names = "dma-mem", "write";
+ iommus = <&smmu_niso1 TEGRA234_SID_XUSB_HOST>;
+
+ power-domains = <&bpmp TEGRA234_POWER_DOMAIN_XUSBC>,
+ <&bpmp TEGRA234_POWER_DOMAIN_XUSBA>;
+ power-domain-names = "xusb_host", "xusb_ss";
+
+ nvidia,xusb-padctl = <&xusb_padctl>;
+ dma-coherent;
+ status = "disabled";
+ };
+
fuse@3810000 {
compatible = "nvidia,tegra234-efuse";
reg = <0x03810000 0x10000>;
@@ -1470,6 +1638,8 @@ gen2_i2c: i2c@c240000 {
compatible = "nvidia,tegra194-i2c";
reg = <0xc240000 0x100>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "disabled";
clock-frequency = <100000>;
clocks = <&bpmp TEGRA234_CLK_I2C2
--
2.25.1
From: Sing-Han Chen <[email protected]>
This commit adds support for XUSB device mode controller support on
Tegra234 SoC. This is very similar to the existing Tegra194 XUDC.
Signed-off-by: Sing-Han Chen <[email protected]>
Signed-off-by: Wayne Chang <[email protected]>
---
drivers/usb/gadget/udc/tegra-xudc.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/drivers/usb/gadget/udc/tegra-xudc.c b/drivers/usb/gadget/udc/tegra-xudc.c
index 76919d7570d2..ff697190469b 100644
--- a/drivers/usb/gadget/udc/tegra-xudc.c
+++ b/drivers/usb/gadget/udc/tegra-xudc.c
@@ -3660,6 +3660,19 @@ static struct tegra_xudc_soc tegra194_xudc_soc_data = {
.has_ipfs = false,
};
+static struct tegra_xudc_soc tegra234_xudc_soc_data = {
+ .clock_names = tegra186_xudc_clock_names,
+ .num_clks = ARRAY_SIZE(tegra186_xudc_clock_names),
+ .num_phys = 4,
+ .u1_enable = true,
+ .u2_enable = true,
+ .lpm_enable = true,
+ .invalid_seq_num = false,
+ .pls_quirk = false,
+ .port_reset_quirk = false,
+ .has_ipfs = false,
+};
+
static const struct of_device_id tegra_xudc_of_match[] = {
{
.compatible = "nvidia,tegra210-xudc",
@@ -3673,6 +3686,10 @@ static const struct of_device_id tegra_xudc_of_match[] = {
.compatible = "nvidia,tegra194-xudc",
.data = &tegra194_xudc_soc_data
},
+ {
+ .compatible = "nvidia,tegra234-xudc",
+ .data = &tegra234_xudc_soc_data
+ },
{ }
};
MODULE_DEVICE_TABLE(of, tegra_xudc_of_match);
--
2.25.1
Add device-tree binding documentation for the XUSB host controller present
on Tegra194 and Tegra234 SoC. This controller supports the USB 3.1
specification.
Signed-off-by: Wayne Chang <[email protected]>
---
.../bindings/usb/nvidia,tegra-xhci.yaml | 213 ++++++++++++++++++
1 file changed, 213 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/nvidia,tegra-xhci.yaml
diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra-xhci.yaml b/Documentation/devicetree/bindings/usb/nvidia,tegra-xhci.yaml
new file mode 100644
index 000000000000..d261a419a04f
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/nvidia,tegra-xhci.yaml
@@ -0,0 +1,213 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/usb/nvidia,tegra-xhci.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Device tree binding for NVIDIA Tegra XUSB host controller
+
+description:
+ The Tegra XHCI controller supports both USB 2.0 HighSpeed/FullSpeed and
+ USB 3.1 SuperSpeed protocols.
+
+maintainers:
+ - Wayne Chang <[email protected]>
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - nvidia,tegra194-xusb # For Tegra194
+ - nvidia,tegra234-xusb # For Tegra234
+
+ reg:
+ minItems: 2
+ items:
+ - description: XUSB host controller registers
+ - description: XUSB host PCI Config registers
+ - description: XUSB host bar2 registers
+
+ reg-names:
+ minItems: 2
+ items:
+ - const: hcd
+ - const: fpci
+ - const: bar2
+
+ interrupts:
+ items:
+ - description: Must contain the XUSB host interrupt.
+ - description: Must contain the XUSB mbox interrupt.
+
+ clocks:
+ items:
+ - description: Clock to enable core XUSB host clock.
+ - description: Clock to enable XUSB falcon clock.
+ - description: Clock to enable XUSB super speed clock.
+ - description: Clock to enable XUSB super speed dev clock.
+ - description: Clock to enable XUSB high speed dev clock.
+ - description: Clock to enable XUSB full speed dev clock.
+ - description: Clock to enable XUSB UTMI PLL clock.
+ - description: Clock to enable core XUSB dev clock.
+ - description: Clock to enable XUSB PLLE clock.
+
+ clock-names:
+ items:
+ - const: xusb_host
+ - const: xusb_falcon_src
+ - const: xusb_ss
+ - const: xusb_ss_src
+ - const: xusb_hs_src
+ - const: xusb_fs_src
+ - const: pll_u_480m
+ - const: clk_m
+ - const: pll_e
+
+ interconnects:
+ items:
+ - description: memory read client
+ - description: memory write client
+
+ interconnect-names:
+ items:
+ - const: dma-mem # read
+ - const: write
+
+ iommus:
+ maxItems: 1
+
+ power-domains:
+ items:
+ - description: XUSBC(host) power-domain
+ - description: XUSBA(superspeed) power-domain
+
+ power-domain-names:
+ items:
+ - const: xusb_host
+ - const: xusb_ss
+
+ nvidia,xusb-padctl:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ phandle to the XUSB pad controller that is used to configure the USB pads
+ used by the XUDC controller.
+
+ phys:
+ minItems: 1
+ maxItems: 8
+ description:
+ Must contain an entry for each entry in phy-names.
+ See ../phy/phy-bindings.txt for details.
+
+ phy-names:
+ minItems: 1
+ maxItems: 8
+ items:
+ anyOf:
+ - const: usb2-0
+ - const: usb2-1
+ - const: usb2-2
+ - const: usb2-3
+ - const: usb3-0
+ - const: usb3-1
+ - const: usb3-2
+ - const: usb3-3
+
+ dma-coherent:
+ type: boolean
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - interrupts
+ - clocks
+ - clock-names
+ - power-domains
+ - power-domain-names
+ - nvidia,xusb-padctl
+ - phys
+ - phy-names
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - nvidia,tegra194-xusb
+ then:
+ properties:
+ reg:
+ minItems: 2
+ reg-names:
+ minItems: 2
+ clocks:
+ minItems: 9
+ clock-names:
+ minItems: 9
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - nvidia,tegra234-xusb
+ then:
+ properties:
+ reg:
+ minItems: 3
+ reg-names:
+ minItems: 3
+ clocks:
+ minItems: 9
+ clock-names:
+ minItems: 9
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/tegra234-gpio.h>
+ #include <dt-bindings/clock/tegra234-clock.h>
+ #include <dt-bindings/memory/tegra234-mc.h>
+ #include <dt-bindings/power/tegra234-powergate.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ usb@3610000 {
+ compatible = "nvidia,tegra234-xusb";
+ reg = <0x03610000 0x40000>,
+ <0x03600000 0x10000>,
+ <0x03650000 0x10000>;
+ reg-names = "hcd", "fpci", "bar2";
+
+ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
+
+ clocks = <&bpmp TEGRA234_CLK_XUSB_CORE_HOST>,
+ <&bpmp TEGRA234_CLK_XUSB_FALCON>,
+ <&bpmp TEGRA234_CLK_XUSB_CORE_SS>,
+ <&bpmp TEGRA234_CLK_XUSB_SS>,
+ <&bpmp TEGRA234_CLK_CLK_M>,
+ <&bpmp TEGRA234_CLK_XUSB_FS>,
+ <&bpmp TEGRA234_CLK_UTMIP_PLL>,
+ <&bpmp TEGRA234_CLK_CLK_M>,
+ <&bpmp TEGRA234_CLK_PLLE>;
+ clock-names = "xusb_host", "xusb_falcon_src",
+ "xusb_ss", "xusb_ss_src", "xusb_hs_src",
+ "xusb_fs_src", "pll_u_480m", "clk_m",
+ "pll_e";
+ interconnects = <&mc TEGRA234_MEMORY_CLIENT_XUSB_HOSTR &emc>,
+ <&mc TEGRA234_MEMORY_CLIENT_XUSB_HOSTW &emc>;
+ interconnect-names = "dma-mem", "write";
+ iommus = <&smmu_niso1 TEGRA234_SID_XUSB_HOST>;
+
+ power-domains = <&bpmp TEGRA234_POWER_DOMAIN_XUSBC>,
+ <&bpmp TEGRA234_POWER_DOMAIN_XUSBA>;
+ power-domain-names = "xusb_host", "xusb_ss";
+
+ nvidia,xusb-padctl = <&xusb_padctl>;
+
+ phys = <&pad_lanes_usb2_0>;
+ phy-names = "usb2-0";
+
+ };
--
2.25.1
ccgx is refer to the cypress cypd4226 typec controller.
Replace ccgx to well-known regex "cypress".
Signed-off-by: Wayne Chang <[email protected]>
---
drivers/i2c/busses/i2c-nvidia-gpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/i2c-nvidia-gpu.c b/drivers/i2c/busses/i2c-nvidia-gpu.c
index 12e330cd7635..0934f8ad7f49 100644
--- a/drivers/i2c/busses/i2c-nvidia-gpu.c
+++ b/drivers/i2c/busses/i2c-nvidia-gpu.c
@@ -260,7 +260,7 @@ MODULE_DEVICE_TABLE(pci, gpu_i2c_ids);
static const struct property_entry ccgx_props[] = {
/* Use FW built for NVIDIA (nv) only */
- PROPERTY_ENTRY_U16("ccgx,firmware-build", ('n' << 8) | 'v'),
+ PROPERTY_ENTRY_U16("cypress,firmware-build", ('n' << 8) | 'v'),
{ }
};
--
2.25.1
Extend the Tegra XUSB controller device tree binding with Tegra234
support.
Signed-off-by: Wayne Chang <[email protected]>
---
.../bindings/usb/nvidia,tegra-xudc.yaml | 24 ++++++++++++-------
1 file changed, 16 insertions(+), 8 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml b/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml
index fd6e7c81426e..517fb692f199 100644
--- a/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml
+++ b/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml
@@ -22,6 +22,7 @@ properties:
- nvidia,tegra210-xudc # For Tegra210
- nvidia,tegra186-xudc # For Tegra186
- nvidia,tegra194-xudc # For Tegra194
+ - nvidia,tegra234-xudc # For Tegra234
reg:
minItems: 2
@@ -90,21 +91,27 @@ properties:
phys:
minItems: 1
+ maxItems: 8
description:
Must contain an entry for each entry in phy-names.
See ../phy/phy-bindings.txt for details.
phy-names:
minItems: 1
+ maxItems: 8
items:
- - const: usb2-0
- - const: usb2-1
- - const: usb2-2
- - const: usb2-3
- - const: usb3-0
- - const: usb3-1
- - const: usb3-2
- - const: usb3-3
+ anyOf:
+ - const: usb2-0
+ - const: usb2-1
+ - const: usb2-2
+ - const: usb2-3
+ - const: usb3-0
+ - const: usb3-1
+ - const: usb3-2
+ - const: usb3-3
+
+ dma-coherent:
+ type: boolean
avddio-usb-supply:
description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
@@ -153,6 +160,7 @@ allOf:
enum:
- nvidia,tegra186-xudc
- nvidia,tegra194-xudc
+ - nvidia,tegra234-xudc
then:
properties:
reg:
--
2.25.1
From: Sing-Han Chen <[email protected]>
This change adds Tegra234 XUSB host mode controller support.
In Tegra234, some of the registers have moved to bar2 space.
The new soc variable has_bar2 indicates the chip with bar2
area. This patch adds new reg helper to let the driver reuse
the same code for those chips with bar2 support.
The new soc variables has_ifr indicates the chip with IFR FW
loading support. IFR registers would be configured in
MB1, and FW loading will be triggered in MB2.
Signed-off-by: Sing-Han Chen <[email protected]>
Co-developed-by: Wayne Chang <[email protected]>
Signed-off-by: Wayne Chang <[email protected]>
---
drivers/usb/host/xhci-tegra.c | 277 +++++++++++++++++++++++++++++-----
1 file changed, 237 insertions(+), 40 deletions(-)
diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c
index bdb776553826..86036eeece43 100644
--- a/drivers/usb/host/xhci-tegra.c
+++ b/drivers/usb/host/xhci-tegra.c
@@ -44,6 +44,9 @@
#define XUSB_CFG_4 0x010
#define XUSB_BASE_ADDR_SHIFT 15
#define XUSB_BASE_ADDR_MASK 0x1ffff
+#define XUSB_CFG_7 0x01c
+#define XUSB_BASE2_ADDR_SHIFT 16
+#define XUSB_BASE2_ADDR_MASK 0xffff
#define XUSB_CFG_16 0x040
#define XUSB_CFG_24 0x060
#define XUSB_CFG_AXI_CFG 0x0f8
@@ -75,6 +78,20 @@
#define MBOX_SMI_INTR_FW_HANG BIT(1)
#define MBOX_SMI_INTR_EN BIT(3)
+/* BAR2 registers */
+#define XUSB_BAR2_ARU_MBOX_CMD 0x004
+#define XUSB_BAR2_ARU_MBOX_DATA_IN 0x008
+#define XUSB_BAR2_ARU_MBOX_DATA_OUT 0x00c
+#define XUSB_BAR2_ARU_MBOX_OWNER 0x010
+#define XUSB_BAR2_ARU_SMI_INTR 0x014
+#define XUSB_BAR2_ARU_SMI_ARU_FW_SCRATCH_DATA0 0x01c
+#define XUSB_BAR2_ARU_IFRDMA_CFG0 0x0e0
+#define XUSB_BAR2_ARU_IFRDMA_CFG1 0x0e4
+#define XUSB_BAR2_ARU_IFRDMA_STREAMID_FIELD 0x0e8
+#define XUSB_BAR2_ARU_C11_CSBRANGE 0x9c
+#define XUSB_BAR2_ARU_FW_SCRATCH 0x1000
+#define XUSB_BAR2_CSB_BASE_ADDR 0x2000
+
/* IPFS registers */
#define IPFS_XUSB_HOST_MSI_BAR_SZ_0 0x0c0
#define IPFS_XUSB_HOST_MSI_AXI_BAR_ST_0 0x0c4
@@ -111,6 +128,9 @@
#define IMFILLRNG1_TAG_HI_SHIFT 16
#define XUSB_FALC_IMFILLCTL 0x158
+/* CSB ARU registers */
+#define XUSB_CSB_ARU_SCRATCH0 0x100100
+
/* MP CSB registers */
#define XUSB_CSB_MP_ILOAD_ATTR 0x101a00
#define XUSB_CSB_MP_ILOAD_BASE_LO 0x101a04
@@ -131,6 +151,9 @@
#define IMEM_BLOCK_SIZE 256
+#define FW_IOCTL_TYPE_SHIFT (24)
+#define FW_IOCTL_CFGTBL_READ (17)
+
struct tegra_xusb_fw_header {
__le32 boot_loadaddr_in_imem;
__le32 boot_codedfi_offset;
@@ -175,6 +198,7 @@ struct tegra_xusb_mbox_regs {
u16 data_in;
u16 data_out;
u16 owner;
+ u16 smi_intr;
};
struct tegra_xusb_context_soc {
@@ -189,6 +213,7 @@ struct tegra_xusb_context_soc {
} fpci;
};
+struct tegra_xusb_soc_ops;
struct tegra_xusb_soc {
const char *firmware;
const char * const *supply_names;
@@ -205,11 +230,15 @@ struct tegra_xusb_soc {
} ports;
struct tegra_xusb_mbox_regs mbox;
+ struct tegra_xusb_soc_ops *ops;
bool scale_ss_clock;
bool has_ipfs;
bool lpm_support;
bool otg_reset_sspi;
+
+ bool has_bar2;
+ bool has_ifr;
};
struct tegra_xusb_context {
@@ -230,6 +259,8 @@ struct tegra_xusb {
void __iomem *ipfs_base;
void __iomem *fpci_base;
+ void __iomem *bar2_base;
+ resource_size_t bar2_start;
const struct tegra_xusb_soc *soc;
@@ -276,6 +307,17 @@ struct tegra_xusb {
struct tegra_xusb_context context;
};
+struct tegra_xusb_soc_ops {
+ u32 (*mbox_reg_readl)(struct tegra_xusb *tegra,
+ unsigned int offset);
+ void (*mbox_reg_writel)(struct tegra_xusb *tegra,
+ u32 value, unsigned int offset);
+ u32 (*csb_reg_readl)(struct tegra_xusb *tegra,
+ unsigned int offset);
+ void (*csb_reg_writel)(struct tegra_xusb *tegra,
+ u32 value, unsigned int offset);
+};
+
static struct hc_driver __read_mostly tegra_xhci_hc_driver;
static inline u32 fpci_readl(struct tegra_xusb *tegra, unsigned int offset)
@@ -300,7 +342,33 @@ static inline void ipfs_writel(struct tegra_xusb *tegra, u32 value,
writel(value, tegra->ipfs_base + offset);
}
+static inline u32 bar2_readl(struct tegra_xusb *tegra, unsigned int offset)
+{
+ return readl(tegra->bar2_base + offset);
+}
+
+static inline void bar2_writel(struct tegra_xusb *tegra, u32 value,
+ unsigned int offset)
+{
+ writel(value, tegra->bar2_base + offset);
+}
+
static u32 csb_readl(struct tegra_xusb *tegra, unsigned int offset)
+{
+ struct tegra_xusb_soc_ops *ops = tegra->soc->ops;
+
+ return ops->csb_reg_readl(tegra, offset);
+}
+
+static void csb_writel(struct tegra_xusb *tegra, u32 value,
+ unsigned int offset)
+{
+ struct tegra_xusb_soc_ops *ops = tegra->soc->ops;
+
+ ops->csb_reg_writel(tegra, value, offset);
+}
+
+static u32 fpci_csb_readl(struct tegra_xusb *tegra, unsigned int offset)
{
u32 page = CSB_PAGE_SELECT(offset);
u32 ofs = CSB_PAGE_OFFSET(offset);
@@ -310,7 +378,7 @@ static u32 csb_readl(struct tegra_xusb *tegra, unsigned int offset)
return fpci_readl(tegra, XUSB_CFG_CSB_BASE_ADDR + ofs);
}
-static void csb_writel(struct tegra_xusb *tegra, u32 value,
+static void fpci_csb_writel(struct tegra_xusb *tegra, u32 value,
unsigned int offset)
{
u32 page = CSB_PAGE_SELECT(offset);
@@ -320,6 +388,26 @@ static void csb_writel(struct tegra_xusb *tegra, u32 value,
fpci_writel(tegra, value, XUSB_CFG_CSB_BASE_ADDR + ofs);
}
+static u32 bar2_csb_readl(struct tegra_xusb *tegra, unsigned int offset)
+{
+ u32 page = CSB_PAGE_SELECT(offset);
+ u32 ofs = CSB_PAGE_OFFSET(offset);
+
+ bar2_writel(tegra, page, XUSB_BAR2_ARU_C11_CSBRANGE);
+
+ return bar2_readl(tegra, XUSB_BAR2_CSB_BASE_ADDR + ofs);
+}
+
+static void bar2_csb_writel(struct tegra_xusb *tegra, u32 value,
+ unsigned int offset)
+{
+ u32 page = CSB_PAGE_SELECT(offset);
+ u32 ofs = CSB_PAGE_OFFSET(offset);
+
+ bar2_writel(tegra, page, XUSB_BAR2_ARU_C11_CSBRANGE);
+ bar2_writel(tegra, value, XUSB_BAR2_CSB_BASE_ADDR + ofs);
+}
+
static int tegra_xusb_set_ss_clk(struct tegra_xusb *tegra,
unsigned long rate)
{
@@ -451,6 +539,7 @@ static bool tegra_xusb_mbox_cmd_requires_ack(enum tegra_xusb_mbox_cmd cmd)
static int tegra_xusb_mbox_send(struct tegra_xusb *tegra,
const struct tegra_xusb_mbox_msg *msg)
{
+ struct tegra_xusb_soc_ops *ops = tegra->soc->ops;
bool wait_for_idle = false;
u32 value;
@@ -459,15 +548,15 @@ static int tegra_xusb_mbox_send(struct tegra_xusb *tegra,
* ACK/NAK messages.
*/
if (!(msg->cmd == MBOX_CMD_ACK || msg->cmd == MBOX_CMD_NAK)) {
- value = fpci_readl(tegra, tegra->soc->mbox.owner);
+ value = ops->mbox_reg_readl(tegra, tegra->soc->mbox.owner);
if (value != MBOX_OWNER_NONE) {
dev_err(tegra->dev, "mailbox is busy\n");
return -EBUSY;
}
- fpci_writel(tegra, MBOX_OWNER_SW, tegra->soc->mbox.owner);
+ ops->mbox_reg_writel(tegra, MBOX_OWNER_SW, tegra->soc->mbox.owner);
- value = fpci_readl(tegra, tegra->soc->mbox.owner);
+ value = ops->mbox_reg_readl(tegra, tegra->soc->mbox.owner);
if (value != MBOX_OWNER_SW) {
dev_err(tegra->dev, "failed to acquire mailbox\n");
return -EBUSY;
@@ -477,17 +566,17 @@ static int tegra_xusb_mbox_send(struct tegra_xusb *tegra,
}
value = tegra_xusb_mbox_pack(msg);
- fpci_writel(tegra, value, tegra->soc->mbox.data_in);
+ ops->mbox_reg_writel(tegra, value, tegra->soc->mbox.data_in);
- value = fpci_readl(tegra, tegra->soc->mbox.cmd);
+ value = ops->mbox_reg_readl(tegra, tegra->soc->mbox.cmd);
value |= MBOX_INT_EN | MBOX_DEST_FALC;
- fpci_writel(tegra, value, tegra->soc->mbox.cmd);
+ ops->mbox_reg_writel(tegra, value, tegra->soc->mbox.cmd);
if (wait_for_idle) {
unsigned long timeout = jiffies + msecs_to_jiffies(250);
while (time_before(jiffies, timeout)) {
- value = fpci_readl(tegra, tegra->soc->mbox.owner);
+ value = ops->mbox_reg_readl(tegra, tegra->soc->mbox.owner);
if (value == MBOX_OWNER_NONE)
break;
@@ -495,7 +584,7 @@ static int tegra_xusb_mbox_send(struct tegra_xusb *tegra,
}
if (time_after(jiffies, timeout))
- value = fpci_readl(tegra, tegra->soc->mbox.owner);
+ value = ops->mbox_reg_readl(tegra, tegra->soc->mbox.owner);
if (value != MBOX_OWNER_NONE)
return -ETIMEDOUT;
@@ -507,11 +596,12 @@ static int tegra_xusb_mbox_send(struct tegra_xusb *tegra,
static irqreturn_t tegra_xusb_mbox_irq(int irq, void *data)
{
struct tegra_xusb *tegra = data;
+ struct tegra_xusb_soc_ops *ops = tegra->soc->ops;
u32 value;
/* clear mailbox interrupts */
- value = fpci_readl(tegra, XUSB_CFG_ARU_SMI_INTR);
- fpci_writel(tegra, value, XUSB_CFG_ARU_SMI_INTR);
+ value = ops->mbox_reg_readl(tegra, tegra->soc->mbox.smi_intr);
+ ops->mbox_reg_writel(tegra, value, tegra->soc->mbox.smi_intr);
if (value & MBOX_SMI_INTR_FW_HANG)
dev_err(tegra->dev, "controller firmware hang\n");
@@ -664,6 +754,7 @@ static void tegra_xusb_mbox_handle(struct tegra_xusb *tegra,
static irqreturn_t tegra_xusb_mbox_thread(int irq, void *data)
{
struct tegra_xusb *tegra = data;
+ struct tegra_xusb_soc_ops *ops = tegra->soc->ops;
struct tegra_xusb_mbox_msg msg;
u32 value;
@@ -672,16 +763,16 @@ static irqreturn_t tegra_xusb_mbox_thread(int irq, void *data)
if (pm_runtime_suspended(tegra->dev) || tegra->suspended)
goto out;
- value = fpci_readl(tegra, tegra->soc->mbox.data_out);
+ value = ops->mbox_reg_readl(tegra, tegra->soc->mbox.data_out);
tegra_xusb_mbox_unpack(&msg, value);
- value = fpci_readl(tegra, tegra->soc->mbox.cmd);
+ value = ops->mbox_reg_readl(tegra, tegra->soc->mbox.cmd);
value &= ~MBOX_DEST_SMI;
- fpci_writel(tegra, value, tegra->soc->mbox.cmd);
+ ops->mbox_reg_writel(tegra, value, tegra->soc->mbox.cmd);
/* clear mailbox owner if no ACK/NAK is required */
if (!tegra_xusb_mbox_cmd_requires_ack(msg.cmd))
- fpci_writel(tegra, MBOX_OWNER_NONE, tegra->soc->mbox.owner);
+ ops->mbox_reg_writel(tegra, MBOX_OWNER_NONE, tegra->soc->mbox.owner);
tegra_xusb_mbox_handle(tegra, &msg);
@@ -709,6 +800,15 @@ static void tegra_xusb_config(struct tegra_xusb *tegra)
value |= regs & (XUSB_BASE_ADDR_MASK << XUSB_BASE_ADDR_SHIFT);
fpci_writel(tegra, value, XUSB_CFG_4);
+ /* Program BAR2 space */
+ if (tegra->soc->has_bar2) {
+ value = fpci_readl(tegra, XUSB_CFG_7);
+ value &= ~(XUSB_BASE2_ADDR_MASK << XUSB_BASE2_ADDR_SHIFT);
+ value |= tegra->bar2_start &
+ (XUSB_BASE2_ADDR_MASK << XUSB_BASE2_ADDR_SHIFT);
+ fpci_writel(tegra, value, XUSB_CFG_7);
+ }
+
usleep_range(100, 200);
/* Enable bus master */
@@ -881,21 +981,36 @@ static int tegra_xusb_request_firmware(struct tegra_xusb *tegra)
return 0;
}
+static int tegra_xusb_wait_for_falcon(struct tegra_xusb *tegra)
+{
+ struct xhci_cap_regs __iomem *cap_regs;
+ struct xhci_op_regs __iomem *op_regs;
+ int ret;
+ u32 val;
+
+ cap_regs = tegra->regs;
+ op_regs = tegra->regs + HC_LENGTH(readl(&cap_regs->hc_capbase));
+
+ ret = readl_poll_timeout(&op_regs->status, val, !(val & STS_CNR), 1000, 200000);
+
+ if (ret)
+ dev_err(tegra->dev, "XHCI Controller not ready. Falcon state: 0x%x\n",
+ csb_readl(tegra, XUSB_FALC_CPUCTL));
+
+ return ret;
+}
+
static int tegra_xusb_load_firmware(struct tegra_xusb *tegra)
{
unsigned int code_tag_blocks, code_size_blocks, code_blocks;
- struct xhci_cap_regs __iomem *cap = tegra->regs;
struct tegra_xusb_fw_header *header;
struct device *dev = tegra->dev;
- struct xhci_op_regs __iomem *op;
- unsigned long timeout;
time64_t timestamp;
u64 address;
u32 value;
int err;
header = (struct tegra_xusb_fw_header *)tegra->fw.virt;
- op = tegra->regs + HC_LENGTH(readl(&cap->hc_capbase));
if (csb_readl(tegra, XUSB_CSB_MP_ILOAD_BASE_LO) != 0) {
dev_info(dev, "Firmware already loaded, Falcon state %#x\n",
@@ -968,26 +1083,43 @@ static int tegra_xusb_load_firmware(struct tegra_xusb *tegra)
/* Boot Falcon CPU and wait for USBSTS_CNR to get cleared. */
csb_writel(tegra, CPUCTL_STARTCPU, XUSB_FALC_CPUCTL);
- timeout = jiffies + msecs_to_jiffies(200);
+ if (tegra_xusb_wait_for_falcon(tegra))
+ return -EIO;
- do {
- value = readl(&op->status);
- if ((value & STS_CNR) == 0)
- break;
+ timestamp = le32_to_cpu(header->fwimg_created_time);
- usleep_range(1000, 2000);
- } while (time_is_after_jiffies(timeout));
+ dev_info(dev, "Firmware timestamp: %ptTs UTC\n", ×tamp);
+
+ return 0;
+}
- value = readl(&op->status);
- if (value & STS_CNR) {
- value = csb_readl(tegra, XUSB_FALC_CPUCTL);
- dev_err(dev, "XHCI controller not read: %#010x\n", value);
+static u32 tegra_xusb_read_firmware_header(struct tegra_xusb *tegra, u32 offset)
+{
+ /*
+ * We only accept reading the firmware config table
+ * The offset should not exceed the fw header structure
+ */
+ if (offset >= sizeof(struct tegra_xusb_fw_header))
+ return 0;
+
+ bar2_writel(tegra, (FW_IOCTL_CFGTBL_READ << FW_IOCTL_TYPE_SHIFT) | offset,
+ XUSB_BAR2_ARU_FW_SCRATCH);
+ return bar2_readl(tegra, XUSB_BAR2_ARU_SMI_ARU_FW_SCRATCH_DATA0);
+}
+
+static int tegra_xusb_init_ifr_firmware(struct tegra_xusb *tegra)
+{
+ time64_t timestamp;
+
+ if (tegra_xusb_wait_for_falcon(tegra))
return -EIO;
- }
- timestamp = le32_to_cpu(header->fwimg_created_time);
+#define offsetof_32(X, Y) ((u8)(offsetof(X, Y) / sizeof(__le32)))
+ timestamp = tegra_xusb_read_firmware_header(tegra,
+ offsetof_32(struct tegra_xusb_fw_header,
+ fwimg_created_time) << 2);
- dev_info(dev, "Firmware timestamp: %ptTs UTC\n", ×tamp);
+ dev_info(tegra->dev, "Firmware timestamp: %ptTs UTC\n", ×tamp);
return 0;
}
@@ -1403,7 +1535,7 @@ static int tegra_xusb_probe(struct platform_device *pdev)
struct of_phandle_args args;
struct tegra_xusb *tegra;
struct device_node *np;
- struct resource *regs;
+ struct resource *res, *regs;
struct xhci_hcd *xhci;
unsigned int i, j, k;
struct phy *phy;
@@ -1435,6 +1567,11 @@ static int tegra_xusb_probe(struct platform_device *pdev)
tegra->ipfs_base = devm_platform_ioremap_resource(pdev, 2);
if (IS_ERR(tegra->ipfs_base))
return PTR_ERR(tegra->ipfs_base);
+ } else if (tegra->soc->has_bar2) {
+ tegra->bar2_base = devm_platform_get_and_ioremap_resource(pdev, 2, &res);
+ if (IS_ERR(tegra->bar2_base))
+ return PTR_ERR(tegra->bar2_base);
+ tegra->bar2_start = res->start;
}
tegra->xhci_irq = platform_get_irq(pdev, 0);
@@ -1651,10 +1788,13 @@ static int tegra_xusb_probe(struct platform_device *pdev)
goto disable_phy;
}
- err = tegra_xusb_request_firmware(tegra);
- if (err < 0) {
- dev_err(&pdev->dev, "failed to request firmware: %d\n", err);
- goto disable_phy;
+ if (!tegra->soc->has_ifr) {
+ err = tegra_xusb_request_firmware(tegra);
+ if (err < 0) {
+ dev_err(&pdev->dev,
+ "failed to request firmware: %d\n", err);
+ goto disable_phy;
+ }
}
err = tegra_xusb_unpowergate_partitions(tegra);
@@ -1663,7 +1803,10 @@ static int tegra_xusb_probe(struct platform_device *pdev)
tegra_xusb_config(tegra);
- err = tegra_xusb_load_firmware(tegra);
+ if (tegra->soc->has_ifr)
+ err = tegra_xusb_init_ifr_firmware(tegra);
+ else
+ err = tegra_xusb_load_firmware(tegra);
if (err < 0) {
dev_err(&pdev->dev, "failed to load firmware: %d\n", err);
goto powergate;
@@ -2070,7 +2213,10 @@ static int tegra_xusb_exit_elpg(struct tegra_xusb *tegra, bool runtime)
tegra_xusb_config(tegra);
tegra_xusb_restore_context(tegra);
- err = tegra_xusb_load_firmware(tegra);
+ if (tegra->soc->has_ifr)
+ err = tegra_xusb_init_ifr_firmware(tegra);
+ else
+ err = tegra_xusb_load_firmware(tegra);
if (err < 0) {
dev_err(tegra->dev, "failed to load firmware: %d\n", err);
goto disable_phy;
@@ -2271,6 +2417,13 @@ static const struct tegra_xusb_context_soc tegra124_xusb_context = {
},
};
+static struct tegra_xusb_soc_ops tegra124_ops = {
+ .mbox_reg_readl = &fpci_readl,
+ .mbox_reg_writel = &fpci_writel,
+ .csb_reg_readl = &fpci_csb_readl,
+ .csb_reg_writel = &fpci_csb_writel,
+};
+
static const struct tegra_xusb_soc tegra124_soc = {
.firmware = "nvidia/tegra124/xusb.bin",
.supply_names = tegra124_supply_names,
@@ -2286,11 +2439,13 @@ static const struct tegra_xusb_soc tegra124_soc = {
.scale_ss_clock = true,
.has_ipfs = true,
.otg_reset_sspi = false,
+ .ops = &tegra124_ops,
.mbox = {
.cmd = 0xe4,
.data_in = 0xe8,
.data_out = 0xec,
.owner = 0xf0,
+ .smi_intr = XUSB_CFG_ARU_SMI_INTR,
},
};
MODULE_FIRMWARE("nvidia/tegra124/xusb.bin");
@@ -2322,11 +2477,13 @@ static const struct tegra_xusb_soc tegra210_soc = {
.scale_ss_clock = false,
.has_ipfs = true,
.otg_reset_sspi = true,
+ .ops = &tegra124_ops,
.mbox = {
.cmd = 0xe4,
.data_in = 0xe8,
.data_out = 0xec,
.owner = 0xf0,
+ .smi_intr = XUSB_CFG_ARU_SMI_INTR,
},
};
MODULE_FIRMWARE("nvidia/tegra210/xusb.bin");
@@ -2363,11 +2520,13 @@ static const struct tegra_xusb_soc tegra186_soc = {
.scale_ss_clock = false,
.has_ipfs = false,
.otg_reset_sspi = false,
+ .ops = &tegra124_ops,
.mbox = {
.cmd = 0xe4,
.data_in = 0xe8,
.data_out = 0xec,
.owner = 0xf0,
+ .smi_intr = XUSB_CFG_ARU_SMI_INTR,
},
.lpm_support = true,
};
@@ -2394,21 +2553,59 @@ static const struct tegra_xusb_soc tegra194_soc = {
.scale_ss_clock = false,
.has_ipfs = false,
.otg_reset_sspi = false,
+ .ops = &tegra124_ops,
.mbox = {
.cmd = 0x68,
.data_in = 0x6c,
.data_out = 0x70,
.owner = 0x74,
+ .smi_intr = XUSB_CFG_ARU_SMI_INTR,
},
.lpm_support = true,
};
MODULE_FIRMWARE("nvidia/tegra194/xusb.bin");
+static struct tegra_xusb_soc_ops tegra234_ops = {
+ .mbox_reg_readl = &bar2_readl,
+ .mbox_reg_writel = &bar2_writel,
+ .csb_reg_readl = &bar2_csb_readl,
+ .csb_reg_writel = &bar2_csb_writel,
+};
+
+static const struct tegra_xusb_soc tegra234_soc = {
+ .firmware = "nvidia/tegra234/xusb.bin",
+ .supply_names = tegra194_supply_names,
+ .num_supplies = ARRAY_SIZE(tegra194_supply_names),
+ .phy_types = tegra194_phy_types,
+ .num_types = ARRAY_SIZE(tegra194_phy_types),
+ .context = &tegra186_xusb_context,
+ .ports = {
+ .usb3 = { .offset = 0, .count = 4, },
+ .usb2 = { .offset = 4, .count = 4, },
+ },
+ .scale_ss_clock = false,
+ .has_ipfs = false,
+ .otg_reset_sspi = false,
+ .ops = &tegra234_ops,
+ .mbox = {
+ .cmd = XUSB_BAR2_ARU_MBOX_CMD,
+ .data_in = XUSB_BAR2_ARU_MBOX_DATA_IN,
+ .data_out = XUSB_BAR2_ARU_MBOX_DATA_OUT,
+ .owner = XUSB_BAR2_ARU_MBOX_OWNER,
+ .smi_intr = XUSB_BAR2_ARU_SMI_INTR,
+ },
+ .lpm_support = true,
+ .has_bar2 = true,
+ .has_ifr = true,
+};
+MODULE_FIRMWARE("nvidia/tegra234/xusb.bin");
+
static const struct of_device_id tegra_xusb_of_match[] = {
{ .compatible = "nvidia,tegra124-xusb", .data = &tegra124_soc },
{ .compatible = "nvidia,tegra210-xusb", .data = &tegra210_soc },
{ .compatible = "nvidia,tegra186-xusb", .data = &tegra186_soc },
{ .compatible = "nvidia,tegra194-xusb", .data = &tegra194_soc },
+ { .compatible = "nvidia,tegra234-xusb", .data = &tegra234_soc },
{ },
};
MODULE_DEVICE_TABLE(of, tegra_xusb_of_match);
--
2.25.1
On Mon, Oct 24, 2022 at 03:41:19PM +0800, Wayne Chang wrote:
> Add device-tree binding documentation for the XUSB host controller present
> on Tegra194 and Tegra234 SoC. This controller supports the USB 3.1
> specification.
>
> Signed-off-by: Wayne Chang <[email protected]>
> ---
> .../bindings/usb/nvidia,tegra-xhci.yaml | 213 ++++++++++++++++++
> 1 file changed, 213 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/usb/nvidia,tegra-xhci.yaml
>
> diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra-xhci.yaml b/Documentation/devicetree/bindings/usb/nvidia,tegra-xhci.yaml
> new file mode 100644
> index 000000000000..d261a419a04f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra-xhci.yaml
> @@ -0,0 +1,213 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/usb/nvidia,tegra-xhci.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Device tree binding for NVIDIA Tegra XUSB host controller
Drop 'Device tree binding for '
> +
> +description:
> + The Tegra XHCI controller supports both USB 2.0 HighSpeed/FullSpeed and
> + USB 3.1 SuperSpeed protocols.
> +
> +maintainers:
> + - Wayne Chang <[email protected]>
> +
Ref to usb-xhci.yaml? Or usb-hcd.yaml.
> +properties:
> + compatible:
> + items:
> + - enum:
> + - nvidia,tegra194-xusb # For Tegra194
> + - nvidia,tegra234-xusb # For Tegra234
The comment is kind of redundant.
> +
> + reg:
> + minItems: 2
> + items:
> + - description: XUSB host controller registers
> + - description: XUSB host PCI Config registers
> + - description: XUSB host bar2 registers
Drop 'XUSB host '
> +
> + reg-names:
> + minItems: 2
> + items:
> + - const: hcd
> + - const: fpci
> + - const: bar2
> +
> + interrupts:
> + items:
> + - description: Must contain the XUSB host interrupt.
> + - description: Must contain the XUSB mbox interrupt.
Drop 'Must contain the '
> +
> + clocks:
> + items:
> + - description: Clock to enable core XUSB host clock.
> + - description: Clock to enable XUSB falcon clock.
> + - description: Clock to enable XUSB super speed clock.
> + - description: Clock to enable XUSB super speed dev clock.
> + - description: Clock to enable XUSB high speed dev clock.
> + - description: Clock to enable XUSB full speed dev clock.
> + - description: Clock to enable XUSB UTMI PLL clock.
> + - description: Clock to enable core XUSB dev clock.
> + - description: Clock to enable XUSB PLLE clock.
Drop 'Clock to enable '
> +
> + clock-names:
> + items:
> + - const: xusb_host
> + - const: xusb_falcon_src
> + - const: xusb_ss
> + - const: xusb_ss_src
> + - const: xusb_hs_src
> + - const: xusb_fs_src
> + - const: pll_u_480m
> + - const: clk_m
> + - const: pll_e
> +
> + interconnects:
> + items:
> + - description: memory read client
> + - description: memory write client
> +
> + interconnect-names:
> + items:
> + - const: dma-mem # read
> + - const: write
> +
> + iommus:
> + maxItems: 1
> +
> + power-domains:
> + items:
> + - description: XUSBC(host) power-domain
> + - description: XUSBA(superspeed) power-domain
> +
> + power-domain-names:
> + items:
> + - const: xusb_host
> + - const: xusb_ss
Drop 'xusb_'.
> +
> + nvidia,xusb-padctl:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description:
> + phandle to the XUSB pad controller that is used to configure the USB pads
> + used by the XUDC controller.
> +
> + phys:
> + minItems: 1
> + maxItems: 8
> + description:
> + Must contain an entry for each entry in phy-names.
> + See ../phy/phy-bindings.txt for details.
Drop description.
> +
> + phy-names:
> + minItems: 1
> + maxItems: 8
> + items:
> + anyOf:
> + - const: usb2-0
> + - const: usb2-1
> + - const: usb2-2
> + - const: usb2-3
> + - const: usb3-0
> + - const: usb3-1
> + - const: usb3-2
> + - const: usb3-3
> +
> + dma-coherent:
> + type: boolean
> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - interrupts
> + - clocks
> + - clock-names
> + - power-domains
> + - power-domain-names
> + - nvidia,xusb-padctl
> + - phys
> + - phy-names
> +
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - nvidia,tegra194-xusb
> + then:
> + properties:
> + reg:
> + minItems: 2
> + reg-names:
> + minItems: 2
> + clocks:
> + minItems: 9
> + clock-names:
> + minItems: 9
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - nvidia,tegra234-xusb
> + then:
> + properties:
> + reg:
> + minItems: 3
> + reg-names:
> + minItems: 3
> + clocks:
> + minItems: 9
> + clock-names:
> + minItems: 9
Same number of items, why are clocks in the if/then?
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/gpio/tegra234-gpio.h>
> + #include <dt-bindings/clock/tegra234-clock.h>
> + #include <dt-bindings/memory/tegra234-mc.h>
> + #include <dt-bindings/power/tegra234-powergate.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + usb@3610000 {
> + compatible = "nvidia,tegra234-xusb";
> + reg = <0x03610000 0x40000>,
> + <0x03600000 0x10000>,
> + <0x03650000 0x10000>;
> + reg-names = "hcd", "fpci", "bar2";
> +
> + interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
> +
> + clocks = <&bpmp TEGRA234_CLK_XUSB_CORE_HOST>,
> + <&bpmp TEGRA234_CLK_XUSB_FALCON>,
> + <&bpmp TEGRA234_CLK_XUSB_CORE_SS>,
> + <&bpmp TEGRA234_CLK_XUSB_SS>,
> + <&bpmp TEGRA234_CLK_CLK_M>,
> + <&bpmp TEGRA234_CLK_XUSB_FS>,
> + <&bpmp TEGRA234_CLK_UTMIP_PLL>,
> + <&bpmp TEGRA234_CLK_CLK_M>,
> + <&bpmp TEGRA234_CLK_PLLE>;
> + clock-names = "xusb_host", "xusb_falcon_src",
> + "xusb_ss", "xusb_ss_src", "xusb_hs_src",
> + "xusb_fs_src", "pll_u_480m", "clk_m",
> + "pll_e";
> + interconnects = <&mc TEGRA234_MEMORY_CLIENT_XUSB_HOSTR &emc>,
> + <&mc TEGRA234_MEMORY_CLIENT_XUSB_HOSTW &emc>;
> + interconnect-names = "dma-mem", "write";
> + iommus = <&smmu_niso1 TEGRA234_SID_XUSB_HOST>;
> +
> + power-domains = <&bpmp TEGRA234_POWER_DOMAIN_XUSBC>,
> + <&bpmp TEGRA234_POWER_DOMAIN_XUSBA>;
> + power-domain-names = "xusb_host", "xusb_ss";
> +
> + nvidia,xusb-padctl = <&xusb_padctl>;
> +
> + phys = <&pad_lanes_usb2_0>;
> + phy-names = "usb2-0";
> +
> + };
> --
> 2.25.1
>
>
On Mon, 24 Oct 2022 15:41:19 +0800, Wayne Chang wrote:
> Add device-tree binding documentation for the XUSB host controller present
> on Tegra194 and Tegra234 SoC. This controller supports the USB 3.1
> specification.
>
> Signed-off-by: Wayne Chang <[email protected]>
> ---
> .../bindings/usb/nvidia,tegra-xhci.yaml | 213 ++++++++++++++++++
> 1 file changed, 213 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/usb/nvidia,tegra-xhci.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
Error: Documentation/devicetree/bindings/usb/nvidia,tegra-xhci.example.dts:36.27-28 syntax error
FATAL ERROR: Unable to parse input tree
make[1]: *** [scripts/Makefile.lib:406: Documentation/devicetree/bindings/usb/nvidia,tegra-xhci.example.dtb] Error 1
make[1]: *** Waiting for unfinished jobs....
make: *** [Makefile:1492: dt_binding_check] Error 2
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/patch/
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
On 24/10/2022 14:30, Rob Herring wrote:
> On Mon, 24 Oct 2022 15:41:19 +0800, Wayne Chang wrote:
>> Add device-tree binding documentation for the XUSB host controller present
>> on Tegra194 and Tegra234 SoC. This controller supports the USB 3.1
>> specification.
>>
>> Signed-off-by: Wayne Chang <[email protected]>
>> ---
>> .../bindings/usb/nvidia,tegra-xhci.yaml | 213 ++++++++++++++++++
>> 1 file changed, 213 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/usb/nvidia,tegra-xhci.yaml
>>
>
> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> on your patch (DT_CHECKER_FLAGS is new in v5.13):
>
> yamllint warnings/errors:
>
> dtschema/dtc warnings/errors:
> Error: Documentation/devicetree/bindings/usb/nvidia,tegra-xhci.example.dts:36.27-28 syntax error
> FATAL ERROR: Unable to parse input tree
> make[1]: *** [scripts/Makefile.lib:406: Documentation/devicetree/bindings/usb/nvidia,tegra-xhci.example.dtb] Error 1
> make[1]: *** Waiting for unfinished jobs....
> make: *** [Makefile:1492: dt_binding_check] Error 2
I believe that this is because another DT patch [0] is missing (see
patch 0/11). Thierry has just picked this up for -next and so hopefully
will resolve this.
Cheers
Jon
[0]
https://lore.kernel.org/all/[email protected]/
--
nvpublic
Thanks for the review.
All the changes will be updated in the next patchset except the
power-domain-name.
On 10/24/22 22:54, Rob Herring wrote:
> External email: Use caution opening links or attachments
>
>
>> +description:
>> + The Tegra XHCI controller supports both USB 2.0 HighSpeed/FullSpeed and
>> + USB 3.1 SuperSpeed protocols.
>> +
>> +maintainers:
>> + - Wayne Chang <[email protected]>
>> +
>
> Ref to usb-xhci.yaml? Or usb-hcd.yaml.
>
It should be usb-xhci.yaml. thanks.
>> + power-domain-names:
>> + items:
>> + - const: xusb_host
>> + - const: xusb_ss
>
> Drop 'xusb_'.
The properties are constant and we use the name to get the power domain.
tegra->genpd_dev_host = dev_pm_domain_attach_by_name(dev, "xusb_host");
tegra->genpd_dev_ss = dev_pm_domain_attach_by_name(dev, "xusb_ss");
we might not be able to drop the xusb_
thanks,
Wayne.
On Mon, Oct 24, 2022 at 03:41:18PM +0800, Wayne Chang wrote:
> Extend the Tegra XUSB controller device tree binding with Tegra234
> support.
>
> Signed-off-by: Wayne Chang <[email protected]>
> ---
> .../bindings/usb/nvidia,tegra-xudc.yaml | 24 ++++++++++++-------
> 1 file changed, 16 insertions(+), 8 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml b/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml
> index fd6e7c81426e..517fb692f199 100644
> --- a/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml
> +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml
> @@ -22,6 +22,7 @@ properties:
> - nvidia,tegra210-xudc # For Tegra210
> - nvidia,tegra186-xudc # For Tegra186
> - nvidia,tegra194-xudc # For Tegra194
> + - nvidia,tegra234-xudc # For Tegra234
>
> reg:
> minItems: 2
> @@ -90,21 +91,27 @@ properties:
>
> phys:
> minItems: 1
> + maxItems: 8
> description:
> Must contain an entry for each entry in phy-names.
> See ../phy/phy-bindings.txt for details.
>
> phy-names:
> minItems: 1
> + maxItems: 8
> items:
> - - const: usb2-0
> - - const: usb2-1
> - - const: usb2-2
> - - const: usb2-3
> - - const: usb3-0
> - - const: usb3-1
> - - const: usb3-2
> - - const: usb3-3
> + anyOf:
> + - const: usb2-0
> + - const: usb2-1
> + - const: usb2-2
> + - const: usb2-3
> + - const: usb3-0
> + - const: usb3-1
> + - const: usb3-2
> + - const: usb3-3
items:
pattern: '^usb[23]-[0-3]$'
And an explanation why you need any random order. If it is just
different for Tegra234, then you need an if/then schema for this.
> +
> + dma-coherent:
> + type: boolean
>
> avddio-usb-supply:
> description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
> @@ -153,6 +160,7 @@ allOf:
> enum:
> - nvidia,tegra186-xudc
> - nvidia,tegra194-xudc
> + - nvidia,tegra234-xudc
> then:
> properties:
> reg:
> --
> 2.25.1
>
>
On 25/10/2022 04:02, Wayne Chang wrote:
>
>>> + power-domain-names:
>>> + items:
>>> + - const: xusb_host
>>> + - const: xusb_ss
>>
>> Drop 'xusb_'.
>
> The properties are constant and we use the name to get the power domain.
>
> tegra->genpd_dev_host = dev_pm_domain_attach_by_name(dev, "xusb_host");
>
> tegra->genpd_dev_ss = dev_pm_domain_attach_by_name(dev, "xusb_ss");
>
> we might not be able to drop the xusb_
These are new bindings, so why do say they are "constant"? New bindings
means you did not use them. If you used them before bindings... what can
we say? Don't?
Best regards,
Krzysztof
On 24/10/2022 03:41, Wayne Chang wrote:
> This commit enables XUSB host, device, and pad controller on
> Jetson AGX Orin.
>
> Signed-off-by: Wayne Chang <[email protected]>
> ---
> .../boot/dts/nvidia/tegra234-p3701-0000.dtsi | 48 +++++
> .../nvidia/tegra234-p3737-0000+p3701-0000.dts | 184 ++++++++++++++++++
> arch/arm64/boot/dts/nvidia/tegra234.dtsi | 170 ++++++++++++++++
> 3 files changed, 402 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi
> index 9e4d72cfa69f..8acef87a5398 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi
> @@ -61,6 +61,29 @@ mmc@3460000 {
> non-removable;
> };
>
> + padctl@3520000 {
> + vclamp-usb-supply = <&vdd_ao_1v8>;
> + avdd-usb-supply = <&vdd_ao_3v3>;
> +
> + ports {
> + usb2-0 {
> + vbus-supply = <&vdd_5v0_sys>;
> + };
> +
> + usb2-1 {
> + vbus-supply = <&vdd_5v0_sys>;
> + };
> +
> + usb2-2 {
> + vbus-supply = <&vdd_5v0_sys>;
> + };
> +
> + usb2-3 {
> + vbus-supply = <&vdd_5v0_sys>;
> + };
> + };
> + };
> +
> rtc@c2a0000 {
> status = "okay";
> };
> @@ -69,4 +92,29 @@ pmc@c360000 {
> nvidia,invert-interrupt;
> };
> };
> +
> + vdd_5v0_sys: regulator@0 {
> + compatible = "regulator-fixed";
> + regulator-name = "VIN_SYS_5V0";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + vdd_ao_1v8: regulator@1 {
> + compatible = "regulator-fixed";
> + regulator-name = "vdd-AO-1v8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + };
> +
> + vdd_ao_3v3: regulator@2 {
> + compatible = "regulator-fixed";
> + regulator-name = "vdd-AO-3v3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> };
> diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts
> index 57ab75328814..b4630280bb32 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts
> +++ b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts
> @@ -2011,6 +2011,190 @@ hda@3510000 {
> nvidia,model = "NVIDIA Jetson AGX Orin HDA";
> status = "okay";
> };
> +
> + padctl@3520000 {
> + status = "okay";
> +
> + pads {
> + usb2 {
> + lanes {
> + usb2-0 {
> + status = "okay";
> + };
> +
> + usb2-1 {
> + status = "okay";
> + };
> +
> + usb2-2 {
> + status = "okay";
> + };
> +
> + usb2-3 {
> + status = "okay";
> + };
> + };
> + };
> +
> + usb3 {
> + lanes {
> + usb3-0 {
> + status = "okay";
> + };
> +
> + usb3-1 {
> + status = "okay";
> + };
> +
> + usb3-2 {
> + status = "okay";
> + };
> + };
> + };
> + };
> +
> + ports {
> + usb2-0 {
> + mode = "otg";
> + usb-role-switch;
> + status = "okay";
> + port {
> + hs_typec_p1: endpoint {
> + remote-endpoint = <&hs_ucsi_ccg_p1>;
> + };
> + };
> + };
> +
> + usb2-1 {
> + mode = "host";
> + status = "okay";
> + port {
> + hs_typec_p0: endpoint {
> + remote-endpoint = <&hs_ucsi_ccg_p0>;
> + };
> + };
> + };
> +
> + usb2-2 {
> + mode = "host";
> + status = "okay";
> + };
> +
> + usb2-3 {
> + mode = "host";
> + status = "okay";
> + };
> +
> + usb3-0 {
> + nvidia,usb2-companion = <1>;
> + status = "okay";
> + port {
> + ss_typec_p0: endpoint {
> + remote-endpoint = <&ss_ucsi_ccg_p0>;
> + };
> + };
> + };
> +
> + usb3-1 {
> + nvidia,usb2-companion = <0>;
> + status = "okay";
> + port {
> + ss_typec_p1: endpoint {
> + remote-endpoint = <&ss_ucsi_ccg_p1>;
> + };
> + };
> + };
> +
> + usb3-2 {
> + nvidia,usb2-companion = <3>;
> + status = "okay";
> + };
> + };
> + };
> +
> + usb@3550000 {
> + status = "okay";
> +
> + phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>,
> + <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-1}>;
> + phy-names = "usb2-0", "usb3-1";
> + };
> +
> + usb@3610000 {
> + status = "okay";
> +
> + phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>,
> + <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-1}>,
> + <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-2}>,
> + <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-3}>,
> + <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-0}>,
> + <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-1}>,
> + <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-2}>;
> + phy-names = "usb2-0", "usb2-1", "usb2-2", "usb2-3",
> + "usb3-0", "usb3-1", "usb3-2";
> + };
> +
> + i2c@c240000 {
> + status = "okay";
> + ucsi_ccg: ucsi_ccg@8 {
No underscores in node names.
> + compatible = "cypress,cypd4226";
> + cypress,firmware-build = "gn";
> + interrupt-parent = <&gpio>;
> + interrupts = <TEGRA234_MAIN_GPIO(Y, 4) IRQ_TYPE_LEVEL_LOW>;
> + reg = <0x08>;
> + status = "okay";
The pattern of redefining full path in Tegra is confusing - I have no
clue which of these status=okay are correct which are redundant.
Do you?
> + #address-cells = <1>;
> + #size-cells = <0>;
> + ccg_typec_con0: connector@0 {
> + compatible = "usb-c-connector";
> + reg = <0>;
> + label = "USB-C";
> + data-role = "host";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + port@0 {
> + reg = <0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
Hm, why do you have here cells?
Did you test the DTS with dtbs_check?
Best regards,
Krzysztof
On 28/10/2022 03:23, Krzysztof Kozlowski wrote:
> On 24/10/2022 03:41, Wayne Chang wrote:
>> This commit enables XUSB host, device, and pad controller on
>> Jetson AGX Orin.
>>
>> Signed-off-by: Wayne Chang <[email protected]>
>> ---
>> .../boot/dts/nvidia/tegra234-p3701-0000.dtsi | 48 +++++
>> .../nvidia/tegra234-p3737-0000+p3701-0000.dts | 184 ++++++++++++++++++
>> arch/arm64/boot/dts/nvidia/tegra234.dtsi | 170 ++++++++++++++++
>> 3 files changed, 402 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi
>> index 9e4d72cfa69f..8acef87a5398 100644
>> --- a/arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi
>> +++ b/arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi
>> @@ -61,6 +61,29 @@ mmc@3460000 {
>> non-removable;
>> };
>>
>> + padctl@3520000 {
>> + vclamp-usb-supply = <&vdd_ao_1v8>;
>> + avdd-usb-supply = <&vdd_ao_3v3>;
>> +
>> + ports {
>> + usb2-0 {
>> + vbus-supply = <&vdd_5v0_sys>;
>> + };
>> +
>> + usb2-1 {
>> + vbus-supply = <&vdd_5v0_sys>;
>> + };
>> +
>> + usb2-2 {
>> + vbus-supply = <&vdd_5v0_sys>;
>> + };
>> +
>> + usb2-3 {
>> + vbus-supply = <&vdd_5v0_sys>;
>> + };
>> + };
>> + };
>> +
>> rtc@c2a0000 {
>> status = "okay";
>> };
>> @@ -69,4 +92,29 @@ pmc@c360000 {
>> nvidia,invert-interrupt;
>> };
>> };
>> +
>> + vdd_5v0_sys: regulator@0 {
>> + compatible = "regulator-fixed";
>> + regulator-name = "VIN_SYS_5V0";
>> + regulator-min-microvolt = <5000000>;
>> + regulator-max-microvolt = <5000000>;
>> + regulator-always-on;
>> + regulator-boot-on;
>> + };
>> +
>> + vdd_ao_1v8: regulator@1 {
>> + compatible = "regulator-fixed";
>> + regulator-name = "vdd-AO-1v8";
>> + regulator-min-microvolt = <1800000>;
>> + regulator-max-microvolt = <1800000>;
>> + regulator-always-on;
>> + };
>> +
>> + vdd_ao_3v3: regulator@2 {
>> + compatible = "regulator-fixed";
>> + regulator-name = "vdd-AO-3v3";
>> + regulator-min-microvolt = <3300000>;
>> + regulator-max-microvolt = <3300000>;
>> + regulator-always-on;
>> + };
>> };
>> diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts
>> index 57ab75328814..b4630280bb32 100644
>> --- a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts
>> +++ b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts
>> @@ -2011,6 +2011,190 @@ hda@3510000 {
>> nvidia,model = "NVIDIA Jetson AGX Orin HDA";
>> status = "okay";
>> };
>> +
>> + padctl@3520000 {
>> + status = "okay";
>> +
>> + pads {
>> + usb2 {
>> + lanes {
>> + usb2-0 {
>> + status = "okay";
>> + };
>> +
>> + usb2-1 {
>> + status = "okay";
>> + };
>> +
>> + usb2-2 {
>> + status = "okay";
>> + };
>> +
>> + usb2-3 {
>> + status = "okay";
>> + };
>> + };
>> + };
>> +
>> + usb3 {
>> + lanes {
>> + usb3-0 {
>> + status = "okay";
>> + };
>> +
>> + usb3-1 {
>> + status = "okay";
>> + };
>> +
>> + usb3-2 {
>> + status = "okay";
>> + };
>> + };
>> + };
>> + };
>> +
>> + ports {
>> + usb2-0 {
>> + mode = "otg";
>> + usb-role-switch;
>> + status = "okay";
>> + port {
>> + hs_typec_p1: endpoint {
>> + remote-endpoint = <&hs_ucsi_ccg_p1>;
>> + };
>> + };
>> + };
>> +
>> + usb2-1 {
>> + mode = "host";
>> + status = "okay";
>> + port {
>> + hs_typec_p0: endpoint {
>> + remote-endpoint = <&hs_ucsi_ccg_p0>;
>> + };
>> + };
>> + };
>> +
>> + usb2-2 {
>> + mode = "host";
>> + status = "okay";
>> + };
>> +
>> + usb2-3 {
>> + mode = "host";
>> + status = "okay";
>> + };
>> +
>> + usb3-0 {
>> + nvidia,usb2-companion = <1>;
>> + status = "okay";
>> + port {
>> + ss_typec_p0: endpoint {
>> + remote-endpoint = <&ss_ucsi_ccg_p0>;
>> + };
>> + };
>> + };
>> +
>> + usb3-1 {
>> + nvidia,usb2-companion = <0>;
>> + status = "okay";
>> + port {
>> + ss_typec_p1: endpoint {
>> + remote-endpoint = <&ss_ucsi_ccg_p1>;
>> + };
>> + };
>> + };
>> +
>> + usb3-2 {
>> + nvidia,usb2-companion = <3>;
>> + status = "okay";
>> + };
>> + };
>> + };
>> +
>> + usb@3550000 {
>> + status = "okay";
>> +
>> + phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>,
>> + <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-1}>;
>> + phy-names = "usb2-0", "usb3-1";
>> + };
>> +
>> + usb@3610000 {
>> + status = "okay";
>> +
>> + phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>,
>> + <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-1}>,
>> + <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-2}>,
>> + <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-3}>,
>> + <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-0}>,
>> + <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-1}>,
>> + <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-2}>;
>> + phy-names = "usb2-0", "usb2-1", "usb2-2", "usb2-3",
>> + "usb3-0", "usb3-1", "usb3-2";
>> + };
>> +
>> + i2c@c240000 {
>> + status = "okay";
>> + ucsi_ccg: ucsi_ccg@8 {
>
> No underscores in node names.
>
>> + compatible = "cypress,cypd4226";
>> + cypress,firmware-build = "gn";
>> + interrupt-parent = <&gpio>;
>> + interrupts = <TEGRA234_MAIN_GPIO(Y, 4) IRQ_TYPE_LEVEL_LOW>;
>> + reg = <0x08>;
>> + status = "okay";
>
> The pattern of redefining full path in Tegra is confusing - I have no
> clue which of these status=okay are correct which are redundant.
>
> Do you?
I understand you may not like this approach, however, this comment is
not really relevant to just this patch, but a general comment. But yes
we will ensure that this is correct.
>
>
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + ccg_typec_con0: connector@0 {
>> + compatible = "usb-c-connector";
>> + reg = <0>;
>> + label = "USB-C";
>> + data-role = "host";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + port@0 {
>> + reg = <0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>
> Hm, why do you have here cells?
>
> Did you test the DTS with dtbs_check?
That does not look correct and so we will correct.
Thanks!
Jon
--
nvpublic
On 28/10/2022 03:19, Krzysztof Kozlowski wrote:
> On 25/10/2022 04:02, Wayne Chang wrote:
>>
>>>> + power-domain-names:
>>>> + items:
>>>> + - const: xusb_host
>>>> + - const: xusb_ss
>>>
>>> Drop 'xusb_'.
>>
>> The properties are constant and we use the name to get the power domain.
>>
>> tegra->genpd_dev_host = dev_pm_domain_attach_by_name(dev, "xusb_host");
>>
>> tegra->genpd_dev_ss = dev_pm_domain_attach_by_name(dev, "xusb_ss");
>>
>> we might not be able to drop the xusb_
>
> These are new bindings, so why do say they are "constant"? New bindings
> means you did not use them. If you used them before bindings... what can
> we say? Don't?
Not exactly. However, what we should do here is convert the legacy
binding doc [0] and replace with this one. But yes we are stuck with the
'xusb_host' naming.
Jon
[0] Documentation/devicetree/bindings/usb/nvidia,tegra124-xusb.txt
--
nvpublic
On 28/10/2022 10:25, Jon Hunter wrote:
>
> On 28/10/2022 03:19, Krzysztof Kozlowski wrote:
>> On 25/10/2022 04:02, Wayne Chang wrote:
>>>
>>>>> + power-domain-names:
>>>>> + items:
>>>>> + - const: xusb_host
>>>>> + - const: xusb_ss
>>>>
>>>> Drop 'xusb_'.
>>>
>>> The properties are constant and we use the name to get the power domain.
>>>
>>> tegra->genpd_dev_host = dev_pm_domain_attach_by_name(dev,
>>> "xusb_host");
>>>
>>> tegra->genpd_dev_ss = dev_pm_domain_attach_by_name(dev, "xusb_ss");
>>>
>>> we might not be able to drop the xusb_
>>
>> These are new bindings, so why do say they are "constant"? New bindings
>> means you did not use them. If you used them before bindings... what can
>> we say? Don't?
>
> Not exactly. However, what we should do here is convert the legacy
> binding doc [0] and replace with this one. But yes we are stuck with the
> 'xusb_host' naming.
Thierry already has a patch to do this [0]. So we should fix that up and
included in this series.
Jon
[0]
https://lore.kernel.org/linux-tegra/[email protected]/
--
nvpublic
On 28/10/2022 05:33, Jon Hunter wrote:
>>> + ucsi_ccg: ucsi_ccg@8 {
>>
>> No underscores in node names.
>>
>>> + compatible = "cypress,cypd4226";
>>> + cypress,firmware-build = "gn";
>>> + interrupt-parent = <&gpio>;
>>> + interrupts = <TEGRA234_MAIN_GPIO(Y, 4) IRQ_TYPE_LEVEL_LOW>;
>>> + reg = <0x08>;
>>> + status = "okay";
>>
>> The pattern of redefining full path in Tegra is confusing - I have no
>> clue which of these status=okay are correct which are redundant.
>>
>> Do you?
>
> I understand you may not like this approach, however, this comment is
> not really relevant to just this patch, but a general comment. But yes
> we will ensure that this is correct.
>
Just to clarify - this status looks redundant, but I have no way to tell
for sure...
Best regards,
Krzysztof
On Fri, Oct 28, 2022 at 12:07:38PM +0100, Jon Hunter wrote:
>
> On 28/10/2022 10:25, Jon Hunter wrote:
> >
> > On 28/10/2022 03:19, Krzysztof Kozlowski wrote:
> > > On 25/10/2022 04:02, Wayne Chang wrote:
> > > >
> > > > > > + power-domain-names:
> > > > > > + items:
> > > > > > + - const: xusb_host
> > > > > > + - const: xusb_ss
> > > > >
> > > > > Drop 'xusb_'.
> > > >
> > > > The properties are constant and we use the name to get the power domain.
> > > >
> > > > tegra->genpd_dev_host = dev_pm_domain_attach_by_name(dev,
> > > > "xusb_host");
> > > >
> > > > tegra->genpd_dev_ss = dev_pm_domain_attach_by_name(dev, "xusb_ss");
> > > >
> > > > we might not be able to drop the xusb_
> > >
> > > These are new bindings, so why do say they are "constant"? New bindings
> > > means you did not use them. If you used them before bindings... what can
> > > we say? Don't?
> >
> > Not exactly. However, what we should do here is convert the legacy
> > binding doc [0] and replace with this one. But yes we are stuck with the
> > 'xusb_host' naming.
>
>
> Thierry already has a patch to do this [0]. So we should fix that up and
> included in this series.
>
> Jon
>
> [0] https://lore.kernel.org/linux-tegra/[email protected]/
I have a v2 with at least some of the comments addressed. I'll go
through them again and send it out. If we can get that reviewed, it can
be included in this series and the Tegra234 addition be applied on top.
Thierry
On 28/10/2022 12:27, Krzysztof Kozlowski wrote:
> On 28/10/2022 05:33, Jon Hunter wrote:
>>>> + ucsi_ccg: ucsi_ccg@8 {
>>>
>>> No underscores in node names.
>>>
>>>> + compatible = "cypress,cypd4226";
>>>> + cypress,firmware-build = "gn";
>>>> + interrupt-parent = <&gpio>;
>>>> + interrupts = <TEGRA234_MAIN_GPIO(Y, 4) IRQ_TYPE_LEVEL_LOW>;
>>>> + reg = <0x08>;
>>>> + status = "okay";
>>>
>>> The pattern of redefining full path in Tegra is confusing - I have no
>>> clue which of these status=okay are correct which are redundant.
>>>
>>> Do you?
>>
>> I understand you may not like this approach, however, this comment is
>> not really relevant to just this patch, but a general comment. But yes
>> we will ensure that this is correct.
>>
>
> Just to clarify - this status looks redundant, but I have no way to tell
> for sure...
I see. This is the only place where this device appears. I always forget
if we are meant to explicitly set status to okay or just omit.
Personally, I always prefer to be explicit.
Jon
--
nvpublic
On Fri, Oct 28, 2022 at 07:27:09AM -0400, Krzysztof Kozlowski wrote:
> On 28/10/2022 05:33, Jon Hunter wrote:
> >>> + ucsi_ccg: ucsi_ccg@8 {
> >>
> >> No underscores in node names.
> >>
> >>> + compatible = "cypress,cypd4226";
> >>> + cypress,firmware-build = "gn";
> >>> + interrupt-parent = <&gpio>;
> >>> + interrupts = <TEGRA234_MAIN_GPIO(Y, 4) IRQ_TYPE_LEVEL_LOW>;
> >>> + reg = <0x08>;
> >>> + status = "okay";
> >>
> >> The pattern of redefining full path in Tegra is confusing - I have no
> >> clue which of these status=okay are correct which are redundant.
> >>
> >> Do you?
> >
> > I understand you may not like this approach, however, this comment is
> > not really relevant to just this patch, but a general comment. But yes
> > we will ensure that this is correct.
> >
>
> Just to clarify - this status looks redundant, but I have no way to tell
> for sure...
But that's independent of whether we specify this using the full path or
reference the node by label, isn't it? The only way to make sure that a
status = "okay" is not redundant is by manual inspection. I don't know
of an automated way to do that. Perhaps it's something that could be
added as a check to DTC?
In this particular case I don't think the status is needed. As Jon
mentioned, this device is first defined here and status = "okay" is the
default, so this is redundant.
Thierry
On Mon, Oct 24, 2022 at 03:41:27PM +0800, Wayne Chang wrote:
> From: Sing-Han Chen <[email protected]>
>
> This change adds Tegra234 XUSB host mode controller support.
>
> In Tegra234, some of the registers have moved to bar2 space.
> The new soc variable has_bar2 indicates the chip with bar2
> area. This patch adds new reg helper to let the driver reuse
> the same code for those chips with bar2 support.
>
> The new soc variables has_ifr indicates the chip with IFR FW
> loading support. IFR registers would be configured in
> MB1, and FW loading will be triggered in MB2.
>
> Signed-off-by: Sing-Han Chen <[email protected]>
> Co-developed-by: Wayne Chang <[email protected]>
> Signed-off-by: Wayne Chang <[email protected]>
> ---
> drivers/usb/host/xhci-tegra.c | 277 +++++++++++++++++++++++++++++-----
> 1 file changed, 237 insertions(+), 40 deletions(-)
>
> diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c
> index bdb776553826..86036eeece43 100644
> --- a/drivers/usb/host/xhci-tegra.c
> +++ b/drivers/usb/host/xhci-tegra.c
> @@ -44,6 +44,9 @@
> #define XUSB_CFG_4 0x010
> #define XUSB_BASE_ADDR_SHIFT 15
> #define XUSB_BASE_ADDR_MASK 0x1ffff
> +#define XUSB_CFG_7 0x01c
> +#define XUSB_BASE2_ADDR_SHIFT 16
> +#define XUSB_BASE2_ADDR_MASK 0xffff
> #define XUSB_CFG_16 0x040
> #define XUSB_CFG_24 0x060
> #define XUSB_CFG_AXI_CFG 0x0f8
> @@ -75,6 +78,20 @@
> #define MBOX_SMI_INTR_FW_HANG BIT(1)
> #define MBOX_SMI_INTR_EN BIT(3)
>
> +/* BAR2 registers */
> +#define XUSB_BAR2_ARU_MBOX_CMD 0x004
> +#define XUSB_BAR2_ARU_MBOX_DATA_IN 0x008
> +#define XUSB_BAR2_ARU_MBOX_DATA_OUT 0x00c
> +#define XUSB_BAR2_ARU_MBOX_OWNER 0x010
> +#define XUSB_BAR2_ARU_SMI_INTR 0x014
> +#define XUSB_BAR2_ARU_SMI_ARU_FW_SCRATCH_DATA0 0x01c
> +#define XUSB_BAR2_ARU_IFRDMA_CFG0 0x0e0
> +#define XUSB_BAR2_ARU_IFRDMA_CFG1 0x0e4
> +#define XUSB_BAR2_ARU_IFRDMA_STREAMID_FIELD 0x0e8
> +#define XUSB_BAR2_ARU_C11_CSBRANGE 0x9c
> +#define XUSB_BAR2_ARU_FW_SCRATCH 0x1000
> +#define XUSB_BAR2_CSB_BASE_ADDR 0x2000
> +
> /* IPFS registers */
> #define IPFS_XUSB_HOST_MSI_BAR_SZ_0 0x0c0
> #define IPFS_XUSB_HOST_MSI_AXI_BAR_ST_0 0x0c4
> @@ -111,6 +128,9 @@
> #define IMFILLRNG1_TAG_HI_SHIFT 16
> #define XUSB_FALC_IMFILLCTL 0x158
>
> +/* CSB ARU registers */
Weird double-space between "ARU" and "registers".
> +#define XUSB_CSB_ARU_SCRATCH0 0x100100
> +
> /* MP CSB registers */
> #define XUSB_CSB_MP_ILOAD_ATTR 0x101a00
> #define XUSB_CSB_MP_ILOAD_BASE_LO 0x101a04
> @@ -131,6 +151,9 @@
>
> #define IMEM_BLOCK_SIZE 256
>
> +#define FW_IOCTL_TYPE_SHIFT (24)
This should use tabs for spacing, like all the other definitions. Also,
no need to wrap literal integers in parentheses.
> +#define FW_IOCTL_CFGTBL_READ (17)
No need for the parentheses.
> +
> struct tegra_xusb_fw_header {
> __le32 boot_loadaddr_in_imem;
> __le32 boot_codedfi_offset;
> @@ -175,6 +198,7 @@ struct tegra_xusb_mbox_regs {
> u16 data_in;
> u16 data_out;
> u16 owner;
> + u16 smi_intr;
> };
>
> struct tegra_xusb_context_soc {
> @@ -189,6 +213,7 @@ struct tegra_xusb_context_soc {
> } fpci;
> };
>
> +struct tegra_xusb_soc_ops;
Probably better to move the definition of the structure here and instead
predeclare struct tegra_xusb.
> struct tegra_xusb_soc {
> const char *firmware;
> const char * const *supply_names;
> @@ -205,11 +230,15 @@ struct tegra_xusb_soc {
> } ports;
>
> struct tegra_xusb_mbox_regs mbox;
> + struct tegra_xusb_soc_ops *ops;
const please.
>
> bool scale_ss_clock;
> bool has_ipfs;
> bool lpm_support;
> bool otg_reset_sspi;
> +
> + bool has_bar2;
> + bool has_ifr;
> };
>
> struct tegra_xusb_context {
> @@ -230,6 +259,8 @@ struct tegra_xusb {
>
> void __iomem *ipfs_base;
> void __iomem *fpci_base;
> + void __iomem *bar2_base;
> + resource_size_t bar2_start;
Maybe just store struct resource *bar2, here.
[...]
> @@ -664,6 +754,7 @@ static void tegra_xusb_mbox_handle(struct tegra_xusb *tegra,
> static irqreturn_t tegra_xusb_mbox_thread(int irq, void *data)
> {
> struct tegra_xusb *tegra = data;
> + struct tegra_xusb_soc_ops *ops = tegra->soc->ops;
const
> @@ -709,6 +800,15 @@ static void tegra_xusb_config(struct tegra_xusb *tegra)
> value |= regs & (XUSB_BASE_ADDR_MASK << XUSB_BASE_ADDR_SHIFT);
> fpci_writel(tegra, value, XUSB_CFG_4);
>
> + /* Program BAR2 space */
> + if (tegra->soc->has_bar2) {
You could make this depend on tegra->bar2 if you make the change above.
> + value = fpci_readl(tegra, XUSB_CFG_7);
> + value &= ~(XUSB_BASE2_ADDR_MASK << XUSB_BASE2_ADDR_SHIFT);
> + value |= tegra->bar2_start &
> + (XUSB_BASE2_ADDR_MASK << XUSB_BASE2_ADDR_SHIFT);
> + fpci_writel(tegra, value, XUSB_CFG_7);
> + }
> +
> usleep_range(100, 200);
>
> /* Enable bus master */
> @@ -881,21 +981,36 @@ static int tegra_xusb_request_firmware(struct tegra_xusb *tegra)
> return 0;
> }
>
> +static int tegra_xusb_wait_for_falcon(struct tegra_xusb *tegra)
> +{
> + struct xhci_cap_regs __iomem *cap_regs;
> + struct xhci_op_regs __iomem *op_regs;
> + int ret;
> + u32 val;
Use "value" for consistency with the rest of the driver.
> +
> + cap_regs = tegra->regs;
> + op_regs = tegra->regs + HC_LENGTH(readl(&cap_regs->hc_capbase));
> +
> + ret = readl_poll_timeout(&op_regs->status, val, !(val & STS_CNR), 1000, 200000);
> +
> + if (ret)
> + dev_err(tegra->dev, "XHCI Controller not ready. Falcon state: 0x%x\n",
> + csb_readl(tegra, XUSB_FALC_CPUCTL));
> +
> + return ret;
> +}
This refactoring could be a separate patch. It makes the rest of the
changes harder to review. Not necessarily something that needs to be
addressed, though.
> +
> static int tegra_xusb_load_firmware(struct tegra_xusb *tegra)
> {
> unsigned int code_tag_blocks, code_size_blocks, code_blocks;
> - struct xhci_cap_regs __iomem *cap = tegra->regs;
> struct tegra_xusb_fw_header *header;
> struct device *dev = tegra->dev;
> - struct xhci_op_regs __iomem *op;
> - unsigned long timeout;
> time64_t timestamp;
> u64 address;
> u32 value;
> int err;
>
> header = (struct tegra_xusb_fw_header *)tegra->fw.virt;
> - op = tegra->regs + HC_LENGTH(readl(&cap->hc_capbase));
>
> if (csb_readl(tegra, XUSB_CSB_MP_ILOAD_BASE_LO) != 0) {
> dev_info(dev, "Firmware already loaded, Falcon state %#x\n",
> @@ -968,26 +1083,43 @@ static int tegra_xusb_load_firmware(struct tegra_xusb *tegra)
> /* Boot Falcon CPU and wait for USBSTS_CNR to get cleared. */
> csb_writel(tegra, CPUCTL_STARTCPU, XUSB_FALC_CPUCTL);
>
> - timeout = jiffies + msecs_to_jiffies(200);
> + if (tegra_xusb_wait_for_falcon(tegra))
> + return -EIO;
>
> - do {
> - value = readl(&op->status);
> - if ((value & STS_CNR) == 0)
> - break;
> + timestamp = le32_to_cpu(header->fwimg_created_time);
>
> - usleep_range(1000, 2000);
> - } while (time_is_after_jiffies(timeout));
> + dev_info(dev, "Firmware timestamp: %ptTs UTC\n", ×tamp);
> +
> + return 0;
> +}
>
> - value = readl(&op->status);
> - if (value & STS_CNR) {
> - value = csb_readl(tegra, XUSB_FALC_CPUCTL);
> - dev_err(dev, "XHCI controller not read: %#010x\n", value);
> +static u32 tegra_xusb_read_firmware_header(struct tegra_xusb *tegra, u32 offset)
> +{
> + /*
> + * We only accept reading the firmware config table
> + * The offset should not exceed the fw header structure
> + */
> + if (offset >= sizeof(struct tegra_xusb_fw_header))
> + return 0;
You technically still allow reading 3 bytes past the header structure.
Or does the firmware's CFGTL_READ IOCTL mask out the lower 2 bits of the
offset?
> +
> + bar2_writel(tegra, (FW_IOCTL_CFGTBL_READ << FW_IOCTL_TYPE_SHIFT) | offset,
> + XUSB_BAR2_ARU_FW_SCRATCH);
> + return bar2_readl(tegra, XUSB_BAR2_ARU_SMI_ARU_FW_SCRATCH_DATA0);
> +}
> +
> +static int tegra_xusb_init_ifr_firmware(struct tegra_xusb *tegra)
> +{
> + time64_t timestamp;
> +
> + if (tegra_xusb_wait_for_falcon(tegra))
> return -EIO;
> - }
>
> - timestamp = le32_to_cpu(header->fwimg_created_time);
> +#define offsetof_32(X, Y) ((u8)(offsetof(X, Y) / sizeof(__le32)))
> + timestamp = tegra_xusb_read_firmware_header(tegra,
> + offsetof_32(struct tegra_xusb_fw_header,
> + fwimg_created_time) << 2);
>
> - dev_info(dev, "Firmware timestamp: %ptTs UTC\n", ×tamp);
> + dev_info(tegra->dev, "Firmware timestamp: %ptTs UTC\n", ×tamp);
>
> return 0;
> }
> @@ -1403,7 +1535,7 @@ static int tegra_xusb_probe(struct platform_device *pdev)
> struct of_phandle_args args;
> struct tegra_xusb *tegra;
> struct device_node *np;
> - struct resource *regs;
> + struct resource *res, *regs;
> struct xhci_hcd *xhci;
> unsigned int i, j, k;
> struct phy *phy;
> @@ -1435,6 +1567,11 @@ static int tegra_xusb_probe(struct platform_device *pdev)
> tegra->ipfs_base = devm_platform_ioremap_resource(pdev, 2);
> if (IS_ERR(tegra->ipfs_base))
> return PTR_ERR(tegra->ipfs_base);
> + } else if (tegra->soc->has_bar2) {
> + tegra->bar2_base = devm_platform_get_and_ioremap_resource(pdev, 2, &res);
If you store struct resource *bar2 in tegra, you can pass &tegra->bar2
here and ...
> + if (IS_ERR(tegra->bar2_base))
> + return PTR_ERR(tegra->bar2_base);
> + tegra->bar2_start = res->start;
... skip this.
> }
>
> tegra->xhci_irq = platform_get_irq(pdev, 0);
> @@ -1651,10 +1788,13 @@ static int tegra_xusb_probe(struct platform_device *pdev)
> goto disable_phy;
> }
>
> - err = tegra_xusb_request_firmware(tegra);
> - if (err < 0) {
> - dev_err(&pdev->dev, "failed to request firmware: %d\n", err);
> - goto disable_phy;
> + if (!tegra->soc->has_ifr) {
> + err = tegra_xusb_request_firmware(tegra);
> + if (err < 0) {
> + dev_err(&pdev->dev,
> + "failed to request firmware: %d\n", err);
> + goto disable_phy;
> + }
> }
>
> err = tegra_xusb_unpowergate_partitions(tegra);
> @@ -1663,7 +1803,10 @@ static int tegra_xusb_probe(struct platform_device *pdev)
>
> tegra_xusb_config(tegra);
>
> - err = tegra_xusb_load_firmware(tegra);
> + if (tegra->soc->has_ifr)
> + err = tegra_xusb_init_ifr_firmware(tegra);
> + else
> + err = tegra_xusb_load_firmware(tegra);
> if (err < 0) {
> dev_err(&pdev->dev, "failed to load firmware: %d\n", err);
> goto powergate;
> @@ -2070,7 +2213,10 @@ static int tegra_xusb_exit_elpg(struct tegra_xusb *tegra, bool runtime)
> tegra_xusb_config(tegra);
> tegra_xusb_restore_context(tegra);
>
> - err = tegra_xusb_load_firmware(tegra);
> + if (tegra->soc->has_ifr)
> + err = tegra_xusb_init_ifr_firmware(tegra);
> + else
> + err = tegra_xusb_load_firmware(tegra);
Might be worth extracting this into a new function since you use this
twice now.
> if (err < 0) {
> dev_err(tegra->dev, "failed to load firmware: %d\n", err);
> goto disable_phy;
> @@ -2271,6 +2417,13 @@ static const struct tegra_xusb_context_soc tegra124_xusb_context = {
> },
> };
>
> +static struct tegra_xusb_soc_ops tegra124_ops = {
const
> + .mbox_reg_readl = &fpci_readl,
> + .mbox_reg_writel = &fpci_writel,
> + .csb_reg_readl = &fpci_csb_readl,
> + .csb_reg_writel = &fpci_csb_writel,
> +};
> +
> static const struct tegra_xusb_soc tegra124_soc = {
> .firmware = "nvidia/tegra124/xusb.bin",
> .supply_names = tegra124_supply_names,
> @@ -2286,11 +2439,13 @@ static const struct tegra_xusb_soc tegra124_soc = {
> .scale_ss_clock = true,
> .has_ipfs = true,
> .otg_reset_sspi = false,
> + .ops = &tegra124_ops,
> .mbox = {
> .cmd = 0xe4,
> .data_in = 0xe8,
> .data_out = 0xec,
> .owner = 0xf0,
> + .smi_intr = XUSB_CFG_ARU_SMI_INTR,
> },
> };
> MODULE_FIRMWARE("nvidia/tegra124/xusb.bin");
> @@ -2322,11 +2477,13 @@ static const struct tegra_xusb_soc tegra210_soc = {
> .scale_ss_clock = false,
> .has_ipfs = true,
> .otg_reset_sspi = true,
> + .ops = &tegra124_ops,
> .mbox = {
> .cmd = 0xe4,
> .data_in = 0xe8,
> .data_out = 0xec,
> .owner = 0xf0,
> + .smi_intr = XUSB_CFG_ARU_SMI_INTR,
> },
> };
> MODULE_FIRMWARE("nvidia/tegra210/xusb.bin");
> @@ -2363,11 +2520,13 @@ static const struct tegra_xusb_soc tegra186_soc = {
> .scale_ss_clock = false,
> .has_ipfs = false,
> .otg_reset_sspi = false,
> + .ops = &tegra124_ops,
> .mbox = {
> .cmd = 0xe4,
> .data_in = 0xe8,
> .data_out = 0xec,
> .owner = 0xf0,
> + .smi_intr = XUSB_CFG_ARU_SMI_INTR,
> },
> .lpm_support = true,
> };
> @@ -2394,21 +2553,59 @@ static const struct tegra_xusb_soc tegra194_soc = {
> .scale_ss_clock = false,
> .has_ipfs = false,
> .otg_reset_sspi = false,
> + .ops = &tegra124_ops,
> .mbox = {
> .cmd = 0x68,
> .data_in = 0x6c,
> .data_out = 0x70,
> .owner = 0x74,
> + .smi_intr = XUSB_CFG_ARU_SMI_INTR,
> },
> .lpm_support = true,
> };
> MODULE_FIRMWARE("nvidia/tegra194/xusb.bin");
>
> +static struct tegra_xusb_soc_ops tegra234_ops = {
const
> + .mbox_reg_readl = &bar2_readl,
> + .mbox_reg_writel = &bar2_writel,
> + .csb_reg_readl = &bar2_csb_readl,
> + .csb_reg_writel = &bar2_csb_writel,
> +};
> +
> +static const struct tegra_xusb_soc tegra234_soc = {
> + .firmware = "nvidia/tegra234/xusb.bin",
> + .supply_names = tegra194_supply_names,
> + .num_supplies = ARRAY_SIZE(tegra194_supply_names),
> + .phy_types = tegra194_phy_types,
> + .num_types = ARRAY_SIZE(tegra194_phy_types),
> + .context = &tegra186_xusb_context,
> + .ports = {
> + .usb3 = { .offset = 0, .count = 4, },
> + .usb2 = { .offset = 4, .count = 4, },
> + },
> + .scale_ss_clock = false,
> + .has_ipfs = false,
> + .otg_reset_sspi = false,
> + .ops = &tegra234_ops,
> + .mbox = {
> + .cmd = XUSB_BAR2_ARU_MBOX_CMD,
> + .data_in = XUSB_BAR2_ARU_MBOX_DATA_IN,
> + .data_out = XUSB_BAR2_ARU_MBOX_DATA_OUT,
> + .owner = XUSB_BAR2_ARU_MBOX_OWNER,
> + .smi_intr = XUSB_BAR2_ARU_SMI_INTR,
> + },
> + .lpm_support = true,
> + .has_bar2 = true,
> + .has_ifr = true,
> +};
> +MODULE_FIRMWARE("nvidia/tegra234/xusb.bin");
Can you prepare a patch to add this firmware to the linux-firmware
repository? I don't see it there yet.
Thierry
> +
> static const struct of_device_id tegra_xusb_of_match[] = {
> { .compatible = "nvidia,tegra124-xusb", .data = &tegra124_soc },
> { .compatible = "nvidia,tegra210-xusb", .data = &tegra210_soc },
> { .compatible = "nvidia,tegra186-xusb", .data = &tegra186_soc },
> { .compatible = "nvidia,tegra194-xusb", .data = &tegra194_soc },
> + { .compatible = "nvidia,tegra234-xusb", .data = &tegra234_soc },
> { },
> };
> MODULE_DEVICE_TABLE(of, tegra_xusb_of_match);
> --
> 2.25.1
>
On 28/10/2022 08:38, Thierry Reding wrote:
>>>
>>> I understand you may not like this approach, however, this comment is
>>> not really relevant to just this patch, but a general comment. But yes
>>> we will ensure that this is correct.
>>>
>>
>> Just to clarify - this status looks redundant, but I have no way to tell
>> for sure...
>
> But that's independent of whether we specify this using the full path or
> reference the node by label, isn't it? The only way to make sure that a
> status = "okay" is not redundant is by manual inspection. I don't know
> of an automated way to do that. Perhaps it's something that could be
> added as a check to DTC?
With overrides/extends pattern it is easy to spot one case of mistakes -
you see override, then status might be needed might not. You see new
node (like here!) - then status=okay is redundant.
Best regards,
Krzysztof
On 24/10/2022 08:41, Wayne Chang wrote:
> ccgx is refer to the cypress cypd4226 typec controller.
> Replace ccgx to well-known regex "cypress".
>
> Signed-off-by: Wayne Chang <[email protected]>
> ---
> drivers/i2c/busses/i2c-nvidia-gpu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/i2c/busses/i2c-nvidia-gpu.c b/drivers/i2c/busses/i2c-nvidia-gpu.c
> index 12e330cd7635..0934f8ad7f49 100644
> --- a/drivers/i2c/busses/i2c-nvidia-gpu.c
> +++ b/drivers/i2c/busses/i2c-nvidia-gpu.c
> @@ -260,7 +260,7 @@ MODULE_DEVICE_TABLE(pci, gpu_i2c_ids);
>
> static const struct property_entry ccgx_props[] = {
> /* Use FW built for NVIDIA (nv) only */
> - PROPERTY_ENTRY_U16("ccgx,firmware-build", ('n' << 8) | 'v'),
> + PROPERTY_ENTRY_U16("cypress,firmware-build", ('n' << 8) | 'v'),
> { }
> };
>
Could we change this to be PROPERTY_ENTRY_STRING instead of
PROPERTY_ENTRY_U16? The benefit of this would be to allow us to use a
proper string identifier in device-tree for the Tegra devices which is
more flexible and descriptive.
So given that this is for NVIDIA GPUs, we could simply make this ...
PROPERTY_ENTRY_STRING("cypress,firmware-build", "nvidia,gpu"),
Then in the ucsi_ccg.c driver, when we read the device property
"cypress,firmware-build", if it is 'nvidia,gpu' then we set the
uc->fw_build variable to CCG_FW_BUILD_NVIDIA.
Jon
--
nvpublic
On 28/10/2022 14:39, Thierry Reding wrote:
...
>> +static const struct tegra_xusb_soc tegra234_soc = {
>> + .firmware = "nvidia/tegra234/xusb.bin",
>> + .supply_names = tegra194_supply_names,
>> + .num_supplies = ARRAY_SIZE(tegra194_supply_names),
>> + .phy_types = tegra194_phy_types,
>> + .num_types = ARRAY_SIZE(tegra194_phy_types),
>> + .context = &tegra186_xusb_context,
>> + .ports = {
>> + .usb3 = { .offset = 0, .count = 4, },
>> + .usb2 = { .offset = 4, .count = 4, },
>> + },
>> + .scale_ss_clock = false,
>> + .has_ipfs = false,
>> + .otg_reset_sspi = false,
>> + .ops = &tegra234_ops,
>> + .mbox = {
>> + .cmd = XUSB_BAR2_ARU_MBOX_CMD,
>> + .data_in = XUSB_BAR2_ARU_MBOX_DATA_IN,
>> + .data_out = XUSB_BAR2_ARU_MBOX_DATA_OUT,
>> + .owner = XUSB_BAR2_ARU_MBOX_OWNER,
>> + .smi_intr = XUSB_BAR2_ARU_SMI_INTR,
>> + },
>> + .lpm_support = true,
>> + .has_bar2 = true,
>> + .has_ifr = true,
>> +};
>> +MODULE_FIRMWARE("nvidia/tegra234/xusb.bin");
>
> Can you prepare a patch to add this firmware to the linux-firmware
> repository? I don't see it there yet.
Actually, we should remove the MODULE_FIRMWARE completely for Tegra234.
Per the commit message the variable 'has_ifr' is used to indicate if the
firmware is loaded by calling request_firmware() or via these IFR
registers. I wonder if we need this 'has_ifr' variable if we should just
avoid setting the 'firmware' variable for Tegra234 and use this instead
of the 'has_ifr'?
Jon
--
nvpublic
On 10/28/22 19:30, Thierry Reding wrote:
> On Fri, Oct 28, 2022 at 12:07:38PM +0100, Jon Hunter wrote:
>> On 28/10/2022 10:25, Jon Hunter wrote:
>>> On 28/10/2022 03:19, Krzysztof Kozlowski wrote:
>>>> On 25/10/2022 04:02, Wayne Chang wrote:
>>>>>>> + power-domain-names:
>>>>>>> + items:
>>>>>>> + - const: xusb_host
>>>>>>> + - const: xusb_ss
>>>>>> Drop 'xusb_'.
>>>>> The properties are constant and we use the name to get the power domain.
>>>>>
>>>>> tegra->genpd_dev_host = dev_pm_domain_attach_by_name(dev,
>>>>> "xusb_host");
>>>>>
>>>>> tegra->genpd_dev_ss = dev_pm_domain_attach_by_name(dev, "xusb_ss");
>>>>>
>>>>> we might not be able to drop the xusb_
>>>> These are new bindings, so why do say they are "constant"? New bindings
>>>> means you did not use them. If you used them before bindings... what can
>>>> we say? Don't?
>>> Not exactly. However, what we should do here is convert the legacy
>>> binding doc [0] and replace with this one. But yes we are stuck with the
>>> 'xusb_host' naming.
>>
>> Thierry already has a patch to do this [0]. So we should fix that up and
>> included in this series.
>>
>> Jon
>>
>> [0]https://lore.kernel.org/linux-tegra/[email protected]/
> I have a v2 with at least some of the comments addressed. I'll go
> through them again and send it out. If we can get that reviewed, it can
> be included in this series and the Tegra234 addition be applied on top.
Thanks for the help, Thierry. I'll update the binding after your change
got updated.
>
> Thierry
thanks,
Wayne.
On 10/26/22 07:24, Rob Herring wrote:
> External email: Use caution opening links or attachments
>
>
> On Mon, Oct 24, 2022 at 03:41:18PM +0800, Wayne Chang wrote:
>> Extend the Tegra XUSB controller device tree binding with Tegra234
>> support.
>>
>> Signed-off-by: Wayne Chang <[email protected]>
>> ---
>> .../bindings/usb/nvidia,tegra-xudc.yaml | 24 ++++++++++++-------
>> 1 file changed, 16 insertions(+), 8 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml b/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml
>> index fd6e7c81426e..517fb692f199 100644
>> --- a/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml
>> +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml
>> @@ -22,6 +22,7 @@ properties:
>> - nvidia,tegra210-xudc # For Tegra210
>> - nvidia,tegra186-xudc # For Tegra186
>> - nvidia,tegra194-xudc # For Tegra194
>> + - nvidia,tegra234-xudc # For Tegra234
>>
>> reg:
>> minItems: 2
>> @@ -90,21 +91,27 @@ properties:
>>
>> phys:
>> minItems: 1
>> + maxItems: 8
>> description:
>> Must contain an entry for each entry in phy-names.
>> See ../phy/phy-bindings.txt for details.
>>
>> phy-names:
>> minItems: 1
>> + maxItems: 8
>> items:
>> - - const: usb2-0
>> - - const: usb2-1
>> - - const: usb2-2
>> - - const: usb2-3
>> - - const: usb3-0
>> - - const: usb3-1
>> - - const: usb3-2
>> - - const: usb3-3
>> + anyOf:
>> + - const: usb2-0
>> + - const: usb2-1
>> + - const: usb2-2
>> + - const: usb2-3
>> + - const: usb3-0
>> + - const: usb3-1
>> + - const: usb3-2
>> + - const: usb3-3
>
> items:
> pattern: '^usb[23]-[0-3]$'
>
> And an explanation why you need any random order. If it is just
> different for Tegra234, then you need an if/then schema for this.
Thanks for the review.
We need to pick up one or more for the corresponding phys of the USB ports.
It should be a common settings among all the chips.
Adding anyOf here for the reason above and passing the dtb check.
Please let me know If I have any misunderstanding here.
thanks,
Wayne.
>
>> +
>> + dma-coherent:
>> + type: boolean
>>
>> avddio-usb-supply:
>> description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
>> @@ -153,6 +160,7 @@ allOf:
>> enum:
>> - nvidia,tegra186-xudc
>> - nvidia,tegra194-xudc
>> + - nvidia,tegra234-xudc
>> then:
>> properties:
>> reg:
>> --
>> 2.25.1
>>
>>
On 11/1/22 22:53, Jon Hunter wrote:
> On 28/10/2022 14:39, Thierry Reding wrote:
>
> ...
>
>>> +static const struct tegra_xusb_soc tegra234_soc = {
>>> + .firmware = "nvidia/tegra234/xusb.bin",
>>> + .supply_names = tegra194_supply_names,
>>> + .num_supplies = ARRAY_SIZE(tegra194_supply_names),
>>> + .phy_types = tegra194_phy_types,
>>> + .num_types = ARRAY_SIZE(tegra194_phy_types),
>>> + .context = &tegra186_xusb_context,
>>> + .ports = {
>>> + .usb3 = { .offset = 0, .count = 4, },
>>> + .usb2 = { .offset = 4, .count = 4, },
>>> + },
>>> + .scale_ss_clock = false,
>>> + .has_ipfs = false,
>>> + .otg_reset_sspi = false,
>>> + .ops = &tegra234_ops,
>>> + .mbox = {
>>> + .cmd = XUSB_BAR2_ARU_MBOX_CMD,
>>> + .data_in = XUSB_BAR2_ARU_MBOX_DATA_IN,
>>> + .data_out = XUSB_BAR2_ARU_MBOX_DATA_OUT,
>>> + .owner = XUSB_BAR2_ARU_MBOX_OWNER,
>>> + .smi_intr = XUSB_BAR2_ARU_SMI_INTR,
>>> + },
>>> + .lpm_support = true,
>>> + .has_bar2 = true,
>>> + .has_ifr = true,
>>> +};
>>> +MODULE_FIRMWARE("nvidia/tegra234/xusb.bin");
>>
>> Can you prepare a patch to add this firmware to the linux-firmware
>> repository? I don't see it there yet.
>
>
> Actually, we should remove the MODULE_FIRMWARE completely for Tegra234.
> Per the commit message the variable 'has_ifr' is used to indicate if the
> firmware is loaded by calling request_firmware() or via these IFR
> registers. I wonder if we need this 'has_ifr' variable if we should just
> avoid setting the 'firmware' variable for Tegra234 and use this instead
> of the 'has_ifr'?
>
Thanks for the review.
Yes, correct. The firmware loading is moved to MB2 and thus we do not
need it anymore. I'll remove it together with the .firmware in the soc data.
We could checking firmware in soc data instead of has_ifr as we now only
get two ways to load the firmware.
I'll make the change on it in the next patch series
thanks,
Wayne.
> Jon
>
On 11/1/22 23:07, Jon Hunter wrote:
>
> On 24/10/2022 08:41, Wayne Chang wrote:
>> ccgx is refer to the cypress cypd4226 typec controller.
>> Replace ccgx to well-known regex "cypress".
>>
>> Signed-off-by: Wayne Chang <[email protected]>
>> ---
>> drivers/i2c/busses/i2c-nvidia-gpu.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/i2c/busses/i2c-nvidia-gpu.c
>> b/drivers/i2c/busses/i2c-nvidia-gpu.c
>> index 12e330cd7635..0934f8ad7f49 100644
>> --- a/drivers/i2c/busses/i2c-nvidia-gpu.c
>> +++ b/drivers/i2c/busses/i2c-nvidia-gpu.c
>> @@ -260,7 +260,7 @@ MODULE_DEVICE_TABLE(pci, gpu_i2c_ids);
>> static const struct property_entry ccgx_props[] = {
>> /* Use FW built for NVIDIA (nv) only */
>> - PROPERTY_ENTRY_U16("ccgx,firmware-build", ('n' << 8) | 'v'),
>> + PROPERTY_ENTRY_U16("cypress,firmware-build", ('n' << 8) | 'v'),
>> { }
>> };
>
>
> Could we change this to be PROPERTY_ENTRY_STRING instead of
> PROPERTY_ENTRY_U16? The benefit of this would be to allow us to use a
> proper string identifier in device-tree for the Tegra devices which is
> more flexible and descriptive.
>
> So given that this is for NVIDIA GPUs, we could simply make this ...
>
> PROPERTY_ENTRY_STRING("cypress,firmware-build", "nvidia,gpu"),
>
> Then in the ucsi_ccg.c driver, when we read the device property
> "cypress,firmware-build", if it is 'nvidia,gpu' then we set the
> uc->fw_build variable to CCG_FW_BUILD_NVIDIA.
>
Yes, it should be nice to have the change.
Thanks for the review.
I'll make the changes and using string instead of u16 in the next patch
series.
thanks,
Wayne.
> Jon
>