2022-01-10 12:29:54

by Christophe Leroy

Subject: [PATCH] powerpc/bpf: Always reallocate BPF_REG_5, BPF_REG_AX and TMP_REG when possible

BPF_REG_5, BPF_REG_AX and TMP_REG are mapped on non volatile registers
because there are not enough volatile registers, but they don't need
to be preserved on function calls.

So when some volatile registers become available, those registers can
always be reallocated regardless of whether SEEN_FUNC is set or not.

Suggested-by: Naveen N. Rao <[email protected]>
Signed-off-by: Christophe Leroy <[email protected]>
---
arch/powerpc/net/bpf_jit.h | 3 ---
arch/powerpc/net/bpf_jit_comp32.c | 14 +++++++++++---
2 files changed, 11 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/net/bpf_jit.h b/arch/powerpc/net/bpf_jit.h
index b20a2a83a6e7..b75507fc8f6b 100644
--- a/arch/powerpc/net/bpf_jit.h
+++ b/arch/powerpc/net/bpf_jit.h
@@ -127,9 +127,6 @@
#define SEEN_FUNC 0x20000000 /* might call external helpers */
#define SEEN_TAILCALL 0x40000000 /* uses tail calls */

-#define SEEN_VREG_MASK 0x1ff80000 /* Volatile registers r3-r12 */
-#define SEEN_NVREG_MASK 0x0003ffff /* Non volatile registers r14-r31 */
-
#ifdef CONFIG_PPC64
extern const int b2p[MAX_BPF_JIT_REG + 2];
#else
diff --git a/arch/powerpc/net/bpf_jit_comp32.c b/arch/powerpc/net/bpf_jit_comp32.c
index d3a52cd42f53..cfec42c8a511 100644
--- a/arch/powerpc/net/bpf_jit_comp32.c
+++ b/arch/powerpc/net/bpf_jit_comp32.c
@@ -77,14 +77,22 @@ static int bpf_jit_stack_offsetof(struct codegen_context *ctx, int reg)
return BPF_PPC_STACKFRAME(ctx) - 4;
}

+#define SEEN_VREG_MASK 0x1ff80000 /* Volatile registers r3-r12 */
+#define SEEN_NVREG_FULL_MASK 0x0003ffff /* Non volatile registers r14-r31 */
+#define SEEN_NVREG_TEMP_MASK 0x00001e01 /* BPF_REG_5, BPF_REG_AX, TMP_REG */
+
void bpf_jit_realloc_regs(struct codegen_context *ctx)
{
+ unsigned int nvreg_mask;
+
if (ctx->seen & SEEN_FUNC)
- return;
+ nvreg_mask = SEEN_NVREG_TEMP_MASK;
+ else
+ nvreg_mask = SEEN_NVREG_FULL_MASK;

- while (ctx->seen & SEEN_NVREG_MASK &&
+ while (ctx->seen & nvreg_mask &&
(ctx->seen & SEEN_VREG_MASK) != SEEN_VREG_MASK) {
- int old = 32 - fls(ctx->seen & (SEEN_NVREG_MASK & 0xaaaaaaab));
+ int old = 32 - fls(ctx->seen & (nvreg_mask & 0xaaaaaaab));
int new = 32 - fls(~ctx->seen & (SEEN_VREG_MASK & 0xaaaaaaaa));
int i;

--
2.33.1

2022-01-14 07:59:21

by Naveen N. Rao

Subject: Re: [PATCH] powerpc/bpf: Always reallocate BPF_REG_5, BPF_REG_AX and TMP_REG when possible

Christophe Leroy wrote:
> BPF_REG_5, BPF_REG_AX and TMP_REG are mapped on non volatile registers
> because there are not enough volatile registers, but they don't need
> to be preserved on function calls.
>
> So when some volatile registers become available, those registers can
> always be reallocated regardless of whether SEEN_FUNC is set or not.
>
> Suggested-by: Naveen N. Rao <[email protected]>
> Signed-off-by: Christophe Leroy <[email protected]>
> ---
> arch/powerpc/net/bpf_jit.h | 3 ---
> arch/powerpc/net/bpf_jit_comp32.c | 14 +++++++++++---
> 2 files changed, 11 insertions(+), 6 deletions(-)
>
> diff --git a/arch/powerpc/net/bpf_jit.h b/arch/powerpc/net/bpf_jit.h
> index b20a2a83a6e7..b75507fc8f6b 100644
> --- a/arch/powerpc/net/bpf_jit.h
> +++ b/arch/powerpc/net/bpf_jit.h
> @@ -127,9 +127,6 @@
> #define SEEN_FUNC 0x20000000 /* might call external helpers */
> #define SEEN_TAILCALL 0x40000000 /* uses tail calls */
>
> -#define SEEN_VREG_MASK 0x1ff80000 /* Volatile registers r3-r12 */
> -#define SEEN_NVREG_MASK 0x0003ffff /* Non volatile registers r14-r31 */
> -
> #ifdef CONFIG_PPC64
> extern const int b2p[MAX_BPF_JIT_REG + 2];
> #else
> diff --git a/arch/powerpc/net/bpf_jit_comp32.c b/arch/powerpc/net/bpf_jit_comp32.c
> index d3a52cd42f53..cfec42c8a511 100644
> --- a/arch/powerpc/net/bpf_jit_comp32.c
> +++ b/arch/powerpc/net/bpf_jit_comp32.c
> @@ -77,14 +77,22 @@ static int bpf_jit_stack_offsetof(struct codegen_context *ctx, int reg)
> return BPF_PPC_STACKFRAME(ctx) - 4;
> }
>
> +#define SEEN_VREG_MASK 0x1ff80000 /* Volatile registers r3-r12 */
> +#define SEEN_NVREG_FULL_MASK 0x0003ffff /* Non volatile registers r14-r31 */
> +#define SEEN_NVREG_TEMP_MASK 0x00001e01 /* BPF_REG_5, BPF_REG_AX, TMP_REG */

Could have been named better: SEEN_NVREG_BPF_VGER_MASK, or such.
Apart from that:
Reviewed-by: Naveen N. Rao <[email protected]>

2022-01-14 08:03:53

by Christophe Leroy

Subject: Re: [PATCH] powerpc/bpf: Always reallocate BPF_REG_5, BPF_REG_AX and TMP_REG when possible

Le 14/01/2022 à 08:58, Naveen N. Rao a écrit :
> Christophe Leroy wrote:
>> BPF_REG_5, BPF_REG_AX and TMP_REG are mapped on non volatile registers
>> because there are not enough volatile registers, but they don't need
>> to be preserved on function calls.
>>
>> So when some volatile registers become available, those registers can
>> always be reallocated regardless of whether SEEN_FUNC is set or not.
>>
>> Suggested-by: Naveen N. Rao <[email protected]>
>> Signed-off-by: Christophe Leroy <[email protected]>
>> ---
>>  arch/powerpc/net/bpf_jit.h        |  3 ---
>>  arch/powerpc/net/bpf_jit_comp32.c | 14 +++++++++++---
>>  2 files changed, 11 insertions(+), 6 deletions(-)
>>
>> diff --git a/arch/powerpc/net/bpf_jit.h b/arch/powerpc/net/bpf_jit.h
>> index b20a2a83a6e7..b75507fc8f6b 100644
>> --- a/arch/powerpc/net/bpf_jit.h
>> +++ b/arch/powerpc/net/bpf_jit.h
>> @@ -127,9 +127,6 @@
>>  #define SEEN_FUNC    0x20000000 /* might call external helpers */
>>  #define SEEN_TAILCALL    0x40000000 /* uses tail calls */
>>
>> -#define SEEN_VREG_MASK    0x1ff80000 /* Volatile registers r3-r12 */
>> -#define SEEN_NVREG_MASK    0x0003ffff /* Non volatile registers
>> r14-r31 */
>> -
>>  #ifdef CONFIG_PPC64
>>  extern const int b2p[MAX_BPF_JIT_REG + 2];
>>  #else
>> diff --git a/arch/powerpc/net/bpf_jit_comp32.c
>> b/arch/powerpc/net/bpf_jit_comp32.c
>> index d3a52cd42f53..cfec42c8a511 100644
>> --- a/arch/powerpc/net/bpf_jit_comp32.c
>> +++ b/arch/powerpc/net/bpf_jit_comp32.c
>> @@ -77,14 +77,22 @@ static int bpf_jit_stack_offsetof(struct
>> codegen_context *ctx, int reg)
>>      return BPF_PPC_STACKFRAME(ctx) - 4;
>>  }
>>
>> +#define SEEN_VREG_MASK        0x1ff80000 /* Volatile registers r3-r12 */
>> +#define SEEN_NVREG_FULL_MASK    0x0003ffff /* Non volatile registers
>> r14-r31 */
>> +#define SEEN_NVREG_TEMP_MASK    0x00001e01 /* BPF_REG_5, BPF_REG_AX,
>> TMP_REG */
>
> Could have been named better: SEEN_NVREG_BPF_VGER_MASK, or such.

Yes, I was suffering from a lack of inspiration.

What does BPF_VGER mean ?


> Apart from that:
> Reviewed-by: Naveen N. Rao <[email protected]>
>

Thanks

2022-01-14 10:37:36

by Naveen N. Rao

Subject: Re: [PATCH] powerpc/bpf: Always reallocate BPF_REG_5, BPF_REG_AX and TMP_REG when possible

Christophe Leroy wrote:
>
>
> Le 14/01/2022 à 08:58, Naveen N. Rao a écrit :
>> Christophe Leroy wrote:
>>> BPF_REG_5, BPF_REG_AX and TMP_REG are mapped on non volatile registers
>>> because there are not enough volatile registers, but they don't need
>>> to be preserved on function calls.
>>>
>>> So when some volatile registers become available, those registers can
>>> always be reallocated regardless of whether SEEN_FUNC is set or not.
>>>
>>> Suggested-by: Naveen N. Rao <[email protected]>
>>> Signed-off-by: Christophe Leroy <[email protected]>
>>> ---
>>>  arch/powerpc/net/bpf_jit.h        |  3 ---
>>>  arch/powerpc/net/bpf_jit_comp32.c | 14 +++++++++++---
>>>  2 files changed, 11 insertions(+), 6 deletions(-)
>>>
>>> diff --git a/arch/powerpc/net/bpf_jit.h b/arch/powerpc/net/bpf_jit.h
>>> index b20a2a83a6e7..b75507fc8f6b 100644
>>> --- a/arch/powerpc/net/bpf_jit.h
>>> +++ b/arch/powerpc/net/bpf_jit.h
>>> @@ -127,9 +127,6 @@
>>>  #define SEEN_FUNC    0x20000000 /* might call external helpers */
>>>  #define SEEN_TAILCALL    0x40000000 /* uses tail calls */
>>>
>>> -#define SEEN_VREG_MASK    0x1ff80000 /* Volatile registers r3-r12 */
>>> -#define SEEN_NVREG_MASK    0x0003ffff /* Non volatile registers
>>> r14-r31 */
>>> -
>>>  #ifdef CONFIG_PPC64
>>>  extern const int b2p[MAX_BPF_JIT_REG + 2];
>>>  #else
>>> diff --git a/arch/powerpc/net/bpf_jit_comp32.c
>>> b/arch/powerpc/net/bpf_jit_comp32.c
>>> index d3a52cd42f53..cfec42c8a511 100644
>>> --- a/arch/powerpc/net/bpf_jit_comp32.c
>>> +++ b/arch/powerpc/net/bpf_jit_comp32.c
>>> @@ -77,14 +77,22 @@ static int bpf_jit_stack_offsetof(struct
>>> codegen_context *ctx, int reg)
>>>      return BPF_PPC_STACKFRAME(ctx) - 4;
>>>  }
>>>
>>> +#define SEEN_VREG_MASK        0x1ff80000 /* Volatile registers r3-r12 */
>>> +#define SEEN_NVREG_FULL_MASK    0x0003ffff /* Non volatile registers
>>> r14-r31 */
>>> +#define SEEN_NVREG_TEMP_MASK    0x00001e01 /* BPF_REG_5, BPF_REG_AX,
>>> TMP_REG */
>>
>> Could have been named better: SEEN_NVREG_BPF_VGER_MASK, or such.
>
> Yes, I was suffering from a lack of inspiration.
>
> What does BPF_VGER mean ?

That I was suffering from a lack of caffeine.

I meant to suggest BPF_VREG, to indicate those are BPF volatile
registers.


- Naveen

2022-02-16 12:58:18

by Michael Ellerman

Subject: Re: [PATCH] powerpc/bpf: Always reallocate BPF_REG_5, BPF_REG_AX and TMP_REG when possible

On Mon, 10 Jan 2022 12:29:42 +0000, Christophe Leroy wrote:
> BPF_REG_5, BPF_REG_AX and TMP_REG are mapped on non volatile registers
> because there are not enough volatile registers, but they don't need
> to be preserved on function calls.
>
> So when some volatile registers become available, those registers can
> always be reallocated regardless of whether SEEN_FUNC is set or not.
>
> [...]

Applied to powerpc/next.

[1/1] powerpc/bpf: Always reallocate BPF_REG_5, BPF_REG_AX and TMP_REG when possible
https://git.kernel.org/powerpc/c/a8936569a07bf27cc9cfc2a39a1e5ea91273b2d4

cheers