v2:
- Addressed all comments by Marc Zyngier.
- Moved interrupt routing symbols to device tree interrupt-map. Parsing
is done similar to the renesas,rza1-irqc driver.
Bert Vermeulen (2):
dt-bindings: interrupt-controller: Add Realtek RTL838x/RTL839x support
irqchip: Add support for Realtek RTL838x/RTL839x IRQ controller
.../realtek,rtl-intc.yaml | 57 ++++++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-realtek-rtl.c | 180 ++++++++++++++++++
3 files changed, 238 insertions(+)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/realtek,rtl-intc.yaml
create mode 100644 drivers/irqchip/irq-realtek-rtl.c
--
2.25.1
This is a standard IRQ driver with only status and mask registers.
The mapping from SoC interrupts (18-31) to MIPS core interrupts is
done via an interrupt-map in device tree.
Signed-off-by: Bert Vermeulen <[email protected]>
---
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-realtek-rtl.c | 180 ++++++++++++++++++++++++++++++
2 files changed, 181 insertions(+)
create mode 100644 drivers/irqchip/irq-realtek-rtl.c
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 0ac93bfaec61..4fc1086bed7e 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -113,3 +113,4 @@ obj-$(CONFIG_LOONGSON_PCH_PIC) += irq-loongson-pch-pic.o
obj-$(CONFIG_LOONGSON_PCH_MSI) += irq-loongson-pch-msi.o
obj-$(CONFIG_MST_IRQ) += irq-mst-intc.o
obj-$(CONFIG_SL28CPLD_INTC) += irq-sl28cpld.o
+obj-$(CONFIG_MACH_REALTEK_RTL) += irq-realtek-rtl.o
diff --git a/drivers/irqchip/irq-realtek-rtl.c b/drivers/irqchip/irq-realtek-rtl.c
new file mode 100644
index 000000000000..bafe9ee4a85a
--- /dev/null
+++ b/drivers/irqchip/irq-realtek-rtl.c
@@ -0,0 +1,180 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2006-2012 Tony Wu <[email protected]>
+ * Copyright (C) 2020 Birger Koblitz <[email protected]>
+ * Copyright (C) 2020 Bert Vermeulen <[email protected]>
+ * Copyright (C) 2020 John Crispin <[email protected]>
+ */
+
+#include <linux/of_irq.h>
+#include <linux/irqchip.h>
+#include <linux/spinlock.h>
+#include <linux/of_address.h>
+#include <linux/irqchip/chained_irq.h>
+
+/* Global Interrupt Mask Register */
+#define RTL_ICTL_GIMR 0x00
+/* Global Interrupt Status Register */
+#define RTL_ICTL_GISR 0x04
+/* Interrupt Routing Registers */
+#define RTL_ICTL_IRR0 0x08
+#define RTL_ICTL_IRR1 0x0c
+#define RTL_ICTL_IRR2 0x10
+#define RTL_ICTL_IRR3 0x14
+
+#define REG(x) (realtek_ictl_base + x)
+
+static DEFINE_RAW_SPINLOCK(irq_lock);
+static void __iomem *realtek_ictl_base;
+
+static void realtek_ictl_unmask_irq(struct irq_data *i)
+{
+ unsigned long flags;
+ u32 value;
+
+ raw_spin_lock_irqsave(&irq_lock, flags);
+
+ value = readl(REG(RTL_ICTL_GIMR));
+ value |= BIT(i->hwirq);
+ writel(value, REG(RTL_ICTL_GIMR));
+
+ raw_spin_unlock_irqrestore(&irq_lock, flags);
+}
+
+static void realtek_ictl_mask_irq(struct irq_data *i)
+{
+ unsigned long flags;
+ u32 value;
+
+ raw_spin_lock_irqsave(&irq_lock, flags);
+
+ value = readl(REG(RTL_ICTL_GIMR));
+ value &= ~BIT(i->hwirq);
+ writel(value, REG(RTL_ICTL_GIMR));
+
+ raw_spin_unlock_irqrestore(&irq_lock, flags);
+}
+
+static struct irq_chip realtek_ictl_irq = {
+ .name = "realtek-rtl-intc",
+ .irq_mask = realtek_ictl_mask_irq,
+ .irq_unmask = realtek_ictl_unmask_irq,
+};
+
+static int intc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
+{
+ irq_set_chip_and_handler(hw, &realtek_ictl_irq, handle_level_irq);
+
+ return 0;
+}
+
+static const struct irq_domain_ops irq_domain_ops = {
+ .map = intc_map,
+ .xlate = irq_domain_xlate_onecell,
+};
+
+static void realtek_irq_dispatch(struct irq_desc *desc)
+{
+ struct irq_chip *chip = irq_desc_get_chip(desc);
+ struct irq_domain *domain;
+ unsigned int pending;
+
+ chained_irq_enter(chip, desc);
+ pending = readl(REG(RTL_ICTL_GIMR)) & readl(REG(RTL_ICTL_GISR));
+ if (unlikely(!pending)) {
+ spurious_interrupt();
+ goto out;
+ }
+ domain = irq_desc_get_handler_data(desc);
+ generic_handle_irq(irq_find_mapping(domain, __ffs(pending)));
+
+out:
+ chained_irq_exit(chip, desc);
+}
+
+/*
+ * SoC interrupts are cascaded to MIPS CPU interrupts according to the
+ * interrupt-map in the device tree. Each SoC interrupt gets 4 bits for
+ * the CPU interrupt in an Interrupt Routing Register. Max 32 SoC interrupts
+ * thus go into 4 IRRs.
+ */
+static int __init map_interrupts(struct device_node *node)
+{
+ struct device_node *cpu_ictl;
+ const __be32 *imap;
+ u32 imaplen, soc_int, cpu_int, tmp, regs[4];
+ int ret, i, irr_regs[] = {
+ RTL_ICTL_IRR3,
+ RTL_ICTL_IRR2,
+ RTL_ICTL_IRR1,
+ RTL_ICTL_IRR0,
+ };
+
+ ret = of_property_read_u32(node, "#address-cells", &tmp);
+ if (ret || tmp)
+ return -EINVAL;
+
+ imap = of_get_property(node, "interrupt-map", &imaplen);
+ if (!imap || imaplen % 3)
+ return -EINVAL;
+
+ memset(regs, 0, sizeof(regs));
+ for (i = 0; i < imaplen; i += 3 * sizeof(u32)) {
+ soc_int = be32_to_cpup(imap);
+ if (soc_int > 31)
+ return -EINVAL;
+
+ cpu_ictl = of_find_node_by_phandle(be32_to_cpup(imap + 1));
+ if (!cpu_ictl)
+ return -EINVAL;
+ ret = of_property_read_u32(cpu_ictl, "#interrupt-cells", &tmp);
+ if (ret || tmp != 1)
+ return -EINVAL;
+ of_node_put(cpu_ictl);
+
+ cpu_int = be32_to_cpup(imap + 2);
+ if (cpu_int > 7)
+ return -EINVAL;
+
+ regs[(soc_int * 4) / 32] |= cpu_int << (soc_int * 4) % 32;
+ imap += 3;
+ }
+
+ for (i = 0; i < 4; i++)
+ writel(regs[i], REG(irr_regs[i]));
+
+ return 0;
+}
+
+static int __init realtek_rtl_of_init(struct device_node *node, struct device_node *parent)
+{
+ struct irq_domain *domain;
+ int ret;
+
+ domain = irq_domain_add_simple(node, 32, 0,
+ &irq_domain_ops, NULL);
+ irq_set_chained_handler_and_data(2, realtek_irq_dispatch, domain);
+ irq_set_chained_handler_and_data(3, realtek_irq_dispatch, domain);
+ irq_set_chained_handler_and_data(4, realtek_irq_dispatch, domain);
+ irq_set_chained_handler_and_data(5, realtek_irq_dispatch, domain);
+
+ realtek_ictl_base = of_iomap(node, 0);
+ if (!realtek_ictl_base)
+ return -ENXIO;
+
+ /* Disable all cascaded interrupts */
+ writel(0, REG(RTL_ICTL_GIMR));
+
+ ret = map_interrupts(node);
+ if (ret) {
+ pr_err("invalid interrupt map\n");
+ return ret;
+ }
+
+ /* Clear timer interrupt */
+ write_c0_compare(0);
+
+ return 0;
+}
+
+IRQCHIP_DECLARE(realtek_rtl_intc, "realtek,rtl-intc", realtek_rtl_of_init);
--
2.25.1
Signed-off-by: Bert Vermeulen <[email protected]>
---
.../realtek,rtl-intc.yaml | 57 +++++++++++++++++++
1 file changed, 57 insertions(+)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/realtek,rtl-intc.yaml
diff --git a/Documentation/devicetree/bindings/interrupt-controller/realtek,rtl-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/realtek,rtl-intc.yaml
new file mode 100644
index 000000000000..e9b18a65cafb
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/realtek,rtl-intc.yaml
@@ -0,0 +1,57 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/realtek,rtl-intc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Realtek RTL SoC interrupt controller devicetree bindings
+
+maintainers:
+ - Birger Koblitz <[email protected]>
+ - Bert Vermeulen <[email protected]>
+ - John Crispin <[email protected]>
+
+properties:
+ compatible:
+ const: realtek,rtl-intc
+
+ "#interrupt-cells":
+ const: 1
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-controller: true
+
+ "#address-cells":
+ const: 0
+
+ interrupt-map:
+ maxItems: 24
+ description: Describes mapping from SoC interrupts to CPU interrupts
+
+required:
+ - compatible
+ - reg
+ - "#interrupt-cells"
+ - interrupt-controller
+ - "#address-cells"
+ - interrupt-map
+
+additionalProperties: false
+
+examples:
+ - |
+ intc: interrupt-controller@3000 {
+ compatible = "realtek,rtl-intc";
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ reg = <0x3000 0x20>;
+ #address-cells = <0>;
+ interrupt-map =
+ <31 &cpuintc 2>,
+ <30 &cpuintc 1>;
+ }
--
2.25.1
On Mon, 04 Jan 2021 14:17:54 +0100, Bert Vermeulen wrote:
> Signed-off-by: Bert Vermeulen <[email protected]>
> ---
> .../realtek,rtl-intc.yaml | 57 +++++++++++++++++++
> 1 file changed, 57 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/realtek,rtl-intc.yaml
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/interrupt-controller/realtek,rtl-intc.yaml: properties: 'interrupt-map-mask' is a dependency of 'interrupt-map'
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/interrupt-controller/realtek,rtl-intc.yaml: ignoring, error in schema: properties
warning: no schema found in file: ./Documentation/devicetree/bindings/interrupt-controller/realtek,rtl-intc.yaml
Error: Documentation/devicetree/bindings/interrupt-controller/realtek,rtl-intc.example.dts:30.5-6 syntax error
FATAL ERROR: Unable to parse input tree
make[1]: *** [scripts/Makefile.lib:344: Documentation/devicetree/bindings/interrupt-controller/realtek,rtl-intc.example.dt.yaml] Error 1
make: *** [Makefile:1370: dt_binding_check] Error 2
See https://patchwork.ozlabs.org/patch/1422078
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
On 1/5/21 6:04 PM, Rob Herring wrote:
> On Mon, 04 Jan 2021 14:17:54 +0100, Bert Vermeulen wrote:
>> Signed-off-by: Bert Vermeulen <[email protected]>
>> ---
>> .../realtek,rtl-intc.yaml | 57 +++++++++++++++++++
>> 1 file changed, 57 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/realtek,rtl-intc.yaml
>>
>
> My bot found errors running 'make dt_binding_check' on your patch:
I fixed the syntax error that caused this to fail. But running the test now
produces some errors that are not so obvious:
interrupt-controller@3000: interrupt-map: [[31, 4294967295, 2], [30,
4294967295, 1], [29, 4294967295, 5]] is too short
Not sure where this comes from, but running dt-validate -v gives this:
Failed validating 'minItems' in schema['properties']['interrupt-map']:
{'maxItems': 24, 'minItems': 24}
Where did that 24 come from? I don't even have 24 initerrupts to map :-)
Another error is this:
interrupt-controller@3000: 'interrupt-map-mask' is a dependency of
'interrupt-map'
I can see this in your dtschema package's schemas/interrupt-controller.yaml
where it's defined as a dependency, but why? I don't need that property.
--
Bert Vermeulen
[email protected]
On Wed, Jan 6, 2021 at 2:55 AM Bert Vermeulen <[email protected]> wrote:
>
> On 1/5/21 6:04 PM, Rob Herring wrote:
> > On Mon, 04 Jan 2021 14:17:54 +0100, Bert Vermeulen wrote:
> >> Signed-off-by: Bert Vermeulen <[email protected]>
> >> ---
> >> .../realtek,rtl-intc.yaml | 57 +++++++++++++++++++
> >> 1 file changed, 57 insertions(+)
> >> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/realtek,rtl-intc.yaml
> >>
> >
> > My bot found errors running 'make dt_binding_check' on your patch:
>
> I fixed the syntax error that caused this to fail. But running the test now
> produces some errors that are not so obvious:
>
> interrupt-controller@3000: interrupt-map: [[31, 4294967295, 2], [30,
> 4294967295, 1], [29, 4294967295, 5]] is too short
>
> Not sure where this comes from, but running dt-validate -v gives this:
>
> Failed validating 'minItems' in schema['properties']['interrupt-map']:
> {'maxItems': 24, 'minItems': 24}
>
> Where did that 24 come from? I don't even have 24 initerrupts to map :-)
If you don't define minItems, then the default is the same as
maxItems. So you need to set 'minItems'.
>
> Another error is this:
>
> interrupt-controller@3000: 'interrupt-map-mask' is a dependency of
> 'interrupt-map'
>
> I can see this in your dtschema package's schemas/interrupt-controller.yaml
> where it's defined as a dependency, but why? I don't need that property.
This should be the other way around. I'll fix it.
Rob
John,
On 2021-02-02 15:33, John Crispin wrote:
> On 04.01.21 14:17, Bert Vermeulen wrote:
>> This is a standard IRQ driver with only status and mask registers.
>>
>> The mapping from SoC interrupts (18-31) to MIPS core interrupts is
>> done via an interrupt-map in device tree.
>>
>> Signed-off-by: Bert Vermeulen <[email protected]>
> Signed-off-by: John Crispin <[email protected]>
There is already a v4 on the list[1], so you may want to comment on that
one.
It would also help if you'd give a reason for your SoB to be added.
Or did you mean to Ack the patch?
Thanks,
M.
[1] https://lore.kernel.ortg/r/[email protected]
--
Jazz is not dead. It just smells funny...