2024-03-21 08:14:48

by Xu Yang

[permalink] [raw]
Subject: [PATCH v10 01/11] dt-bindings: usb: usbmisc-imx: add fsl,imx8ulp-usbmisc compatible

Add "fsl,imx8ulp-usbmisc" compatible.

Acked-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Xu Yang <[email protected]>

---
Changes in v3:
- new patch due to missed this little one
Changes in v4:
- no changes
Changes in v5:
- add Acked-by tag
Changes in v6:
- no changes
Changes in v7:
- no changes
Changes in v8:
- no changes
Changes in v9:
- no changes
Changes in v10:
- no changes
---
Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml b/Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml
index 2d3589d284b2..0a6e7ac1b37e 100644
--- a/Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml
+++ b/Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml
@@ -33,6 +33,7 @@ properties:
- fsl,imx7ulp-usbmisc
- fsl,imx8mm-usbmisc
- fsl,imx8mn-usbmisc
+ - fsl,imx8ulp-usbmisc
- const: fsl,imx7d-usbmisc
- const: fsl,imx6q-usbmisc
- items:
--
2.34.1



2024-03-21 08:15:04

by Xu Yang

[permalink] [raw]
Subject: [PATCH v10 02/11] arm64: dts: imx8ulp: add usb nodes

Add USB nodes on i.MX8ULP platform which has 2 USB controllers.

Signed-off-by: Xu Yang <[email protected]>

---
Changes in v2:
- no changes
Changes in v3:
- no changes
Changes in v4:
- no changes
Changes in v5:
- no changes
Changes in v6:
- drop usbphy aliases
Changes in v7:
- no changes
Changes in v8:
- no changes
Changes in v9:
- no changes
Changes in v10:
- no changes
---
arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 62 ++++++++++++++++++++++
1 file changed, 62 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
index c4a0082f30d3..7da9461a5745 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
@@ -472,6 +472,68 @@ usdhc2: mmc@298f0000 {
status = "disabled";
};

+ usbotg1: usb@29900000 {
+ compatible = "fsl,imx8ulp-usb", "fsl,imx7ulp-usb", "fsl,imx6ul-usb";
+ reg = <0x29900000 0x200>;
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pcc4 IMX8ULP_CLK_USB0>;
+ power-domains = <&scmi_devpd IMX8ULP_PD_USB0>;
+ phys = <&usbphy1>;
+ fsl,usbmisc = <&usbmisc1 0>;
+ ahb-burst-config = <0x0>;
+ tx-burst-size-dword = <0x8>;
+ rx-burst-size-dword = <0x8>;
+ status = "disabled";
+ };
+
+ usbmisc1: usbmisc@29900200 {
+ compatible = "fsl,imx8ulp-usbmisc", "fsl,imx7d-usbmisc",
+ "fsl,imx6q-usbmisc";
+ #index-cells = <1>;
+ reg = <0x29900200 0x200>;
+ status = "disabled";
+ };
+
+ usbphy1: usb-phy@29910000 {
+ compatible = "fsl,imx8ulp-usbphy", "fsl,imx7ulp-usbphy";
+ reg = <0x29910000 0x10000>;
+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pcc4 IMX8ULP_CLK_USB0_PHY>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
+ usbotg2: usb@29920000 {
+ compatible = "fsl,imx8ulp-usb", "fsl,imx7ulp-usb", "fsl,imx6ul-usb";
+ reg = <0x29920000 0x200>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pcc4 IMX8ULP_CLK_USB1>;
+ power-domains = <&scmi_devpd IMX8ULP_PD_USDHC2_USB1>;
+ phys = <&usbphy2>;
+ fsl,usbmisc = <&usbmisc2 0>;
+ ahb-burst-config = <0x0>;
+ tx-burst-size-dword = <0x8>;
+ rx-burst-size-dword = <0x8>;
+ status = "disabled";
+ };
+
+ usbmisc2: usbmisc@29920200 {
+ compatible = "fsl,imx8ulp-usbmisc", "fsl,imx7d-usbmisc",
+ "fsl,imx6q-usbmisc";
+ #index-cells = <1>;
+ reg = <0x29920200 0x200>;
+ status = "disabled";
+ };
+
+ usbphy2: usb-phy@29930000 {
+ compatible = "fsl,imx8ulp-usbphy", "fsl,imx7ulp-usbphy";
+ reg = <0x29930000 0x10000>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pcc4 IMX8ULP_CLK_USB1_PHY>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
fec: ethernet@29950000 {
compatible = "fsl,imx8ulp-fec", "fsl,imx6ul-fec", "fsl,imx6q-fec";
reg = <0x29950000 0x10000>;
--
2.34.1


2024-03-21 08:15:21

by Xu Yang

[permalink] [raw]
Subject: [PATCH v10 03/11] arm64: dts: imx8ulp-evk: enable usb nodes and add ptn5150 nodes

Enable 2 USB nodes and add 2 PTN5150 nodes on i.MX8ULP evk board.

Signed-off-by: Xu Yang <[email protected]>

---
Changes in v2:
- fix format as suggusted by Fabio
- add PTN5150 nodes
Changes in v3:
- no changes
Changes in v4:
- no changes
Changes in v5:
- no changes
Changes in v6:
- no changes
Changes in v7:
- no changes
Changes in v8:
- no changes
Changes in v9:
- no changes
Changes in v10:
- no changes
---
arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 84 +++++++++++++++++++
1 file changed, 84 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
index 69dd8e31027c..bf418af31039 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
@@ -133,6 +133,64 @@ pcal6408: gpio@21 {
gpio-controller;
#gpio-cells = <2>;
};
+
+ ptn5150_1: typec@1d {
+ compatible = "nxp,ptn5150";
+ reg = <0x1d>;
+ int-gpios = <&gpiof 3 IRQ_TYPE_EDGE_FALLING>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_typec1>;
+ status = "disabled";
+ };
+
+ ptn5150_2: typec@3d {
+ compatible = "nxp,ptn5150";
+ reg = <0x3d>;
+ int-gpios = <&gpiof 5 IRQ_TYPE_EDGE_FALLING>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_typec2>;
+ status = "disabled";
+ };
+};
+
+&usbotg1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb1>;
+ dr_mode = "otg";
+ hnp-disable;
+ srp-disable;
+ adp-disable;
+ over-current-active-low;
+ status = "okay";
+};
+
+&usbphy1 {
+ fsl,tx-d-cal = <110>;
+ status = "okay";
+};
+
+&usbmisc1 {
+ status = "okay";
+};
+
+&usbotg2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb2>;
+ dr_mode = "otg";
+ hnp-disable;
+ srp-disable;
+ adp-disable;
+ over-current-active-low;
+ status = "okay";
+};
+
+&usbphy2 {
+ fsl,tx-d-cal = <110>;
+ status = "okay";
+};
+
+&usbmisc2 {
+ status = "okay";
};

&usdhc0 {
@@ -224,6 +282,32 @@ MX8ULP_PAD_PTE13__LPI2C7_SDA 0x20
>;
};

+ pinctrl_typec1: typec1grp {
+ fsl,pins = <
+ MX8ULP_PAD_PTF3__PTF3 0x3
+ >;
+ };
+
+ pinctrl_typec2: typec2grp {
+ fsl,pins = <
+ MX8ULP_PAD_PTF5__PTF5 0x3
+ >;
+ };
+
+ pinctrl_usb1: usb1grp {
+ fsl,pins = <
+ MX8ULP_PAD_PTF2__USB0_ID 0x10003
+ MX8ULP_PAD_PTF4__USB0_OC 0x10003
+ >;
+ };
+
+ pinctrl_usb2: usb2grp {
+ fsl,pins = <
+ MX8ULP_PAD_PTD23__USB1_ID 0x10003
+ MX8ULP_PAD_PTF6__USB1_OC 0x10003
+ >;
+ };
+
pinctrl_usdhc0: usdhc0grp {
fsl,pins = <
MX8ULP_PAD_PTD1__SDHC0_CMD 0x3
--
2.34.1


2024-03-21 08:15:42

by Xu Yang

[permalink] [raw]
Subject: [PATCH v10 04/11] dt-bindings: usb: chipidea,usb2-imx: move imx parts to dedicated schema

As more and more NXP i.MX chips come out, it becomes harder to maintain
ci-hdrc-usb2.yaml if more stuffs like property restrictions are added to
this file. This will separate i.MX parts out of ci-hdrc-usb2.yaml and add
a new schema for NXP ChipIdea USB2 Controller, also add a common schema.

1. Copy common ci-hdrc-usb2.yaml properties to a new shared
chipidea,usb2-common.yaml schema.
2. Move fsl,* compatible devices and imx spefific properties
to dedicated binding file chipidea,usb2-imx.yaml.

Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Xu Yang <[email protected]>

---
Changes in v6:
- new patch
Changes in v7:
- not remove ci-hdrc-usb2.yaml and move imx parts to ci-hdrc-usb2-imx.yaml
Changes in v8:
- rename yaml name to chipidea,usb2-common.yaml and chipidea,usb2-imx.yaml
- remove common properties from ci-hdrc-usb2.yaml
- add new end line to chipidea,usb2-common.yaml
- remove fsl,anatop since it's not needed by controller
- fix pinctrl-names formats
Changes in v9:
- add Rb tag
Changes in v10:
- no changes
---
.../bindings/usb/chipidea,usb2-common.yaml | 200 ++++++++++
.../bindings/usb/chipidea,usb2-imx.yaml | 193 ++++++++++
.../devicetree/bindings/usb/ci-hdrc-usb2.yaml | 360 +-----------------
3 files changed, 396 insertions(+), 357 deletions(-)
create mode 100644 Documentation/devicetree/bindings/usb/chipidea,usb2-common.yaml
create mode 100644 Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml

diff --git a/Documentation/devicetree/bindings/usb/chipidea,usb2-common.yaml b/Documentation/devicetree/bindings/usb/chipidea,usb2-common.yaml
new file mode 100644
index 000000000000..d2a7d2ecf48a
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/chipidea,usb2-common.yaml
@@ -0,0 +1,200 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/chipidea,usb2-common.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: USB2 ChipIdea USB controller Common Properties
+
+maintainers:
+ - Xu Yang <[email protected]>
+
+properties:
+ reg:
+ minItems: 1
+ maxItems: 2
+
+ interrupts:
+ minItems: 1
+ maxItems: 2
+
+ clocks:
+ minItems: 1
+ maxItems: 3
+
+ clock-names:
+ minItems: 1
+ maxItems: 3
+
+ dr_mode: true
+
+ power-domains:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ reset-names:
+ maxItems: 1
+
+ "#reset-cells":
+ const: 1
+
+ phy_type: true
+
+ itc-setting:
+ description:
+ interrupt threshold control register control, the setting should be
+ aligned with ITC bits at register USBCMD.
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+ ahb-burst-config:
+ description:
+ it is vendor dependent, the required value should be aligned with
+ AHBBRST at SBUSCFG, the range is from 0x0 to 0x7. This property is
+ used to change AHB burst configuration, check the chipidea spec for
+ meaning of each value. If this property is not existed, it will use
+ the reset value.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0x0
+ maximum: 0x7
+
+ tx-burst-size-dword:
+ description:
+ it is vendor dependent, the tx burst size in dword (4 bytes), This
+ register represents the maximum length of a the burst in 32-bit
+ words while moving data from system memory to the USB bus, the value
+ of this property will only take effect if property "ahb-burst-config"
+ is set to 0, if this property is missing the reset default of the
+ hardware implementation will be used.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0x0
+ maximum: 0x20
+
+ rx-burst-size-dword:
+ description:
+ it is vendor dependent, the rx burst size in dword (4 bytes), This
+ register represents the maximum length of a the burst in 32-bit words
+ while moving data from the USB bus to system memory, the value of
+ this property will only take effect if property "ahb-burst-config"
+ is set to 0, if this property is missing the reset default of the
+ hardware implementation will be used.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0x0
+ maximum: 0x20
+
+ extcon:
+ description:
+ Phandles to external connector devices. First phandle should point
+ to external connector, which provide "USB" cable events, the second
+ should point to external connector device, which provide "USB-HOST"
+ cable events. If one of the external connector devices is not
+ required, empty <0> phandle should be specified.
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ minItems: 1
+ items:
+ - description: vbus extcon
+ - description: id extcon
+
+ phy-clkgate-delay-us:
+ description:
+ The delay time (us) between putting the PHY into low power mode and
+ gating the PHY clock.
+
+ non-zero-ttctrl-ttha:
+ description:
+ After setting this property, the value of register ttctrl.ttha
+ will be 0x7f; if not, the value will be 0x0, this is the default
+ value. It needs to be very carefully for setting this property, it
+ is recommended that consult with your IC engineer before setting
+ this value. On the most of chipidea platforms, the "usage_tt" flag
+ at RTL is 0, so this property only affects siTD.
+
+ If this property is not set, the max packet size is 1023 bytes, and
+ if the total of packet size for previous transactions are more than
+ 256 bytes, it can't accept any transactions within this frame. The
+ use case is single transaction, but higher frame rate.
+
+ If this property is set, the max packet size is 188 bytes, it can
+ handle more transactions than above case, it can accept transactions
+ until it considers the left room size within frame is less than 188
+ bytes, software needs to make sure it does not send more than 90%
+ maximum_periodic_data_per_frame. The use case is multiple
+ transactions, but less frame rate.
+ type: boolean
+
+ mux-controls:
+ description:
+ The mux control for toggling host/device output of this controller.
+ It's expected that a mux state of 0 indicates device mode and a mux
+ state of 1 indicates host mode.
+ maxItems: 1
+
+ mux-control-names:
+ const: usb_switch
+
+ pinctrl-names:
+ description:
+ Names for optional pin modes in "default", "host", "device".
+ In case of HSIC-mode, "idle" and "active" pin modes are mandatory.
+ In this case, the "idle" state needs to pull down the data and
+ strobe pin and the "active" state needs to pull up the strobe pin.
+ oneOf:
+ - items:
+ - const: idle
+ - const: active
+ - items:
+ - const: default
+ - const: host
+ - const: device
+ - items:
+ - const: default
+ - enum:
+ - host
+ - device
+ - items:
+ - const: default
+
+ pinctrl-0:
+ maxItems: 1
+
+ pinctrl-1:
+ maxItems: 1
+
+ phys:
+ maxItems: 1
+
+ phy-names:
+ const: usb-phy
+
+ vbus-supply:
+ description: reference to the VBUS regulator.
+
+ usb-phy:
+ description: phandle for the PHY device. Use "phys" instead.
+ maxItems: 1
+ deprecated: true
+
+ port:
+ description:
+ Any connector to the data bus of this controller should be modelled
+ using the OF graph bindings specified, if the "usb-role-switch"
+ property is used.
+ $ref: /schemas/graph.yaml#/properties/port
+
+ reset-gpios:
+ maxItems: 1
+
+dependencies:
+ port: [ usb-role-switch ]
+ mux-controls: [ mux-control-names ]
+
+required:
+ - reg
+ - interrupts
+
+allOf:
+ - $ref: usb-hcd.yaml#
+ - $ref: usb-drd.yaml#
+
+additionalProperties: true
diff --git a/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml b/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml
new file mode 100644
index 000000000000..cdbb224e9f68
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml
@@ -0,0 +1,193 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/chipidea,usb2-imx.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP USB2 ChipIdea USB controller
+
+maintainers:
+ - Xu Yang <[email protected]>
+
+properties:
+ compatible:
+ oneOf:
+ - enum:
+ - fsl,imx27-usb
+ - items:
+ - enum:
+ - fsl,imx23-usb
+ - fsl,imx25-usb
+ - fsl,imx28-usb
+ - fsl,imx35-usb
+ - fsl,imx50-usb
+ - fsl,imx51-usb
+ - fsl,imx53-usb
+ - fsl,imx6q-usb
+ - fsl,imx6sl-usb
+ - fsl,imx6sx-usb
+ - fsl,imx6ul-usb
+ - fsl,imx7d-usb
+ - fsl,vf610-usb
+ - const: fsl,imx27-usb
+ - items:
+ - enum:
+ - fsl,imx8dxl-usb
+ - fsl,imx8ulp-usb
+ - const: fsl,imx7ulp-usb
+ - const: fsl,imx6ul-usb
+ - items:
+ - enum:
+ - fsl,imx8mm-usb
+ - fsl,imx8mn-usb
+ - const: fsl,imx7d-usb
+ - const: fsl,imx27-usb
+ - items:
+ - enum:
+ - fsl,imx6sll-usb
+ - fsl,imx7ulp-usb
+ - const: fsl,imx6ul-usb
+ - const: fsl,imx27-usb
+
+ clocks:
+ minItems: 1
+ maxItems: 3
+
+ clock-names:
+ minItems: 1
+ maxItems: 3
+
+ fsl,usbmisc:
+ description:
+ Phandler of non-core register device, with one argument that
+ indicate usb controller index
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ - items:
+ - description: phandle to usbmisc node
+ - description: index of usb controller
+
+ disable-over-current:
+ type: boolean
+ description: disable over current detect
+
+ over-current-active-low:
+ type: boolean
+ description: over current signal polarity is active low
+
+ over-current-active-high:
+ type: boolean
+ description:
+ Over current signal polarity is active high. It's recommended to
+ specify the over current polarity.
+
+ power-active-high:
+ type: boolean
+ description: power signal polarity is active high
+
+ external-vbus-divider:
+ type: boolean
+ description: enables off-chip resistor divider for Vbus
+
+ samsung,picophy-pre-emp-curr-control:
+ description:
+ HS Transmitter Pre-Emphasis Current Control. This signal controls
+ the amount of current sourced to the USB_OTG*_DP and USB_OTG*_DN
+ pins after a J-to-K or K-to-J transition. The range is from 0x0 to
+ 0x3, the default value is 0x1. Details can refer to TXPREEMPAMPTUNE0
+ bits of USBNC_n_PHY_CFG1.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0x0
+ maximum: 0x3
+
+ samsung,picophy-dc-vol-level-adjust:
+ description:
+ HS DC Voltage Level Adjustment. Adjust the high-speed transmitter DC
+ level voltage. The range is from 0x0 to 0xf, the default value is
+ 0x3. Details can refer to TXVREFTUNE0 bits of USBNC_n_PHY_CFG1.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0x0
+ maximum: 0xf
+
+ fsl,picophy-rise-fall-time-adjust:
+ description:
+ HS Transmitter Rise/Fall Time Adjustment. Adjust the rise/fall times
+ of the high-speed transmitter waveform. It has no unit. The rise/fall
+ time will be increased or decreased by a certain percentage relative
+ to design default time. (0:-10%; 1:design default; 2:+15%; 3:+20%)
+ Details can refer to TXRISETUNE0 bit of USBNC_n_PHY_CFG1.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 3
+ default: 1
+
+ fsl,usbphy:
+ description: phandle of usb phy that connects to the port. Use "phys" instead.
+ $ref: /schemas/types.yaml#/definitions/phandle
+ deprecated: true
+
+required:
+ - compatible
+
+allOf:
+ - $ref: chipidea,usb2-common.yaml#
+ - if:
+ properties:
+ phy_type:
+ const: hsic
+ required:
+ - phy_type
+ then:
+ properties:
+ pinctrl-names:
+ items:
+ - const: idle
+ - const: active
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/imx7d-clock.h>
+
+ usb@30b10000 {
+ compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
+ reg = <0x30b10000 0x200>;
+ interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX7D_USB_CTRL_CLK>;
+ fsl,usbphy = <&usbphynop1>;
+ fsl,usbmisc = <&usbmisc1 0>;
+ phy-clkgate-delay-us = <400>;
+ };
+
+ # Example for HSIC:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/imx6qdl-clock.h>
+
+ usb@2184400 {
+ compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
+ reg = <0x02184400 0x200>;
+ interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6QDL_CLK_USBOH3>;
+ fsl,usbphy = <&usbphynop1>;
+ fsl,usbmisc = <&usbmisc 2>;
+ phy_type = "hsic";
+ dr_mode = "host";
+ ahb-burst-config = <0x0>;
+ tx-burst-size-dword = <0x10>;
+ rx-burst-size-dword = <0x10>;
+ pinctrl-names = "idle", "active";
+ pinctrl-0 = <&pinctrl_usbh2_idle>;
+ pinctrl-1 = <&pinctrl_usbh2_active>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet@1 {
+ compatible = "usb424,9730";
+ reg = <1>;
+ };
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
index 3b56e0edb1c6..cc5787a8cfa3 100644
--- a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
+++ b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
@@ -15,7 +15,6 @@ properties:
oneOf:
- enum:
- chipidea,usb2
- - fsl,imx27-usb
- lsi,zevio-usb
- nuvoton,npcm750-udc
- nvidia,tegra20-ehci
@@ -31,40 +30,6 @@ properties:
- nvidia,tegra124-ehci
- nvidia,tegra210-ehci
- const: nvidia,tegra30-ehci
- - items:
- - enum:
- - fsl,imx23-usb
- - fsl,imx25-usb
- - fsl,imx28-usb
- - fsl,imx35-usb
- - fsl,imx50-usb
- - fsl,imx51-usb
- - fsl,imx53-usb
- - fsl,imx6q-usb
- - fsl,imx6sl-usb
- - fsl,imx6sx-usb
- - fsl,imx6ul-usb
- - fsl,imx7d-usb
- - fsl,vf610-usb
- - const: fsl,imx27-usb
- - items:
- - enum:
- - fsl,imx8dxl-usb
- - fsl,imx8ulp-usb
- - const: fsl,imx7ulp-usb
- - const: fsl,imx6ul-usb
- - items:
- - enum:
- - fsl,imx8mm-usb
- - fsl,imx8mn-usb
- - const: fsl,imx7d-usb
- - const: fsl,imx27-usb
- - items:
- - enum:
- - fsl,imx6sll-usb
- - fsl,imx7ulp-usb
- - const: fsl,imx6ul-usb
- - const: fsl,imx27-usb
- items:
- const: xlnx,zynq-usb-2.20a
- const: chipidea,usb2
@@ -73,163 +38,18 @@ properties:
- nuvoton,npcm845-udc
- const: nuvoton,npcm750-udc

- reg:
- minItems: 1
- maxItems: 2
-
- interrupts:
- minItems: 1
- maxItems: 2
-
clocks:
minItems: 1
- maxItems: 3
+ maxItems: 2

clock-names:
minItems: 1
- maxItems: 3
-
- dr_mode: true
-
- power-domains:
- maxItems: 1
-
- resets:
- maxItems: 1
-
- reset-names:
- maxItems: 1
-
- "#reset-cells":
- const: 1
-
- phy_type: true
-
- itc-setting:
- description:
- interrupt threshold control register control, the setting should be
- aligned with ITC bits at register USBCMD.
- $ref: /schemas/types.yaml#/definitions/uint32
-
- ahb-burst-config:
- description:
- it is vendor dependent, the required value should be aligned with
- AHBBRST at SBUSCFG, the range is from 0x0 to 0x7. This property is
- used to change AHB burst configuration, check the chipidea spec for
- meaning of each value. If this property is not existed, it will use
- the reset value.
- $ref: /schemas/types.yaml#/definitions/uint32
- minimum: 0x0
- maximum: 0x7
-
- tx-burst-size-dword:
- description:
- it is vendor dependent, the tx burst size in dword (4 bytes), This
- register represents the maximum length of a the burst in 32-bit
- words while moving data from system memory to the USB bus, the value
- of this property will only take effect if property "ahb-burst-config"
- is set to 0, if this property is missing the reset default of the
- hardware implementation will be used.
- $ref: /schemas/types.yaml#/definitions/uint32
- minimum: 0x0
- maximum: 0x20
-
- rx-burst-size-dword:
- description:
- it is vendor dependent, the rx burst size in dword (4 bytes), This
- register represents the maximum length of a the burst in 32-bit words
- while moving data from the USB bus to system memory, the value of
- this property will only take effect if property "ahb-burst-config"
- is set to 0, if this property is missing the reset default of the
- hardware implementation will be used.
- $ref: /schemas/types.yaml#/definitions/uint32
- minimum: 0x0
- maximum: 0x20
-
- extcon:
- description:
- Phandles to external connector devices. First phandle should point
- to external connector, which provide "USB" cable events, the second
- should point to external connector device, which provide "USB-HOST"
- cable events. If one of the external connector devices is not
- required, empty <0> phandle should be specified.
- $ref: /schemas/types.yaml#/definitions/phandle-array
- minItems: 1
- items:
- - description: vbus extcon
- - description: id extcon
-
- phy-clkgate-delay-us:
- description:
- The delay time (us) between putting the PHY into low power mode and
- gating the PHY clock.
-
- non-zero-ttctrl-ttha:
- description:
- After setting this property, the value of register ttctrl.ttha
- will be 0x7f; if not, the value will be 0x0, this is the default
- value. It needs to be very carefully for setting this property, it
- is recommended that consult with your IC engineer before setting
- this value. On the most of chipidea platforms, the "usage_tt" flag
- at RTL is 0, so this property only affects siTD.
-
- If this property is not set, the max packet size is 1023 bytes, and
- if the total of packet size for previous transactions are more than
- 256 bytes, it can't accept any transactions within this frame. The
- use case is single transaction, but higher frame rate.
-
- If this property is set, the max packet size is 188 bytes, it can
- handle more transactions than above case, it can accept transactions
- until it considers the left room size within frame is less than 188
- bytes, software needs to make sure it does not send more than 90%
- maximum_periodic_data_per_frame. The use case is multiple
- transactions, but less frame rate.
- type: boolean
-
- mux-controls:
- description:
- The mux control for toggling host/device output of this controller.
- It's expected that a mux state of 0 indicates device mode and a mux
- state of 1 indicates host mode.
- maxItems: 1
-
- mux-control-names:
- const: usb_switch
+ maxItems: 2

operating-points-v2:
description: A phandle to the OPP table containing the performance states.
$ref: /schemas/types.yaml#/definitions/phandle

- pinctrl-names:
- description:
- Names for optional pin modes in "default", "host", "device".
- In case of HSIC-mode, "idle" and "active" pin modes are mandatory.
- In this case, the "idle" state needs to pull down the data and
- strobe pin and the "active" state needs to pull up the strobe pin.
- oneOf:
- - items:
- - const: idle
- - const: active
- - items:
- - const: default
- - enum:
- - host
- - device
- - items:
- - const: default
-
- pinctrl-0:
- maxItems: 1
-
- pinctrl-1:
- maxItems: 1
-
- phys:
- maxItems: 1
-
- phy-names:
- const: usb-phy
-
phy-select:
description:
Phandler of TCSR node with two argument that indicate register
@@ -240,87 +60,6 @@ properties:
- description: register offset
- description: phy index

- vbus-supply:
- description: reference to the VBUS regulator.
-
- fsl,usbmisc:
- description:
- Phandler of non-core register device, with one argument that
- indicate usb controller index
- $ref: /schemas/types.yaml#/definitions/phandle-array
- items:
- - items:
- - description: phandle to usbmisc node
- - description: index of usb controller
-
- fsl,anatop:
- description: phandle for the anatop node.
- $ref: /schemas/types.yaml#/definitions/phandle
-
- disable-over-current:
- type: boolean
- description: disable over current detect
-
- over-current-active-low:
- type: boolean
- description: over current signal polarity is active low
-
- over-current-active-high:
- type: boolean
- description:
- Over current signal polarity is active high. It's recommended to
- specify the over current polarity.
-
- power-active-high:
- type: boolean
- description: power signal polarity is active high
-
- external-vbus-divider:
- type: boolean
- description: enables off-chip resistor divider for Vbus
-
- samsung,picophy-pre-emp-curr-control:
- description:
- HS Transmitter Pre-Emphasis Current Control. This signal controls
- the amount of current sourced to the USB_OTG*_DP and USB_OTG*_DN
- pins after a J-to-K or K-to-J transition. The range is from 0x0 to
- 0x3, the default value is 0x1. Details can refer to TXPREEMPAMPTUNE0
- bits of USBNC_n_PHY_CFG1.
- $ref: /schemas/types.yaml#/definitions/uint32
- minimum: 0x0
- maximum: 0x3
-
- samsung,picophy-dc-vol-level-adjust:
- description:
- HS DC Voltage Level Adjustment. Adjust the high-speed transmitter DC
- level voltage. The range is from 0x0 to 0xf, the default value is
- 0x3. Details can refer to TXVREFTUNE0 bits of USBNC_n_PHY_CFG1.
- $ref: /schemas/types.yaml#/definitions/uint32
- minimum: 0x0
- maximum: 0xf
-
- fsl,picophy-rise-fall-time-adjust:
- description:
- HS Transmitter Rise/Fall Time Adjustment. Adjust the rise/fall times
- of the high-speed transmitter waveform. It has no unit. The rise/fall
- time will be increased or decreased by a certain percentage relative
- to design default time. (0:-10%; 1:design default; 2:+15%; 3:+20%)
- Details can refer to TXRISETUNE0 bit of USBNC_n_PHY_CFG1.
- $ref: /schemas/types.yaml#/definitions/uint32
- minimum: 0
- maximum: 3
- default: 1
-
- usb-phy:
- description: phandle for the PHY device. Use "phys" instead.
- maxItems: 1
- deprecated: true
-
- fsl,usbphy:
- description: phandle of usb phy that connects to the port. Use "phys" instead.
- $ref: /schemas/types.yaml#/definitions/phandle
- deprecated: true
-
nvidia,phy:
description: phandle of usb phy that connects to the port. Use "phys" instead.
$ref: /schemas/types.yaml#/definitions/phandle
@@ -331,16 +70,6 @@ properties:
type: boolean
deprecated: true

- port:
- description:
- Any connector to the data bus of this controller should be modelled
- using the OF graph bindings specified, if the "usb-role-switch"
- property is used.
- $ref: /schemas/graph.yaml#/properties/port
-
- reset-gpios:
- maxItems: 1
-
ulpi:
type: object
additionalProperties: false
@@ -350,67 +79,13 @@ properties:
type: object
$ref: /schemas/phy/qcom,usb-hs-phy.yaml

-dependencies:
- port: [ usb-role-switch ]
- mux-controls: [ mux-control-names ]
-
required:
- compatible
- - reg
- - interrupts

allOf:
+ - $ref: chipidea,usb2-common.yaml#
- $ref: usb-hcd.yaml#
- $ref: usb-drd.yaml#
- - if:
- properties:
- phy_type:
- const: hsic
- required:
- - phy_type
- then:
- properties:
- pinctrl-names:
- items:
- - const: idle
- - const: active
- else:
- properties:
- pinctrl-names:
- minItems: 1
- maxItems: 2
- oneOf:
- - items:
- - const: default
- - enum:
- - host
- - device
- - items:
- - const: default
- - if:
- properties:
- compatible:
- contains:
- enum:
- - chipidea,usb2
- - lsi,zevio-usb
- - nuvoton,npcm750-udc
- - nvidia,tegra20-udc
- - nvidia,tegra30-udc
- - nvidia,tegra114-udc
- - nvidia,tegra124-udc
- - qcom,ci-hdrc
- - xlnx,zynq-usb-2.20a
- then:
- properties:
- fsl,usbmisc: false
- disable-over-current: false
- over-current-active-low: false
- over-current-active-high: false
- power-active-high: false
- external-vbus-divider: false
- samsung,picophy-pre-emp-curr-control: false
- samsung,picophy-dc-vol-level-adjust: false

unevaluatedProperties: false

@@ -438,33 +113,4 @@ examples:
mux-control-names = "usb_switch";
};

- # Example for HSIC:
- - |
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/clock/imx6qdl-clock.h>
-
- usb@2184400 {
- compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
- reg = <0x02184400 0x200>;
- interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6QDL_CLK_USBOH3>;
- fsl,usbphy = <&usbphynop1>;
- fsl,usbmisc = <&usbmisc 2>;
- phy_type = "hsic";
- dr_mode = "host";
- ahb-burst-config = <0x0>;
- tx-burst-size-dword = <0x10>;
- rx-burst-size-dword = <0x10>;
- pinctrl-names = "idle", "active";
- pinctrl-0 = <&pinctrl_usbh2_idle>;
- pinctrl-1 = <&pinctrl_usbh2_active>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethernet@1 {
- compatible = "usb424,9730";
- reg = <1>;
- };
- };
-
...
--
2.34.1


2024-03-21 08:15:47

by Xu Yang

[permalink] [raw]
Subject: [PATCH v10 05/11] dt-bindings: usb: ci-hdrc-usb2-imx: add restrictions for reg, interrupts, clock and clock-names properties

Add restrictions for reg, interrupts, clock and clock-names properties
for imx Socs.

Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Xu Yang <[email protected]>

---
Changes in v4:
- new patch since v3's discussion
- split the reg, interrupts, clock and clock-names properties into
common part and device-specific
Changes in v5:
- keep common property unchanged
- make if-then more readable
- remove non imx part
Changes in v6:
- new patch based on ci-hdrc-usb2-imx.yaml
Changes in v7:
- no changes
Changes in v8:
- remove if:else:if:else:if:else block
Changes in v9:
- remove maxItems
- make clock-names if it's not needed
Changes in v10:
- add Rb tag
---
.../bindings/usb/chipidea,usb2-imx.yaml | 76 +++++++++++++++++++
1 file changed, 76 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml b/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml
index cdbb224e9f68..e2eb60eaf6fe 100644
--- a/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml
+++ b/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml
@@ -49,6 +49,12 @@ properties:
- const: fsl,imx6ul-usb
- const: fsl,imx27-usb

+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
clocks:
minItems: 1
maxItems: 3
@@ -144,6 +150,76 @@ allOf:
- const: idle
- const: active

+ # imx27 Soc needs three clocks
+ - if:
+ properties:
+ compatible:
+ const: fsl,imx27-usb
+ then:
+ properties:
+ clocks:
+ minItems: 3
+ clock-names:
+ items:
+ - const: ipg
+ - const: ahb
+ - const: per
+
+ # imx25 and imx35 Soc need three clocks
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - fsl,imx25-usb
+ - fsl,imx35-usb
+ then:
+ properties:
+ clocks:
+ minItems: 3
+ clock-names:
+ items:
+ - const: ipg
+ - const: ahb
+ - const: per
+
+ # imx7d Soc need one clock
+ - if:
+ properties:
+ compatible:
+ items:
+ - const: fsl,imx7d-usb
+ - const: fsl,imx27-usb
+ then:
+ properties:
+ clocks:
+ maxItems: 1
+ clock-names: false
+
+ # other Soc need one clock
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - fsl,imx23-usb
+ - fsl,imx28-usb
+ - fsl,imx50-usb
+ - fsl,imx51-usb
+ - fsl,imx53-usb
+ - fsl,imx6q-usb
+ - fsl,imx6sl-usb
+ - fsl,imx6sx-usb
+ - fsl,imx6ul-usb
+ - fsl,imx8mm-usb
+ - fsl,imx8mn-usb
+ - fsl,vf610-usb
+ then:
+ properties:
+ clocks:
+ maxItems: 1
+ clock-names: false
+
unevaluatedProperties: false

examples:
--
2.34.1


2024-03-21 08:16:12

by Xu Yang

[permalink] [raw]
Subject: [PATCH v10 06/11] dt-bindings: usb: ci-hdrc-usb2-imx: add compatible and clock-names restriction for imx93

The i.MX93 needs a wakup clock to work properly. This will add compatible
and restriction for i.MX93 platform.

Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Xu Yang <[email protected]>

---
Changes in v2:
- no changes
Changes in v3:
- add clocks restriction
Changes in v4:
- use 'contains' rather 'items'
Changes in v5:
- rename clock name
Changes in v6:
- new patch based on ci-hdrc-usb2-imx.yaml
Changes in v7:
- no changes
Changes in v8:
- rewrite the restriction
Changes in v9:
- add Rb tag
Changes in v10:
- no changes
---
.../bindings/usb/chipidea,usb2-imx.yaml | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml b/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml
index e2eb60eaf6fe..8f6136f5d72e 100644
--- a/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml
+++ b/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml
@@ -40,6 +40,7 @@ properties:
- enum:
- fsl,imx8mm-usb
- fsl,imx8mn-usb
+ - fsl,imx93-usb
- const: fsl,imx7d-usb
- const: fsl,imx27-usb
- items:
@@ -183,6 +184,23 @@ allOf:
- const: ahb
- const: per

+ # imx93 Soc needs two clocks
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - fsl,imx93-usb
+ then:
+ properties:
+ clocks:
+ minItems: 2
+ maxItems: 2
+ clock-names:
+ items:
+ - const: usb_ctrl_root
+ - const: usb_wakeup
+
# imx7d Soc need one clock
- if:
properties:
--
2.34.1


2024-03-21 08:16:44

by Xu Yang

[permalink] [raw]
Subject: [PATCH v10 07/11] ARM: dts: imx6: remove fsl,anatop property from usb controller node

This property is not needed for usb controller. The usb phy needs it
instead.

Signed-off-by: Xu Yang <[email protected]>

---
Changes in v7:
- new patch
Changes in v8:
- no changes
Changes in v9:
- no changes
Changes in v10:
- not remove fsl,anatop for imx6ul.dtsi since it's already removed
---
arch/arm/boot/dts/nxp/imx/imx6sll.dtsi | 1 -
arch/arm/boot/dts/nxp/imx/imx6sx.dtsi | 2 --
2 files changed, 3 deletions(-)

diff --git a/arch/arm/boot/dts/nxp/imx/imx6sll.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sll.dtsi
index 3659fd5ecfa6..ddeb5b37fb78 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6sll.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6sll.dtsi
@@ -683,7 +683,6 @@ usbotg1: usb@2184000 {
clocks = <&clks IMX6SLL_CLK_USBOH3>;
fsl,usbphy = <&usbphy1>;
fsl,usbmisc = <&usbmisc 0>;
- fsl,anatop = <&anatop>;
ahb-burst-config = <0x0>;
tx-burst-size-dword = <0x10>;
rx-burst-size-dword = <0x10>;
diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi
index df3a375f0a3e..b8d95957ca09 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi
@@ -929,7 +929,6 @@ usbotg1: usb@2184000 {
clocks = <&clks IMX6SX_CLK_USBOH3>;
fsl,usbphy = <&usbphy1>;
fsl,usbmisc = <&usbmisc 0>;
- fsl,anatop = <&anatop>;
ahb-burst-config = <0x0>;
tx-burst-size-dword = <0x10>;
rx-burst-size-dword = <0x10>;
@@ -957,7 +956,6 @@ usbh: usb@2184400 {
fsl,usbphy = <&usbphynop1>;
fsl,usbmisc = <&usbmisc 2>;
phy_type = "hsic";
- fsl,anatop = <&anatop>;
dr_mode = "host";
ahb-burst-config = <0x0>;
tx-burst-size-dword = <0x10>;
--
2.34.1


2024-03-21 08:17:01

by Xu Yang

[permalink] [raw]
Subject: [PATCH v10 08/11] arm64: dts: imx93: add usb nodes

There are 2 USB controllers on i.MX93. Add them.

Acked-by: Alexander Stein <[email protected]>
Tested-by: Alexander Stein <[email protected]> # TQMa9352LA/CA
Signed-off-by: Xu Yang <[email protected]>

---
Changes in v2:
- fix format as suggested by Alexander
- change compatible from fsl,imx8mm-usb to fsl,imx93-usb
Changes in v3:
- replace deprecated fsl,usbphy with phys as suggested by Alexander
- reorder nodes
Changes in v4:
- fix the alignment
Changes in v5:
- rename usb_wakeup_clk to usb_wakeup
Changes in v6:
- rename usb_ctrl_root_clk to usb_ctrl_root
Changes in v7:
- no changes
Changes in v8:
- no changes
Changes in v9:
- no changes
Changes in v10:
- no changes
---
arch/arm64/boot/dts/freescale/imx93.dtsi | 58 ++++++++++++++++++++++++
1 file changed, 58 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
index 8f2e7c42ad6e..4a7efccb4f67 100644
--- a/arch/arm64/boot/dts/freescale/imx93.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
@@ -183,6 +183,20 @@ mqs2: mqs2 {
status = "disabled";
};

+ usbphynop1: usbphynop1 {
+ compatible = "usb-nop-xceiv";
+ #phy-cells = <0>;
+ clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>;
+ clock-names = "main_clk";
+ };
+
+ usbphynop2: usbphynop2 {
+ compatible = "usb-nop-xceiv";
+ #phy-cells = <0>;
+ clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>;
+ clock-names = "main_clk";
+ };
+
soc@0 {
compatible = "simple-bus";
#address-cells = <1>;
@@ -1167,6 +1181,50 @@ media_blk_ctrl: system-controller@4ac10000 {
status = "disabled";
};

+ usbotg1: usb@4c100000 {
+ compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb";
+ reg = <0x4c100000 0x200>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>,
+ <&clk IMX93_CLK_HSIO_32K_GATE>;
+ clock-names = "usb_ctrl_root", "usb_wakeup";
+ assigned-clocks = <&clk IMX93_CLK_HSIO>;
+ assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
+ assigned-clock-rates = <133000000>;
+ phys = <&usbphynop1>;
+ fsl,usbmisc = <&usbmisc1 0>;
+ status = "disabled";
+ };
+
+ usbmisc1: usbmisc@4c100200 {
+ compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",
+ "fsl,imx6q-usbmisc";
+ reg = <0x4c100200 0x200>;
+ #index-cells = <1>;
+ };
+
+ usbotg2: usb@4c200000 {
+ compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb";
+ reg = <0x4c200000 0x200>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>,
+ <&clk IMX93_CLK_HSIO_32K_GATE>;
+ clock-names = "usb_ctrl_root", "usb_wakeup";
+ assigned-clocks = <&clk IMX93_CLK_HSIO>;
+ assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
+ assigned-clock-rates = <133000000>;
+ phys = <&usbphynop2>;
+ fsl,usbmisc = <&usbmisc2 0>;
+ status = "disabled";
+ };
+
+ usbmisc2: usbmisc@4c200200 {
+ compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",
+ "fsl,imx6q-usbmisc";
+ reg = <0x4c200200 0x200>;
+ #index-cells = <1>;
+ };
+
ddr-pmu@4e300dc0 {
compatible = "fsl,imx93-ddr-pmu";
reg = <0x4e300dc0 0x200>;
--
2.34.1


2024-03-21 08:17:16

by Xu Yang

[permalink] [raw]
Subject: [PATCH v10 09/11] arm64: dts: imx93-11x11-evk: enable usb and typec nodes

There are 2 Type-C ports and 2 USB controllers on i.MX93. Enable them.

Signed-off-by: Xu Yang <[email protected]>

---
Changes in v2:
- remove status property in ptn5110 nodes
- fix dt-schema warnings
Changes in v3:
- no changes
Changes in v4:
- no changes
Changes in v5:
- no changes
Changes in v6:
- no changes
Changes in v7:
- no changes
Changes in v8:
- no changes
Changes in v9:
- use compatible "nxp,ptn5110", "tcpci"
Changes in v10:
- no changes
---
.../boot/dts/freescale/imx93-11x11-evk.dts | 118 ++++++++++++++++++
1 file changed, 118 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
index 9921ea13ab48..ecc01d872e95 100644
--- a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
@@ -5,6 +5,7 @@

/dts-v1/;

+#include <dt-bindings/usb/pd.h>
#include "imx93.dtsi"

/ {
@@ -104,6 +105,80 @@ &mu2 {
status = "okay";
};

+&lpi2c3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <400000>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_lpi2c3>;
+ pinctrl-1 = <&pinctrl_lpi2c3>;
+ status = "okay";
+
+ ptn5110: tcpc@50 {
+ compatible = "nxp,ptn5110", "tcpci";
+ reg = <0x50>;
+ interrupt-parent = <&gpio3>;
+ interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
+
+ typec1_con: connector {
+ compatible = "usb-c-connector";
+ label = "USB-C";
+ power-role = "dual";
+ data-role = "dual";
+ try-power-role = "sink";
+ source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
+ sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
+ PDO_VAR(5000, 20000, 3000)>;
+ op-sink-microwatt = <15000000>;
+ self-powered;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ typec1_dr_sw: endpoint {
+ remote-endpoint = <&usb1_drd_sw>;
+ };
+ };
+ };
+ };
+ };
+
+ ptn5110_2: tcpc@51 {
+ compatible = "nxp,ptn5110", "tcpci";
+ reg = <0x51>;
+ interrupt-parent = <&gpio3>;
+ interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
+
+ typec2_con: connector {
+ compatible = "usb-c-connector";
+ label = "USB-C";
+ power-role = "dual";
+ data-role = "dual";
+ try-power-role = "sink";
+ source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
+ sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
+ PDO_VAR(5000, 20000, 3000)>;
+ op-sink-microwatt = <15000000>;
+ self-powered;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ typec2_dr_sw: endpoint {
+ remote-endpoint = <&usb2_drd_sw>;
+ };
+ };
+ };
+ };
+ };
+};
+
&eqos {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_eqos>;
@@ -156,6 +231,42 @@ &lpuart5 {
status = "okay";
};

+&usbotg1 {
+ dr_mode = "otg";
+ hnp-disable;
+ srp-disable;
+ adp-disable;
+ usb-role-switch;
+ disable-over-current;
+ samsung,picophy-pre-emp-curr-control = <3>;
+ samsung,picophy-dc-vol-level-adjust = <7>;
+ status = "okay";
+
+ port {
+ usb1_drd_sw: endpoint {
+ remote-endpoint = <&typec1_dr_sw>;
+ };
+ };
+};
+
+&usbotg2 {
+ dr_mode = "otg";
+ hnp-disable;
+ srp-disable;
+ adp-disable;
+ usb-role-switch;
+ disable-over-current;
+ samsung,picophy-pre-emp-curr-control = <3>;
+ samsung,picophy-dc-vol-level-adjust = <7>;
+ status = "okay";
+
+ port {
+ usb2_drd_sw: endpoint {
+ remote-endpoint = <&typec2_dr_sw>;
+ };
+ };
+};
+
&usdhc1 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>;
@@ -222,6 +333,13 @@ MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x57e
>;
};

+ pinctrl_lpi2c3: lpi2c3grp {
+ fsl,pins = <
+ MX93_PAD_GPIO_IO28__LPI2C3_SDA 0x40000b9e
+ MX93_PAD_GPIO_IO29__LPI2C3_SCL 0x40000b9e
+ >;
+ };
+
pinctrl_uart1: uart1grp {
fsl,pins = <
MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
--
2.34.1


2024-03-21 08:17:33

by Xu Yang

[permalink] [raw]
Subject: [PATCH v10 10/11] arm64: dts: imx8m* remove clock-names property from usb controller node

The clock-names property is not needed by usb controller node on imx8mm/n.
This will remove it.

Signed-off-by: Xu Yang <[email protected]>

---
Changes in v9:
- new patch
Changes in v10:
- no changes
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 2 --
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 1 -
2 files changed, 3 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 8a1b42b94dce..696e96b15585 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -1253,7 +1253,6 @@ usbotg1: usb@32e40000 {
reg = <0x32e40000 0x200>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MM_CLK_USB1_CTRL_ROOT>;
- clock-names = "usb1_ctrl_root_clk";
assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>;
assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>;
phys = <&usbphynop1>;
@@ -1274,7 +1273,6 @@ usbotg2: usb@32e50000 {
reg = <0x32e50000 0x200>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MM_CLK_USB1_CTRL_ROOT>;
- clock-names = "usb1_ctrl_root_clk";
assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>;
assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>;
phys = <&usbphynop2>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 136e75c51251..f67816758b21 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -1213,7 +1213,6 @@ usbotg1: usb@32e40000 {
reg = <0x32e40000 0x200>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MN_CLK_USB1_CTRL_ROOT>;
- clock-names = "usb1_ctrl_root_clk";
assigned-clocks = <&clk IMX8MN_CLK_USB_BUS>;
assigned-clock-parents = <&clk IMX8MN_SYS_PLL2_500M>;
phys = <&usbphynop1>;
--
2.34.1


2024-03-21 08:17:50

by Xu Yang

[permalink] [raw]
Subject: [PATCH v10 11/11] usb: chipidea: ci_hdrc_imx: align usb wakeup clock name with dt-bindings

The dt-bindings is going to use "usb_wakeup" as wakup clock name. This will
align the change with dt-bindings.

Acked-by: Peter Chen <[email protected]>
Signed-off-by: Xu Yang <[email protected]>

---
Changes in v5:
- new patch
Changes in v6:
- add Acked-by tag
Changes in v7:
- no changes
Changes in v8:
- no changes
Changes in v9:
- no changes
Changes in v10:
- no changes
---
drivers/usb/chipidea/ci_hdrc_imx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_imx.c b/drivers/usb/chipidea/ci_hdrc_imx.c
index ae9a6a17ec6e..a17b6d619305 100644
--- a/drivers/usb/chipidea/ci_hdrc_imx.c
+++ b/drivers/usb/chipidea/ci_hdrc_imx.c
@@ -212,7 +212,7 @@ static int imx_get_clks(struct device *dev)
/* Get wakeup clock. Not all of the platforms need to
* handle this clock. So make it optional.
*/
- data->clk_wakeup = devm_clk_get_optional(dev, "usb_wakeup_clk");
+ data->clk_wakeup = devm_clk_get_optional(dev, "usb_wakeup");
if (IS_ERR(data->clk_wakeup))
ret = dev_err_probe(dev, PTR_ERR(data->clk_wakeup),
"Failed to get wakeup clk\n");
--
2.34.1


2024-04-02 08:34:44

by Shawn Guo

[permalink] [raw]
Subject: Re: [PATCH v10 02/11] arm64: dts: imx8ulp: add usb nodes

On Thu, Mar 21, 2024 at 04:14:30PM +0800, Xu Yang wrote:
> Add USB nodes on i.MX8ULP platform which has 2 USB controllers.
>
> Signed-off-by: Xu Yang <[email protected]>
>
> ---
> Changes in v2:
> - no changes
> Changes in v3:
> - no changes
> Changes in v4:
> - no changes
> Changes in v5:
> - no changes
> Changes in v6:
> - drop usbphy aliases
> Changes in v7:
> - no changes
> Changes in v8:
> - no changes
> Changes in v9:
> - no changes
> Changes in v10:
> - no changes
> ---
> arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 62 ++++++++++++++++++++++
> 1 file changed, 62 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> index c4a0082f30d3..7da9461a5745 100644
> --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> @@ -472,6 +472,68 @@ usdhc2: mmc@298f0000 {
> status = "disabled";
> };
>
> + usbotg1: usb@29900000 {
> + compatible = "fsl,imx8ulp-usb", "fsl,imx7ulp-usb", "fsl,imx6ul-usb";
> + reg = <0x29900000 0x200>;
> + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&pcc4 IMX8ULP_CLK_USB0>;
> + power-domains = <&scmi_devpd IMX8ULP_PD_USB0>;
> + phys = <&usbphy1>;
> + fsl,usbmisc = <&usbmisc1 0>;
> + ahb-burst-config = <0x0>;
> + tx-burst-size-dword = <0x8>;
> + rx-burst-size-dword = <0x8>;
> + status = "disabled";
> + };
> +
> + usbmisc1: usbmisc@29900200 {
> + compatible = "fsl,imx8ulp-usbmisc", "fsl,imx7d-usbmisc",
> + "fsl,imx6q-usbmisc";
> + #index-cells = <1>;
> + reg = <0x29900200 0x200>;

Could you move 'reg' above so that it's after compatible?

> + status = "disabled";
> + };
> +
> + usbphy1: usb-phy@29910000 {
> + compatible = "fsl,imx8ulp-usbphy", "fsl,imx7ulp-usbphy";
> + reg = <0x29910000 0x10000>;
> + interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&pcc4 IMX8ULP_CLK_USB0_PHY>;
> + #phy-cells = <0>;
> + status = "disabled";
> + };
> +
> + usbotg2: usb@29920000 {
> + compatible = "fsl,imx8ulp-usb", "fsl,imx7ulp-usb", "fsl,imx6ul-usb";
> + reg = <0x29920000 0x200>;
> + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&pcc4 IMX8ULP_CLK_USB1>;
> + power-domains = <&scmi_devpd IMX8ULP_PD_USDHC2_USB1>;
> + phys = <&usbphy2>;
> + fsl,usbmisc = <&usbmisc2 0>;
> + ahb-burst-config = <0x0>;
> + tx-burst-size-dword = <0x8>;
> + rx-burst-size-dword = <0x8>;
> + status = "disabled";
> + };
> +
> + usbmisc2: usbmisc@29920200 {
> + compatible = "fsl,imx8ulp-usbmisc", "fsl,imx7d-usbmisc",
> + "fsl,imx6q-usbmisc";
> + #index-cells = <1>;
> + reg = <0x29920200 0x200>;

Ditto

Shawn

> + status = "disabled";
> + };
> +
> + usbphy2: usb-phy@29930000 {
> + compatible = "fsl,imx8ulp-usbphy", "fsl,imx7ulp-usbphy";
> + reg = <0x29930000 0x10000>;
> + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&pcc4 IMX8ULP_CLK_USB1_PHY>;
> + #phy-cells = <0>;
> + status = "disabled";
> + };
> +
> fec: ethernet@29950000 {
> compatible = "fsl,imx8ulp-fec", "fsl,imx6ul-fec", "fsl,imx6q-fec";
> reg = <0x29950000 0x10000>;
> --
> 2.34.1
>


2024-04-02 08:42:44

by Shawn Guo

[permalink] [raw]
Subject: Re: [PATCH v10 08/11] arm64: dts: imx93: add usb nodes

On Thu, Mar 21, 2024 at 04:14:36PM +0800, Xu Yang wrote:
> There are 2 USB controllers on i.MX93. Add them.
>
> Acked-by: Alexander Stein <[email protected]>
> Tested-by: Alexander Stein <[email protected]> # TQMa9352LA/CA
> Signed-off-by: Xu Yang <[email protected]>
>
> ---
> Changes in v2:
> - fix format as suggested by Alexander
> - change compatible from fsl,imx8mm-usb to fsl,imx93-usb
> Changes in v3:
> - replace deprecated fsl,usbphy with phys as suggested by Alexander
> - reorder nodes
> Changes in v4:
> - fix the alignment
> Changes in v5:
> - rename usb_wakeup_clk to usb_wakeup
> Changes in v6:
> - rename usb_ctrl_root_clk to usb_ctrl_root
> Changes in v7:
> - no changes
> Changes in v8:
> - no changes
> Changes in v9:
> - no changes
> Changes in v10:
> - no changes
> ---
> arch/arm64/boot/dts/freescale/imx93.dtsi | 58 ++++++++++++++++++++++++
> 1 file changed, 58 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
> index 8f2e7c42ad6e..4a7efccb4f67 100644
> --- a/arch/arm64/boot/dts/freescale/imx93.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
> @@ -183,6 +183,20 @@ mqs2: mqs2 {
> status = "disabled";
> };
>
> + usbphynop1: usbphynop1 {
> + compatible = "usb-nop-xceiv";
> + #phy-cells = <0>;
> + clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>;
> + clock-names = "main_clk";
> + };
> +
> + usbphynop2: usbphynop2 {
> + compatible = "usb-nop-xceiv";
> + #phy-cells = <0>;
> + clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>;
> + clock-names = "main_clk";
> + };
> +
> soc@0 {
> compatible = "simple-bus";
> #address-cells = <1>;
> @@ -1167,6 +1181,50 @@ media_blk_ctrl: system-controller@4ac10000 {
> status = "disabled";
> };
>
> + usbotg1: usb@4c100000 {
> + compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb";
> + reg = <0x4c100000 0x200>;
> + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>,
> + <&clk IMX93_CLK_HSIO_32K_GATE>;
> + clock-names = "usb_ctrl_root", "usb_wakeup";
> + assigned-clocks = <&clk IMX93_CLK_HSIO>;
> + assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
> + assigned-clock-rates = <133000000>;
> + phys = <&usbphynop1>;
> + fsl,usbmisc = <&usbmisc1 0>;
> + status = "disabled";
> + };
> +
> + usbmisc1: usbmisc@4c100200 {
> + compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",
> + "fsl,imx6q-usbmisc";
> + reg = <0x4c100200 0x200>;
> + #index-cells = <1>;

Do we still need this '#index-cells' property? I see it's being marked
as deprecated in bindings doc.

Shawn

> + };
> +
> + usbotg2: usb@4c200000 {
> + compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb";
> + reg = <0x4c200000 0x200>;
> + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>,
> + <&clk IMX93_CLK_HSIO_32K_GATE>;
> + clock-names = "usb_ctrl_root", "usb_wakeup";
> + assigned-clocks = <&clk IMX93_CLK_HSIO>;
> + assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
> + assigned-clock-rates = <133000000>;
> + phys = <&usbphynop2>;
> + fsl,usbmisc = <&usbmisc2 0>;
> + status = "disabled";
> + };
> +
> + usbmisc2: usbmisc@4c200200 {
> + compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",
> + "fsl,imx6q-usbmisc";
> + reg = <0x4c200200 0x200>;
> + #index-cells = <1>;
> + };
> +
> ddr-pmu@4e300dc0 {
> compatible = "fsl,imx93-ddr-pmu";
> reg = <0x4e300dc0 0x200>;
> --
> 2.34.1
>


2024-04-02 08:45:18

by Shawn Guo

[permalink] [raw]
Subject: Re: [PATCH v10 03/11] arm64: dts: imx8ulp-evk: enable usb nodes and add ptn5150 nodes

On Thu, Mar 21, 2024 at 04:14:31PM +0800, Xu Yang wrote:
> Enable 2 USB nodes and add 2 PTN5150 nodes on i.MX8ULP evk board.
>
> Signed-off-by: Xu Yang <[email protected]>
>
> ---
> Changes in v2:
> - fix format as suggusted by Fabio
> - add PTN5150 nodes
> Changes in v3:
> - no changes
> Changes in v4:
> - no changes
> Changes in v5:
> - no changes
> Changes in v6:
> - no changes
> Changes in v7:
> - no changes
> Changes in v8:
> - no changes
> Changes in v9:
> - no changes
> Changes in v10:
> - no changes
> ---
> arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 84 +++++++++++++++++++
> 1 file changed, 84 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
> index 69dd8e31027c..bf418af31039 100644
> --- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
> @@ -133,6 +133,64 @@ pcal6408: gpio@21 {
> gpio-controller;
> #gpio-cells = <2>;
> };
> +
> + ptn5150_1: typec@1d {

Could you sort devices in unit-address?

> + compatible = "nxp,ptn5150";
> + reg = <0x1d>;
> + int-gpios = <&gpiof 3 IRQ_TYPE_EDGE_FALLING>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_typec1>;
> + status = "disabled";
> + };
> +
> + ptn5150_2: typec@3d {
> + compatible = "nxp,ptn5150";
> + reg = <0x3d>;
> + int-gpios = <&gpiof 5 IRQ_TYPE_EDGE_FALLING>;
> + pinctrl-names = "default";

Broken indent?

Shawn

> + pinctrl-0 = <&pinctrl_typec2>;
> + status = "disabled";
> + };
> +};
> +
> +&usbotg1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usb1>;
> + dr_mode = "otg";
> + hnp-disable;
> + srp-disable;
> + adp-disable;
> + over-current-active-low;
> + status = "okay";
> +};
> +
> +&usbphy1 {
> + fsl,tx-d-cal = <110>;
> + status = "okay";
> +};
> +
> +&usbmisc1 {
> + status = "okay";
> +};
> +
> +&usbotg2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usb2>;
> + dr_mode = "otg";
> + hnp-disable;
> + srp-disable;
> + adp-disable;
> + over-current-active-low;
> + status = "okay";
> +};
> +
> +&usbphy2 {
> + fsl,tx-d-cal = <110>;
> + status = "okay";
> +};
> +
> +&usbmisc2 {
> + status = "okay";
> };
>
> &usdhc0 {
> @@ -224,6 +282,32 @@ MX8ULP_PAD_PTE13__LPI2C7_SDA 0x20
> >;
> };
>
> + pinctrl_typec1: typec1grp {
> + fsl,pins = <
> + MX8ULP_PAD_PTF3__PTF3 0x3
> + >;
> + };
> +
> + pinctrl_typec2: typec2grp {
> + fsl,pins = <
> + MX8ULP_PAD_PTF5__PTF5 0x3
> + >;
> + };
> +
> + pinctrl_usb1: usb1grp {
> + fsl,pins = <
> + MX8ULP_PAD_PTF2__USB0_ID 0x10003
> + MX8ULP_PAD_PTF4__USB0_OC 0x10003
> + >;
> + };
> +
> + pinctrl_usb2: usb2grp {
> + fsl,pins = <
> + MX8ULP_PAD_PTD23__USB1_ID 0x10003
> + MX8ULP_PAD_PTF6__USB1_OC 0x10003
> + >;
> + };
> +
> pinctrl_usdhc0: usdhc0grp {
> fsl,pins = <
> MX8ULP_PAD_PTD1__SDHC0_CMD 0x3
> --
> 2.34.1
>


2024-04-02 09:07:51

by Shawn Guo

[permalink] [raw]
Subject: Re: [PATCH v10 09/11] arm64: dts: imx93-11x11-evk: enable usb and typec nodes

On Thu, Mar 21, 2024 at 04:14:37PM +0800, Xu Yang wrote:
> There are 2 Type-C ports and 2 USB controllers on i.MX93. Enable them.
>
> Signed-off-by: Xu Yang <[email protected]>
>
> ---
> Changes in v2:
> - remove status property in ptn5110 nodes
> - fix dt-schema warnings
> Changes in v3:
> - no changes
> Changes in v4:
> - no changes
> Changes in v5:
> - no changes
> Changes in v6:
> - no changes
> Changes in v7:
> - no changes
> Changes in v8:
> - no changes
> Changes in v9:
> - use compatible "nxp,ptn5110", "tcpci"
> Changes in v10:
> - no changes
> ---
> .../boot/dts/freescale/imx93-11x11-evk.dts | 118 ++++++++++++++++++
> 1 file changed, 118 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
> index 9921ea13ab48..ecc01d872e95 100644
> --- a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
> @@ -5,6 +5,7 @@
>
> /dts-v1/;
>
> +#include <dt-bindings/usb/pd.h>
> #include "imx93.dtsi"
>
> / {
> @@ -104,6 +105,80 @@ &mu2 {
> status = "okay";
> };
>
> +&lpi2c3 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clock-frequency = <400000>;
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&pinctrl_lpi2c3>;
> + pinctrl-1 = <&pinctrl_lpi2c3>;

Do you really need "sleep" pinctrl state?

> + status = "okay";
> +
> + ptn5110: tcpc@50 {
> + compatible = "nxp,ptn5110", "tcpci";
> + reg = <0x50>;
> + interrupt-parent = <&gpio3>;
> + interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
> +
> + typec1_con: connector {
> + compatible = "usb-c-connector";
> + label = "USB-C";
> + power-role = "dual";
> + data-role = "dual";
> + try-power-role = "sink";
> + source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
> + sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
> + PDO_VAR(5000, 20000, 3000)>;
> + op-sink-microwatt = <15000000>;
> + self-powered;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;

Have a newline between properties and child node.

Shawn

> + typec1_dr_sw: endpoint {
> + remote-endpoint = <&usb1_drd_sw>;
> + };
> + };
> + };
> + };
> + };
> +
> + ptn5110_2: tcpc@51 {
> + compatible = "nxp,ptn5110", "tcpci";
> + reg = <0x51>;
> + interrupt-parent = <&gpio3>;
> + interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
> +
> + typec2_con: connector {
> + compatible = "usb-c-connector";
> + label = "USB-C";
> + power-role = "dual";
> + data-role = "dual";
> + try-power-role = "sink";
> + source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
> + sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
> + PDO_VAR(5000, 20000, 3000)>;
> + op-sink-microwatt = <15000000>;
> + self-powered;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + typec2_dr_sw: endpoint {
> + remote-endpoint = <&usb2_drd_sw>;
> + };
> + };
> + };
> + };
> + };
> +};
> +
> &eqos {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_eqos>;
> @@ -156,6 +231,42 @@ &lpuart5 {
> status = "okay";
> };
>
> +&usbotg1 {
> + dr_mode = "otg";
> + hnp-disable;
> + srp-disable;
> + adp-disable;
> + usb-role-switch;
> + disable-over-current;
> + samsung,picophy-pre-emp-curr-control = <3>;
> + samsung,picophy-dc-vol-level-adjust = <7>;
> + status = "okay";
> +
> + port {
> + usb1_drd_sw: endpoint {
> + remote-endpoint = <&typec1_dr_sw>;
> + };
> + };
> +};
> +
> +&usbotg2 {
> + dr_mode = "otg";
> + hnp-disable;
> + srp-disable;
> + adp-disable;
> + usb-role-switch;
> + disable-over-current;
> + samsung,picophy-pre-emp-curr-control = <3>;
> + samsung,picophy-dc-vol-level-adjust = <7>;
> + status = "okay";
> +
> + port {
> + usb2_drd_sw: endpoint {
> + remote-endpoint = <&typec2_dr_sw>;
> + };
> + };
> +};
> +
> &usdhc1 {
> pinctrl-names = "default", "state_100mhz", "state_200mhz";
> pinctrl-0 = <&pinctrl_usdhc1>;
> @@ -222,6 +333,13 @@ MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x57e
> >;
> };
>
> + pinctrl_lpi2c3: lpi2c3grp {
> + fsl,pins = <
> + MX93_PAD_GPIO_IO28__LPI2C3_SDA 0x40000b9e
> + MX93_PAD_GPIO_IO29__LPI2C3_SCL 0x40000b9e
> + >;
> + };
> +
> pinctrl_uart1: uart1grp {
> fsl,pins = <
> MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
> --
> 2.34.1
>


2024-04-02 10:20:45

by Xu Yang

[permalink] [raw]
Subject: RE: [EXT] Re: [PATCH v10 02/11] arm64: dts: imx8ulp: add usb nodes



>
> On Thu, Mar 21, 2024 at 04:14:30PM +0800, Xu Yang wrote:
> > Add USB nodes on i.MX8ULP platform which has 2 USB controllers.
> >
> > Signed-off-by: Xu Yang <[email protected]>
> >
> > ---
> > Changes in v2:
> > - no changes
> > Changes in v3:
> > - no changes
> > Changes in v4:
> > - no changes
> > Changes in v5:
> > - no changes
> > Changes in v6:
> > - drop usbphy aliases
> > Changes in v7:
> > - no changes
> > Changes in v8:
> > - no changes
> > Changes in v9:
> > - no changes
> > Changes in v10:
> > - no changes
> > ---
> > arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 62 ++++++++++++++++++++++
> > 1 file changed, 62 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> > index c4a0082f30d3..7da9461a5745 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> > @@ -472,6 +472,68 @@ usdhc2: mmc@298f0000 {
> > status = "disabled";
> > };
> >
> > + usbotg1: usb@29900000 {
> > + compatible = "fsl,imx8ulp-usb", "fsl,imx7ulp-usb", "fsl,imx6ul-usb";
> > + reg = <0x29900000 0x200>;
> > + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&pcc4 IMX8ULP_CLK_USB0>;
> > + power-domains = <&scmi_devpd IMX8ULP_PD_USB0>;
> > + phys = <&usbphy1>;
> > + fsl,usbmisc = <&usbmisc1 0>;
> > + ahb-burst-config = <0x0>;
> > + tx-burst-size-dword = <0x8>;
> > + rx-burst-size-dword = <0x8>;
> > + status = "disabled";
> > + };
> > +
> > + usbmisc1: usbmisc@29900200 {
> > + compatible = "fsl,imx8ulp-usbmisc", "fsl,imx7d-usbmisc",
> > + "fsl,imx6q-usbmisc";
> > + #index-cells = <1>;
> > + reg = <0x29900200 0x200>;
>
> Could you move 'reg' above so that it's after compatible?

Okay.

>
> > + status = "disabled";
> > + };
> > +
> > + usbphy1: usb-phy@29910000 {
> > + compatible = "fsl,imx8ulp-usbphy", "fsl,imx7ulp-usbphy";
> > + reg = <0x29910000 0x10000>;
> > + interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&pcc4 IMX8ULP_CLK_USB0_PHY>;
> > + #phy-cells = <0>;
> > + status = "disabled";
> > + };
> > +
> > + usbotg2: usb@29920000 {
> > + compatible = "fsl,imx8ulp-usb", "fsl,imx7ulp-usb", "fsl,imx6ul-usb";
> > + reg = <0x29920000 0x200>;
> > + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&pcc4 IMX8ULP_CLK_USB1>;
> > + power-domains = <&scmi_devpd IMX8ULP_PD_USDHC2_USB1>;
> > + phys = <&usbphy2>;
> > + fsl,usbmisc = <&usbmisc2 0>;
> > + ahb-burst-config = <0x0>;
> > + tx-burst-size-dword = <0x8>;
> > + rx-burst-size-dword = <0x8>;
> > + status = "disabled";
> > + };
> > +
> > + usbmisc2: usbmisc@29920200 {
> > + compatible = "fsl,imx8ulp-usbmisc", "fsl,imx7d-usbmisc",
> > + "fsl,imx6q-usbmisc";
> > + #index-cells = <1>;
> > + reg = <0x29920200 0x200>;
>
> Ditto

Okay.

Thanks,
Xu Yang

>
> Shawn
>
> > + status = "disabled";
> > + };
> > +
> > + usbphy2: usb-phy@29930000 {
> > + compatible = "fsl,imx8ulp-usbphy", "fsl,imx7ulp-usbphy";
> > + reg = <0x29930000 0x10000>;
> > + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&pcc4 IMX8ULP_CLK_USB1_PHY>;
> > + #phy-cells = <0>;
> > + status = "disabled";
> > + };
> > +
> > fec: ethernet@29950000 {
> > compatible = "fsl,imx8ulp-fec", "fsl,imx6ul-fec", "fsl,imx6q-fec";
> > reg = <0x29950000 0x10000>;
> > --
> > 2.34.1
> >


2024-04-02 10:59:28

by Xu Yang

[permalink] [raw]
Subject: RE: [EXT] Re: [PATCH v10 08/11] arm64: dts: imx93: add usb nodes

Hi Shawn,

>
> On Thu, Mar 21, 2024 at 04:14:36PM +0800, Xu Yang wrote:
> > There are 2 USB controllers on i.MX93. Add them.
> >
> > Acked-by: Alexander Stein <[email protected]>
> > Tested-by: Alexander Stein <[email protected]> # TQMa9352LA/CA
> > Signed-off-by: Xu Yang <[email protected]>
> >
> > ---
> > Changes in v2:
> > - fix format as suggested by Alexander
> > - change compatible from fsl,imx8mm-usb to fsl,imx93-usb
> > Changes in v3:
> > - replace deprecated fsl,usbphy with phys as suggested by Alexander
> > - reorder nodes
> > Changes in v4:
> > - fix the alignment
> > Changes in v5:
> > - rename usb_wakeup_clk to usb_wakeup
> > Changes in v6:
> > - rename usb_ctrl_root_clk to usb_ctrl_root
> > Changes in v7:
> > - no changes
> > Changes in v8:
> > - no changes
> > Changes in v9:
> > - no changes
> > Changes in v10:
> > - no changes
> > ---
> > arch/arm64/boot/dts/freescale/imx93.dtsi | 58 ++++++++++++++++++++++++
> > 1 file changed, 58 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
> > index 8f2e7c42ad6e..4a7efccb4f67 100644
> > --- a/arch/arm64/boot/dts/freescale/imx93.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
> > @@ -183,6 +183,20 @@ mqs2: mqs2 {
> > status = "disabled";
> > };
> >
> > + usbphynop1: usbphynop1 {
> > + compatible = "usb-nop-xceiv";
> > + #phy-cells = <0>;
> > + clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>;
> > + clock-names = "main_clk";
> > + };
> > +
> > + usbphynop2: usbphynop2 {
> > + compatible = "usb-nop-xceiv";
> > + #phy-cells = <0>;
> > + clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>;
> > + clock-names = "main_clk";
> > + };
> > +
> > soc@0 {
> > compatible = "simple-bus";
> > #address-cells = <1>;
> > @@ -1167,6 +1181,50 @@ media_blk_ctrl: system-controller@4ac10000 {
> > status = "disabled";
> > };
> >
> > + usbotg1: usb@4c100000 {
> > + compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb";
> > + reg = <0x4c100000 0x200>;
> > + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>,
> > + <&clk IMX93_CLK_HSIO_32K_GATE>;
> > + clock-names = "usb_ctrl_root", "usb_wakeup";
> > + assigned-clocks = <&clk IMX93_CLK_HSIO>;
> > + assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
> > + assigned-clock-rates = <133000000>;
> > + phys = <&usbphynop1>;
> > + fsl,usbmisc = <&usbmisc1 0>;
> > + status = "disabled";
> > + };
> > +
> > + usbmisc1: usbmisc@4c100200 {
> > + compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",
> > + "fsl,imx6q-usbmisc";
> > + reg = <0x4c100200 0x200>;
> > + #index-cells = <1>;
>
> Do we still need this '#index-cells' property? I see it's being marked
> as deprecated in bindings doc.

Sorry, the driver still needs fetch the value of this property so far. Otherwise,
the driver will probe failed. We still need some time to totally retire this property.

Thanks,
Xu Yang

>
> Shawn
>
> > + };
> > +
> > + usbotg2: usb@4c200000 {
> > + compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb";
> > + reg = <0x4c200000 0x200>;
> > + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>,
> > + <&clk IMX93_CLK_HSIO_32K_GATE>;
> > + clock-names = "usb_ctrl_root", "usb_wakeup";
> > + assigned-clocks = <&clk IMX93_CLK_HSIO>;
> > + assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
> > + assigned-clock-rates = <133000000>;
> > + phys = <&usbphynop2>;
> > + fsl,usbmisc = <&usbmisc2 0>;
> > + status = "disabled";
> > + };
> > +
> > + usbmisc2: usbmisc@4c200200 {
> > + compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",
> > + "fsl,imx6q-usbmisc";
> > + reg = <0x4c200200 0x200>;
> > + #index-cells = <1>;
> > + };
> > +
> > ddr-pmu@4e300dc0 {
> > compatible = "fsl,imx93-ddr-pmu";
> > reg = <0x4e300dc0 0x200>;
> > --
> > 2.34.1
> >


2024-04-02 11:06:48

by Xu Yang

[permalink] [raw]
Subject: RE: [EXT] Re: [PATCH v10 03/11] arm64: dts: imx8ulp-evk: enable usb nodes and add ptn5150 nodes


>
> On Thu, Mar 21, 2024 at 04:14:31PM +0800, Xu Yang wrote:
> > Enable 2 USB nodes and add 2 PTN5150 nodes on i.MX8ULP evk board.
> >
> > Signed-off-by: Xu Yang <[email protected]>
> >
> > ---
> > Changes in v2:
> > - fix format as suggusted by Fabio
> > - add PTN5150 nodes
> > Changes in v3:
> > - no changes
> > Changes in v4:
> > - no changes
> > Changes in v5:
> > - no changes
> > Changes in v6:
> > - no changes
> > Changes in v7:
> > - no changes
> > Changes in v8:
> > - no changes
> > Changes in v9:
> > - no changes
> > Changes in v10:
> > - no changes
> > ---
> > arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 84 +++++++++++++++++++
> > 1 file changed, 84 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
> > index 69dd8e31027c..bf418af31039 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
> > @@ -133,6 +133,64 @@ pcal6408: gpio@21 {
> > gpio-controller;
> > #gpio-cells = <2>;
> > };
> > +
> > + ptn5150_1: typec@1d {
>
> Could you sort devices in unit-address?

Okay.

>
> > + compatible = "nxp,ptn5150";
> > + reg = <0x1d>;
> > + int-gpios = <&gpiof 3 IRQ_TYPE_EDGE_FALLING>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_typec1>;
> > + status = "disabled";
> > + };
> > +
> > + ptn5150_2: typec@3d {
> > + compatible = "nxp,ptn5150";
> > + reg = <0x3d>;
> > + int-gpios = <&gpiof 5 IRQ_TYPE_EDGE_FALLING>;
> > + pinctrl-names = "default";
>
> Broken indent?

Yes, will fix it.

Thanks,
Xu Yang

>
> Shawn
>
> > + pinctrl-0 = <&pinctrl_typec2>;
> > + status = "disabled";
> > + };
> > +};
> > +
> > +&usbotg1 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_usb1>;
> > + dr_mode = "otg";
> > + hnp-disable;
> > + srp-disable;
> > + adp-disable;
> > + over-current-active-low;
> > + status = "okay";
> > +};
> > +
> > +&usbphy1 {
> > + fsl,tx-d-cal = <110>;
> > + status = "okay";
> > +};
> > +
> > +&usbmisc1 {
> > + status = "okay";
> > +};
> > +
> > +&usbotg2 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_usb2>;
> > + dr_mode = "otg";
> > + hnp-disable;
> > + srp-disable;
> > + adp-disable;
> > + over-current-active-low;
> > + status = "okay";
> > +};
> > +
> > +&usbphy2 {
> > + fsl,tx-d-cal = <110>;
> > + status = "okay";
> > +};
> > +
> > +&usbmisc2 {
> > + status = "okay";
> > };
> >
> > &usdhc0 {
> > @@ -224,6 +282,32 @@ MX8ULP_PAD_PTE13__LPI2C7_SDA 0x20
> > >;
> > };
> >
> > + pinctrl_typec1: typec1grp {
> > + fsl,pins = <
> > + MX8ULP_PAD_PTF3__PTF3 0x3
> > + >;
> > + };
> > +
> > + pinctrl_typec2: typec2grp {
> > + fsl,pins = <
> > + MX8ULP_PAD_PTF5__PTF5 0x3
> > + >;
> > + };
> > +
> > + pinctrl_usb1: usb1grp {
> > + fsl,pins = <
> > + MX8ULP_PAD_PTF2__USB0_ID 0x10003
> > + MX8ULP_PAD_PTF4__USB0_OC 0x10003
> > + >;
> > + };
> > +
> > + pinctrl_usb2: usb2grp {
> > + fsl,pins = <
> > + MX8ULP_PAD_PTD23__USB1_ID 0x10003
> > + MX8ULP_PAD_PTF6__USB1_OC 0x10003
> > + >;
> > + };
> > +
> > pinctrl_usdhc0: usdhc0grp {
> > fsl,pins = <
> > MX8ULP_PAD_PTD1__SDHC0_CMD 0x3
> > --
> > 2.34.1
> >


2024-04-02 11:11:12

by Xu Yang

[permalink] [raw]
Subject: RE: [EXT] Re: [PATCH v10 09/11] arm64: dts: imx93-11x11-evk: enable usb and typec nodes


>
> On Thu, Mar 21, 2024 at 04:14:37PM +0800, Xu Yang wrote:
> > There are 2 Type-C ports and 2 USB controllers on i.MX93. Enable them.
> >
> > Signed-off-by: Xu Yang <[email protected]>
> >
> > ---
> > Changes in v2:
> > - remove status property in ptn5110 nodes
> > - fix dt-schema warnings
> > Changes in v3:
> > - no changes
> > Changes in v4:
> > - no changes
> > Changes in v5:
> > - no changes
> > Changes in v6:
> > - no changes
> > Changes in v7:
> > - no changes
> > Changes in v8:
> > - no changes
> > Changes in v9:
> > - use compatible "nxp,ptn5110", "tcpci"
> > Changes in v10:
> > - no changes
> > ---
> > .../boot/dts/freescale/imx93-11x11-evk.dts | 118 ++++++++++++++++++
> > 1 file changed, 118 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
> > index 9921ea13ab48..ecc01d872e95 100644
> > --- a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
> > @@ -5,6 +5,7 @@
> >
> > /dts-v1/;
> >
> > +#include <dt-bindings/usb/pd.h>
> > #include "imx93.dtsi"
> >
> > / {
> > @@ -104,6 +105,80 @@ &mu2 {
> > status = "okay";
> > };
> >
> > +&lpi2c3 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + clock-frequency = <400000>;
> > + pinctrl-names = "default", "sleep";
> > + pinctrl-0 = <&pinctrl_lpi2c3>;
> > + pinctrl-1 = <&pinctrl_lpi2c3>;
>
> Do you really need "sleep" pinctrl state?

"sleep" pinctrl state can be removed.

>
> > + status = "okay";
> > +
> > + ptn5110: tcpc@50 {
> > + compatible = "nxp,ptn5110", "tcpci";
> > + reg = <0x50>;
> > + interrupt-parent = <&gpio3>;
> > + interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
> > +
> > + typec1_con: connector {
> > + compatible = "usb-c-connector";
> > + label = "USB-C";
> > + power-role = "dual";
> > + data-role = "dual";
> > + try-power-role = "sink";
> > + source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
> > + sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
> > + PDO_VAR(5000, 20000, 3000)>;
> > + op-sink-microwatt = <15000000>;
> > + self-powered;
> > +
> > + ports {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + port@0 {
> > + reg = <0>;
>
> Have a newline between properties and child node.

Okay.

Thanks,
Xu Yang

>
> Shawn
>
> > + typec1_dr_sw: endpoint {
> > + remote-endpoint = <&usb1_drd_sw>;
> > + };
> > + };
> > + };
> > + };
> > + };
> > +
> > + ptn5110_2: tcpc@51 {
> > + compatible = "nxp,ptn5110", "tcpci";
> > + reg = <0x51>;
> > + interrupt-parent = <&gpio3>;
> > + interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
> > +
> > + typec2_con: connector {
> > + compatible = "usb-c-connector";
> > + label = "USB-C";
> > + power-role = "dual";
> > + data-role = "dual";
> > + try-power-role = "sink";
> > + source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
> > + sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
> > + PDO_VAR(5000, 20000, 3000)>;
> > + op-sink-microwatt = <15000000>;
> > + self-powered;
> > +
> > + ports {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + port@0 {
> > + reg = <0>;
> > + typec2_dr_sw: endpoint {
> > + remote-endpoint = <&usb2_drd_sw>;
> > + };
> > + };
> > + };
> > + };
> > + };
> > +};
> > +
> > &eqos {
> > pinctrl-names = "default";
> > pinctrl-0 = <&pinctrl_eqos>;
> > @@ -156,6 +231,42 @@ &lpuart5 {
> > status = "okay";
> > };
> >
> > +&usbotg1 {
> > + dr_mode = "otg";
> > + hnp-disable;
> > + srp-disable;
> > + adp-disable;
> > + usb-role-switch;
> > + disable-over-current;
> > + samsung,picophy-pre-emp-curr-control = <3>;
> > + samsung,picophy-dc-vol-level-adjust = <7>;
> > + status = "okay";
> > +
> > + port {
> > + usb1_drd_sw: endpoint {
> > + remote-endpoint = <&typec1_dr_sw>;
> > + };
> > + };
> > +};
> > +
> > +&usbotg2 {
> > + dr_mode = "otg";
> > + hnp-disable;
> > + srp-disable;
> > + adp-disable;
> > + usb-role-switch;
> > + disable-over-current;
> > + samsung,picophy-pre-emp-curr-control = <3>;
> > + samsung,picophy-dc-vol-level-adjust = <7>;
> > + status = "okay";
> > +
> > + port {
> > + usb2_drd_sw: endpoint {
> > + remote-endpoint = <&typec2_dr_sw>;
> > + };
> > + };
> > +};
> > +
> > &usdhc1 {
> > pinctrl-names = "default", "state_100mhz", "state_200mhz";
> > pinctrl-0 = <&pinctrl_usdhc1>;
> > @@ -222,6 +333,13 @@ MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x57e
> > >;
> > };
> >
> > + pinctrl_lpi2c3: lpi2c3grp {
> > + fsl,pins = <
> > + MX93_PAD_GPIO_IO28__LPI2C3_SDA 0x40000b9e
> > + MX93_PAD_GPIO_IO29__LPI2C3_SCL 0x40000b9e
> > + >;
> > + };
> > +
> > pinctrl_uart1: uart1grp {
> > fsl,pins = <
> > MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
> > --
> > 2.34.1
> >